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Commit | Line | Data |
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1da177e4 | 1 | /* |
033ef338 | 2 | * 64-bit pSeries and RS/6000 setup code. |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * Adapted from 'alpha' version by Gary Thomas | |
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
7 | * Modified by PPC64 Team, IBM Corp | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | /* | |
16 | * bootup setup stuff.. | |
17 | */ | |
18 | ||
62d60e9f | 19 | #include <linux/cpu.h> |
1da177e4 LT |
20 | #include <linux/errno.h> |
21 | #include <linux/sched.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/mm.h> | |
24 | #include <linux/stddef.h> | |
25 | #include <linux/unistd.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/user.h> | |
28 | #include <linux/a.out.h> | |
29 | #include <linux/tty.h> | |
30 | #include <linux/major.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/reboot.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/ioport.h> | |
35 | #include <linux/console.h> | |
36 | #include <linux/pci.h> | |
cebb2b15 | 37 | #include <linux/utsname.h> |
1da177e4 LT |
38 | #include <linux/adb.h> |
39 | #include <linux/module.h> | |
40 | #include <linux/delay.h> | |
41 | #include <linux/irq.h> | |
42 | #include <linux/seq_file.h> | |
43 | #include <linux/root_dev.h> | |
44 | ||
45 | #include <asm/mmu.h> | |
46 | #include <asm/processor.h> | |
47 | #include <asm/io.h> | |
48 | #include <asm/pgtable.h> | |
49 | #include <asm/prom.h> | |
50 | #include <asm/rtas.h> | |
51 | #include <asm/pci-bridge.h> | |
52 | #include <asm/iommu.h> | |
53 | #include <asm/dma.h> | |
54 | #include <asm/machdep.h> | |
55 | #include <asm/irq.h> | |
56 | #include <asm/time.h> | |
57 | #include <asm/nvram.h> | |
007e8f51 | 58 | #include "xics.h" |
180a3362 | 59 | #include <asm/pmc.h> |
bbeb3f4c | 60 | #include <asm/mpic.h> |
d387899f | 61 | #include <asm/ppc-pci.h> |
69a80d3f PM |
62 | #include <asm/i8259.h> |
63 | #include <asm/udbg.h> | |
2249ca9d | 64 | #include <asm/smp.h> |
577830b0 | 65 | #include <asm/firmware.h> |
bed59275 | 66 | #include <asm/eeh.h> |
1da177e4 | 67 | |
a1218720 | 68 | #include "plpar_wrappers.h" |
577830b0 | 69 | #include "pseries.h" |
a1218720 | 70 | |
1da177e4 | 71 | |
1da177e4 LT |
72 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ |
73 | ||
fbd7740f PM |
74 | static void pseries_shared_idle_sleep(void); |
75 | static void pseries_dedicated_idle_sleep(void); | |
62d60e9f | 76 | |
0ebfff14 | 77 | static struct device_node *pSeries_mpic_node; |
1da177e4 | 78 | |
8446196a | 79 | static void pSeries_show_cpuinfo(struct seq_file *m) |
1da177e4 LT |
80 | { |
81 | struct device_node *root; | |
82 | const char *model = ""; | |
83 | ||
84 | root = of_find_node_by_path("/"); | |
85 | if (root) | |
e2eb6392 | 86 | model = of_get_property(root, "model", NULL); |
1da177e4 LT |
87 | seq_printf(m, "machine\t\t: CHRP %s\n", model); |
88 | of_node_put(root); | |
89 | } | |
90 | ||
91 | /* Initialize firmware assisted non-maskable interrupts if | |
92 | * the firmware supports this feature. | |
1da177e4 LT |
93 | */ |
94 | static void __init fwnmi_init(void) | |
95 | { | |
8c4f1f29 ME |
96 | unsigned long system_reset_addr, machine_check_addr; |
97 | ||
1da177e4 LT |
98 | int ibm_nmi_register = rtas_token("ibm,nmi-register"); |
99 | if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) | |
100 | return; | |
8c4f1f29 ME |
101 | |
102 | /* If the kernel's not linked at zero we point the firmware at low | |
103 | * addresses anyway, and use a trampoline to get to the real code. */ | |
104 | system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; | |
105 | machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; | |
106 | ||
107 | if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, | |
108 | machine_check_addr)) | |
1da177e4 LT |
109 | fwnmi_active = 1; |
110 | } | |
111 | ||
7d12e780 | 112 | void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) |
b9e5b4e6 | 113 | { |
35a84c2f | 114 | unsigned int cascade_irq = i8259_irq(); |
0ebfff14 | 115 | if (cascade_irq != NO_IRQ) |
7d12e780 | 116 | generic_handle_irq(cascade_irq); |
0ebfff14 | 117 | desc->chip->eoi(irq); |
b9e5b4e6 BH |
118 | } |
119 | ||
30d6ad25 | 120 | static void __init pseries_setup_i8259_cascade(void) |
032ace7e ME |
121 | { |
122 | struct device_node *np, *old, *found = NULL; | |
30d6ad25 | 123 | unsigned int cascade; |
032ace7e ME |
124 | const u32 *addrp; |
125 | unsigned long intack = 0; | |
30d6ad25 | 126 | int naddr; |
032ace7e | 127 | |
30d6ad25 | 128 | for_each_node_by_type(np, "interrupt-controller") { |
032ace7e ME |
129 | if (of_device_is_compatible(np, "chrp,iic")) { |
130 | found = np; | |
131 | break; | |
132 | } | |
30d6ad25 ME |
133 | } |
134 | ||
032ace7e | 135 | if (found == NULL) { |
30d6ad25 | 136 | printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); |
032ace7e ME |
137 | return; |
138 | } | |
30d6ad25 | 139 | |
032ace7e ME |
140 | cascade = irq_of_parse_and_map(found, 0); |
141 | if (cascade == NO_IRQ) { | |
30d6ad25 | 142 | printk(KERN_ERR "pic: failed to map cascade interrupt"); |
032ace7e ME |
143 | return; |
144 | } | |
30d6ad25 | 145 | pr_debug("pic: cascade mapped to irq %d\n", cascade); |
032ace7e ME |
146 | |
147 | for (old = of_node_get(found); old != NULL ; old = np) { | |
148 | np = of_get_parent(old); | |
149 | of_node_put(old); | |
150 | if (np == NULL) | |
151 | break; | |
152 | if (strcmp(np->name, "pci") != 0) | |
153 | continue; | |
154 | addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); | |
155 | if (addrp == NULL) | |
156 | continue; | |
157 | naddr = of_n_addr_cells(np); | |
158 | intack = addrp[naddr-1]; | |
159 | if (naddr > 1) | |
160 | intack |= ((unsigned long)addrp[naddr-2]) << 32; | |
161 | } | |
162 | if (intack) | |
30d6ad25 | 163 | printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); |
032ace7e ME |
164 | i8259_init(found, intack); |
165 | of_node_put(found); | |
166 | set_irq_chained_handler(cascade, pseries_8259_cascade); | |
167 | } | |
168 | ||
0ebfff14 | 169 | static void __init pseries_mpic_init_IRQ(void) |
1da177e4 | 170 | { |
f01567d6 | 171 | struct device_node *np; |
954a46e2 | 172 | const unsigned int *opprop; |
1da177e4 | 173 | unsigned long openpic_addr = 0; |
0ebfff14 BH |
174 | int naddr, n, i, opplen; |
175 | struct mpic *mpic; | |
1da177e4 | 176 | |
0ebfff14 | 177 | np = of_find_node_by_path("/"); |
a8bda5dd | 178 | naddr = of_n_addr_cells(np); |
e2eb6392 | 179 | opprop = of_get_property(np, "platform-open-pic", &opplen); |
1da177e4 | 180 | if (opprop != 0) { |
0ebfff14 | 181 | openpic_addr = of_read_number(opprop, naddr); |
1da177e4 LT |
182 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); |
183 | } | |
0ebfff14 | 184 | of_node_put(np); |
1da177e4 LT |
185 | |
186 | BUG_ON(openpic_addr == 0); | |
187 | ||
1da177e4 | 188 | /* Setup the openpic driver */ |
0ebfff14 BH |
189 | mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, |
190 | MPIC_PRIMARY, | |
191 | 16, 250, /* isu size, irq count */ | |
192 | " MPIC "); | |
193 | BUG_ON(mpic == NULL); | |
194 | ||
195 | /* Add ISUs */ | |
196 | opplen /= sizeof(u32); | |
197 | for (n = 0, i = naddr; i < opplen; i += naddr, n++) { | |
198 | unsigned long isuaddr = of_read_number(opprop + i, naddr); | |
199 | mpic_assign_isu(mpic, n, isuaddr); | |
200 | } | |
201 | ||
202 | /* All ISUs are setup, complete initialization */ | |
203 | mpic_init(mpic); | |
204 | ||
205 | /* Look for cascade */ | |
f01567d6 | 206 | pseries_setup_i8259_cascade(); |
1da177e4 LT |
207 | } |
208 | ||
032ace7e ME |
209 | static void __init pseries_xics_init_IRQ(void) |
210 | { | |
211 | xics_init_IRQ(); | |
30d6ad25 | 212 | pseries_setup_i8259_cascade(); |
032ace7e ME |
213 | } |
214 | ||
180a3362 ME |
215 | static void pseries_lpar_enable_pmcs(void) |
216 | { | |
217 | unsigned long set, reset; | |
218 | ||
180a3362 ME |
219 | set = 1UL << 63; |
220 | reset = 0; | |
221 | plpar_hcall_norets(H_PERFMON, set, reset); | |
222 | ||
223 | /* instruct hypervisor to maintain PMCs */ | |
224 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) | |
3356bb9f | 225 | get_lppaca()->pmcregs_in_use = 1; |
180a3362 ME |
226 | } |
227 | ||
0ebfff14 BH |
228 | static void __init pseries_discover_pic(void) |
229 | { | |
230 | struct device_node *np; | |
954a46e2 | 231 | const char *typep; |
0ebfff14 BH |
232 | |
233 | for (np = NULL; (np = of_find_node_by_name(np, | |
234 | "interrupt-controller"));) { | |
e2eb6392 | 235 | typep = of_get_property(np, "compatible", NULL); |
0ebfff14 BH |
236 | if (strstr(typep, "open-pic")) { |
237 | pSeries_mpic_node = of_node_get(np); | |
238 | ppc_md.init_IRQ = pseries_mpic_init_IRQ; | |
239 | ppc_md.get_irq = mpic_get_irq; | |
dce623e0 | 240 | setup_kexec_cpu_down_mpic(); |
0ebfff14 | 241 | smp_init_pseries_mpic(); |
0ebfff14 BH |
242 | return; |
243 | } else if (strstr(typep, "ppc-xicp")) { | |
032ace7e | 244 | ppc_md.init_IRQ = pseries_xics_init_IRQ; |
dce623e0 | 245 | setup_kexec_cpu_down_xics(); |
0ebfff14 | 246 | smp_init_pseries_xics(); |
0ebfff14 BH |
247 | return; |
248 | } | |
249 | } | |
250 | printk(KERN_ERR "pSeries_discover_pic: failed to recognize" | |
251 | " interrupt-controller\n"); | |
252 | } | |
253 | ||
254 | static void __init pSeries_setup_arch(void) | |
255 | { | |
256 | /* Discover PIC type and setup ppc_md accordingly */ | |
257 | pseries_discover_pic(); | |
258 | ||
1da177e4 LT |
259 | /* openpic global configuration register (64-bit format). */ |
260 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | |
261 | /* python0 facility area (mmio) (64-bit format) REAL address. */ | |
262 | ||
263 | /* init to some ~sane value until calibrate_delay() runs */ | |
264 | loops_per_jiffy = 50000000; | |
265 | ||
1da177e4 LT |
266 | fwnmi_init(); |
267 | ||
268 | /* Find and initialize PCI host bridges */ | |
269 | init_pci_config_tokens(); | |
1da177e4 | 270 | find_and_init_phbs(); |
0160f53e | 271 | eeh_init(); |
1da177e4 | 272 | |
1da177e4 LT |
273 | pSeries_nvram_init(); |
274 | ||
62d60e9f | 275 | /* Choose an idle loop */ |
1ababe11 | 276 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) { |
8d15a3e5 | 277 | vpa_init(boot_cpuid); |
3356bb9f | 278 | if (get_lppaca()->shared_proc) { |
4baaf0cf | 279 | printk(KERN_DEBUG "Using shared processor idle loop\n"); |
fbd7740f | 280 | ppc_md.power_save = pseries_shared_idle_sleep; |
62d60e9f | 281 | } else { |
4baaf0cf | 282 | printk(KERN_DEBUG "Using dedicated idle loop\n"); |
fbd7740f | 283 | ppc_md.power_save = pseries_dedicated_idle_sleep; |
62d60e9f ME |
284 | } |
285 | } else { | |
4baaf0cf | 286 | printk(KERN_DEBUG "Using default idle loop\n"); |
62d60e9f | 287 | } |
180a3362 | 288 | |
57cfb814 | 289 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
180a3362 ME |
290 | ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; |
291 | else | |
292 | ppc_md.enable_pmcs = power4_enable_pmcs; | |
1da177e4 LT |
293 | } |
294 | ||
295 | static int __init pSeries_init_panel(void) | |
296 | { | |
297 | /* Manually leave the kernel version on the panel. */ | |
298 | ppc_md.progress("Linux ppc64\n", 0); | |
96b644bd | 299 | ppc_md.progress(init_utsname()->version, 0); |
1da177e4 LT |
300 | |
301 | return 0; | |
302 | } | |
303 | arch_initcall(pSeries_init_panel); | |
304 | ||
cab0af98 ME |
305 | static int pseries_set_dabr(unsigned long dabr) |
306 | { | |
76032de8 | 307 | return plpar_hcall_norets(H_SET_DABR, dabr); |
cab0af98 ME |
308 | } |
309 | ||
76032de8 ME |
310 | static int pseries_set_xdabr(unsigned long dabr) |
311 | { | |
312 | /* We want to catch accesses from kernel and userspace */ | |
313 | return plpar_hcall_norets(H_SET_XDABR, dabr, | |
314 | H_DABRX_KERNEL | H_DABRX_USER); | |
315 | } | |
1da177e4 LT |
316 | |
317 | /* | |
318 | * Early initialization. Relocation is on but do not reference unbolted pages | |
319 | */ | |
320 | static void __init pSeries_init_early(void) | |
321 | { | |
f7ebf352 | 322 | pr_debug(" -> pSeries_init_early()\n"); |
1da177e4 | 323 | |
57cfb814 | 324 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
1da177e4 | 325 | find_udbg_vterm(); |
1da177e4 | 326 | |
76032de8 | 327 | if (firmware_has_feature(FW_FEATURE_DABR)) |
cab0af98 | 328 | ppc_md.set_dabr = pseries_set_dabr; |
76032de8 ME |
329 | else if (firmware_has_feature(FW_FEATURE_XDABR)) |
330 | ppc_md.set_dabr = pseries_set_xdabr; | |
1da177e4 LT |
331 | |
332 | iommu_init_early_pSeries(); | |
333 | ||
f7ebf352 | 334 | pr_debug(" <- pSeries_init_early()\n"); |
1da177e4 LT |
335 | } |
336 | ||
1da177e4 LT |
337 | /* |
338 | * Called very early, MMU is off, device-tree isn't unflattened | |
339 | */ | |
1da177e4 | 340 | |
e8222502 BH |
341 | static int __init pSeries_probe_hypertas(unsigned long node, |
342 | const char *uname, int depth, | |
343 | void *data) | |
1da177e4 | 344 | { |
ca8ffc97 MN |
345 | const char *hypertas; |
346 | unsigned long len; | |
347 | ||
e8222502 BH |
348 | if (depth != 1 || |
349 | (strcmp(uname, "rtas") != 0 && strcmp(uname, "rtas@0") != 0)) | |
ca8ffc97 MN |
350 | return 0; |
351 | ||
352 | hypertas = of_get_flat_dt_prop(node, "ibm,hypertas-functions", &len); | |
353 | if (!hypertas) | |
354 | return 1; | |
e8222502 | 355 | |
ca8ffc97 MN |
356 | powerpc_firmware_features |= FW_FEATURE_LPAR; |
357 | fw_feature_init(hypertas, len); | |
e8222502 | 358 | |
ca8ffc97 | 359 | return 1; |
e8222502 BH |
360 | } |
361 | ||
362 | static int __init pSeries_probe(void) | |
363 | { | |
133dda1e | 364 | unsigned long root = of_get_flat_dt_root(); |
5773bbcd AB |
365 | char *dtype = of_get_flat_dt_prop(root, "device_type", NULL); |
366 | ||
e8222502 BH |
367 | if (dtype == NULL) |
368 | return 0; | |
369 | if (strcmp(dtype, "chrp")) | |
1da177e4 LT |
370 | return 0; |
371 | ||
133dda1e AB |
372 | /* Cell blades firmware claims to be chrp while it's not. Until this |
373 | * is fixed, we need to avoid those here. | |
374 | */ | |
375 | if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") || | |
376 | of_flat_dt_is_compatible(root, "IBM,CBEA")) | |
377 | return 0; | |
378 | ||
f7ebf352 | 379 | pr_debug("pSeries detected, looking for LPAR capability...\n"); |
1da177e4 | 380 | |
e8222502 BH |
381 | /* Now try to figure out if we are running on LPAR */ |
382 | of_scan_flat_dt(pSeries_probe_hypertas, NULL); | |
383 | ||
a2235354 AB |
384 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
385 | hpte_init_lpar(); | |
386 | else | |
387 | hpte_init_native(); | |
388 | ||
f7ebf352 ME |
389 | pr_debug("Machine is%s LPAR !\n", |
390 | (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); | |
57cfb814 | 391 | |
1da177e4 LT |
392 | return 1; |
393 | } | |
394 | ||
e8222502 | 395 | |
c66d5dd6 ME |
396 | DECLARE_PER_CPU(unsigned long, smt_snooze_delay); |
397 | ||
fbd7740f | 398 | static void pseries_dedicated_idle_sleep(void) |
143a1dec | 399 | { |
050a0938 | 400 | unsigned int cpu = smp_processor_id(); |
c66d5dd6 | 401 | unsigned long start_snooze; |
96366a8d | 402 | unsigned long in_purr, out_purr; |
c66d5dd6 | 403 | |
fbd7740f PM |
404 | /* |
405 | * Indicate to the HV that we are idle. Now would be | |
406 | * a good time to find other work to dispatch. | |
407 | */ | |
408 | get_lppaca()->idle = 1; | |
d8c391a5 | 409 | get_lppaca()->donate_dedicated_cpu = 1; |
96366a8d | 410 | in_purr = mfspr(SPRN_PURR); |
050a0938 | 411 | |
fbd7740f PM |
412 | /* |
413 | * We come in with interrupts disabled, and need_resched() | |
414 | * has been checked recently. If we should poll for a little | |
415 | * while, do so. | |
416 | */ | |
0ddd3e7d | 417 | if (__get_cpu_var(smt_snooze_delay)) { |
fbd7740f | 418 | start_snooze = get_tb() + |
0ddd3e7d | 419 | __get_cpu_var(smt_snooze_delay) * tb_ticks_per_usec; |
fbd7740f PM |
420 | local_irq_enable(); |
421 | set_thread_flag(TIF_POLLING_NRFLAG); | |
050a0938 | 422 | |
fbd7740f PM |
423 | while (get_tb() < start_snooze) { |
424 | if (need_resched() || cpu_is_offline(cpu)) | |
425 | goto out; | |
426 | ppc64_runlatch_off(); | |
427 | HMT_low(); | |
428 | HMT_very_low(); | |
429 | } | |
430 | ||
431 | HMT_medium(); | |
432 | clear_thread_flag(TIF_POLLING_NRFLAG); | |
433 | smp_mb(); | |
434 | local_irq_disable(); | |
435 | if (need_resched() || cpu_is_offline(cpu)) | |
436 | goto out; | |
c66d5dd6 | 437 | } |
fbd7740f | 438 | |
0ddd3e7d | 439 | cede_processor(); |
fbd7740f PM |
440 | |
441 | out: | |
442 | HMT_medium(); | |
96366a8d TB |
443 | out_purr = mfspr(SPRN_PURR); |
444 | get_lppaca()->wait_state_cycles += out_purr - in_purr; | |
d8c391a5 | 445 | get_lppaca()->donate_dedicated_cpu = 0; |
fbd7740f | 446 | get_lppaca()->idle = 0; |
c66d5dd6 ME |
447 | } |
448 | ||
fbd7740f | 449 | static void pseries_shared_idle_sleep(void) |
c66d5dd6 | 450 | { |
fbd7740f PM |
451 | /* |
452 | * Indicate to the HV that we are idle. Now would be | |
453 | * a good time to find other work to dispatch. | |
454 | */ | |
455 | get_lppaca()->idle = 1; | |
050a0938 | 456 | |
fbd7740f PM |
457 | /* |
458 | * Yield the processor to the hypervisor. We return if | |
459 | * an external interrupt occurs (which are driven prior | |
460 | * to returning here) or if a prod occurs from another | |
461 | * processor. When returning here, external interrupts | |
462 | * are enabled. | |
463 | */ | |
464 | cede_processor(); | |
050a0938 | 465 | |
fbd7740f | 466 | get_lppaca()->idle = 0; |
c66d5dd6 ME |
467 | } |
468 | ||
4267292b PM |
469 | static int pSeries_pci_probe_mode(struct pci_bus *bus) |
470 | { | |
57cfb814 | 471 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4267292b PM |
472 | return PCI_PROBE_DEVTREE; |
473 | return PCI_PROBE_NORMAL; | |
474 | } | |
475 | ||
5d30bf30 MA |
476 | /** |
477 | * pSeries_power_off - tell firmware about how to power off the system. | |
478 | * | |
479 | * This function calls either the power-off rtas token in normal cases | |
480 | * or the ibm,power-off-ups token (if present & requested) in case of | |
481 | * a power failure. If power-off token is used, power on will only be | |
482 | * possible with power button press. If ibm,power-off-ups token is used | |
483 | * it will allow auto poweron after power is restored. | |
484 | */ | |
485 | void pSeries_power_off(void) | |
486 | { | |
487 | int rc; | |
488 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); | |
489 | ||
490 | if (rtas_flash_term_hook) | |
491 | rtas_flash_term_hook(SYS_POWER_OFF); | |
492 | ||
493 | if (rtas_poweron_auto == 0 || | |
494 | rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { | |
495 | rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); | |
496 | printk(KERN_INFO "RTAS power-off returned %d\n", rc); | |
497 | } else { | |
498 | rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); | |
499 | printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); | |
500 | } | |
501 | for (;;); | |
502 | } | |
503 | ||
bed59275 SR |
504 | #ifndef CONFIG_PCI |
505 | void pSeries_final_fixup(void) { } | |
506 | #endif | |
507 | ||
e8222502 BH |
508 | define_machine(pseries) { |
509 | .name = "pSeries", | |
1da177e4 LT |
510 | .probe = pSeries_probe, |
511 | .setup_arch = pSeries_setup_arch, | |
512 | .init_early = pSeries_init_early, | |
0dd194d0 | 513 | .show_cpuinfo = pSeries_show_cpuinfo, |
1da177e4 LT |
514 | .log_error = pSeries_log_error, |
515 | .pcibios_fixup = pSeries_final_fixup, | |
4267292b | 516 | .pci_probe_mode = pSeries_pci_probe_mode, |
f4fcbbe9 | 517 | .restart = rtas_restart, |
5d30bf30 | 518 | .power_off = pSeries_power_off, |
f4fcbbe9 | 519 | .halt = rtas_halt, |
8f515061 | 520 | .panic = rtas_os_term, |
773bf9c4 AB |
521 | .get_boot_time = rtas_get_boot_time, |
522 | .get_rtc_time = rtas_get_rtc_time, | |
523 | .set_rtc_time = rtas_set_rtc_time, | |
10f7e7c1 | 524 | .calibrate_decr = generic_calibrate_decr, |
6566c6f1 | 525 | .progress = rtas_progress, |
1da177e4 LT |
526 | .system_reset_exception = pSeries_system_reset_exception, |
527 | .machine_check_exception = pSeries_machine_check_exception, | |
528 | }; |