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Commit | Line | Data |
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1da177e4 | 1 | /* |
033ef338 | 2 | * 64-bit pSeries and RS/6000 setup code. |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * Adapted from 'alpha' version by Gary Thomas | |
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
7 | * Modified by PPC64 Team, IBM Corp | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | /* | |
16 | * bootup setup stuff.. | |
17 | */ | |
18 | ||
19 | #undef DEBUG | |
20 | ||
62d60e9f | 21 | #include <linux/cpu.h> |
1da177e4 LT |
22 | #include <linux/errno.h> |
23 | #include <linux/sched.h> | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/mm.h> | |
26 | #include <linux/stddef.h> | |
27 | #include <linux/unistd.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/user.h> | |
30 | #include <linux/a.out.h> | |
31 | #include <linux/tty.h> | |
32 | #include <linux/major.h> | |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/reboot.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/ioport.h> | |
37 | #include <linux/console.h> | |
38 | #include <linux/pci.h> | |
cebb2b15 | 39 | #include <linux/utsname.h> |
1da177e4 LT |
40 | #include <linux/adb.h> |
41 | #include <linux/module.h> | |
42 | #include <linux/delay.h> | |
43 | #include <linux/irq.h> | |
44 | #include <linux/seq_file.h> | |
45 | #include <linux/root_dev.h> | |
46 | ||
47 | #include <asm/mmu.h> | |
48 | #include <asm/processor.h> | |
49 | #include <asm/io.h> | |
50 | #include <asm/pgtable.h> | |
51 | #include <asm/prom.h> | |
52 | #include <asm/rtas.h> | |
53 | #include <asm/pci-bridge.h> | |
54 | #include <asm/iommu.h> | |
55 | #include <asm/dma.h> | |
56 | #include <asm/machdep.h> | |
57 | #include <asm/irq.h> | |
3d1229d6 | 58 | #include <asm/kexec.h> |
1da177e4 LT |
59 | #include <asm/time.h> |
60 | #include <asm/nvram.h> | |
007e8f51 | 61 | #include "xics.h" |
180a3362 | 62 | #include <asm/pmc.h> |
bbeb3f4c | 63 | #include <asm/mpic.h> |
d387899f | 64 | #include <asm/ppc-pci.h> |
69a80d3f PM |
65 | #include <asm/i8259.h> |
66 | #include <asm/udbg.h> | |
2249ca9d | 67 | #include <asm/smp.h> |
1da177e4 | 68 | |
a1218720 | 69 | #include "plpar_wrappers.h" |
c902be71 | 70 | #include "ras.h" |
1965746b | 71 | #include "firmware.h" |
a1218720 | 72 | |
1da177e4 LT |
73 | #ifdef DEBUG |
74 | #define DBG(fmt...) udbg_printf(fmt) | |
75 | #else | |
76 | #define DBG(fmt...) | |
77 | #endif | |
78 | ||
1da177e4 | 79 | extern void find_udbg_vterm(void); |
1da177e4 LT |
80 | |
81 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ | |
82 | ||
fbd7740f PM |
83 | static void pseries_shared_idle_sleep(void); |
84 | static void pseries_dedicated_idle_sleep(void); | |
62d60e9f | 85 | |
1da177e4 LT |
86 | struct mpic *pSeries_mpic; |
87 | ||
8446196a | 88 | static void pSeries_show_cpuinfo(struct seq_file *m) |
1da177e4 LT |
89 | { |
90 | struct device_node *root; | |
91 | const char *model = ""; | |
92 | ||
93 | root = of_find_node_by_path("/"); | |
94 | if (root) | |
95 | model = get_property(root, "model", NULL); | |
96 | seq_printf(m, "machine\t\t: CHRP %s\n", model); | |
97 | of_node_put(root); | |
98 | } | |
99 | ||
100 | /* Initialize firmware assisted non-maskable interrupts if | |
101 | * the firmware supports this feature. | |
1da177e4 LT |
102 | */ |
103 | static void __init fwnmi_init(void) | |
104 | { | |
8c4f1f29 ME |
105 | unsigned long system_reset_addr, machine_check_addr; |
106 | ||
1da177e4 LT |
107 | int ibm_nmi_register = rtas_token("ibm,nmi-register"); |
108 | if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) | |
109 | return; | |
8c4f1f29 ME |
110 | |
111 | /* If the kernel's not linked at zero we point the firmware at low | |
112 | * addresses anyway, and use a trampoline to get to the real code. */ | |
113 | system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; | |
114 | machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; | |
115 | ||
116 | if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, | |
117 | machine_check_addr)) | |
1da177e4 LT |
118 | fwnmi_active = 1; |
119 | } | |
120 | ||
1da177e4 LT |
121 | static void __init pSeries_init_mpic(void) |
122 | { | |
123 | unsigned int *addrp; | |
124 | struct device_node *np; | |
f9bd170a | 125 | unsigned long intack = 0; |
1da177e4 LT |
126 | |
127 | /* All ISUs are setup, complete initialization */ | |
128 | mpic_init(pSeries_mpic); | |
129 | ||
130 | /* Check what kind of cascade ACK we have */ | |
131 | if (!(np = of_find_node_by_name(NULL, "pci")) | |
132 | || !(addrp = (unsigned int *) | |
133 | get_property(np, "8259-interrupt-acknowledge", NULL))) | |
134 | printk(KERN_ERR "Cannot find pci to get ack address\n"); | |
135 | else | |
f9bd170a | 136 | intack = addrp[prom_n_addr_cells(np)-1]; |
1da177e4 LT |
137 | of_node_put(np); |
138 | ||
139 | /* Setup the legacy interrupts & controller */ | |
f9bd170a | 140 | i8259_init(intack, 0); |
1da177e4 LT |
141 | |
142 | /* Hook cascade to mpic */ | |
f9bd170a | 143 | mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL); |
1da177e4 LT |
144 | } |
145 | ||
146 | static void __init pSeries_setup_mpic(void) | |
147 | { | |
148 | unsigned int *opprop; | |
149 | unsigned long openpic_addr = 0; | |
150 | unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS]; | |
151 | struct device_node *root; | |
152 | int irq_count; | |
153 | ||
154 | /* Find the Open PIC if present */ | |
155 | root = of_find_node_by_path("/"); | |
156 | opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL); | |
157 | if (opprop != 0) { | |
158 | int n = prom_n_addr_cells(root); | |
159 | ||
160 | for (openpic_addr = 0; n > 0; --n) | |
161 | openpic_addr = (openpic_addr << 32) + *opprop++; | |
162 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); | |
163 | } | |
164 | of_node_put(root); | |
165 | ||
166 | BUG_ON(openpic_addr == 0); | |
167 | ||
168 | /* Get the sense values from OF */ | |
169 | prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS); | |
170 | ||
171 | /* Setup the openpic driver */ | |
172 | irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */ | |
173 | pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY, | |
174 | 16, 16, irq_count, /* isu size, irq offset, irq count */ | |
175 | NR_IRQS - 4, /* ipi offset */ | |
176 | senses, irq_count, /* sense & sense size */ | |
177 | " MPIC "); | |
178 | } | |
179 | ||
180a3362 ME |
180 | static void pseries_lpar_enable_pmcs(void) |
181 | { | |
182 | unsigned long set, reset; | |
183 | ||
184 | power4_enable_pmcs(); | |
185 | ||
186 | set = 1UL << 63; | |
187 | reset = 0; | |
188 | plpar_hcall_norets(H_PERFMON, set, reset); | |
189 | ||
190 | /* instruct hypervisor to maintain PMCs */ | |
191 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) | |
3356bb9f | 192 | get_lppaca()->pmcregs_in_use = 1; |
180a3362 ME |
193 | } |
194 | ||
1da177e4 LT |
195 | static void __init pSeries_setup_arch(void) |
196 | { | |
197 | /* Fixup ppc_md depending on the type of interrupt controller */ | |
198 | if (ppc64_interrupt_controller == IC_OPEN_PIC) { | |
fce0d574 | 199 | ppc_md.init_IRQ = pSeries_init_mpic; |
1da177e4 LT |
200 | ppc_md.get_irq = mpic_get_irq; |
201 | /* Allocate the mpic now, so that find_and_init_phbs() can | |
202 | * fill the ISUs */ | |
203 | pSeries_setup_mpic(); | |
204 | } else { | |
205 | ppc_md.init_IRQ = xics_init_IRQ; | |
206 | ppc_md.get_irq = xics_get_irq; | |
207 | } | |
208 | ||
209 | #ifdef CONFIG_SMP | |
210 | smp_init_pSeries(); | |
211 | #endif | |
212 | /* openpic global configuration register (64-bit format). */ | |
213 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | |
214 | /* python0 facility area (mmio) (64-bit format) REAL address. */ | |
215 | ||
216 | /* init to some ~sane value until calibrate_delay() runs */ | |
217 | loops_per_jiffy = 50000000; | |
218 | ||
219 | if (ROOT_DEV == 0) { | |
220 | printk("No ramdisk, default root is /dev/sda2\n"); | |
221 | ROOT_DEV = Root_SDA2; | |
222 | } | |
223 | ||
224 | fwnmi_init(); | |
225 | ||
226 | /* Find and initialize PCI host bridges */ | |
227 | init_pci_config_tokens(); | |
1da177e4 | 228 | find_and_init_phbs(); |
0160f53e | 229 | eeh_init(); |
1da177e4 | 230 | |
1da177e4 LT |
231 | pSeries_nvram_init(); |
232 | ||
62d60e9f | 233 | /* Choose an idle loop */ |
1ababe11 | 234 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) { |
8d15a3e5 | 235 | vpa_init(boot_cpuid); |
3356bb9f | 236 | if (get_lppaca()->shared_proc) { |
4baaf0cf | 237 | printk(KERN_DEBUG "Using shared processor idle loop\n"); |
fbd7740f | 238 | ppc_md.power_save = pseries_shared_idle_sleep; |
62d60e9f | 239 | } else { |
4baaf0cf | 240 | printk(KERN_DEBUG "Using dedicated idle loop\n"); |
fbd7740f | 241 | ppc_md.power_save = pseries_dedicated_idle_sleep; |
62d60e9f ME |
242 | } |
243 | } else { | |
4baaf0cf | 244 | printk(KERN_DEBUG "Using default idle loop\n"); |
62d60e9f | 245 | } |
180a3362 | 246 | |
57cfb814 | 247 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
180a3362 ME |
248 | ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; |
249 | else | |
250 | ppc_md.enable_pmcs = power4_enable_pmcs; | |
1da177e4 LT |
251 | } |
252 | ||
253 | static int __init pSeries_init_panel(void) | |
254 | { | |
255 | /* Manually leave the kernel version on the panel. */ | |
256 | ppc_md.progress("Linux ppc64\n", 0); | |
3de620e8 | 257 | ppc_md.progress(system_utsname.release, 0); |
1da177e4 LT |
258 | |
259 | return 0; | |
260 | } | |
261 | arch_initcall(pSeries_init_panel); | |
262 | ||
1da177e4 LT |
263 | static void __init pSeries_discover_pic(void) |
264 | { | |
265 | struct device_node *np; | |
266 | char *typep; | |
267 | ||
268 | /* | |
269 | * Setup interrupt mapping options that are needed for finish_device_tree | |
270 | * to properly parse the OF interrupt tree & do the virtual irq mapping | |
271 | */ | |
272 | __irq_offset_value = NUM_ISA_INTERRUPTS; | |
273 | ppc64_interrupt_controller = IC_INVALID; | |
274 | for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) { | |
275 | typep = (char *)get_property(np, "compatible", NULL); | |
9da5cad6 | 276 | if (strstr(typep, "open-pic")) { |
1da177e4 | 277 | ppc64_interrupt_controller = IC_OPEN_PIC; |
9da5cad6 HM |
278 | break; |
279 | } else if (strstr(typep, "ppc-xicp")) { | |
1da177e4 | 280 | ppc64_interrupt_controller = IC_PPC_XIC; |
9da5cad6 HM |
281 | break; |
282 | } | |
1da177e4 | 283 | } |
9da5cad6 HM |
284 | if (ppc64_interrupt_controller == IC_INVALID) |
285 | printk("pSeries_discover_pic: failed to recognize" | |
286 | " interrupt-controller\n"); | |
287 | ||
1da177e4 LT |
288 | } |
289 | ||
290 | static void pSeries_mach_cpu_die(void) | |
291 | { | |
292 | local_irq_disable(); | |
293 | idle_task_exit(); | |
294 | /* Some hardware requires clearing the CPPR, while other hardware does not | |
295 | * it is safe either way | |
296 | */ | |
297 | pSeriesLP_cppr_info(0, 0); | |
298 | rtas_stop_self(); | |
299 | /* Should never get here... */ | |
300 | BUG(); | |
301 | for(;;); | |
302 | } | |
303 | ||
cab0af98 ME |
304 | static int pseries_set_dabr(unsigned long dabr) |
305 | { | |
76032de8 | 306 | return plpar_hcall_norets(H_SET_DABR, dabr); |
cab0af98 ME |
307 | } |
308 | ||
76032de8 ME |
309 | static int pseries_set_xdabr(unsigned long dabr) |
310 | { | |
311 | /* We want to catch accesses from kernel and userspace */ | |
312 | return plpar_hcall_norets(H_SET_XDABR, dabr, | |
313 | H_DABRX_KERNEL | H_DABRX_USER); | |
314 | } | |
1da177e4 LT |
315 | |
316 | /* | |
317 | * Early initialization. Relocation is on but do not reference unbolted pages | |
318 | */ | |
319 | static void __init pSeries_init_early(void) | |
320 | { | |
1da177e4 LT |
321 | DBG(" -> pSeries_init_early()\n"); |
322 | ||
323 | fw_feature_init(); | |
1da177e4 | 324 | |
57cfb814 | 325 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
1da177e4 | 326 | find_udbg_vterm(); |
1da177e4 | 327 | |
76032de8 | 328 | if (firmware_has_feature(FW_FEATURE_DABR)) |
cab0af98 | 329 | ppc_md.set_dabr = pseries_set_dabr; |
76032de8 ME |
330 | else if (firmware_has_feature(FW_FEATURE_XDABR)) |
331 | ppc_md.set_dabr = pseries_set_xdabr; | |
1da177e4 LT |
332 | |
333 | iommu_init_early_pSeries(); | |
334 | ||
335 | pSeries_discover_pic(); | |
336 | ||
337 | DBG(" <- pSeries_init_early()\n"); | |
338 | } | |
339 | ||
340 | ||
1da177e4 LT |
341 | static int pSeries_check_legacy_ioport(unsigned int baseport) |
342 | { | |
343 | struct device_node *np; | |
344 | ||
345 | #define I8042_DATA_REG 0x60 | |
346 | #define FDC_BASE 0x3f0 | |
347 | ||
348 | ||
349 | switch(baseport) { | |
350 | case I8042_DATA_REG: | |
351 | np = of_find_node_by_type(NULL, "8042"); | |
352 | if (np == NULL) | |
353 | return -ENODEV; | |
354 | of_node_put(np); | |
355 | break; | |
356 | case FDC_BASE: | |
357 | np = of_find_node_by_type(NULL, "fdc"); | |
358 | if (np == NULL) | |
359 | return -ENODEV; | |
360 | of_node_put(np); | |
361 | break; | |
362 | } | |
363 | return 0; | |
364 | } | |
365 | ||
366 | /* | |
367 | * Called very early, MMU is off, device-tree isn't unflattened | |
368 | */ | |
1da177e4 | 369 | |
e8222502 BH |
370 | static int __init pSeries_probe_hypertas(unsigned long node, |
371 | const char *uname, int depth, | |
372 | void *data) | |
1da177e4 | 373 | { |
e8222502 BH |
374 | if (depth != 1 || |
375 | (strcmp(uname, "rtas") != 0 && strcmp(uname, "rtas@0") != 0)) | |
376 | return 0; | |
377 | ||
378 | if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL) | |
379 | powerpc_firmware_features |= FW_FEATURE_LPAR; | |
380 | ||
7d0daae4 ME |
381 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
382 | hpte_init_lpar(); | |
383 | else | |
384 | hpte_init_native(); | |
385 | ||
e8222502 BH |
386 | return 1; |
387 | } | |
388 | ||
389 | static int __init pSeries_probe(void) | |
390 | { | |
133dda1e | 391 | unsigned long root = of_get_flat_dt_root(); |
e8222502 BH |
392 | char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(), |
393 | "device_type", NULL); | |
394 | if (dtype == NULL) | |
395 | return 0; | |
396 | if (strcmp(dtype, "chrp")) | |
1da177e4 LT |
397 | return 0; |
398 | ||
133dda1e AB |
399 | /* Cell blades firmware claims to be chrp while it's not. Until this |
400 | * is fixed, we need to avoid those here. | |
401 | */ | |
402 | if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") || | |
403 | of_flat_dt_is_compatible(root, "IBM,CBEA")) | |
404 | return 0; | |
405 | ||
e8222502 | 406 | DBG("pSeries detected, looking for LPAR capability...\n"); |
1da177e4 | 407 | |
e8222502 BH |
408 | /* Now try to figure out if we are running on LPAR */ |
409 | of_scan_flat_dt(pSeries_probe_hypertas, NULL); | |
410 | ||
411 | DBG("Machine is%s LPAR !\n", | |
412 | (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); | |
57cfb814 | 413 | |
1da177e4 LT |
414 | return 1; |
415 | } | |
416 | ||
e8222502 | 417 | |
c66d5dd6 ME |
418 | DECLARE_PER_CPU(unsigned long, smt_snooze_delay); |
419 | ||
fbd7740f | 420 | static void pseries_dedicated_idle_sleep(void) |
143a1dec | 421 | { |
050a0938 | 422 | unsigned int cpu = smp_processor_id(); |
c66d5dd6 ME |
423 | unsigned long start_snooze; |
424 | unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay); | |
c66d5dd6 | 425 | |
fbd7740f PM |
426 | /* |
427 | * Indicate to the HV that we are idle. Now would be | |
428 | * a good time to find other work to dispatch. | |
429 | */ | |
430 | get_lppaca()->idle = 1; | |
050a0938 | 431 | |
fbd7740f PM |
432 | /* |
433 | * We come in with interrupts disabled, and need_resched() | |
434 | * has been checked recently. If we should poll for a little | |
435 | * while, do so. | |
436 | */ | |
437 | if (*smt_snooze_delay) { | |
438 | start_snooze = get_tb() + | |
439 | *smt_snooze_delay * tb_ticks_per_usec; | |
440 | local_irq_enable(); | |
441 | set_thread_flag(TIF_POLLING_NRFLAG); | |
050a0938 | 442 | |
fbd7740f PM |
443 | while (get_tb() < start_snooze) { |
444 | if (need_resched() || cpu_is_offline(cpu)) | |
445 | goto out; | |
446 | ppc64_runlatch_off(); | |
447 | HMT_low(); | |
448 | HMT_very_low(); | |
449 | } | |
450 | ||
451 | HMT_medium(); | |
452 | clear_thread_flag(TIF_POLLING_NRFLAG); | |
453 | smp_mb(); | |
454 | local_irq_disable(); | |
455 | if (need_resched() || cpu_is_offline(cpu)) | |
456 | goto out; | |
c66d5dd6 | 457 | } |
fbd7740f PM |
458 | |
459 | /* | |
460 | * Cede if the other thread is not idle, so that it can | |
461 | * go single-threaded. If the other thread is idle, | |
462 | * we ask the hypervisor if it has pending work it | |
463 | * wants to do and cede if it does. Otherwise we keep | |
464 | * polling in order to reduce interrupt latency. | |
465 | * | |
466 | * Doing the cede when the other thread is active will | |
467 | * result in this thread going dormant, meaning the other | |
468 | * thread gets to run in single-threaded (ST) mode, which | |
469 | * is slightly faster than SMT mode with this thread at | |
470 | * very low priority. The cede enables interrupts, which | |
471 | * doesn't matter here. | |
472 | */ | |
706c8c93 | 473 | if (!lppaca[cpu ^ 1].idle || poll_pending() == H_PENDING) |
fbd7740f PM |
474 | cede_processor(); |
475 | ||
476 | out: | |
477 | HMT_medium(); | |
478 | get_lppaca()->idle = 0; | |
c66d5dd6 ME |
479 | } |
480 | ||
fbd7740f | 481 | static void pseries_shared_idle_sleep(void) |
c66d5dd6 | 482 | { |
fbd7740f PM |
483 | /* |
484 | * Indicate to the HV that we are idle. Now would be | |
485 | * a good time to find other work to dispatch. | |
486 | */ | |
487 | get_lppaca()->idle = 1; | |
050a0938 | 488 | |
fbd7740f PM |
489 | /* |
490 | * Yield the processor to the hypervisor. We return if | |
491 | * an external interrupt occurs (which are driven prior | |
492 | * to returning here) or if a prod occurs from another | |
493 | * processor. When returning here, external interrupts | |
494 | * are enabled. | |
495 | */ | |
496 | cede_processor(); | |
050a0938 | 497 | |
fbd7740f | 498 | get_lppaca()->idle = 0; |
c66d5dd6 ME |
499 | } |
500 | ||
4267292b PM |
501 | static int pSeries_pci_probe_mode(struct pci_bus *bus) |
502 | { | |
57cfb814 | 503 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4267292b PM |
504 | return PCI_PROBE_DEVTREE; |
505 | return PCI_PROBE_NORMAL; | |
506 | } | |
507 | ||
c5e24354 ME |
508 | #ifdef CONFIG_KEXEC |
509 | static void pseries_kexec_cpu_down(int crash_shutdown, int secondary) | |
510 | { | |
511 | /* Don't risk a hypervisor call if we're crashing */ | |
4dc43256 | 512 | if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) { |
3356bb9f | 513 | unsigned long vpa = __pa(get_lppaca()); |
c5e24354 ME |
514 | |
515 | if (unregister_vpa(hard_smp_processor_id(), vpa)) { | |
516 | printk("VPA deregistration of cpu %u (hw_cpu_id %d) " | |
517 | "failed\n", smp_processor_id(), | |
518 | hard_smp_processor_id()); | |
519 | } | |
520 | } | |
521 | ||
522 | if (ppc64_interrupt_controller == IC_OPEN_PIC) | |
523 | mpic_teardown_this_cpu(secondary); | |
524 | else | |
525 | xics_teardown_cpu(secondary); | |
526 | } | |
527 | #endif | |
528 | ||
e8222502 BH |
529 | define_machine(pseries) { |
530 | .name = "pSeries", | |
1da177e4 LT |
531 | .probe = pSeries_probe, |
532 | .setup_arch = pSeries_setup_arch, | |
533 | .init_early = pSeries_init_early, | |
0dd194d0 | 534 | .show_cpuinfo = pSeries_show_cpuinfo, |
1da177e4 LT |
535 | .log_error = pSeries_log_error, |
536 | .pcibios_fixup = pSeries_final_fixup, | |
4267292b | 537 | .pci_probe_mode = pSeries_pci_probe_mode, |
dad32bbf | 538 | .irq_bus_setup = pSeries_irq_bus_setup, |
f4fcbbe9 PM |
539 | .restart = rtas_restart, |
540 | .power_off = rtas_power_off, | |
541 | .halt = rtas_halt, | |
1da177e4 LT |
542 | .panic = rtas_os_term, |
543 | .cpu_die = pSeries_mach_cpu_die, | |
773bf9c4 AB |
544 | .get_boot_time = rtas_get_boot_time, |
545 | .get_rtc_time = rtas_get_rtc_time, | |
546 | .set_rtc_time = rtas_set_rtc_time, | |
10f7e7c1 | 547 | .calibrate_decr = generic_calibrate_decr, |
6566c6f1 | 548 | .progress = rtas_progress, |
1da177e4 LT |
549 | .check_legacy_ioport = pSeries_check_legacy_ioport, |
550 | .system_reset_exception = pSeries_system_reset_exception, | |
551 | .machine_check_exception = pSeries_machine_check_exception, | |
c5e24354 ME |
552 | #ifdef CONFIG_KEXEC |
553 | .kexec_cpu_down = pseries_kexec_cpu_down, | |
3d1229d6 ME |
554 | .machine_kexec = default_machine_kexec, |
555 | .machine_kexec_prepare = default_machine_kexec_prepare, | |
cc532915 | 556 | .machine_crash_shutdown = default_machine_crash_shutdown, |
c5e24354 | 557 | #endif |
1da177e4 | 558 | }; |