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Commit | Line | Data |
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1da177e4 | 1 | /* |
033ef338 | 2 | * 64-bit pSeries and RS/6000 setup code. |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * Adapted from 'alpha' version by Gary Thomas | |
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
7 | * Modified by PPC64 Team, IBM Corp | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | /* | |
16 | * bootup setup stuff.. | |
17 | */ | |
18 | ||
62d60e9f | 19 | #include <linux/cpu.h> |
1da177e4 LT |
20 | #include <linux/errno.h> |
21 | #include <linux/sched.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/mm.h> | |
24 | #include <linux/stddef.h> | |
25 | #include <linux/unistd.h> | |
1da177e4 | 26 | #include <linux/user.h> |
1da177e4 LT |
27 | #include <linux/tty.h> |
28 | #include <linux/major.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/reboot.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/ioport.h> | |
33 | #include <linux/console.h> | |
34 | #include <linux/pci.h> | |
cebb2b15 | 35 | #include <linux/utsname.h> |
1da177e4 | 36 | #include <linux/adb.h> |
4b16f8e2 | 37 | #include <linux/export.h> |
1da177e4 LT |
38 | #include <linux/delay.h> |
39 | #include <linux/irq.h> | |
40 | #include <linux/seq_file.h> | |
41 | #include <linux/root_dev.h> | |
e179816c | 42 | #include <linux/cpuidle.h> |
1cf3d8b3 | 43 | #include <linux/of.h> |
cedddd81 | 44 | #include <linux/kexec.h> |
1da177e4 LT |
45 | |
46 | #include <asm/mmu.h> | |
47 | #include <asm/processor.h> | |
48 | #include <asm/io.h> | |
49 | #include <asm/pgtable.h> | |
50 | #include <asm/prom.h> | |
51 | #include <asm/rtas.h> | |
52 | #include <asm/pci-bridge.h> | |
53 | #include <asm/iommu.h> | |
54 | #include <asm/dma.h> | |
55 | #include <asm/machdep.h> | |
56 | #include <asm/irq.h> | |
57 | #include <asm/time.h> | |
58 | #include <asm/nvram.h> | |
180a3362 | 59 | #include <asm/pmc.h> |
bbeb3f4c | 60 | #include <asm/mpic.h> |
0b05ac6e | 61 | #include <asm/xics.h> |
d387899f | 62 | #include <asm/ppc-pci.h> |
69a80d3f PM |
63 | #include <asm/i8259.h> |
64 | #include <asm/udbg.h> | |
2249ca9d | 65 | #include <asm/smp.h> |
577830b0 | 66 | #include <asm/firmware.h> |
bed59275 | 67 | #include <asm/eeh.h> |
bf99de36 | 68 | #include <asm/reg.h> |
212bebb4 | 69 | #include <asm/plpar_wrappers.h> |
1da177e4 | 70 | |
577830b0 | 71 | #include "pseries.h" |
a1218720 | 72 | |
81f14997 RJ |
73 | int CMO_PrPSP = -1; |
74 | int CMO_SecPSP = -1; | |
e589a440 | 75 | unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); |
d617a402 | 76 | EXPORT_SYMBOL(CMO_PageSize); |
1da177e4 | 77 | |
1da177e4 LT |
78 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ |
79 | ||
0ebfff14 | 80 | static struct device_node *pSeries_mpic_node; |
1da177e4 | 81 | |
8446196a | 82 | static void pSeries_show_cpuinfo(struct seq_file *m) |
1da177e4 LT |
83 | { |
84 | struct device_node *root; | |
85 | const char *model = ""; | |
86 | ||
87 | root = of_find_node_by_path("/"); | |
88 | if (root) | |
e2eb6392 | 89 | model = of_get_property(root, "model", NULL); |
1da177e4 LT |
90 | seq_printf(m, "machine\t\t: CHRP %s\n", model); |
91 | of_node_put(root); | |
92 | } | |
93 | ||
94 | /* Initialize firmware assisted non-maskable interrupts if | |
95 | * the firmware supports this feature. | |
1da177e4 LT |
96 | */ |
97 | static void __init fwnmi_init(void) | |
98 | { | |
8c4f1f29 ME |
99 | unsigned long system_reset_addr, machine_check_addr; |
100 | ||
1da177e4 LT |
101 | int ibm_nmi_register = rtas_token("ibm,nmi-register"); |
102 | if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) | |
103 | return; | |
8c4f1f29 ME |
104 | |
105 | /* If the kernel's not linked at zero we point the firmware at low | |
106 | * addresses anyway, and use a trampoline to get to the real code. */ | |
107 | system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; | |
108 | machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; | |
109 | ||
110 | if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, | |
111 | machine_check_addr)) | |
1da177e4 LT |
112 | fwnmi_active = 1; |
113 | } | |
114 | ||
541b2755 | 115 | static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) |
b9e5b4e6 | 116 | { |
ec775d0e | 117 | struct irq_chip *chip = irq_desc_get_chip(desc); |
35a84c2f | 118 | unsigned int cascade_irq = i8259_irq(); |
79f26c26 | 119 | |
0ebfff14 | 120 | if (cascade_irq != NO_IRQ) |
7d12e780 | 121 | generic_handle_irq(cascade_irq); |
79f26c26 LB |
122 | |
123 | chip->irq_eoi(&desc->irq_data); | |
b9e5b4e6 BH |
124 | } |
125 | ||
30d6ad25 | 126 | static void __init pseries_setup_i8259_cascade(void) |
032ace7e ME |
127 | { |
128 | struct device_node *np, *old, *found = NULL; | |
30d6ad25 | 129 | unsigned int cascade; |
032ace7e ME |
130 | const u32 *addrp; |
131 | unsigned long intack = 0; | |
30d6ad25 | 132 | int naddr; |
032ace7e | 133 | |
30d6ad25 | 134 | for_each_node_by_type(np, "interrupt-controller") { |
032ace7e ME |
135 | if (of_device_is_compatible(np, "chrp,iic")) { |
136 | found = np; | |
137 | break; | |
138 | } | |
30d6ad25 ME |
139 | } |
140 | ||
032ace7e | 141 | if (found == NULL) { |
30d6ad25 | 142 | printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); |
032ace7e ME |
143 | return; |
144 | } | |
30d6ad25 | 145 | |
032ace7e ME |
146 | cascade = irq_of_parse_and_map(found, 0); |
147 | if (cascade == NO_IRQ) { | |
30d6ad25 | 148 | printk(KERN_ERR "pic: failed to map cascade interrupt"); |
032ace7e ME |
149 | return; |
150 | } | |
30d6ad25 | 151 | pr_debug("pic: cascade mapped to irq %d\n", cascade); |
032ace7e ME |
152 | |
153 | for (old = of_node_get(found); old != NULL ; old = np) { | |
154 | np = of_get_parent(old); | |
155 | of_node_put(old); | |
156 | if (np == NULL) | |
157 | break; | |
158 | if (strcmp(np->name, "pci") != 0) | |
159 | continue; | |
160 | addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); | |
161 | if (addrp == NULL) | |
162 | continue; | |
163 | naddr = of_n_addr_cells(np); | |
164 | intack = addrp[naddr-1]; | |
165 | if (naddr > 1) | |
166 | intack |= ((unsigned long)addrp[naddr-2]) << 32; | |
167 | } | |
168 | if (intack) | |
30d6ad25 | 169 | printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); |
032ace7e ME |
170 | i8259_init(found, intack); |
171 | of_node_put(found); | |
ec775d0e | 172 | irq_set_chained_handler(cascade, pseries_8259_cascade); |
032ace7e ME |
173 | } |
174 | ||
0ebfff14 | 175 | static void __init pseries_mpic_init_IRQ(void) |
1da177e4 | 176 | { |
f01567d6 | 177 | struct device_node *np; |
954a46e2 | 178 | const unsigned int *opprop; |
1da177e4 | 179 | unsigned long openpic_addr = 0; |
0ebfff14 BH |
180 | int naddr, n, i, opplen; |
181 | struct mpic *mpic; | |
1da177e4 | 182 | |
0ebfff14 | 183 | np = of_find_node_by_path("/"); |
a8bda5dd | 184 | naddr = of_n_addr_cells(np); |
e2eb6392 | 185 | opprop = of_get_property(np, "platform-open-pic", &opplen); |
b0d436c7 | 186 | if (opprop != NULL) { |
0ebfff14 | 187 | openpic_addr = of_read_number(opprop, naddr); |
1da177e4 LT |
188 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); |
189 | } | |
0ebfff14 | 190 | of_node_put(np); |
1da177e4 LT |
191 | |
192 | BUG_ON(openpic_addr == 0); | |
193 | ||
1da177e4 | 194 | /* Setup the openpic driver */ |
e55d7f73 KM |
195 | mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, |
196 | MPIC_NO_RESET, 16, 0, " MPIC "); | |
0ebfff14 BH |
197 | BUG_ON(mpic == NULL); |
198 | ||
199 | /* Add ISUs */ | |
200 | opplen /= sizeof(u32); | |
201 | for (n = 0, i = naddr; i < opplen; i += naddr, n++) { | |
202 | unsigned long isuaddr = of_read_number(opprop + i, naddr); | |
203 | mpic_assign_isu(mpic, n, isuaddr); | |
204 | } | |
205 | ||
0b05ac6e BH |
206 | /* Setup top-level get_irq */ |
207 | ppc_md.get_irq = mpic_get_irq; | |
208 | ||
0ebfff14 BH |
209 | /* All ISUs are setup, complete initialization */ |
210 | mpic_init(mpic); | |
211 | ||
212 | /* Look for cascade */ | |
f01567d6 | 213 | pseries_setup_i8259_cascade(); |
1da177e4 LT |
214 | } |
215 | ||
032ace7e ME |
216 | static void __init pseries_xics_init_IRQ(void) |
217 | { | |
0b05ac6e | 218 | xics_init(); |
30d6ad25 | 219 | pseries_setup_i8259_cascade(); |
032ace7e ME |
220 | } |
221 | ||
180a3362 ME |
222 | static void pseries_lpar_enable_pmcs(void) |
223 | { | |
224 | unsigned long set, reset; | |
225 | ||
180a3362 ME |
226 | set = 1UL << 63; |
227 | reset = 0; | |
228 | plpar_hcall_norets(H_PERFMON, set, reset); | |
180a3362 ME |
229 | } |
230 | ||
0ebfff14 BH |
231 | static void __init pseries_discover_pic(void) |
232 | { | |
233 | struct device_node *np; | |
954a46e2 | 234 | const char *typep; |
0ebfff14 BH |
235 | |
236 | for (np = NULL; (np = of_find_node_by_name(np, | |
237 | "interrupt-controller"));) { | |
e2eb6392 | 238 | typep = of_get_property(np, "compatible", NULL); |
0ebfff14 BH |
239 | if (strstr(typep, "open-pic")) { |
240 | pSeries_mpic_node = of_node_get(np); | |
241 | ppc_md.init_IRQ = pseries_mpic_init_IRQ; | |
dce623e0 | 242 | setup_kexec_cpu_down_mpic(); |
0ebfff14 | 243 | smp_init_pseries_mpic(); |
0ebfff14 BH |
244 | return; |
245 | } else if (strstr(typep, "ppc-xicp")) { | |
032ace7e | 246 | ppc_md.init_IRQ = pseries_xics_init_IRQ; |
dce623e0 | 247 | setup_kexec_cpu_down_xics(); |
0ebfff14 | 248 | smp_init_pseries_xics(); |
0ebfff14 BH |
249 | return; |
250 | } | |
251 | } | |
252 | printk(KERN_ERR "pSeries_discover_pic: failed to recognize" | |
253 | " interrupt-controller\n"); | |
254 | } | |
255 | ||
2eb4afb6 KG |
256 | static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *node) |
257 | { | |
258 | struct device_node *np = node; | |
259 | struct pci_dn *pci = NULL; | |
260 | int err = NOTIFY_OK; | |
261 | ||
262 | switch (action) { | |
1cf3d8b3 | 263 | case OF_RECONFIG_ATTACH_NODE: |
2eb4afb6 | 264 | pci = np->parent->data; |
eb740b5f | 265 | if (pci) { |
2eb4afb6 | 266 | update_dn_pci_info(np, pci->phb); |
eb740b5f GS |
267 | |
268 | /* Create EEH device for the OF node */ | |
269 | eeh_dev_init(np, pci->phb); | |
270 | } | |
2eb4afb6 KG |
271 | break; |
272 | default: | |
273 | err = NOTIFY_DONE; | |
274 | break; | |
275 | } | |
276 | return err; | |
277 | } | |
278 | ||
279 | static struct notifier_block pci_dn_reconfig_nb = { | |
280 | .notifier_call = pci_dn_reconfig_notifier, | |
281 | }; | |
282 | ||
af442a1b NA |
283 | struct kmem_cache *dtl_cache; |
284 | ||
abf917cd | 285 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE |
cf9efce0 PM |
286 | /* |
287 | * Allocate space for the dispatch trace log for all possible cpus | |
288 | * and register the buffers with the hypervisor. This is used for | |
289 | * computing time stolen by the hypervisor. | |
290 | */ | |
291 | static int alloc_dispatch_logs(void) | |
292 | { | |
293 | int cpu, ret; | |
294 | struct paca_struct *pp; | |
295 | struct dtl_entry *dtl; | |
296 | ||
297 | if (!firmware_has_feature(FW_FEATURE_SPLPAR)) | |
298 | return 0; | |
299 | ||
af442a1b | 300 | if (!dtl_cache) |
127493d5 | 301 | return 0; |
127493d5 | 302 | |
cf9efce0 PM |
303 | for_each_possible_cpu(cpu) { |
304 | pp = &paca[cpu]; | |
127493d5 | 305 | dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL); |
cf9efce0 PM |
306 | if (!dtl) { |
307 | pr_warn("Failed to allocate dispatch trace log for cpu %d\n", | |
308 | cpu); | |
309 | pr_warn("Stolen time statistics will be unreliable\n"); | |
310 | break; | |
311 | } | |
312 | ||
313 | pp->dtl_ridx = 0; | |
314 | pp->dispatch_log = dtl; | |
315 | pp->dispatch_log_end = dtl + N_DISPATCH_LOG; | |
316 | pp->dtl_curr = dtl; | |
317 | } | |
318 | ||
319 | /* Register the DTL for the current (boot) cpu */ | |
320 | dtl = get_paca()->dispatch_log; | |
321 | get_paca()->dtl_ridx = 0; | |
322 | get_paca()->dtl_curr = dtl; | |
323 | get_paca()->lppaca_ptr->dtl_idx = 0; | |
324 | ||
325 | /* hypervisor reads buffer length from this field */ | |
7ffcf8ec | 326 | dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES); |
cf9efce0 PM |
327 | ret = register_dtl(hard_smp_processor_id(), __pa(dtl)); |
328 | if (ret) | |
711ef84e AB |
329 | pr_err("WARNING: DTL registration of cpu %d (hw %d) failed " |
330 | "with %d\n", smp_processor_id(), | |
331 | hard_smp_processor_id(), ret); | |
cf9efce0 PM |
332 | get_paca()->lppaca_ptr->dtl_enable_mask = 2; |
333 | ||
334 | return 0; | |
335 | } | |
abf917cd | 336 | #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
af442a1b NA |
337 | static inline int alloc_dispatch_logs(void) |
338 | { | |
339 | return 0; | |
340 | } | |
abf917cd | 341 | #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
cf9efce0 | 342 | |
af442a1b NA |
343 | static int alloc_dispatch_log_kmem_cache(void) |
344 | { | |
345 | dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, | |
346 | DISPATCH_LOG_BYTES, 0, NULL); | |
347 | if (!dtl_cache) { | |
348 | pr_warn("Failed to create dispatch trace log buffer cache\n"); | |
349 | pr_warn("Stolen time statistics will be unreliable\n"); | |
350 | return 0; | |
351 | } | |
352 | ||
353 | return alloc_dispatch_logs(); | |
354 | } | |
355 | early_initcall(alloc_dispatch_log_kmem_cache); | |
356 | ||
363edbe2 | 357 | static void pseries_lpar_idle(void) |
e179816c DD |
358 | { |
359 | /* This would call on the cpuidle framework, and the back-end pseries | |
360 | * driver to go to idle states | |
361 | */ | |
362 | if (cpuidle_idle_call()) { | |
363 | /* On error, execute default handler | |
364 | * to go into low thread priority and possibly | |
363edbe2 | 365 | * low power mode by cedeing processor to hypervisor |
e179816c | 366 | */ |
363edbe2 VS |
367 | |
368 | /* Indicate to hypervisor that we are idle. */ | |
369 | get_lppaca()->idle = 1; | |
370 | ||
371 | /* | |
372 | * Yield the processor to the hypervisor. We return if | |
373 | * an external interrupt occurs (which are driven prior | |
374 | * to returning here) or if a prod occurs from another | |
375 | * processor. When returning here, external interrupts | |
376 | * are enabled. | |
377 | */ | |
378 | cede_processor(); | |
379 | ||
380 | get_lppaca()->idle = 0; | |
e179816c DD |
381 | } |
382 | } | |
383 | ||
fc8effa4 IM |
384 | /* |
385 | * Enable relocation on during exceptions. This has partition wide scope and | |
386 | * may take a while to complete, if it takes longer than one second we will | |
387 | * just give up rather than wasting any more time on this - if that turns out | |
388 | * to ever be a problem in practice we can move this into a kernel thread to | |
389 | * finish off the process later in boot. | |
390 | */ | |
a413f474 | 391 | long pSeries_enable_reloc_on_exc(void) |
fc8effa4 IM |
392 | { |
393 | long rc; | |
394 | unsigned int delay, total_delay = 0; | |
395 | ||
396 | while (1) { | |
397 | rc = enable_reloc_on_exceptions(); | |
398 | if (!H_IS_LONG_BUSY(rc)) | |
399 | return rc; | |
400 | ||
401 | delay = get_longbusy_msecs(rc); | |
402 | total_delay += delay; | |
403 | if (total_delay > 1000) { | |
404 | pr_warn("Warning: Giving up waiting to enable " | |
405 | "relocation on exceptions (%u msec)!\n", | |
406 | total_delay); | |
407 | return rc; | |
408 | } | |
409 | ||
410 | mdelay(delay); | |
411 | } | |
412 | } | |
a413f474 | 413 | EXPORT_SYMBOL(pSeries_enable_reloc_on_exc); |
fc8effa4 | 414 | |
a413f474 | 415 | long pSeries_disable_reloc_on_exc(void) |
cedddd81 IM |
416 | { |
417 | long rc; | |
418 | ||
419 | while (1) { | |
420 | rc = disable_reloc_on_exceptions(); | |
421 | if (!H_IS_LONG_BUSY(rc)) | |
422 | return rc; | |
423 | mdelay(get_longbusy_msecs(rc)); | |
424 | } | |
425 | } | |
a413f474 | 426 | EXPORT_SYMBOL(pSeries_disable_reloc_on_exc); |
cedddd81 | 427 | |
a413f474 | 428 | #ifdef CONFIG_KEXEC |
cedddd81 IM |
429 | static void pSeries_machine_kexec(struct kimage *image) |
430 | { | |
431 | long rc; | |
432 | ||
433 | if (firmware_has_feature(FW_FEATURE_SET_MODE) && | |
434 | (image->type != KEXEC_TYPE_CRASH)) { | |
435 | rc = pSeries_disable_reloc_on_exc(); | |
436 | if (rc != H_SUCCESS) | |
437 | pr_warning("Warning: Failed to disable relocation on " | |
438 | "exceptions: %ld\n", rc); | |
439 | } | |
440 | ||
441 | default_machine_kexec(image); | |
442 | } | |
443 | #endif | |
444 | ||
e844b1ee AB |
445 | #ifdef __LITTLE_ENDIAN__ |
446 | long pseries_big_endian_exceptions(void) | |
447 | { | |
448 | long rc; | |
449 | ||
450 | while (1) { | |
451 | rc = enable_big_endian_exceptions(); | |
452 | if (!H_IS_LONG_BUSY(rc)) | |
453 | return rc; | |
454 | mdelay(get_longbusy_msecs(rc)); | |
455 | } | |
456 | } | |
457 | ||
458 | static long pseries_little_endian_exceptions(void) | |
459 | { | |
460 | long rc; | |
461 | ||
462 | while (1) { | |
463 | rc = enable_little_endian_exceptions(); | |
464 | if (!H_IS_LONG_BUSY(rc)) | |
465 | return rc; | |
466 | mdelay(get_longbusy_msecs(rc)); | |
467 | } | |
468 | } | |
469 | #endif | |
470 | ||
0ebfff14 BH |
471 | static void __init pSeries_setup_arch(void) |
472 | { | |
b71d47c1 | 473 | set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); |
a934904d | 474 | |
0ebfff14 BH |
475 | /* Discover PIC type and setup ppc_md accordingly */ |
476 | pseries_discover_pic(); | |
477 | ||
1da177e4 LT |
478 | /* openpic global configuration register (64-bit format). */ |
479 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | |
480 | /* python0 facility area (mmio) (64-bit format) REAL address. */ | |
481 | ||
482 | /* init to some ~sane value until calibrate_delay() runs */ | |
483 | loops_per_jiffy = 50000000; | |
484 | ||
1da177e4 LT |
485 | fwnmi_init(); |
486 | ||
673c9756 BH |
487 | /* By default, only probe PCI (can be overriden by rtas_pci) */ |
488 | pci_add_flags(PCI_PROBE_ONLY); | |
3c13be01 | 489 | |
1da177e4 LT |
490 | /* Find and initialize PCI host bridges */ |
491 | init_pci_config_tokens(); | |
1da177e4 | 492 | find_and_init_phbs(); |
1cf3d8b3 | 493 | of_reconfig_notifier_register(&pci_dn_reconfig_nb); |
1da177e4 | 494 | |
1da177e4 LT |
495 | pSeries_nvram_init(); |
496 | ||
363edbe2 | 497 | if (firmware_has_feature(FW_FEATURE_LPAR)) { |
8d15a3e5 | 498 | vpa_init(boot_cpuid); |
363edbe2 | 499 | ppc_md.power_save = pseries_lpar_idle; |
180a3362 | 500 | ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; |
363edbe2 VS |
501 | } else { |
502 | /* No special idle routine */ | |
180a3362 | 503 | ppc_md.enable_pmcs = power4_enable_pmcs; |
363edbe2 | 504 | } |
fc8effa4 | 505 | |
d82fb31a KSS |
506 | ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; |
507 | ||
fc8effa4 IM |
508 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { |
509 | long rc; | |
510 | if ((rc = pSeries_enable_reloc_on_exc()) != H_SUCCESS) { | |
511 | pr_warn("Unable to enable relocation on exceptions: " | |
512 | "%ld\n", rc); | |
513 | } | |
514 | } | |
1da177e4 LT |
515 | } |
516 | ||
517 | static int __init pSeries_init_panel(void) | |
518 | { | |
519 | /* Manually leave the kernel version on the panel. */ | |
520 | ppc_md.progress("Linux ppc64\n", 0); | |
96b644bd | 521 | ppc_md.progress(init_utsname()->version, 0); |
1da177e4 LT |
522 | |
523 | return 0; | |
524 | } | |
f86d6b9b | 525 | machine_arch_initcall(pseries, pSeries_init_panel); |
1da177e4 | 526 | |
4474ef05 | 527 | static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) |
cab0af98 | 528 | { |
76032de8 | 529 | return plpar_hcall_norets(H_SET_DABR, dabr); |
cab0af98 ME |
530 | } |
531 | ||
4474ef05 | 532 | static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) |
76032de8 | 533 | { |
4474ef05 MN |
534 | /* Have to set at least one bit in the DABRX according to PAPR */ |
535 | if (dabrx == 0 && dabr == 0) | |
536 | dabrx = DABRX_USER; | |
537 | /* PAPR says we can only set kernel and user bits */ | |
cd144573 | 538 | dabrx &= DABRX_KERNEL | DABRX_USER; |
4474ef05 MN |
539 | |
540 | return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); | |
76032de8 | 541 | } |
1da177e4 | 542 | |
bf99de36 MN |
543 | static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx) |
544 | { | |
545 | /* PAPR says we can't set HYP */ | |
546 | dawrx &= ~DAWRX_HYP; | |
547 | ||
548 | return plapr_set_watchpoint0(dawr, dawrx); | |
549 | } | |
550 | ||
e46de429 RJ |
551 | #define CMO_CHARACTERISTICS_TOKEN 44 |
552 | #define CMO_MAXLENGTH 1026 | |
553 | ||
9ee820fa BK |
554 | void pSeries_coalesce_init(void) |
555 | { | |
556 | struct hvcall_mpp_x_data mpp_x_data; | |
557 | ||
558 | if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) | |
559 | powerpc_firmware_features |= FW_FEATURE_XCMO; | |
560 | else | |
561 | powerpc_firmware_features &= ~FW_FEATURE_XCMO; | |
562 | } | |
563 | ||
e46de429 RJ |
564 | /** |
565 | * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, | |
566 | * handle that here. (Stolen from parse_system_parameter_string) | |
567 | */ | |
568 | void pSeries_cmo_feature_init(void) | |
569 | { | |
570 | char *ptr, *key, *value, *end; | |
571 | int call_status; | |
e589a440 | 572 | int page_order = IOMMU_PAGE_SHIFT_4K; |
e46de429 RJ |
573 | |
574 | pr_debug(" -> fw_cmo_feature_init()\n"); | |
575 | spin_lock(&rtas_data_buf_lock); | |
576 | memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); | |
577 | call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, | |
578 | NULL, | |
579 | CMO_CHARACTERISTICS_TOKEN, | |
580 | __pa(rtas_data_buf), | |
581 | RTAS_DATA_BUF_SIZE); | |
582 | ||
583 | if (call_status != 0) { | |
584 | spin_unlock(&rtas_data_buf_lock); | |
585 | pr_debug("CMO not available\n"); | |
586 | pr_debug(" <- fw_cmo_feature_init()\n"); | |
587 | return; | |
588 | } | |
589 | ||
590 | end = rtas_data_buf + CMO_MAXLENGTH - 2; | |
591 | ptr = rtas_data_buf + 2; /* step over strlen value */ | |
592 | key = value = ptr; | |
593 | ||
594 | while (*ptr && (ptr <= end)) { | |
595 | /* Separate the key and value by replacing '=' with '\0' and | |
596 | * point the value at the string after the '=' | |
597 | */ | |
598 | if (ptr[0] == '=') { | |
599 | ptr[0] = '\0'; | |
600 | value = ptr + 1; | |
601 | } else if (ptr[0] == '\0' || ptr[0] == ',') { | |
602 | /* Terminate the string containing the key/value pair */ | |
603 | ptr[0] = '\0'; | |
604 | ||
605 | if (key == value) { | |
606 | pr_debug("Malformed key/value pair\n"); | |
607 | /* Never found a '=', end processing */ | |
608 | break; | |
609 | } | |
610 | ||
81f14997 RJ |
611 | if (0 == strcmp(key, "CMOPageSize")) |
612 | page_order = simple_strtol(value, NULL, 10); | |
613 | else if (0 == strcmp(key, "PrPSP")) | |
614 | CMO_PrPSP = simple_strtol(value, NULL, 10); | |
e46de429 | 615 | else if (0 == strcmp(key, "SecPSP")) |
81f14997 | 616 | CMO_SecPSP = simple_strtol(value, NULL, 10); |
e46de429 RJ |
617 | value = key = ptr + 1; |
618 | } | |
619 | ptr++; | |
620 | } | |
621 | ||
81f14997 RJ |
622 | /* Page size is returned as the power of 2 of the page size, |
623 | * convert to the page size in bytes before returning | |
624 | */ | |
625 | CMO_PageSize = 1 << page_order; | |
626 | pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); | |
627 | ||
628 | if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { | |
e46de429 | 629 | pr_info("CMO enabled\n"); |
81f14997 RJ |
630 | pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
631 | CMO_SecPSP); | |
e46de429 | 632 | powerpc_firmware_features |= FW_FEATURE_CMO; |
9ee820fa | 633 | pSeries_coalesce_init(); |
e46de429 | 634 | } else |
81f14997 RJ |
635 | pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
636 | CMO_SecPSP); | |
e46de429 RJ |
637 | spin_unlock(&rtas_data_buf_lock); |
638 | pr_debug(" <- fw_cmo_feature_init()\n"); | |
639 | } | |
640 | ||
1da177e4 LT |
641 | /* |
642 | * Early initialization. Relocation is on but do not reference unbolted pages | |
643 | */ | |
644 | static void __init pSeries_init_early(void) | |
645 | { | |
f7ebf352 | 646 | pr_debug(" -> pSeries_init_early()\n"); |
1da177e4 | 647 | |
4d2bb3f5 | 648 | #ifdef CONFIG_HVC_CONSOLE |
57cfb814 | 649 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4d2bb3f5 BH |
650 | hvc_vio_init_early(); |
651 | #endif | |
06c88766 | 652 | if (firmware_has_feature(FW_FEATURE_XDABR)) |
76032de8 | 653 | ppc_md.set_dabr = pseries_set_xdabr; |
06c88766 MN |
654 | else if (firmware_has_feature(FW_FEATURE_DABR)) |
655 | ppc_md.set_dabr = pseries_set_dabr; | |
1da177e4 | 656 | |
bf99de36 MN |
657 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) |
658 | ppc_md.set_dawr = pseries_set_dawr; | |
659 | ||
e46de429 | 660 | pSeries_cmo_feature_init(); |
1da177e4 LT |
661 | iommu_init_early_pSeries(); |
662 | ||
f7ebf352 | 663 | pr_debug(" <- pSeries_init_early()\n"); |
1da177e4 LT |
664 | } |
665 | ||
1da177e4 LT |
666 | /* |
667 | * Called very early, MMU is off, device-tree isn't unflattened | |
668 | */ | |
1da177e4 | 669 | |
f0ff7eb4 NF |
670 | static int __init pseries_probe_fw_features(unsigned long node, |
671 | const char *uname, int depth, | |
672 | void *data) | |
1da177e4 | 673 | { |
f0ff7eb4 | 674 | const char *prop; |
ca8ffc97 | 675 | unsigned long len; |
f0ff7eb4 NF |
676 | static int hypertas_found; |
677 | static int vec5_found; | |
ca8ffc97 | 678 | |
f0ff7eb4 | 679 | if (depth != 1) |
ca8ffc97 MN |
680 | return 0; |
681 | ||
f0ff7eb4 NF |
682 | if (!strcmp(uname, "rtas") || !strcmp(uname, "rtas@0")) { |
683 | prop = of_get_flat_dt_prop(node, "ibm,hypertas-functions", | |
684 | &len); | |
685 | if (prop) { | |
686 | powerpc_firmware_features |= FW_FEATURE_LPAR; | |
687 | fw_hypertas_feature_init(prop, len); | |
688 | } | |
689 | ||
690 | hypertas_found = 1; | |
691 | } | |
e8222502 | 692 | |
f0ff7eb4 NF |
693 | if (!strcmp(uname, "chosen")) { |
694 | prop = of_get_flat_dt_prop(node, "ibm,architecture-vec-5", | |
695 | &len); | |
696 | if (prop) | |
697 | fw_vec5_feature_init(prop, len); | |
698 | ||
699 | vec5_found = 1; | |
700 | } | |
e8222502 | 701 | |
f0ff7eb4 | 702 | return hypertas_found && vec5_found; |
e8222502 BH |
703 | } |
704 | ||
705 | static int __init pSeries_probe(void) | |
706 | { | |
133dda1e | 707 | unsigned long root = of_get_flat_dt_root(); |
5773bbcd AB |
708 | char *dtype = of_get_flat_dt_prop(root, "device_type", NULL); |
709 | ||
e8222502 BH |
710 | if (dtype == NULL) |
711 | return 0; | |
712 | if (strcmp(dtype, "chrp")) | |
1da177e4 LT |
713 | return 0; |
714 | ||
133dda1e AB |
715 | /* Cell blades firmware claims to be chrp while it's not. Until this |
716 | * is fixed, we need to avoid those here. | |
717 | */ | |
718 | if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") || | |
719 | of_flat_dt_is_compatible(root, "IBM,CBEA")) | |
720 | return 0; | |
721 | ||
f7ebf352 | 722 | pr_debug("pSeries detected, looking for LPAR capability...\n"); |
1da177e4 | 723 | |
e8222502 | 724 | /* Now try to figure out if we are running on LPAR */ |
f0ff7eb4 | 725 | of_scan_flat_dt(pseries_probe_fw_features, NULL); |
e8222502 | 726 | |
e844b1ee AB |
727 | #ifdef __LITTLE_ENDIAN__ |
728 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { | |
729 | long rc; | |
730 | /* | |
731 | * Tell the hypervisor that we want our exceptions to | |
732 | * be taken in little endian mode. If this fails we don't | |
733 | * want to use BUG() because it will trigger an exception. | |
734 | */ | |
735 | rc = pseries_little_endian_exceptions(); | |
736 | if (rc) { | |
737 | ppc_md.progress("H_SET_MODE LE exception fail", 0); | |
738 | panic("Could not enable little endian exceptions"); | |
739 | } | |
740 | } | |
741 | #endif | |
742 | ||
a2235354 AB |
743 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
744 | hpte_init_lpar(); | |
745 | else | |
746 | hpte_init_native(); | |
747 | ||
f7ebf352 ME |
748 | pr_debug("Machine is%s LPAR !\n", |
749 | (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); | |
57cfb814 | 750 | |
1da177e4 LT |
751 | return 1; |
752 | } | |
753 | ||
4267292b PM |
754 | static int pSeries_pci_probe_mode(struct pci_bus *bus) |
755 | { | |
57cfb814 | 756 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4267292b PM |
757 | return PCI_PROBE_DEVTREE; |
758 | return PCI_PROBE_NORMAL; | |
759 | } | |
760 | ||
5d30bf30 MA |
761 | /** |
762 | * pSeries_power_off - tell firmware about how to power off the system. | |
763 | * | |
764 | * This function calls either the power-off rtas token in normal cases | |
765 | * or the ibm,power-off-ups token (if present & requested) in case of | |
766 | * a power failure. If power-off token is used, power on will only be | |
767 | * possible with power button press. If ibm,power-off-ups token is used | |
768 | * it will allow auto poweron after power is restored. | |
769 | */ | |
541b2755 | 770 | static void pSeries_power_off(void) |
5d30bf30 MA |
771 | { |
772 | int rc; | |
773 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); | |
774 | ||
775 | if (rtas_flash_term_hook) | |
776 | rtas_flash_term_hook(SYS_POWER_OFF); | |
777 | ||
778 | if (rtas_poweron_auto == 0 || | |
779 | rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { | |
780 | rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); | |
781 | printk(KERN_INFO "RTAS power-off returned %d\n", rc); | |
782 | } else { | |
783 | rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); | |
784 | printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); | |
785 | } | |
786 | for (;;); | |
787 | } | |
788 | ||
bed59275 SR |
789 | #ifndef CONFIG_PCI |
790 | void pSeries_final_fixup(void) { } | |
791 | #endif | |
792 | ||
e8222502 BH |
793 | define_machine(pseries) { |
794 | .name = "pSeries", | |
1da177e4 LT |
795 | .probe = pSeries_probe, |
796 | .setup_arch = pSeries_setup_arch, | |
797 | .init_early = pSeries_init_early, | |
0dd194d0 | 798 | .show_cpuinfo = pSeries_show_cpuinfo, |
1da177e4 LT |
799 | .log_error = pSeries_log_error, |
800 | .pcibios_fixup = pSeries_final_fixup, | |
4267292b | 801 | .pci_probe_mode = pSeries_pci_probe_mode, |
f4fcbbe9 | 802 | .restart = rtas_restart, |
5d30bf30 | 803 | .power_off = pSeries_power_off, |
f4fcbbe9 | 804 | .halt = rtas_halt, |
8f515061 | 805 | .panic = rtas_os_term, |
773bf9c4 AB |
806 | .get_boot_time = rtas_get_boot_time, |
807 | .get_rtc_time = rtas_get_rtc_time, | |
808 | .set_rtc_time = rtas_set_rtc_time, | |
10f7e7c1 | 809 | .calibrate_decr = generic_calibrate_decr, |
6566c6f1 | 810 | .progress = rtas_progress, |
1da177e4 LT |
811 | .system_reset_exception = pSeries_system_reset_exception, |
812 | .machine_check_exception = pSeries_machine_check_exception, | |
cedddd81 IM |
813 | #ifdef CONFIG_KEXEC |
814 | .machine_kexec = pSeries_machine_kexec, | |
815 | #endif | |
1da177e4 | 816 | }; |