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CommitLineData
1da177e4
LT
1/*
2 * linux/arch/ppc/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15/*
16 * bootup setup stuff..
17 */
18
19#undef DEBUG
20
21#include <linux/config.h>
62d60e9f 22#include <linux/cpu.h>
1da177e4
LT
23#include <linux/errno.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/stddef.h>
28#include <linux/unistd.h>
29#include <linux/slab.h>
30#include <linux/user.h>
31#include <linux/a.out.h>
32#include <linux/tty.h>
33#include <linux/major.h>
34#include <linux/interrupt.h>
35#include <linux/reboot.h>
36#include <linux/init.h>
37#include <linux/ioport.h>
38#include <linux/console.h>
39#include <linux/pci.h>
cebb2b15 40#include <linux/utsname.h>
1da177e4
LT
41#include <linux/adb.h>
42#include <linux/module.h>
43#include <linux/delay.h>
44#include <linux/irq.h>
45#include <linux/seq_file.h>
46#include <linux/root_dev.h>
47
48#include <asm/mmu.h>
49#include <asm/processor.h>
50#include <asm/io.h>
51#include <asm/pgtable.h>
52#include <asm/prom.h>
53#include <asm/rtas.h>
54#include <asm/pci-bridge.h>
55#include <asm/iommu.h>
56#include <asm/dma.h>
57#include <asm/machdep.h>
58#include <asm/irq.h>
59#include <asm/time.h>
60#include <asm/nvram.h>
61#include <asm/plpar_wrappers.h>
62#include <asm/xics.h>
1ababe11 63#include <asm/firmware.h>
180a3362 64#include <asm/pmc.h>
bbeb3f4c 65#include <asm/mpic.h>
d387899f 66#include <asm/ppc-pci.h>
69a80d3f
PM
67#include <asm/i8259.h>
68#include <asm/udbg.h>
1da177e4
LT
69
70#ifdef DEBUG
71#define DBG(fmt...) udbg_printf(fmt)
72#else
73#define DBG(fmt...)
74#endif
75
1da177e4
LT
76extern void find_udbg_vterm(void);
77extern void system_reset_fwnmi(void); /* from head.S */
78extern void machine_check_fwnmi(void); /* from head.S */
79extern void generic_find_legacy_serial_ports(u64 *physport,
80 unsigned int *default_speed);
81
82int fwnmi_active; /* TRUE if an FWNMI handler is present */
83
1da177e4
LT
84extern void pSeries_system_reset_exception(struct pt_regs *regs);
85extern int pSeries_machine_check_exception(struct pt_regs *regs);
86
143a1dec
PM
87static void pseries_shared_idle(void);
88static void pseries_dedicated_idle(void);
62d60e9f 89
1da177e4
LT
90struct mpic *pSeries_mpic;
91
0dd194d0 92void pSeries_show_cpuinfo(struct seq_file *m)
1da177e4
LT
93{
94 struct device_node *root;
95 const char *model = "";
96
97 root = of_find_node_by_path("/");
98 if (root)
99 model = get_property(root, "model", NULL);
100 seq_printf(m, "machine\t\t: CHRP %s\n", model);
101 of_node_put(root);
102}
103
104/* Initialize firmware assisted non-maskable interrupts if
105 * the firmware supports this feature.
106 *
107 */
108static void __init fwnmi_init(void)
109{
110 int ret;
111 int ibm_nmi_register = rtas_token("ibm,nmi-register");
112 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
113 return;
114 ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
115 __pa((unsigned long)system_reset_fwnmi),
116 __pa((unsigned long)machine_check_fwnmi));
117 if (ret == 0)
118 fwnmi_active = 1;
119}
120
1da177e4
LT
121static void __init pSeries_init_mpic(void)
122{
123 unsigned int *addrp;
124 struct device_node *np;
f9bd170a 125 unsigned long intack = 0;
1da177e4
LT
126
127 /* All ISUs are setup, complete initialization */
128 mpic_init(pSeries_mpic);
129
130 /* Check what kind of cascade ACK we have */
131 if (!(np = of_find_node_by_name(NULL, "pci"))
132 || !(addrp = (unsigned int *)
133 get_property(np, "8259-interrupt-acknowledge", NULL)))
134 printk(KERN_ERR "Cannot find pci to get ack address\n");
135 else
f9bd170a 136 intack = addrp[prom_n_addr_cells(np)-1];
1da177e4
LT
137 of_node_put(np);
138
139 /* Setup the legacy interrupts & controller */
f9bd170a 140 i8259_init(intack, 0);
1da177e4
LT
141
142 /* Hook cascade to mpic */
f9bd170a 143 mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
1da177e4
LT
144}
145
146static void __init pSeries_setup_mpic(void)
147{
148 unsigned int *opprop;
149 unsigned long openpic_addr = 0;
150 unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
151 struct device_node *root;
152 int irq_count;
153
154 /* Find the Open PIC if present */
155 root = of_find_node_by_path("/");
156 opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
157 if (opprop != 0) {
158 int n = prom_n_addr_cells(root);
159
160 for (openpic_addr = 0; n > 0; --n)
161 openpic_addr = (openpic_addr << 32) + *opprop++;
162 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
163 }
164 of_node_put(root);
165
166 BUG_ON(openpic_addr == 0);
167
168 /* Get the sense values from OF */
169 prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
170
171 /* Setup the openpic driver */
172 irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
173 pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
174 16, 16, irq_count, /* isu size, irq offset, irq count */
175 NR_IRQS - 4, /* ipi offset */
176 senses, irq_count, /* sense & sense size */
177 " MPIC ");
178}
179
180a3362
ME
180static void pseries_lpar_enable_pmcs(void)
181{
182 unsigned long set, reset;
183
184 power4_enable_pmcs();
185
186 set = 1UL << 63;
187 reset = 0;
188 plpar_hcall_norets(H_PERFMON, set, reset);
189
190 /* instruct hypervisor to maintain PMCs */
191 if (firmware_has_feature(FW_FEATURE_SPLPAR))
192 get_paca()->lppaca.pmcregs_in_use = 1;
193}
194
1da177e4
LT
195static void __init pSeries_setup_arch(void)
196{
197 /* Fixup ppc_md depending on the type of interrupt controller */
198 if (ppc64_interrupt_controller == IC_OPEN_PIC) {
fce0d574 199 ppc_md.init_IRQ = pSeries_init_mpic;
1da177e4 200 ppc_md.get_irq = mpic_get_irq;
fce0d574 201 ppc_md.cpu_irq_down = mpic_teardown_this_cpu;
1da177e4
LT
202 /* Allocate the mpic now, so that find_and_init_phbs() can
203 * fill the ISUs */
204 pSeries_setup_mpic();
205 } else {
206 ppc_md.init_IRQ = xics_init_IRQ;
207 ppc_md.get_irq = xics_get_irq;
fce0d574 208 ppc_md.cpu_irq_down = xics_teardown_cpu;
1da177e4
LT
209 }
210
211#ifdef CONFIG_SMP
212 smp_init_pSeries();
213#endif
214 /* openpic global configuration register (64-bit format). */
215 /* openpic Interrupt Source Unit pointer (64-bit format). */
216 /* python0 facility area (mmio) (64-bit format) REAL address. */
217
218 /* init to some ~sane value until calibrate_delay() runs */
219 loops_per_jiffy = 50000000;
220
221 if (ROOT_DEV == 0) {
222 printk("No ramdisk, default root is /dev/sda2\n");
223 ROOT_DEV = Root_SDA2;
224 }
225
226 fwnmi_init();
227
228 /* Find and initialize PCI host bridges */
229 init_pci_config_tokens();
1da177e4 230 find_and_init_phbs();
0160f53e 231 eeh_init();
1da177e4 232
1da177e4
LT
233 pSeries_nvram_init();
234
62d60e9f 235 /* Choose an idle loop */
1ababe11 236 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
8d15a3e5 237 vpa_init(boot_cpuid);
62d60e9f
ME
238 if (get_paca()->lppaca.shared_proc) {
239 printk(KERN_INFO "Using shared processor idle loop\n");
050a0938 240 ppc_md.idle_loop = pseries_shared_idle;
62d60e9f
ME
241 } else {
242 printk(KERN_INFO "Using dedicated idle loop\n");
050a0938 243 ppc_md.idle_loop = pseries_dedicated_idle;
62d60e9f
ME
244 }
245 } else {
246 printk(KERN_INFO "Using default idle loop\n");
247 ppc_md.idle_loop = default_idle;
248 }
180a3362
ME
249
250 if (systemcfg->platform & PLATFORM_LPAR)
251 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
252 else
253 ppc_md.enable_pmcs = power4_enable_pmcs;
1da177e4
LT
254}
255
256static int __init pSeries_init_panel(void)
257{
258 /* Manually leave the kernel version on the panel. */
259 ppc_md.progress("Linux ppc64\n", 0);
cebb2b15 260 ppc_md.progress(system_utsname.version, 0);
1da177e4
LT
261
262 return 0;
263}
264arch_initcall(pSeries_init_panel);
265
266
7a6af5e3 267/* Build up the ppc64_firmware_features bitmask field
1da177e4
LT
268 * using contents of device-tree/ibm,hypertas-functions.
269 * Ultimately this functionality may be moved into prom.c prom_init().
270 */
aed31351 271static void __init fw_feature_init(void)
1da177e4
LT
272{
273 struct device_node * dn;
274 char * hypertas;
275 unsigned int len;
276
277 DBG(" -> fw_feature_init()\n");
278
7a6af5e3 279 ppc64_firmware_features = 0;
1da177e4
LT
280 dn = of_find_node_by_path("/rtas");
281 if (dn == NULL) {
282 printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
283 goto no_rtas;
284 }
285
286 hypertas = get_property(dn, "ibm,hypertas-functions", &len);
287 if (hypertas) {
288 while (len > 0){
289 int i, hypertas_len;
290 /* check value against table of strings */
291 for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
292 if ((firmware_features_table[i].name) &&
293 (strcmp(firmware_features_table[i].name,hypertas))==0) {
294 /* we have a match */
7a6af5e3 295 ppc64_firmware_features |=
1da177e4
LT
296 (firmware_features_table[i].val);
297 break;
298 }
299 }
300 hypertas_len = strlen(hypertas);
301 len -= hypertas_len +1;
302 hypertas+= hypertas_len +1;
303 }
304 }
305
306 of_node_put(dn);
307 no_rtas:
308 printk(KERN_INFO "firmware_features = 0x%lx\n",
7a6af5e3 309 ppc64_firmware_features);
1da177e4
LT
310
311 DBG(" <- fw_feature_init()\n");
312}
313
314
315static void __init pSeries_discover_pic(void)
316{
317 struct device_node *np;
318 char *typep;
319
320 /*
321 * Setup interrupt mapping options that are needed for finish_device_tree
322 * to properly parse the OF interrupt tree & do the virtual irq mapping
323 */
324 __irq_offset_value = NUM_ISA_INTERRUPTS;
325 ppc64_interrupt_controller = IC_INVALID;
326 for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
327 typep = (char *)get_property(np, "compatible", NULL);
328 if (strstr(typep, "open-pic"))
329 ppc64_interrupt_controller = IC_OPEN_PIC;
330 else if (strstr(typep, "ppc-xicp"))
331 ppc64_interrupt_controller = IC_PPC_XIC;
332 else
333 printk("pSeries_discover_pic: failed to recognize"
334 " interrupt-controller\n");
335 break;
336 }
337}
338
339static void pSeries_mach_cpu_die(void)
340{
341 local_irq_disable();
342 idle_task_exit();
343 /* Some hardware requires clearing the CPPR, while other hardware does not
344 * it is safe either way
345 */
346 pSeriesLP_cppr_info(0, 0);
347 rtas_stop_self();
348 /* Should never get here... */
349 BUG();
350 for(;;);
351}
352
353
354/*
355 * Early initialization. Relocation is on but do not reference unbolted pages
356 */
357static void __init pSeries_init_early(void)
358{
359 void *comport;
360 int iommu_off = 0;
361 unsigned int default_speed;
362 u64 physport;
363
364 DBG(" -> pSeries_init_early()\n");
365
366 fw_feature_init();
367
368 if (systemcfg->platform & PLATFORM_LPAR)
369 hpte_init_lpar();
370 else {
371 hpte_init_native();
372 iommu_off = (of_chosen &&
373 get_property(of_chosen, "linux,iommu-off", NULL));
374 }
375
376 generic_find_legacy_serial_ports(&physport, &default_speed);
377
378 if (systemcfg->platform & PLATFORM_LPAR)
379 find_udbg_vterm();
380 else if (physport) {
381 /* Map the uart for udbg. */
dfbacdc1 382 comport = (void *)ioremap(physport, 16);
1da177e4
LT
383 udbg_init_uart(comport, default_speed);
384
1da177e4
LT
385 DBG("Hello World !\n");
386 }
387
388
389 iommu_init_early_pSeries();
390
391 pSeries_discover_pic();
392
393 DBG(" <- pSeries_init_early()\n");
394}
395
396
1da177e4
LT
397static int pSeries_check_legacy_ioport(unsigned int baseport)
398{
399 struct device_node *np;
400
401#define I8042_DATA_REG 0x60
402#define FDC_BASE 0x3f0
403
404
405 switch(baseport) {
406 case I8042_DATA_REG:
407 np = of_find_node_by_type(NULL, "8042");
408 if (np == NULL)
409 return -ENODEV;
410 of_node_put(np);
411 break;
412 case FDC_BASE:
413 np = of_find_node_by_type(NULL, "fdc");
414 if (np == NULL)
415 return -ENODEV;
416 of_node_put(np);
417 break;
418 }
419 return 0;
420}
421
422/*
423 * Called very early, MMU is off, device-tree isn't unflattened
424 */
425extern struct machdep_calls pSeries_md;
426
427static int __init pSeries_probe(int platform)
428{
429 if (platform != PLATFORM_PSERIES &&
430 platform != PLATFORM_PSERIES_LPAR)
431 return 0;
432
433 /* if we have some ppc_md fixups for LPAR to do, do
434 * it here ...
435 */
436
437 return 1;
438}
439
c66d5dd6
ME
440DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
441
050a0938
AB
442static inline void dedicated_idle_sleep(unsigned int cpu)
443{
444 struct paca_struct *ppaca = &paca[cpu ^ 1];
445
446 /* Only sleep if the other thread is not idle */
447 if (!(ppaca->lppaca.idle)) {
448 local_irq_disable();
449
450 /*
451 * We are about to sleep the thread and so wont be polling any
452 * more.
453 */
454 clear_thread_flag(TIF_POLLING_NRFLAG);
455
456 /*
457 * SMT dynamic mode. Cede will result in this thread going
458 * dormant, if the partner thread is still doing work. Thread
459 * wakes up if partner goes idle, an interrupt is presented, or
460 * a prod occurs. Returning from the cede enables external
461 * interrupts.
462 */
463 if (!need_resched())
464 cede_processor();
465 else
466 local_irq_enable();
467 } else {
468 /*
469 * Give the HV an opportunity at the processor, since we are
470 * not doing any work.
471 */
472 poll_pending();
473 }
474}
475
143a1dec
PM
476static void pseries_dedicated_idle(void)
477{
c66d5dd6 478 long oldval;
050a0938
AB
479 struct paca_struct *lpaca = get_paca();
480 unsigned int cpu = smp_processor_id();
c66d5dd6
ME
481 unsigned long start_snooze;
482 unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
c66d5dd6
ME
483
484 while (1) {
485 /*
486 * Indicate to the HV that we are idle. Now would be
487 * a good time to find other work to dispatch.
488 */
489 lpaca->lppaca.idle = 1;
490
491 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
492 if (!oldval) {
493 set_thread_flag(TIF_POLLING_NRFLAG);
050a0938 494
c66d5dd6
ME
495 start_snooze = __get_tb() +
496 *smt_snooze_delay * tb_ticks_per_usec;
050a0938 497
c66d5dd6 498 while (!need_resched() && !cpu_is_offline(cpu)) {
050a0938
AB
499 ppc64_runlatch_off();
500
c66d5dd6
ME
501 /*
502 * Go into low thread priority and possibly
503 * low power mode.
504 */
505 HMT_low();
506 HMT_very_low();
507
050a0938
AB
508 if (*smt_snooze_delay != 0 &&
509 __get_tb() > start_snooze) {
510 HMT_medium();
511 dedicated_idle_sleep(cpu);
c66d5dd6 512 }
050a0938 513
c66d5dd6
ME
514 }
515
050a0938 516 HMT_medium();
c66d5dd6
ME
517 clear_thread_flag(TIF_POLLING_NRFLAG);
518 } else {
519 set_need_resched();
520 }
521
c66d5dd6 522 lpaca->lppaca.idle = 0;
050a0938
AB
523 ppc64_runlatch_on();
524
c66d5dd6 525 schedule();
050a0938 526
c66d5dd6
ME
527 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
528 cpu_die();
529 }
c66d5dd6
ME
530}
531
143a1dec 532static void pseries_shared_idle(void)
c66d5dd6
ME
533{
534 struct paca_struct *lpaca = get_paca();
535 unsigned int cpu = smp_processor_id();
536
537 while (1) {
538 /*
539 * Indicate to the HV that we are idle. Now would be
540 * a good time to find other work to dispatch.
541 */
542 lpaca->lppaca.idle = 1;
543
544 while (!need_resched() && !cpu_is_offline(cpu)) {
545 local_irq_disable();
050a0938 546 ppc64_runlatch_off();
c66d5dd6
ME
547
548 /*
549 * Yield the processor to the hypervisor. We return if
550 * an external interrupt occurs (which are driven prior
551 * to returning here) or if a prod occurs from another
552 * processor. When returning here, external interrupts
553 * are enabled.
554 *
555 * Check need_resched() again with interrupts disabled
556 * to avoid a race.
557 */
558 if (!need_resched())
559 cede_processor();
560 else
561 local_irq_enable();
050a0938
AB
562
563 HMT_medium();
c66d5dd6
ME
564 }
565
c66d5dd6 566 lpaca->lppaca.idle = 0;
050a0938
AB
567 ppc64_runlatch_on();
568
c66d5dd6 569 schedule();
050a0938
AB
570
571 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
c66d5dd6
ME
572 cpu_die();
573 }
c66d5dd6
ME
574}
575
4267292b
PM
576static int pSeries_pci_probe_mode(struct pci_bus *bus)
577{
578 if (systemcfg->platform & PLATFORM_LPAR)
579 return PCI_PROBE_DEVTREE;
580 return PCI_PROBE_NORMAL;
581}
582
1da177e4
LT
583struct machdep_calls __initdata pSeries_md = {
584 .probe = pSeries_probe,
585 .setup_arch = pSeries_setup_arch,
586 .init_early = pSeries_init_early,
0dd194d0 587 .show_cpuinfo = pSeries_show_cpuinfo,
1da177e4
LT
588 .log_error = pSeries_log_error,
589 .pcibios_fixup = pSeries_final_fixup,
4267292b 590 .pci_probe_mode = pSeries_pci_probe_mode,
dad32bbf 591 .irq_bus_setup = pSeries_irq_bus_setup,
1da177e4
LT
592 .restart = rtas_restart,
593 .power_off = rtas_power_off,
594 .halt = rtas_halt,
595 .panic = rtas_os_term,
596 .cpu_die = pSeries_mach_cpu_die,
773bf9c4
AB
597 .get_boot_time = rtas_get_boot_time,
598 .get_rtc_time = rtas_get_rtc_time,
599 .set_rtc_time = rtas_set_rtc_time,
10f7e7c1 600 .calibrate_decr = generic_calibrate_decr,
6566c6f1 601 .progress = rtas_progress,
1da177e4
LT
602 .check_legacy_ioport = pSeries_check_legacy_ioport,
603 .system_reset_exception = pSeries_system_reset_exception,
604 .machine_check_exception = pSeries_machine_check_exception,
605};