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eed32001 KG |
1 | /* |
2 | * FSL SoC setup code | |
3 | * | |
4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) | |
5 | * | |
fba43665 VB |
6 | * 2006 (c) MontaVista Software, Inc. |
7 | * Vitaly Bordug <vbordug@ru.mvista.com> | |
8 | * | |
eed32001 KG |
9 | * This program is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | ||
eed32001 KG |
15 | #include <linux/stddef.h> |
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/major.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/irq.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/device.h> | |
24 | #include <linux/platform_device.h> | |
c026c987 | 25 | #include <linux/of.h> |
0af666fa | 26 | #include <linux/of_platform.h> |
a9b14973 | 27 | #include <linux/phy.h> |
a21e282a | 28 | #include <linux/phy_fixed.h> |
26f6cb99 | 29 | #include <linux/spi/spi.h> |
eed32001 | 30 | #include <linux/fsl_devices.h> |
fba43665 VB |
31 | #include <linux/fs_enet_pd.h> |
32 | #include <linux/fs_uart_pd.h> | |
eed32001 KG |
33 | |
34 | #include <asm/system.h> | |
35 | #include <asm/atomic.h> | |
36 | #include <asm/io.h> | |
37 | #include <asm/irq.h> | |
fba43665 | 38 | #include <asm/time.h> |
eed32001 KG |
39 | #include <asm/prom.h> |
40 | #include <sysdev/fsl_soc.h> | |
41 | #include <mm/mmu_decl.h> | |
fba43665 | 42 | #include <asm/cpm2.h> |
eed32001 | 43 | |
d3465c92 | 44 | extern void init_fcc_ioports(struct fs_platform_info*); |
88bdc6f0 VB |
45 | extern void init_fec_ioports(struct fs_platform_info*); |
46 | extern void init_smc_ioports(struct fs_uart_platform_info*); | |
eed32001 KG |
47 | static phys_addr_t immrbase = -1; |
48 | ||
49 | phys_addr_t get_immrbase(void) | |
50 | { | |
51 | struct device_node *soc; | |
52 | ||
53 | if (immrbase != -1) | |
54 | return immrbase; | |
55 | ||
56 | soc = of_find_node_by_type(NULL, "soc"); | |
2fb07d77 | 57 | if (soc) { |
f9234736 | 58 | int size; |
6c7e072b SW |
59 | u32 naddr; |
60 | const u32 *prop = of_get_property(soc, "#address-cells", &size); | |
fba43665 | 61 | |
6c7e072b SW |
62 | if (prop && size == 4) |
63 | naddr = *prop; | |
64 | else | |
65 | naddr = 2; | |
66 | ||
67 | prop = of_get_property(soc, "ranges", &size); | |
fba43665 | 68 | if (prop) |
6c7e072b SW |
69 | immrbase = of_translate_address(soc, prop + naddr); |
70 | ||
eed32001 | 71 | of_node_put(soc); |
f9234736 | 72 | } |
eed32001 KG |
73 | |
74 | return immrbase; | |
75 | } | |
eed32001 | 76 | |
2fb07d77 | 77 | EXPORT_SYMBOL(get_immrbase); |
eed32001 | 78 | |
38664095 SW |
79 | static u32 sysfreq = -1; |
80 | ||
81 | u32 fsl_get_sys_freq(void) | |
82 | { | |
83 | struct device_node *soc; | |
84 | const u32 *prop; | |
85 | int size; | |
86 | ||
87 | if (sysfreq != -1) | |
88 | return sysfreq; | |
89 | ||
90 | soc = of_find_node_by_type(NULL, "soc"); | |
91 | if (!soc) | |
92 | return -1; | |
93 | ||
94 | prop = of_get_property(soc, "clock-frequency", &size); | |
95 | if (!prop || size != sizeof(*prop) || *prop == 0) | |
96 | prop = of_get_property(soc, "bus-frequency", &size); | |
97 | ||
98 | if (prop && size == sizeof(*prop)) | |
99 | sysfreq = *prop; | |
100 | ||
101 | of_node_put(soc); | |
102 | return sysfreq; | |
103 | } | |
104 | EXPORT_SYMBOL(fsl_get_sys_freq); | |
105 | ||
59a0ea50 | 106 | #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx) |
fba43665 VB |
107 | |
108 | static u32 brgfreq = -1; | |
109 | ||
110 | u32 get_brgfreq(void) | |
111 | { | |
112 | struct device_node *node; | |
6d817aa7 SW |
113 | const unsigned int *prop; |
114 | int size; | |
fba43665 VB |
115 | |
116 | if (brgfreq != -1) | |
117 | return brgfreq; | |
118 | ||
6d817aa7 | 119 | node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg"); |
fba43665 | 120 | if (node) { |
6d817aa7 SW |
121 | prop = of_get_property(node, "clock-frequency", &size); |
122 | if (prop && size == 4) | |
123 | brgfreq = *prop; | |
124 | ||
125 | of_node_put(node); | |
126 | return brgfreq; | |
127 | } | |
fba43665 | 128 | |
6d817aa7 SW |
129 | /* Legacy device binding -- will go away when no users are left. */ |
130 | node = of_find_node_by_type(NULL, "cpm"); | |
59a0ea50 AV |
131 | if (!node) |
132 | node = of_find_compatible_node(NULL, NULL, "fsl,qe"); | |
133 | if (!node) | |
134 | node = of_find_node_by_type(NULL, "qe"); | |
135 | ||
6d817aa7 SW |
136 | if (node) { |
137 | prop = of_get_property(node, "brg-frequency", &size); | |
f9234736 | 138 | if (prop && size == 4) |
fba43665 | 139 | brgfreq = *prop; |
f9234736 | 140 | |
59a0ea50 AV |
141 | if (brgfreq == -1 || brgfreq == 0) { |
142 | prop = of_get_property(node, "bus-frequency", &size); | |
143 | if (prop && size == 4) | |
144 | brgfreq = *prop / 2; | |
145 | } | |
fba43665 | 146 | of_node_put(node); |
f9234736 | 147 | } |
fba43665 VB |
148 | |
149 | return brgfreq; | |
150 | } | |
151 | ||
152 | EXPORT_SYMBOL(get_brgfreq); | |
153 | ||
154 | static u32 fs_baudrate = -1; | |
155 | ||
156 | u32 get_baudrate(void) | |
157 | { | |
158 | struct device_node *node; | |
159 | ||
160 | if (fs_baudrate != -1) | |
161 | return fs_baudrate; | |
162 | ||
163 | node = of_find_node_by_type(NULL, "serial"); | |
164 | if (node) { | |
f9234736 | 165 | int size; |
e2eb6392 SR |
166 | const unsigned int *prop = of_get_property(node, |
167 | "current-speed", &size); | |
fba43665 VB |
168 | |
169 | if (prop) | |
170 | fs_baudrate = *prop; | |
171 | of_node_put(node); | |
f9234736 | 172 | } |
fba43665 VB |
173 | |
174 | return fs_baudrate; | |
175 | } | |
176 | ||
177 | EXPORT_SYMBOL(get_baudrate); | |
178 | #endif /* CONFIG_CPM2 */ | |
179 | ||
a21e282a VB |
180 | #ifdef CONFIG_FIXED_PHY |
181 | static int __init of_add_fixed_phys(void) | |
182 | { | |
183 | int ret; | |
184 | struct device_node *np; | |
185 | u32 *fixed_link; | |
186 | struct fixed_phy_status status = {}; | |
187 | ||
188 | for_each_node_by_name(np, "ethernet") { | |
189 | fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL); | |
190 | if (!fixed_link) | |
191 | continue; | |
192 | ||
193 | status.link = 1; | |
194 | status.duplex = fixed_link[1]; | |
195 | status.speed = fixed_link[2]; | |
196 | status.pause = fixed_link[3]; | |
197 | status.asym_pause = fixed_link[4]; | |
198 | ||
199 | ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status); | |
200 | if (ret) { | |
201 | of_node_put(np); | |
202 | return ret; | |
203 | } | |
204 | } | |
205 | ||
206 | return 0; | |
207 | } | |
208 | arch_initcall(of_add_fixed_phys); | |
209 | #endif /* CONFIG_FIXED_PHY */ | |
210 | ||
a7f67bdf | 211 | static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type) |
4b10cfd4 KG |
212 | { |
213 | if (!phy_type) | |
214 | return FSL_USB2_PHY_NONE; | |
215 | if (!strcasecmp(phy_type, "ulpi")) | |
216 | return FSL_USB2_PHY_ULPI; | |
217 | if (!strcasecmp(phy_type, "utmi")) | |
218 | return FSL_USB2_PHY_UTMI; | |
219 | if (!strcasecmp(phy_type, "utmi_wide")) | |
220 | return FSL_USB2_PHY_UTMI_WIDE; | |
221 | if (!strcasecmp(phy_type, "serial")) | |
222 | return FSL_USB2_PHY_SERIAL; | |
223 | ||
224 | return FSL_USB2_PHY_NONE; | |
225 | } | |
226 | ||
227 | static int __init fsl_usb_of_init(void) | |
228 | { | |
229 | struct device_node *np; | |
866b6ddd | 230 | unsigned int i = 0; |
97c5a20a LY |
231 | struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL, |
232 | *usb_dev_dr_client = NULL; | |
4b10cfd4 KG |
233 | int ret; |
234 | ||
866b6ddd | 235 | for_each_compatible_node(np, NULL, "fsl-usb2-mph") { |
4b10cfd4 KG |
236 | struct resource r[2]; |
237 | struct fsl_usb2_platform_data usb_data; | |
a7f67bdf | 238 | const unsigned char *prop = NULL; |
4b10cfd4 KG |
239 | |
240 | memset(&r, 0, sizeof(r)); | |
241 | memset(&usb_data, 0, sizeof(usb_data)); | |
242 | ||
243 | ret = of_address_to_resource(np, 0, &r[0]); | |
244 | if (ret) | |
245 | goto err; | |
246 | ||
a9b14973 | 247 | of_irq_to_resource(np, 0, &r[1]); |
4b10cfd4 | 248 | |
01cced25 KG |
249 | usb_dev_mph = |
250 | platform_device_register_simple("fsl-ehci", i, r, 2); | |
251 | if (IS_ERR(usb_dev_mph)) { | |
252 | ret = PTR_ERR(usb_dev_mph); | |
4b10cfd4 KG |
253 | goto err; |
254 | } | |
255 | ||
01cced25 KG |
256 | usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL; |
257 | usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask; | |
4b10cfd4 KG |
258 | |
259 | usb_data.operating_mode = FSL_USB2_MPH_HOST; | |
260 | ||
e2eb6392 | 261 | prop = of_get_property(np, "port0", NULL); |
4b10cfd4 KG |
262 | if (prop) |
263 | usb_data.port_enables |= FSL_USB2_PORT0_ENABLED; | |
264 | ||
e2eb6392 | 265 | prop = of_get_property(np, "port1", NULL); |
4b10cfd4 KG |
266 | if (prop) |
267 | usb_data.port_enables |= FSL_USB2_PORT1_ENABLED; | |
268 | ||
e2eb6392 | 269 | prop = of_get_property(np, "phy_type", NULL); |
4b10cfd4 KG |
270 | usb_data.phy_mode = determine_usb_phy(prop); |
271 | ||
272 | ret = | |
01cced25 | 273 | platform_device_add_data(usb_dev_mph, &usb_data, |
4b10cfd4 KG |
274 | sizeof(struct |
275 | fsl_usb2_platform_data)); | |
276 | if (ret) | |
01cced25 | 277 | goto unreg_mph; |
866b6ddd | 278 | i++; |
4b10cfd4 KG |
279 | } |
280 | ||
866b6ddd | 281 | for_each_compatible_node(np, NULL, "fsl-usb2-dr") { |
4b10cfd4 KG |
282 | struct resource r[2]; |
283 | struct fsl_usb2_platform_data usb_data; | |
a7f67bdf | 284 | const unsigned char *prop = NULL; |
4b10cfd4 | 285 | |
c026c987 AV |
286 | if (!of_device_is_available(np)) |
287 | continue; | |
288 | ||
4b10cfd4 KG |
289 | memset(&r, 0, sizeof(r)); |
290 | memset(&usb_data, 0, sizeof(usb_data)); | |
291 | ||
292 | ret = of_address_to_resource(np, 0, &r[0]); | |
293 | if (ret) | |
01cced25 | 294 | goto unreg_mph; |
4b10cfd4 | 295 | |
a9b14973 | 296 | of_irq_to_resource(np, 0, &r[1]); |
4b10cfd4 | 297 | |
e2eb6392 | 298 | prop = of_get_property(np, "dr_mode", NULL); |
97c5a20a LY |
299 | |
300 | if (!prop || !strcmp(prop, "host")) { | |
301 | usb_data.operating_mode = FSL_USB2_DR_HOST; | |
302 | usb_dev_dr_host = platform_device_register_simple( | |
303 | "fsl-ehci", i, r, 2); | |
304 | if (IS_ERR(usb_dev_dr_host)) { | |
305 | ret = PTR_ERR(usb_dev_dr_host); | |
306 | goto err; | |
307 | } | |
308 | } else if (prop && !strcmp(prop, "peripheral")) { | |
309 | usb_data.operating_mode = FSL_USB2_DR_DEVICE; | |
310 | usb_dev_dr_client = platform_device_register_simple( | |
311 | "fsl-usb2-udc", i, r, 2); | |
312 | if (IS_ERR(usb_dev_dr_client)) { | |
313 | ret = PTR_ERR(usb_dev_dr_client); | |
314 | goto err; | |
315 | } | |
316 | } else if (prop && !strcmp(prop, "otg")) { | |
317 | usb_data.operating_mode = FSL_USB2_DR_OTG; | |
318 | usb_dev_dr_host = platform_device_register_simple( | |
319 | "fsl-ehci", i, r, 2); | |
320 | if (IS_ERR(usb_dev_dr_host)) { | |
321 | ret = PTR_ERR(usb_dev_dr_host); | |
322 | goto err; | |
323 | } | |
324 | usb_dev_dr_client = platform_device_register_simple( | |
325 | "fsl-usb2-udc", i, r, 2); | |
326 | if (IS_ERR(usb_dev_dr_client)) { | |
327 | ret = PTR_ERR(usb_dev_dr_client); | |
328 | goto err; | |
329 | } | |
330 | } else { | |
331 | ret = -EINVAL; | |
4b10cfd4 KG |
332 | goto err; |
333 | } | |
334 | ||
e2eb6392 | 335 | prop = of_get_property(np, "phy_type", NULL); |
4b10cfd4 KG |
336 | usb_data.phy_mode = determine_usb_phy(prop); |
337 | ||
97c5a20a LY |
338 | if (usb_dev_dr_host) { |
339 | usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL; | |
340 | usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host-> | |
341 | dev.coherent_dma_mask; | |
342 | if ((ret = platform_device_add_data(usb_dev_dr_host, | |
343 | &usb_data, sizeof(struct | |
344 | fsl_usb2_platform_data)))) | |
345 | goto unreg_dr; | |
346 | } | |
347 | if (usb_dev_dr_client) { | |
348 | usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL; | |
349 | usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client-> | |
350 | dev.coherent_dma_mask; | |
351 | if ((ret = platform_device_add_data(usb_dev_dr_client, | |
352 | &usb_data, sizeof(struct | |
353 | fsl_usb2_platform_data)))) | |
354 | goto unreg_dr; | |
355 | } | |
866b6ddd | 356 | i++; |
4b10cfd4 | 357 | } |
4b10cfd4 KG |
358 | return 0; |
359 | ||
01cced25 | 360 | unreg_dr: |
97c5a20a LY |
361 | if (usb_dev_dr_host) |
362 | platform_device_unregister(usb_dev_dr_host); | |
363 | if (usb_dev_dr_client) | |
364 | platform_device_unregister(usb_dev_dr_client); | |
01cced25 KG |
365 | unreg_mph: |
366 | if (usb_dev_mph) | |
367 | platform_device_unregister(usb_dev_mph); | |
4b10cfd4 KG |
368 | err: |
369 | return ret; | |
370 | } | |
371 | ||
01cced25 | 372 | arch_initcall(fsl_usb_of_init); |
fba43665 | 373 | |
e1c1575f KG |
374 | #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) |
375 | static __be32 __iomem *rstcr; | |
376 | ||
377 | static int __init setup_rstcr(void) | |
378 | { | |
379 | struct device_node *np; | |
380 | np = of_find_node_by_name(NULL, "global-utilities"); | |
381 | if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) { | |
382 | const u32 *prop = of_get_property(np, "reg", NULL); | |
383 | if (prop) { | |
384 | /* map reset control register | |
385 | * 0xE00B0 is offset of reset control register | |
386 | */ | |
387 | rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff); | |
388 | if (!rstcr) | |
389 | printk (KERN_EMERG "Error: reset control " | |
390 | "register not mapped!\n"); | |
391 | } | |
392 | } else | |
393 | printk (KERN_INFO "rstcr compatible register does not exist!\n"); | |
394 | if (np) | |
395 | of_node_put(np); | |
396 | return 0; | |
397 | } | |
398 | ||
399 | arch_initcall(setup_rstcr); | |
400 | ||
401 | void fsl_rstcr_restart(char *cmd) | |
402 | { | |
403 | local_irq_disable(); | |
404 | if (rstcr) | |
405 | /* set reset control register */ | |
406 | out_be32(rstcr, 0x2); /* HRESET_REQ */ | |
407 | ||
408 | while (1) ; | |
409 | } | |
410 | #endif | |
6f90a8bd YS |
411 | |
412 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) | |
43c9f434 | 413 | struct platform_diu_data_ops diu_ops; |
6f90a8bd | 414 | EXPORT_SYMBOL(diu_ops); |
6f90a8bd | 415 | #endif |