[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / sysdev / fsl_soc.h

#ifndef __PPC_FSL_SOC_H
#define __PPC_FSL_SOC_H
#ifdef __KERNEL__

#include <asm/mmu.h>

struct spi_device;

extern phys_addr_t get_immrbase(void);
#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
extern u32 get_brgfreq(void);
extern u32 get_baudrate(void);
#else
static inline u32 get_brgfreq(void) { return -1; }
static inline u32 get_baudrate(void) { return -1; }
#endif
extern u32 fsl_get_sys_freq(void);

struct spi_board_info;
struct device_node;

/* The different ports that the DIU can be connected to */
enum fsl_diu_monitor_port {
	FSL_DIU_PORT_DVI,	/* DVI */
	FSL_DIU_PORT_LVDS,	/* Single-link LVDS */
	FSL_DIU_PORT_DLVDS	/* Dual-link LVDS */
};

struct platform_diu_data_ops {
	u32 (*get_pixel_format)(enum fsl_diu_monitor_port port,
		unsigned int bpp);
	void (*set_gamma_table)(enum fsl_diu_monitor_port port,
		char *gamma_table_base);
	void (*set_monitor_port)(enum fsl_diu_monitor_port port);
	void (*set_pixel_clock)(unsigned int pixclock);
	enum fsl_diu_monitor_port (*valid_monitor_port)
		(enum fsl_diu_monitor_port port);
	void (*release_bootmem)(void);
};

extern struct platform_diu_data_ops diu_ops;

void __noreturn fsl_hv_restart(char *cmd);
void __noreturn fsl_hv_halt(void);

#endif
#endif
Commit	Line	Data
eed32001 KG	1	#ifndef __PPC_FSL_SOC_H
	2	#define __PPC_FSL_SOC_H
	3	#ifdef __KERNEL__
	4
3d574abd SW	5	#include <asm/mmu.h>
3d574abd SW	6
364fdbc0 AV	7	struct spi_device;
364fdbc0 AV	8
eed32001	9	extern phys_addr_t get_immrbase(void);
a5dae76a	10	#if defined(CONFIG_CPM2) \|\| defined(CONFIG_QUICC_ENGINE) \|\| defined(CONFIG_8xx)
fba43665 VB	11	extern u32 get_brgfreq(void);
fba43665 VB	12	extern u32 get_baudrate(void);
a5dae76a AV	13	#else
	14	static inline u32 get_brgfreq(void) { return -1; }
	15	static inline u32 get_baudrate(void) { return -1; }
	16	#endif
38664095	17	extern u32 fsl_get_sys_freq(void);
eed32001	18
26f6cb99	19	struct spi_board_info;
d49747bd	20	struct device_node;
26f6cb99	21
7653aaab TT	22	/* The different ports that the DIU can be connected to */
	23	enum fsl_diu_monitor_port {
	24	FSL_DIU_PORT_DVI, /* DVI */
	25	FSL_DIU_PORT_LVDS, /* Single-link LVDS */
	26	FSL_DIU_PORT_DLVDS /* Dual-link LVDS */
	27	};
	28
6f90a8bd	29	struct platform_diu_data_ops {
7653aaab TT	30	u32 (*get_pixel_format)(enum fsl_diu_monitor_port port,
	31	unsigned int bpp);
	32	void (*set_gamma_table)(enum fsl_diu_monitor_port port,
	33	char *gamma_table_base);
	34	void (*set_monitor_port)(enum fsl_diu_monitor_port port);
	35	void (*set_pixel_clock)(unsigned int pixclock);
	36	enum fsl_diu_monitor_port (*valid_monitor_port)
	37	(enum fsl_diu_monitor_port port);
	38	void (*release_bootmem)(void);
6f90a8bd YS	39	};
	40
	41	extern struct platform_diu_data_ops diu_ops;
6f90a8bd	42
95ec77c0 DA	43	void __noreturn fsl_hv_restart(char *cmd);
95ec77c0 DA	44	void __noreturn fsl_hv_halt(void);
d173ea6b	45
eed32001 KG	46	#endif
eed32001 KG	47	#endif