projects / mirror_ubuntu-zesty-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * This file contains miscellaneous low-level functions. | |
| 3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
| 4 | * | |
| 5 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) | |
| 6 | * and Paul Mackerras. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public License | |
| 10 | * as published by the Free Software Foundation; either version | |
| 11 | * 2 of the License, or (at your option) any later version. | |
| 12 | * | |
| 13 | */ | |
| 14 | ||
| 15 | #include <linux/config.h> | |
| 16 | #include <linux/sys.h> | |
| 17 | #include <asm/unistd.h> | |
| 18 | #include <asm/errno.h> | |
| 19 | #include <asm/processor.h> | |
| 20 | #include <asm/page.h> | |
| 21 | #include <asm/cache.h> | |
| 22 | #include <asm/cputable.h> | |
| 23 | #include <asm/mmu.h> | |
| 24 | #include <asm/ppc_asm.h> | |
| 25 | #include <asm/thread_info.h> | |
| 0013a854 | 26 | #include <asm/asm-offsets.h> |
| 1da177e4 | 27 | |
| 55b6332e MT |
28 | #ifdef CONFIG_8xx |
| 29 | #define ISYNC_8xx isync | |
| 30 | #else | |
| 31 | #define ISYNC_8xx | |
| 32 | #endif | |
| 1da177e4 LT |
33 | .text |
| 34 | ||
| 35 | .align 5 | |
| 36 | _GLOBAL(__delay) | |
| 37 | cmpwi 0,r3,0 | |
| 38 | mtctr r3 | |
| 39 | beqlr | |
| 40 | 1: bdnz 1b | |
| 41 | blr | |
| 42 | ||
| 43 | /* | |
| 44 | * Returns (address we're running at) - (address we were linked at) | |
| 45 | * for use before the text and data are mapped to KERNELBASE. | |
| 46 | */ | |
| 47 | _GLOBAL(reloc_offset) | |
| 48 | mflr r0 | |
| 49 | bl 1f | |
| 50 | 1: mflr r3 | |
| 51 | lis r4,1b@ha | |
| 52 | addi r4,r4,1b@l | |
| 53 | subf r3,r4,r3 | |
| 54 | mtlr r0 | |
| 55 | blr | |
| 56 | ||
| 57 | /* | |
| 58 | * add_reloc_offset(x) returns x + reloc_offset(). | |
| 59 | */ | |
| 60 | _GLOBAL(add_reloc_offset) | |
| 61 | mflr r0 | |
| 62 | bl 1f | |
| 63 | 1: mflr r5 | |
| 64 | lis r4,1b@ha | |
| 65 | addi r4,r4,1b@l | |
| 66 | subf r5,r4,r5 | |
| 67 | add r3,r3,r5 | |
| 68 | mtlr r0 | |
| 69 | blr | |
| 70 | ||
| 71 | /* | |
| 72 | * sub_reloc_offset(x) returns x - reloc_offset(). | |
| 73 | */ | |
| 74 | _GLOBAL(sub_reloc_offset) | |
| 75 | mflr r0 | |
| 76 | bl 1f | |
| 77 | 1: mflr r5 | |
| 78 | lis r4,1b@ha | |
| 79 | addi r4,r4,1b@l | |
| 80 | subf r5,r4,r5 | |
| 81 | subf r3,r5,r3 | |
| 82 | mtlr r0 | |
| 83 | blr | |
| 84 | ||
| 85 | /* | |
| 86 | * reloc_got2 runs through the .got2 section adding an offset | |
| 87 | * to each entry. | |
| 88 | */ | |
| 89 | _GLOBAL(reloc_got2) | |
| 90 | mflr r11 | |
| 91 | lis r7,__got2_start@ha | |
| 92 | addi r7,r7,__got2_start@l | |
| 93 | lis r8,__got2_end@ha | |
| 94 | addi r8,r8,__got2_end@l | |
| 95 | subf r8,r7,r8 | |
| 96 | srwi. r8,r8,2 | |
| 97 | beqlr | |
| 98 | mtctr r8 | |
| 99 | bl 1f | |
| 100 | 1: mflr r0 | |
| 101 | lis r4,1b@ha | |
| 102 | addi r4,r4,1b@l | |
| 103 | subf r0,r4,r0 | |
| 104 | add r7,r0,r7 | |
| 105 | 2: lwz r0,0(r7) | |
| 106 | add r0,r0,r3 | |
| 107 | stw r0,0(r7) | |
| 108 | addi r7,r7,4 | |
| 109 | bdnz 2b | |
| 110 | mtlr r11 | |
| 111 | blr | |
| 112 | ||
| 113 | /* | |
| 114 | * identify_cpu, | |
| 115 | * called with r3 = data offset and r4 = CPU number | |
| 116 | * doesn't change r3 | |
| 117 | */ | |
| 118 | _GLOBAL(identify_cpu) | |
| 119 | addis r8,r3,cpu_specs@ha | |
| 120 | addi r8,r8,cpu_specs@l | |
| 121 | mfpvr r7 | |
| 122 | 1: | |
| 123 | lwz r5,CPU_SPEC_PVR_MASK(r8) | |
| 124 | and r5,r5,r7 | |
| 125 | lwz r6,CPU_SPEC_PVR_VALUE(r8) | |
| 126 | cmplw 0,r6,r5 | |
| 127 | beq 1f | |
| 128 | addi r8,r8,CPU_SPEC_ENTRY_SIZE | |
| 129 | b 1b | |
| 130 | 1: | |
| 131 | addis r6,r3,cur_cpu_spec@ha | |
| 132 | addi r6,r6,cur_cpu_spec@l | |
| 1da177e4 | 133 | sub r8,r8,r3 |
| 400d2212 | 134 | stw r8,0(r6) |
| 1da177e4 LT |
135 | blr |
| 136 | ||
| 137 | /* | |
| 138 | * do_cpu_ftr_fixups - goes through the list of CPU feature fixups | |
| 139 | * and writes nop's over sections of code that don't apply for this cpu. | |
| 140 | * r3 = data offset (not changed) | |
| 141 | */ | |
| 142 | _GLOBAL(do_cpu_ftr_fixups) | |
| 143 | /* Get CPU 0 features */ | |
| 144 | addis r6,r3,cur_cpu_spec@ha | |
| 145 | addi r6,r6,cur_cpu_spec@l | |
| 146 | lwz r4,0(r6) | |
| 147 | add r4,r4,r3 | |
| 148 | lwz r4,CPU_SPEC_FEATURES(r4) | |
| 149 | ||
| 150 | /* Get the fixup table */ | |
| 151 | addis r6,r3,__start___ftr_fixup@ha | |
| 152 | addi r6,r6,__start___ftr_fixup@l | |
| 153 | addis r7,r3,__stop___ftr_fixup@ha | |
| 154 | addi r7,r7,__stop___ftr_fixup@l | |
| 155 | ||
| 156 | /* Do the fixup */ | |
| 157 | 1: cmplw 0,r6,r7 | |
| 158 | bgelr | |
| 159 | addi r6,r6,16 | |
| 160 | lwz r8,-16(r6) /* mask */ | |
| 161 | and r8,r8,r4 | |
| 162 | lwz r9,-12(r6) /* value */ | |
| 163 | cmplw 0,r8,r9 | |
| 164 | beq 1b | |
| 165 | lwz r8,-8(r6) /* section begin */ | |
| 166 | lwz r9,-4(r6) /* section end */ | |
| 167 | subf. r9,r8,r9 | |
| 168 | beq 1b | |
| 169 | /* write nops over the section of code */ | |
| 170 | /* todo: if large section, add a branch at the start of it */ | |
| 171 | srwi r9,r9,2 | |
| 172 | mtctr r9 | |
| 173 | add r8,r8,r3 | |
| 174 | lis r0,0x60000000@h /* nop */ | |
| 175 | 3: stw r0,0(r8) | |
| 176 | andi. r10,r4,CPU_FTR_SPLIT_ID_CACHE@l | |
| 177 | beq 2f | |
| 178 | dcbst 0,r8 /* suboptimal, but simpler */ | |
| 179 | sync | |
| 180 | icbi 0,r8 | |
| 181 | 2: addi r8,r8,4 | |
| 182 | bdnz 3b | |
| 183 | sync /* additional sync needed on g4 */ | |
| 184 | isync | |
| 185 | b 1b | |
| 186 | ||
| 187 | /* | |
| 188 | * call_setup_cpu - call the setup_cpu function for this cpu | |
| 189 | * r3 = data offset, r24 = cpu number | |
| 190 | * | |
| 191 | * Setup function is called with: | |
| 192 | * r3 = data offset | |
| 400d2212 | 193 | * r4 = ptr to CPU spec (relocated) |
| 1da177e4 LT |
194 | */ |
| 195 | _GLOBAL(call_setup_cpu) | |
| 400d2212 KG |
196 | addis r4,r3,cur_cpu_spec@ha |
| 197 | addi r4,r4,cur_cpu_spec@l | |
| 198 | lwz r4,0(r4) | |
| 199 | add r4,r4,r3 | |
| 200 | lwz r5,CPU_SPEC_SETUP(r4) | |
| 201 | cmpi 0,r5,0 | |
| 1da177e4 | 202 | add r5,r5,r3 |
| 400d2212 KG |
203 | beqlr |
| 204 | mtctr r5 | |
| 1da177e4 LT |
205 | bctr |
| 206 | ||
| 207 | #if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx) | |
| 208 | ||
| 209 | /* This gets called by via-pmu.c to switch the PLL selection | |
| 210 | * on 750fx CPU. This function should really be moved to some | |
| 211 | * other place (as most of the cpufreq code in via-pmu | |
| 212 | */ | |
| 213 | _GLOBAL(low_choose_750fx_pll) | |
| 214 | /* Clear MSR:EE */ | |
| 215 | mfmsr r7 | |
| 216 | rlwinm r0,r7,0,17,15 | |
| 217 | mtmsr r0 | |
| 218 | ||
| 219 | /* If switching to PLL1, disable HID0:BTIC */ | |
| 220 | cmplwi cr0,r3,0 | |
| 221 | beq 1f | |
| 222 | mfspr r5,SPRN_HID0 | |
| 223 | rlwinm r5,r5,0,27,25 | |
| 224 | sync | |
| 225 | mtspr SPRN_HID0,r5 | |
| 226 | isync | |
| 227 | sync | |
| 228 | ||
| 229 | 1: | |
| 230 | /* Calc new HID1 value */ | |
| 231 | mfspr r4,SPRN_HID1 /* Build a HID1:PS bit from parameter */ | |
| 232 | rlwinm r5,r3,16,15,15 /* Clear out HID1:PS from value read */ | |
| 233 | rlwinm r4,r4,0,16,14 /* Could have I used rlwimi here ? */ | |
| 234 | or r4,r4,r5 | |
| 235 | mtspr SPRN_HID1,r4 | |
| 236 | ||
| 237 | /* Store new HID1 image */ | |
| 238 | rlwinm r6,r1,0,0,18 | |
| 239 | lwz r6,TI_CPU(r6) | |
| 240 | slwi r6,r6,2 | |
| 241 | addis r6,r6,nap_save_hid1@ha | |
| 242 | stw r4,nap_save_hid1@l(r6) | |
| 243 | ||
| 244 | /* If switching to PLL0, enable HID0:BTIC */ | |
| 245 | cmplwi cr0,r3,0 | |
| 246 | bne 1f | |
| 247 | mfspr r5,SPRN_HID0 | |
| 248 | ori r5,r5,HID0_BTIC | |
| 249 | sync | |
| 250 | mtspr SPRN_HID0,r5 | |
| 251 | isync | |
| 252 | sync | |
| 253 | ||
| 254 | 1: | |
| 255 | /* Return */ | |
| 256 | mtmsr r7 | |
| 257 | blr | |
| 258 | ||
| 259 | _GLOBAL(low_choose_7447a_dfs) | |
| 260 | /* Clear MSR:EE */ | |
| 261 | mfmsr r7 | |
| 262 | rlwinm r0,r7,0,17,15 | |
| 263 | mtmsr r0 | |
| 264 | ||
| 265 | /* Calc new HID1 value */ | |
| 266 | mfspr r4,SPRN_HID1 | |
| 267 | insrwi r4,r3,1,9 /* insert parameter into bit 9 */ | |
| 268 | sync | |
| 269 | mtspr SPRN_HID1,r4 | |
| 270 | sync | |
| 271 | isync | |
| 272 | ||
| 273 | /* Return */ | |
| 274 | mtmsr r7 | |
| 275 | blr | |
| 276 | ||
| 277 | #endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */ | |
| 278 | ||
| 1da177e4 LT |
279 | /* |
| 280 | * complement mask on the msr then "or" some values on. | |
| 281 | * _nmask_and_or_msr(nmask, value_to_or) | |
| 282 | */ | |
| 283 | _GLOBAL(_nmask_and_or_msr) | |
| 284 | mfmsr r0 /* Get current msr */ | |
| 285 | andc r0,r0,r3 /* And off the bits set in r3 (first parm) */ | |
| 286 | or r0,r0,r4 /* Or on the bits in r4 (second parm) */ | |
| 287 | SYNC /* Some chip revs have problems here... */ | |
| 288 | mtmsr r0 /* Update machine state */ | |
| 289 | isync | |
| 290 | blr /* Done */ | |
| 291 | ||
| 292 | ||
| 293 | /* | |
| 294 | * Flush MMU TLB | |
| 295 | */ | |
| 296 | _GLOBAL(_tlbia) | |
| 297 | #if defined(CONFIG_40x) | |
| 298 | sync /* Flush to memory before changing mapping */ | |
| 299 | tlbia | |
| 300 | isync /* Flush shadow TLB */ | |
| 301 | #elif defined(CONFIG_44x) | |
| 302 | li r3,0 | |
| 303 | sync | |
| 304 | ||
| 305 | /* Load high watermark */ | |
| 306 | lis r4,tlb_44x_hwater@ha | |
| 307 | lwz r5,tlb_44x_hwater@l(r4) | |
| 308 | ||
| 309 | 1: tlbwe r3,r3,PPC44x_TLB_PAGEID | |
| 310 | addi r3,r3,1 | |
| 311 | cmpw 0,r3,r5 | |
| 312 | ble 1b | |
| 313 | ||
| 314 | isync | |
| 315 | #elif defined(CONFIG_FSL_BOOKE) | |
| 316 | /* Invalidate all entries in TLB0 */ | |
| 317 | li r3, 0x04 | |
| 318 | tlbivax 0,3 | |
| 319 | /* Invalidate all entries in TLB1 */ | |
| 320 | li r3, 0x0c | |
| 321 | tlbivax 0,3 | |
| 322 | /* Invalidate all entries in TLB2 */ | |
| 323 | li r3, 0x14 | |
| 324 | tlbivax 0,3 | |
| 325 | /* Invalidate all entries in TLB3 */ | |
| 326 | li r3, 0x1c | |
| 327 | tlbivax 0,3 | |
| 328 | msync | |
| 329 | #ifdef CONFIG_SMP | |
| 330 | tlbsync | |
| 331 | #endif /* CONFIG_SMP */ | |
| 332 | #else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */ | |
| 333 | #if defined(CONFIG_SMP) | |
| 334 | rlwinm r8,r1,0,0,18 | |
| 335 | lwz r8,TI_CPU(r8) | |
| 336 | oris r8,r8,10 | |
| 337 | mfmsr r10 | |
| 338 | SYNC | |
| 339 | rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */ | |
| 340 | rlwinm r0,r0,0,28,26 /* clear DR */ | |
| 341 | mtmsr r0 | |
| 342 | SYNC_601 | |
| 343 | isync | |
| 344 | lis r9,mmu_hash_lock@h | |
| 345 | ori r9,r9,mmu_hash_lock@l | |
| 346 | tophys(r9,r9) | |
| 347 | 10: lwarx r7,0,r9 | |
| 348 | cmpwi 0,r7,0 | |
| 349 | bne- 10b | |
| 350 | stwcx. r8,0,r9 | |
| 351 | bne- 10b | |
| 352 | sync | |
| 353 | tlbia | |
| 354 | sync | |
| 355 | TLBSYNC | |
| 356 | li r0,0 | |
| 357 | stw r0,0(r9) /* clear mmu_hash_lock */ | |
| 358 | mtmsr r10 | |
| 359 | SYNC_601 | |
| 360 | isync | |
| 361 | #else /* CONFIG_SMP */ | |
| 362 | sync | |
| 363 | tlbia | |
| 364 | sync | |
| 365 | #endif /* CONFIG_SMP */ | |
| 366 | #endif /* ! defined(CONFIG_40x) */ | |
| 367 | blr | |
| 368 | ||
| 369 | /* | |
| 370 | * Flush MMU TLB for a particular address | |
| 371 | */ | |
| 372 | _GLOBAL(_tlbie) | |
| 373 | #if defined(CONFIG_40x) | |
| 374 | tlbsx. r3, 0, r3 | |
| 375 | bne 10f | |
| 376 | sync | |
| 377 | /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is clear. | |
| 378 | * Since 25 is the V bit in the TLB_TAG, loading this value will invalidate | |
| 379 | * the TLB entry. */ | |
| 380 | tlbwe r3, r3, TLB_TAG | |
| 381 | isync | |
| 382 | 10: | |
| 383 | #elif defined(CONFIG_44x) | |
| 384 | mfspr r4,SPRN_MMUCR | |
| 385 | mfspr r5,SPRN_PID /* Get PID */ | |
| 386 | rlwimi r4,r5,0,24,31 /* Set TID */ | |
| 387 | mtspr SPRN_MMUCR,r4 | |
| 388 | ||
| 389 | tlbsx. r3, 0, r3 | |
| 390 | bne 10f | |
| 391 | sync | |
| 392 | /* There are only 64 TLB entries, so r3 < 64, | |
| 393 | * which means bit 22, is clear. Since 22 is | |
| 394 | * the V bit in the TLB_PAGEID, loading this | |
| 395 | * value will invalidate the TLB entry. | |
| 396 | */ | |
| 397 | tlbwe r3, r3, PPC44x_TLB_PAGEID | |
| 398 | isync | |
| 399 | 10: | |
| 400 | #elif defined(CONFIG_FSL_BOOKE) | |
| 401 | rlwinm r4, r3, 0, 0, 19 | |
| 402 | ori r5, r4, 0x08 /* TLBSEL = 1 */ | |
| 403 | ori r6, r4, 0x10 /* TLBSEL = 2 */ | |
| 404 | ori r7, r4, 0x18 /* TLBSEL = 3 */ | |
| 405 | tlbivax 0, r4 | |
| 406 | tlbivax 0, r5 | |
| 407 | tlbivax 0, r6 | |
| 408 | tlbivax 0, r7 | |
| 409 | msync | |
| 410 | #if defined(CONFIG_SMP) | |
| 411 | tlbsync | |
| 412 | #endif /* CONFIG_SMP */ | |
| 413 | #else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */ | |
| 414 | #if defined(CONFIG_SMP) | |
| 415 | rlwinm r8,r1,0,0,18 | |
| 416 | lwz r8,TI_CPU(r8) | |
| 417 | oris r8,r8,11 | |
| 418 | mfmsr r10 | |
| 419 | SYNC | |
| 420 | rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */ | |
| 421 | rlwinm r0,r0,0,28,26 /* clear DR */ | |
| 422 | mtmsr r0 | |
| 423 | SYNC_601 | |
| 424 | isync | |
| 425 | lis r9,mmu_hash_lock@h | |
| 426 | ori r9,r9,mmu_hash_lock@l | |
| 427 | tophys(r9,r9) | |
| 428 | 10: lwarx r7,0,r9 | |
| 429 | cmpwi 0,r7,0 | |
| 430 | bne- 10b | |
| 431 | stwcx. r8,0,r9 | |
| 432 | bne- 10b | |
| 433 | eieio | |
| 434 | tlbie r3 | |
| 435 | sync | |
| 436 | TLBSYNC | |
| 437 | li r0,0 | |
| 438 | stw r0,0(r9) /* clear mmu_hash_lock */ | |
| 439 | mtmsr r10 | |
| 440 | SYNC_601 | |
| 441 | isync | |
| 442 | #else /* CONFIG_SMP */ | |
| 443 | tlbie r3 | |
| 444 | sync | |
| 445 | #endif /* CONFIG_SMP */ | |
| 446 | #endif /* ! CONFIG_40x */ | |
| 447 | blr | |
| 448 | ||
| 449 | /* | |
| 450 | * Flush instruction cache. | |
| 451 | * This is a no-op on the 601. | |
| 452 | */ | |
| 453 | _GLOBAL(flush_instruction_cache) | |
| 454 | #if defined(CONFIG_8xx) | |
| 455 | isync | |
| 456 | lis r5, IDC_INVALL@h | |
| 457 | mtspr SPRN_IC_CST, r5 | |
| 458 | #elif defined(CONFIG_4xx) | |
| 459 | #ifdef CONFIG_403GCX | |
| 460 | li r3, 512 | |
| 461 | mtctr r3 | |
| 462 | lis r4, KERNELBASE@h | |
| 463 | 1: iccci 0, r4 | |
| 464 | addi r4, r4, 16 | |
| 465 | bdnz 1b | |
| 466 | #else | |
| 467 | lis r3, KERNELBASE@h | |
| 468 | iccci 0,r3 | |
| 469 | #endif | |
| 470 | #elif CONFIG_FSL_BOOKE | |
| 33d9e9b5 KG |
471 | BEGIN_FTR_SECTION |
| 472 | mfspr r3,SPRN_L1CSR0 | |
| 473 | ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC | |
| 474 | /* msync; isync recommended here */ | |
| 475 | mtspr SPRN_L1CSR0,r3 | |
| 476 | isync | |
| 477 | blr | |
| 478 | END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) | |
| 1da177e4 LT |
479 | mfspr r3,SPRN_L1CSR1 |
| 480 | ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR | |
| 481 | mtspr SPRN_L1CSR1,r3 | |
| 482 | #else | |
| 483 | mfspr r3,SPRN_PVR | |
| 484 | rlwinm r3,r3,16,16,31 | |
| 485 | cmpwi 0,r3,1 | |
| 486 | beqlr /* for 601, do nothing */ | |
| 487 | /* 603/604 processor - use invalidate-all bit in HID0 */ | |
| 488 | mfspr r3,SPRN_HID0 | |
| 489 | ori r3,r3,HID0_ICFI | |
| 490 | mtspr SPRN_HID0,r3 | |
| 491 | #endif /* CONFIG_8xx/4xx */ | |
| 492 | isync | |
| 493 | blr | |
| 494 | ||
| 495 | /* | |
| 496 | * Write any modified data cache blocks out to memory | |
| 497 | * and invalidate the corresponding instruction cache blocks. | |
| 498 | * This is a no-op on the 601. | |
| 499 | * | |
| 500 | * flush_icache_range(unsigned long start, unsigned long stop) | |
| 501 | */ | |
| 502 | _GLOBAL(flush_icache_range) | |
| 503 | BEGIN_FTR_SECTION | |
| 504 | blr /* for 601, do nothing */ | |
| 4481e8ee | 505 | END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) |
| 7dffb720 | 506 | li r5,L1_CACHE_BYTES-1 |
| 1da177e4 LT |
507 | andc r3,r3,r5 |
| 508 | subf r4,r3,r4 | |
| 509 | add r4,r4,r5 | |
| 7dffb720 | 510 | srwi. r4,r4,L1_CACHE_SHIFT |
| 1da177e4 LT |
511 | beqlr |
| 512 | mtctr r4 | |
| 513 | mr r6,r3 | |
| 514 | 1: dcbst 0,r3 | |
| 7dffb720 | 515 | addi r3,r3,L1_CACHE_BYTES |
| 1da177e4 LT |
516 | bdnz 1b |
| 517 | sync /* wait for dcbst's to get to ram */ | |
| 518 | mtctr r4 | |
| 519 | 2: icbi 0,r6 | |
| 7dffb720 | 520 | addi r6,r6,L1_CACHE_BYTES |
| 1da177e4 LT |
521 | bdnz 2b |
| 522 | sync /* additional sync needed on g4 */ | |
| 523 | isync | |
| 524 | blr | |
| 525 | /* | |
| 526 | * Write any modified data cache blocks out to memory. | |
| 527 | * Does not invalidate the corresponding cache lines (especially for | |
| 528 | * any corresponding instruction cache). | |
| 529 | * | |
| 530 | * clean_dcache_range(unsigned long start, unsigned long stop) | |
| 531 | */ | |
| 532 | _GLOBAL(clean_dcache_range) | |
| 7dffb720 | 533 | li r5,L1_CACHE_BYTES-1 |
| 1da177e4 LT |
534 | andc r3,r3,r5 |
| 535 | subf r4,r3,r4 | |
| 536 | add r4,r4,r5 | |
| 7dffb720 | 537 | srwi. r4,r4,L1_CACHE_SHIFT |
| 1da177e4 LT |
538 | beqlr |
| 539 | mtctr r4 | |
| 540 | ||
| 541 | 1: dcbst 0,r3 | |
| 7dffb720 | 542 | addi r3,r3,L1_CACHE_BYTES |
| 1da177e4 LT |
543 | bdnz 1b |
| 544 | sync /* wait for dcbst's to get to ram */ | |
| 545 | blr | |
| 546 | ||
| 547 | /* | |
| 548 | * Write any modified data cache blocks out to memory and invalidate them. | |
| 549 | * Does not invalidate the corresponding instruction cache blocks. | |
| 550 | * | |
| 551 | * flush_dcache_range(unsigned long start, unsigned long stop) | |
| 552 | */ | |
| 553 | _GLOBAL(flush_dcache_range) | |
| 7dffb720 | 554 | li r5,L1_CACHE_BYTES-1 |
| 1da177e4 LT |
555 | andc r3,r3,r5 |
| 556 | subf r4,r3,r4 | |
| 557 | add r4,r4,r5 | |
| 7dffb720 | 558 | srwi. r4,r4,L1_CACHE_SHIFT |
| 1da177e4 LT |
559 | beqlr |
| 560 | mtctr r4 | |
| 561 | ||
| 562 | 1: dcbf 0,r3 | |
| 7dffb720 | 563 | addi r3,r3,L1_CACHE_BYTES |
| 1da177e4 LT |
564 | bdnz 1b |
| 565 | sync /* wait for dcbst's to get to ram */ | |
| 566 | blr | |
| 567 | ||
| 568 | /* | |
| 569 | * Like above, but invalidate the D-cache. This is used by the 8xx | |
| 570 | * to invalidate the cache so the PPC core doesn't get stale data | |
| 571 | * from the CPM (no cache snooping here :-). | |
| 572 | * | |
| 573 | * invalidate_dcache_range(unsigned long start, unsigned long stop) | |
| 574 | */ | |
| 575 | _GLOBAL(invalidate_dcache_range) | |
| 7dffb720 | 576 | li r5,L1_CACHE_BYTES-1 |
| 1da177e4 LT |
577 | andc r3,r3,r5 |
| 578 | subf r4,r3,r4 | |
| 579 | add r4,r4,r5 | |
| 7dffb720 | 580 | srwi. r4,r4,L1_CACHE_SHIFT |
| 1da177e4 LT |
581 | beqlr |
| 582 | mtctr r4 | |
| 583 | ||
| 584 | 1: dcbi 0,r3 | |
| 7dffb720 | 585 | addi r3,r3,L1_CACHE_BYTES |
| 1da177e4 LT |
586 | bdnz 1b |
| 587 | sync /* wait for dcbi's to get to ram */ | |
| 588 | blr | |
| 589 | ||
| 590 | #ifdef CONFIG_NOT_COHERENT_CACHE | |
| 591 | /* | |
| 592 | * 40x cores have 8K or 16K dcache and 32 byte line size. | |
| 593 | * 44x has a 32K dcache and 32 byte line size. | |
| 594 | * 8xx has 1, 2, 4, 8K variants. | |
| 595 | * For now, cover the worst case of the 44x. | |
| 596 | * Must be called with external interrupts disabled. | |
| 597 | */ | |
| 598 | #define CACHE_NWAYS 64 | |
| 599 | #define CACHE_NLINES 16 | |
| 600 | ||
| 601 | _GLOBAL(flush_dcache_all) | |
| 602 | li r4, (2 * CACHE_NWAYS * CACHE_NLINES) | |
| 603 | mtctr r4 | |
| 604 | lis r5, KERNELBASE@h | |
| 605 | 1: lwz r3, 0(r5) /* Load one word from every line */ | |
| 7dffb720 | 606 | addi r5, r5, L1_CACHE_BYTES |
| 1da177e4 LT |
607 | bdnz 1b |
| 608 | blr | |
| 609 | #endif /* CONFIG_NOT_COHERENT_CACHE */ | |
| 610 | ||
| 611 | /* | |
| 612 | * Flush a particular page from the data cache to RAM. | |
| 613 | * Note: this is necessary because the instruction cache does *not* | |
| 614 | * snoop from the data cache. | |
| 615 | * This is a no-op on the 601 which has a unified cache. | |
| 616 | * | |
| 617 | * void __flush_dcache_icache(void *page) | |
| 618 | */ | |
| 619 | _GLOBAL(__flush_dcache_icache) | |
| 620 | BEGIN_FTR_SECTION | |
| 621 | blr /* for 601, do nothing */ | |
| 4481e8ee | 622 | END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) |
| 1da177e4 | 623 | rlwinm r3,r3,0,0,19 /* Get page base address */ |
| 7dffb720 | 624 | li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ |
| 1da177e4 LT |
625 | mtctr r4 |
| 626 | mr r6,r3 | |
| 627 | 0: dcbst 0,r3 /* Write line to ram */ | |
| 7dffb720 | 628 | addi r3,r3,L1_CACHE_BYTES |
| 1da177e4 LT |
629 | bdnz 0b |
| 630 | sync | |
| 631 | mtctr r4 | |
| 632 | 1: icbi 0,r6 | |
| 7dffb720 | 633 | addi r6,r6,L1_CACHE_BYTES |
| 1da177e4 LT |
634 | bdnz 1b |
| 635 | sync | |
| 636 | isync | |
| 637 | blr | |
| 638 | ||
| 639 | /* | |
| 640 | * Flush a particular page from the data cache to RAM, identified | |
| 641 | * by its physical address. We turn off the MMU so we can just use | |
| 642 | * the physical address (this may be a highmem page without a kernel | |
| 643 | * mapping). | |
| 644 | * | |
| 645 | * void __flush_dcache_icache_phys(unsigned long physaddr) | |
| 646 | */ | |
| 647 | _GLOBAL(__flush_dcache_icache_phys) | |
| 648 | BEGIN_FTR_SECTION | |
| 649 | blr /* for 601, do nothing */ | |
| 4481e8ee | 650 | END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) |
| 1da177e4 LT |
651 | mfmsr r10 |
| 652 | rlwinm r0,r10,0,28,26 /* clear DR */ | |
| 653 | mtmsr r0 | |
| 654 | isync | |
| 655 | rlwinm r3,r3,0,0,19 /* Get page base address */ | |
| 7dffb720 | 656 | li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ |
| 1da177e4 LT |
657 | mtctr r4 |
| 658 | mr r6,r3 | |
| 659 | 0: dcbst 0,r3 /* Write line to ram */ | |
| 7dffb720 | 660 | addi r3,r3,L1_CACHE_BYTES |
| 1da177e4 LT |
661 | bdnz 0b |
| 662 | sync | |
| 663 | mtctr r4 | |
| 664 | 1: icbi 0,r6 | |
| 7dffb720 | 665 | addi r6,r6,L1_CACHE_BYTES |
| 1da177e4 LT |
666 | bdnz 1b |
| 667 | sync | |
| 668 | mtmsr r10 /* restore DR */ | |
| 669 | isync | |
| 670 | blr | |
| 671 | ||
| 672 | /* | |
| 673 | * Clear pages using the dcbz instruction, which doesn't cause any | |
| 674 | * memory traffic (except to write out any cache lines which get | |
| 675 | * displaced). This only works on cacheable memory. | |
| 676 | * | |
| 677 | * void clear_pages(void *page, int order) ; | |
| 678 | */ | |
| 679 | _GLOBAL(clear_pages) | |
| 7dffb720 | 680 | li r0,4096/L1_CACHE_BYTES |
| 1da177e4 LT |
681 | slw r0,r0,r4 |
| 682 | mtctr r0 | |
| 683 | #ifdef CONFIG_8xx | |
| 684 | li r4, 0 | |
| 685 | 1: stw r4, 0(r3) | |
| 686 | stw r4, 4(r3) | |
| 687 | stw r4, 8(r3) | |
| 688 | stw r4, 12(r3) | |
| 689 | #else | |
| 690 | 1: dcbz 0,r3 | |
| 691 | #endif | |
| 7dffb720 | 692 | addi r3,r3,L1_CACHE_BYTES |
| 1da177e4 LT |
693 | bdnz 1b |
| 694 | blr | |
| 695 | ||
| 696 | /* | |
| 697 | * Copy a whole page. We use the dcbz instruction on the destination | |
| 698 | * to reduce memory traffic (it eliminates the unnecessary reads of | |
| 699 | * the destination into cache). This requires that the destination | |
| 700 | * is cacheable. | |
| 701 | */ | |
| 702 | #define COPY_16_BYTES \ | |
| 703 | lwz r6,4(r4); \ | |
| 704 | lwz r7,8(r4); \ | |
| 705 | lwz r8,12(r4); \ | |
| 706 | lwzu r9,16(r4); \ | |
| 707 | stw r6,4(r3); \ | |
| 708 | stw r7,8(r3); \ | |
| 709 | stw r8,12(r3); \ | |
| 710 | stwu r9,16(r3) | |
| 711 | ||
| 712 | _GLOBAL(copy_page) | |
| 713 | addi r3,r3,-4 | |
| 714 | addi r4,r4,-4 | |
| 715 | ||
| 716 | #ifdef CONFIG_8xx | |
| 717 | /* don't use prefetch on 8xx */ | |
| 7dffb720 | 718 | li r0,4096/L1_CACHE_BYTES |
| 1da177e4 LT |
719 | mtctr r0 |
| 720 | 1: COPY_16_BYTES | |
| 721 | bdnz 1b | |
| 722 | blr | |
| 723 | ||
| 724 | #else /* not 8xx, we can prefetch */ | |
| 725 | li r5,4 | |
| 726 | ||
| 727 | #if MAX_COPY_PREFETCH > 1 | |
| 728 | li r0,MAX_COPY_PREFETCH | |
| 729 | li r11,4 | |
| 730 | mtctr r0 | |
| 731 | 11: dcbt r11,r4 | |
| 7dffb720 | 732 | addi r11,r11,L1_CACHE_BYTES |
| 1da177e4 LT |
733 | bdnz 11b |
| 734 | #else /* MAX_COPY_PREFETCH == 1 */ | |
| 735 | dcbt r5,r4 | |
| 7dffb720 | 736 | li r11,L1_CACHE_BYTES+4 |
| 1da177e4 | 737 | #endif /* MAX_COPY_PREFETCH */ |
| 7dffb720 | 738 | li r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH |
| 1da177e4 LT |
739 | crclr 4*cr0+eq |
| 740 | 2: | |
| 741 | mtctr r0 | |
| 742 | 1: | |
| 743 | dcbt r11,r4 | |
| 744 | dcbz r5,r3 | |
| 745 | COPY_16_BYTES | |
| 7dffb720 | 746 | #if L1_CACHE_BYTES >= 32 |
| 1da177e4 | 747 | COPY_16_BYTES |
| 7dffb720 | 748 | #if L1_CACHE_BYTES >= 64 |
| 1da177e4 LT |
749 | COPY_16_BYTES |
| 750 | COPY_16_BYTES | |
| 7dffb720 | 751 | #if L1_CACHE_BYTES >= 128 |
| 1da177e4 LT |
752 | COPY_16_BYTES |
| 753 | COPY_16_BYTES | |
| 754 | COPY_16_BYTES | |
| 755 | COPY_16_BYTES | |
| 756 | #endif | |
| 757 | #endif | |
| 758 | #endif | |
| 759 | bdnz 1b | |
| 760 | beqlr | |
| 761 | crnot 4*cr0+eq,4*cr0+eq | |
| 762 | li r0,MAX_COPY_PREFETCH | |
| 763 | li r11,4 | |
| 764 | b 2b | |
| 765 | #endif /* CONFIG_8xx */ | |
| 766 | ||
| 767 | /* | |
| 768 | * void atomic_clear_mask(atomic_t mask, atomic_t *addr) | |
| 769 | * void atomic_set_mask(atomic_t mask, atomic_t *addr); | |
| 770 | */ | |
| 771 | _GLOBAL(atomic_clear_mask) | |
| 772 | 10: lwarx r5,0,r4 | |
| 773 | andc r5,r5,r3 | |
| 774 | PPC405_ERR77(0,r4) | |
| 775 | stwcx. r5,0,r4 | |
| 776 | bne- 10b | |
| 777 | blr | |
| 778 | _GLOBAL(atomic_set_mask) | |
| 779 | 10: lwarx r5,0,r4 | |
| 780 | or r5,r5,r3 | |
| 781 | PPC405_ERR77(0,r4) | |
| 782 | stwcx. r5,0,r4 | |
| 783 | bne- 10b | |
| 784 | blr | |
| 785 | ||
| 786 | /* | |
| 787 | * I/O string operations | |
| 788 | * | |
| 789 | * insb(port, buf, len) | |
| 790 | * outsb(port, buf, len) | |
| 791 | * insw(port, buf, len) | |
| 792 | * outsw(port, buf, len) | |
| 793 | * insl(port, buf, len) | |
| 794 | * outsl(port, buf, len) | |
| 795 | * insw_ns(port, buf, len) | |
| 796 | * outsw_ns(port, buf, len) | |
| 797 | * insl_ns(port, buf, len) | |
| 798 | * outsl_ns(port, buf, len) | |
| 799 | * | |
| 800 | * The *_ns versions don't do byte-swapping. | |
| 801 | */ | |
| 802 | _GLOBAL(_insb) | |
| 803 | cmpwi 0,r5,0 | |
| 804 | mtctr r5 | |
| 805 | subi r4,r4,1 | |
| 806 | blelr- | |
| 807 | 00: lbz r5,0(r3) | |
| 55b6332e MT |
808 | 01: eieio |
| 809 | 02: stbu r5,1(r4) | |
| 810 | ISYNC_8xx | |
| 811 | .section .fixup,"ax" | |
| 812 | 03: blr | |
| 813 | .text | |
| 814 | .section __ex_table, "a" | |
| 815 | .align 2 | |
| 816 | .long 00b, 03b | |
| 817 | .long 01b, 03b | |
| 818 | .long 02b, 03b | |
| 819 | .text | |
| 1da177e4 LT |
820 | bdnz 00b |
| 821 | blr | |
| 822 | ||
| 823 | _GLOBAL(_outsb) | |
| 824 | cmpwi 0,r5,0 | |
| 825 | mtctr r5 | |
| 826 | subi r4,r4,1 | |
| 827 | blelr- | |
| 828 | 00: lbzu r5,1(r4) | |
| 55b6332e MT |
829 | 01: stb r5,0(r3) |
| 830 | 02: eieio | |
| 831 | ISYNC_8xx | |
| 832 | .section .fixup,"ax" | |
| 833 | 03: blr | |
| 834 | .text | |
| 835 | .section __ex_table, "a" | |
| 836 | .align 2 | |
| 837 | .long 00b, 03b | |
| 838 | .long 01b, 03b | |
| 839 | .long 02b, 03b | |
| 840 | .text | |
| 1da177e4 LT |
841 | bdnz 00b |
| 842 | blr | |
| 843 | ||
| 844 | _GLOBAL(_insw) | |
| 845 | cmpwi 0,r5,0 | |
| 846 | mtctr r5 | |
| 847 | subi r4,r4,2 | |
| 848 | blelr- | |
| 849 | 00: lhbrx r5,0,r3 | |
| 55b6332e MT |
850 | 01: eieio |
| 851 | 02: sthu r5,2(r4) | |
| 852 | ISYNC_8xx | |
| 853 | .section .fixup,"ax" | |
| 854 | 03: blr | |
| 855 | .text | |
| 856 | .section __ex_table, "a" | |
| 857 | .align 2 | |
| 858 | .long 00b, 03b | |
| 859 | .long 01b, 03b | |
| 860 | .long 02b, 03b | |
| 861 | .text | |
| 1da177e4 LT |
862 | bdnz 00b |
| 863 | blr | |
| 864 | ||
| 865 | _GLOBAL(_outsw) | |
| 866 | cmpwi 0,r5,0 | |
| 867 | mtctr r5 | |
| 868 | subi r4,r4,2 | |
| 869 | blelr- | |
| 870 | 00: lhzu r5,2(r4) | |
| 55b6332e MT |
871 | 01: eieio |
| 872 | 02: sthbrx r5,0,r3 | |
| 873 | ISYNC_8xx | |
| 874 | .section .fixup,"ax" | |
| 875 | 03: blr | |
| 876 | .text | |
| 877 | .section __ex_table, "a" | |
| 878 | .align 2 | |
| 879 | .long 00b, 03b | |
| 880 | .long 01b, 03b | |
| 881 | .long 02b, 03b | |
| 882 | .text | |
| 1da177e4 LT |
883 | bdnz 00b |
| 884 | blr | |
| 885 | ||
| 886 | _GLOBAL(_insl) | |
| 887 | cmpwi 0,r5,0 | |
| 888 | mtctr r5 | |
| 889 | subi r4,r4,4 | |
| 890 | blelr- | |
| 891 | 00: lwbrx r5,0,r3 | |
| 55b6332e MT |
892 | 01: eieio |
| 893 | 02: stwu r5,4(r4) | |
| 894 | ISYNC_8xx | |
| 895 | .section .fixup,"ax" | |
| 896 | 03: blr | |
| 897 | .text | |
| 898 | .section __ex_table, "a" | |
| 899 | .align 2 | |
| 900 | .long 00b, 03b | |
| 901 | .long 01b, 03b | |
| 902 | .long 02b, 03b | |
| 903 | .text | |
| 1da177e4 LT |
904 | bdnz 00b |
| 905 | blr | |
| 906 | ||
| 907 | _GLOBAL(_outsl) | |
| 908 | cmpwi 0,r5,0 | |
| 909 | mtctr r5 | |
| 910 | subi r4,r4,4 | |
| 911 | blelr- | |
| 912 | 00: lwzu r5,4(r4) | |
| 55b6332e MT |
913 | 01: stwbrx r5,0,r3 |
| 914 | 02: eieio | |
| 915 | ISYNC_8xx | |
| 916 | .section .fixup,"ax" | |
| 917 | 03: blr | |
| 918 | .text | |
| 919 | .section __ex_table, "a" | |
| 920 | .align 2 | |
| 921 | .long 00b, 03b | |
| 922 | .long 01b, 03b | |
| 923 | .long 02b, 03b | |
| 924 | .text | |
| 1da177e4 LT |
925 | bdnz 00b |
| 926 | blr | |
| 927 | ||
| 928 | _GLOBAL(__ide_mm_insw) | |
| 929 | _GLOBAL(_insw_ns) | |
| 930 | cmpwi 0,r5,0 | |
| 931 | mtctr r5 | |
| 932 | subi r4,r4,2 | |
| 933 | blelr- | |
| 934 | 00: lhz r5,0(r3) | |
| 55b6332e MT |
935 | 01: eieio |
| 936 | 02: sthu r5,2(r4) | |
| 937 | ISYNC_8xx | |
| 938 | .section .fixup,"ax" | |
| 939 | 03: blr | |
| 940 | .text | |
| 941 | .section __ex_table, "a" | |
| 942 | .align 2 | |
| 943 | .long 00b, 03b | |
| 944 | .long 01b, 03b | |
| 945 | .long 02b, 03b | |
| 946 | .text | |
| 1da177e4 LT |
947 | bdnz 00b |
| 948 | blr | |
| 949 | ||
| 950 | _GLOBAL(__ide_mm_outsw) | |
| 951 | _GLOBAL(_outsw_ns) | |
| 952 | cmpwi 0,r5,0 | |
| 953 | mtctr r5 | |
| 954 | subi r4,r4,2 | |
| 955 | blelr- | |
| 956 | 00: lhzu r5,2(r4) | |
| 55b6332e MT |
957 | 01: sth r5,0(r3) |
| 958 | 02: eieio | |
| 959 | ISYNC_8xx | |
| 960 | .section .fixup,"ax" | |
| 961 | 03: blr | |
| 962 | .text | |
| 963 | .section __ex_table, "a" | |
| 964 | .align 2 | |
| 965 | .long 00b, 03b | |
| 966 | .long 01b, 03b | |
| 967 | .long 02b, 03b | |
| 968 | .text | |
| 1da177e4 LT |
969 | bdnz 00b |
| 970 | blr | |
| 971 | ||
| 972 | _GLOBAL(__ide_mm_insl) | |
| 973 | _GLOBAL(_insl_ns) | |
| 974 | cmpwi 0,r5,0 | |
| 975 | mtctr r5 | |
| 976 | subi r4,r4,4 | |
| 977 | blelr- | |
| 978 | 00: lwz r5,0(r3) | |
| 55b6332e MT |
979 | 01: eieio |
| 980 | 02: stwu r5,4(r4) | |
| 981 | ISYNC_8xx | |
| 982 | .section .fixup,"ax" | |
| 983 | 03: blr | |
| 984 | .text | |
| 985 | .section __ex_table, "a" | |
| 986 | .align 2 | |
| 987 | .long 00b, 03b | |
| 988 | .long 01b, 03b | |
| 989 | .long 02b, 03b | |
| 990 | .text | |
| 1da177e4 LT |
991 | bdnz 00b |
| 992 | blr | |
| 993 | ||
| 994 | _GLOBAL(__ide_mm_outsl) | |
| 995 | _GLOBAL(_outsl_ns) | |
| 996 | cmpwi 0,r5,0 | |
| 997 | mtctr r5 | |
| 998 | subi r4,r4,4 | |
| 999 | blelr- | |
| 1000 | 00: lwzu r5,4(r4) | |
| 55b6332e MT |
1001 | 01: stw r5,0(r3) |
| 1002 | 02: eieio | |
| 1003 | ISYNC_8xx | |
| 1004 | .section .fixup,"ax" | |
| 1005 | 03: blr | |
| 1006 | .text | |
| 1007 | .section __ex_table, "a" | |
| 1008 | .align 2 | |
| 1009 | .long 00b, 03b | |
| 1010 | .long 01b, 03b | |
| 1011 | .long 02b, 03b | |
| 1012 | .text | |
| 1da177e4 LT |
1013 | bdnz 00b |
| 1014 | blr | |
| 1015 | ||
| 1016 | /* | |
| 1017 | * Extended precision shifts. | |
| 1018 | * | |
| 1019 | * Updated to be valid for shift counts from 0 to 63 inclusive. | |
| 1020 | * -- Gabriel | |
| 1021 | * | |
| 1022 | * R3/R4 has 64 bit value | |
| 1023 | * R5 has shift count | |
| 1024 | * result in R3/R4 | |
| 1025 | * | |
| 1026 | * ashrdi3: arithmetic right shift (sign propagation) | |
| 1027 | * lshrdi3: logical right shift | |
| 1028 | * ashldi3: left shift | |
| 1029 | */ | |
| 1030 | _GLOBAL(__ashrdi3) | |
| 1031 | subfic r6,r5,32 | |
| 1032 | srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count | |
| 1033 | addi r7,r5,32 # could be xori, or addi with -32 | |
| 1034 | slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count) | |
| 1035 | rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0 | |
| 1036 | sraw r7,r3,r7 # t2 = MSW >> (count-32) | |
| 1037 | or r4,r4,r6 # LSW |= t1 | |
| 1038 | slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2 | |
| 1039 | sraw r3,r3,r5 # MSW = MSW >> count | |
| 1040 | or r4,r4,r7 # LSW |= t2 | |
| 1041 | blr | |
| 1042 | ||
| 1043 | _GLOBAL(__ashldi3) | |
| 1044 | subfic r6,r5,32 | |
| 1045 | slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count | |
| 1046 | addi r7,r5,32 # could be xori, or addi with -32 | |
| 1047 | srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count) | |
| 1048 | slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32) | |
| 1049 | or r3,r3,r6 # MSW |= t1 | |
| 1050 | slw r4,r4,r5 # LSW = LSW << count | |
| 1051 | or r3,r3,r7 # MSW |= t2 | |
| 1052 | blr | |
| 1053 | ||
| 1054 | _GLOBAL(__lshrdi3) | |
| 1055 | subfic r6,r5,32 | |
| 1056 | srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count | |
| 1057 | addi r7,r5,32 # could be xori, or addi with -32 | |
| 1058 | slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count) | |
| 1059 | srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32) | |
| 1060 | or r4,r4,r6 # LSW |= t1 | |
| 1061 | srw r3,r3,r5 # MSW = MSW >> count | |
| 1062 | or r4,r4,r7 # LSW |= t2 | |
| 1063 | blr | |
| 1064 | ||
| 1065 | _GLOBAL(abs) | |
| 1066 | srawi r4,r3,31 | |
| 1067 | xor r3,r3,r4 | |
| 1068 | sub r3,r3,r4 | |
| 1069 | blr | |
| 1070 | ||
| 1071 | _GLOBAL(_get_SP) | |
| 1072 | mr r3,r1 /* Close enough */ | |
| 1073 | blr | |
| 1074 | ||
| 1da177e4 LT |
1075 | /* |
| 1076 | * Create a kernel thread | |
| 1077 | * kernel_thread(fn, arg, flags) | |
| 1078 | */ | |
| 1079 | _GLOBAL(kernel_thread) | |
| 1080 | stwu r1,-16(r1) | |
| 1081 | stw r30,8(r1) | |
| 1082 | stw r31,12(r1) | |
| 1083 | mr r30,r3 /* function */ | |
| 1084 | mr r31,r4 /* argument */ | |
| 1085 | ori r3,r5,CLONE_VM /* flags */ | |
| 1086 | oris r3,r3,CLONE_UNTRACED>>16 | |
| 1087 | li r4,0 /* new sp (unused) */ | |
| 1088 | li r0,__NR_clone | |
| 1089 | sc | |
| 1090 | cmpwi 0,r3,0 /* parent or child? */ | |
| 1091 | bne 1f /* return if parent */ | |
| 1092 | li r0,0 /* make top-level stack frame */ | |
| 1093 | stwu r0,-16(r1) | |
| 1094 | mtlr r30 /* fn addr in lr */ | |
| 1095 | mr r3,r31 /* load arg and call fn */ | |
| c9cf73ae | 1096 | PPC440EP_ERR42 |
| 1da177e4 LT |
1097 | blrl |
| 1098 | li r0,__NR_exit /* exit if function returns */ | |
| 1099 | li r3,0 | |
| 1100 | sc | |
| 1101 | 1: lwz r30,8(r1) | |
| 1102 | lwz r31,12(r1) | |
| 1103 | addi r1,r1,16 | |
| 1104 | blr | |
| 1105 | ||
| 1106 | /* | |
| 1107 | * This routine is just here to keep GCC happy - sigh... | |
| 1108 | */ | |
| 1109 | _GLOBAL(__main) | |
| 1110 | blr | |
| 1111 | ||
| 1112 | #define SYSCALL(name) \ | |
| 1113 | _GLOBAL(name) \ | |
| 1114 | li r0,__NR_##name; \ | |
| 1115 | sc; \ | |
| 1116 | bnslr; \ | |
| 1117 | lis r4,errno@ha; \ | |
| 1118 | stw r3,errno@l(r4); \ | |
| 1119 | li r3,-1; \ | |
| 1120 | blr | |
| 1121 | ||
| 1122 | SYSCALL(execve) | |
| 1123 | ||
| 1124 | /* Why isn't this a) automatic, b) written in 'C'? */ | |
| 1125 | .data | |
| 1126 | .align 4 | |
| 1127 | _GLOBAL(sys_call_table) | |
| 1128 | .long sys_restart_syscall /* 0 */ | |
| 1129 | .long sys_exit | |
| 1130 | .long ppc_fork | |
| 1131 | .long sys_read | |
| 1132 | .long sys_write | |
| 1133 | .long sys_open /* 5 */ | |
| 1134 | .long sys_close | |
| 1135 | .long sys_waitpid | |
| 1136 | .long sys_creat | |
| 1137 | .long sys_link | |
| 1138 | .long sys_unlink /* 10 */ | |
| 1139 | .long sys_execve | |
| 1140 | .long sys_chdir | |
| 1141 | .long sys_time | |
| 1142 | .long sys_mknod | |
| 1143 | .long sys_chmod /* 15 */ | |
| 1144 | .long sys_lchown | |
| 1145 | .long sys_ni_syscall /* old break syscall holder */ | |
| 1146 | .long sys_stat | |
| 1147 | .long sys_lseek | |
| 1148 | .long sys_getpid /* 20 */ | |
| 1149 | .long sys_mount | |
| 1150 | .long sys_oldumount | |
| 1151 | .long sys_setuid | |
| 1152 | .long sys_getuid | |
| 1153 | .long sys_stime /* 25 */ | |
| 1154 | .long sys_ptrace | |
| 1155 | .long sys_alarm | |
| 1156 | .long sys_fstat | |
| 1157 | .long sys_pause | |
| 1158 | .long sys_utime /* 30 */ | |
| 1159 | .long sys_ni_syscall /* old stty syscall holder */ | |
| 1160 | .long sys_ni_syscall /* old gtty syscall holder */ | |
| 1161 | .long sys_access | |
| 1162 | .long sys_nice | |
| 1163 | .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */ | |
| 1164 | .long sys_sync | |
| 1165 | .long sys_kill | |
| 1166 | .long sys_rename | |
| 1167 | .long sys_mkdir | |
| 1168 | .long sys_rmdir /* 40 */ | |
| 1169 | .long sys_dup | |
| 1170 | .long sys_pipe | |
| 1171 | .long sys_times | |
| 1172 | .long sys_ni_syscall /* old prof syscall holder */ | |
| 1173 | .long sys_brk /* 45 */ | |
| 1174 | .long sys_setgid | |
| 1175 | .long sys_getgid | |
| 1176 | .long sys_signal | |
| 1177 | .long sys_geteuid | |
| 1178 | .long sys_getegid /* 50 */ | |
| 1179 | .long sys_acct | |
| 1180 | .long sys_umount /* recycled never used phys() */ | |
| 1181 | .long sys_ni_syscall /* old lock syscall holder */ | |
| 1182 | .long sys_ioctl | |
| 1183 | .long sys_fcntl /* 55 */ | |
| 1184 | .long sys_ni_syscall /* old mpx syscall holder */ | |
| 1185 | .long sys_setpgid | |
| 1186 | .long sys_ni_syscall /* old ulimit syscall holder */ | |
| 1187 | .long sys_olduname | |
| 1188 | .long sys_umask /* 60 */ | |
| 1189 | .long sys_chroot | |
| 1190 | .long sys_ustat | |
| 1191 | .long sys_dup2 | |
| 1192 | .long sys_getppid | |
| 1193 | .long sys_getpgrp /* 65 */ | |
| 1194 | .long sys_setsid | |
| 1195 | .long sys_sigaction | |
| 1196 | .long sys_sgetmask | |
| 1197 | .long sys_ssetmask | |
| 1198 | .long sys_setreuid /* 70 */ | |
| 1199 | .long sys_setregid | |
| 1200 | .long ppc_sigsuspend | |
| 1201 | .long sys_sigpending | |
| 1202 | .long sys_sethostname | |
| 1203 | .long sys_setrlimit /* 75 */ | |
| 1204 | .long sys_old_getrlimit | |
| 1205 | .long sys_getrusage | |
| 1206 | .long sys_gettimeofday | |
| 1207 | .long sys_settimeofday | |
| 1208 | .long sys_getgroups /* 80 */ | |
| 1209 | .long sys_setgroups | |
| 1210 | .long ppc_select | |
| 1211 | .long sys_symlink | |
| 1212 | .long sys_lstat | |
| 1213 | .long sys_readlink /* 85 */ | |
| 1214 | .long sys_uselib | |
| 1215 | .long sys_swapon | |
| 1216 | .long sys_reboot | |
| 1217 | .long old_readdir | |
| 1218 | .long sys_mmap /* 90 */ | |
| 1219 | .long sys_munmap | |
| 1220 | .long sys_truncate | |
| 1221 | .long sys_ftruncate | |
| 1222 | .long sys_fchmod | |
| 1223 | .long sys_fchown /* 95 */ | |
| 1224 | .long sys_getpriority | |
| 1225 | .long sys_setpriority | |
| 1226 | .long sys_ni_syscall /* old profil syscall holder */ | |
| 1227 | .long sys_statfs | |
| 1228 | .long sys_fstatfs /* 100 */ | |
| 1229 | .long sys_ni_syscall | |
| 1230 | .long sys_socketcall | |
| 1231 | .long sys_syslog | |
| 1232 | .long sys_setitimer | |
| 1233 | .long sys_getitimer /* 105 */ | |
| 1234 | .long sys_newstat | |
| 1235 | .long sys_newlstat | |
| 1236 | .long sys_newfstat | |
| 1237 | .long sys_uname | |
| 1238 | .long sys_ni_syscall /* 110 */ | |
| 1239 | .long sys_vhangup | |
| 1240 | .long sys_ni_syscall /* old 'idle' syscall */ | |
| 1241 | .long sys_ni_syscall | |
| 1242 | .long sys_wait4 | |
| 1243 | .long sys_swapoff /* 115 */ | |
| 1244 | .long sys_sysinfo | |
| 1245 | .long sys_ipc | |
| 1246 | .long sys_fsync | |
| 1247 | .long sys_sigreturn | |
| 1248 | .long ppc_clone /* 120 */ | |
| 1249 | .long sys_setdomainname | |
| 1250 | .long sys_newuname | |
| 1251 | .long sys_ni_syscall | |
| 1252 | .long sys_adjtimex | |
| 1253 | .long sys_mprotect /* 125 */ | |
| 1254 | .long sys_sigprocmask | |
| 1255 | .long sys_ni_syscall /* old sys_create_module */ | |
| 1256 | .long sys_init_module | |
| 1257 | .long sys_delete_module | |
| 1258 | .long sys_ni_syscall /* old sys_get_kernel_syms */ /* 130 */ | |
| 1259 | .long sys_quotactl | |
| 1260 | .long sys_getpgid | |
| 1261 | .long sys_fchdir | |
| 1262 | .long sys_bdflush | |
| 1263 | .long sys_sysfs /* 135 */ | |
| 1264 | .long sys_personality | |
| 1265 | .long sys_ni_syscall /* for afs_syscall */ | |
| 1266 | .long sys_setfsuid | |
| 1267 | .long sys_setfsgid | |
| 1268 | .long sys_llseek /* 140 */ | |
| 1269 | .long sys_getdents | |
| 1270 | .long ppc_select | |
| 1271 | .long sys_flock | |
| 1272 | .long sys_msync | |
| 1273 | .long sys_readv /* 145 */ | |
| 1274 | .long sys_writev | |
| 1275 | .long sys_getsid | |
| 1276 | .long sys_fdatasync | |
| 1277 | .long sys_sysctl | |
| 1278 | .long sys_mlock /* 150 */ | |
| 1279 | .long sys_munlock | |
| 1280 | .long sys_mlockall | |
| 1281 | .long sys_munlockall | |
| 1282 | .long sys_sched_setparam | |
| 1283 | .long sys_sched_getparam /* 155 */ | |
| 1284 | .long sys_sched_setscheduler | |
| 1285 | .long sys_sched_getscheduler | |
| 1286 | .long sys_sched_yield | |
| 1287 | .long sys_sched_get_priority_max | |
| 1288 | .long sys_sched_get_priority_min /* 160 */ | |
| 1289 | .long sys_sched_rr_get_interval | |
| 1290 | .long sys_nanosleep | |
| 1291 | .long sys_mremap | |
| 1292 | .long sys_setresuid | |
| 1293 | .long sys_getresuid /* 165 */ | |
| 1294 | .long sys_ni_syscall /* old sys_query_module */ | |
| 1295 | .long sys_poll | |
| 1296 | .long sys_nfsservctl | |
| 1297 | .long sys_setresgid | |
| 1298 | .long sys_getresgid /* 170 */ | |
| 1299 | .long sys_prctl | |
| 1300 | .long sys_rt_sigreturn | |
| 1301 | .long sys_rt_sigaction | |
| 1302 | .long sys_rt_sigprocmask | |
| 1303 | .long sys_rt_sigpending /* 175 */ | |
| 1304 | .long sys_rt_sigtimedwait | |
| 1305 | .long sys_rt_sigqueueinfo | |
| 1306 | .long ppc_rt_sigsuspend | |
| 1307 | .long sys_pread64 | |
| 1308 | .long sys_pwrite64 /* 180 */ | |
| 1309 | .long sys_chown | |
| 1310 | .long sys_getcwd | |
| 1311 | .long sys_capget | |
| 1312 | .long sys_capset | |
| 1313 | .long sys_sigaltstack /* 185 */ | |
| 1314 | .long sys_sendfile | |
| 1315 | .long sys_ni_syscall /* streams1 */ | |
| 1316 | .long sys_ni_syscall /* streams2 */ | |
| 1317 | .long ppc_vfork | |
| 1318 | .long sys_getrlimit /* 190 */ | |
| 1319 | .long sys_readahead | |
| 1320 | .long sys_mmap2 | |
| 1321 | .long sys_truncate64 | |
| 1322 | .long sys_ftruncate64 | |
| 1323 | .long sys_stat64 /* 195 */ | |
| 1324 | .long sys_lstat64 | |
| 1325 | .long sys_fstat64 | |
| 1326 | .long sys_pciconfig_read | |
| 1327 | .long sys_pciconfig_write | |
| 1328 | .long sys_pciconfig_iobase /* 200 */ | |
| 1329 | .long sys_ni_syscall /* 201 - reserved - MacOnLinux - new */ | |
| 1330 | .long sys_getdents64 | |
| 1331 | .long sys_pivot_root | |
| 1332 | .long sys_fcntl64 | |
| 1333 | .long sys_madvise /* 205 */ | |
| 1334 | .long sys_mincore | |
| 1335 | .long sys_gettid | |
| 1336 | .long sys_tkill | |
| 1337 | .long sys_setxattr | |
| 1338 | .long sys_lsetxattr /* 210 */ | |
| 1339 | .long sys_fsetxattr | |
| 1340 | .long sys_getxattr | |
| 1341 | .long sys_lgetxattr | |
| 1342 | .long sys_fgetxattr | |
| 1343 | .long sys_listxattr /* 215 */ | |
| 1344 | .long sys_llistxattr | |
| 1345 | .long sys_flistxattr | |
| 1346 | .long sys_removexattr | |
| 1347 | .long sys_lremovexattr | |
| 1348 | .long sys_fremovexattr /* 220 */ | |
| 1349 | .long sys_futex | |
| 1350 | .long sys_sched_setaffinity | |
| 1351 | .long sys_sched_getaffinity | |
| 1352 | .long sys_ni_syscall | |
| 1353 | .long sys_ni_syscall /* 225 - reserved for Tux */ | |
| 1354 | .long sys_sendfile64 | |
| 1355 | .long sys_io_setup | |
| 1356 | .long sys_io_destroy | |
| 1357 | .long sys_io_getevents | |
| 1358 | .long sys_io_submit /* 230 */ | |
| 1359 | .long sys_io_cancel | |
| 1360 | .long sys_set_tid_address | |
| 1361 | .long sys_fadvise64 | |
| 1362 | .long sys_exit_group | |
| 1363 | .long sys_lookup_dcookie /* 235 */ | |
| 1364 | .long sys_epoll_create | |
| 1365 | .long sys_epoll_ctl | |
| 1366 | .long sys_epoll_wait | |
| 1367 | .long sys_remap_file_pages | |
| 1368 | .long sys_timer_create /* 240 */ | |
| 1369 | .long sys_timer_settime | |
| 1370 | .long sys_timer_gettime | |
| 1371 | .long sys_timer_getoverrun | |
| 1372 | .long sys_timer_delete | |
| 1373 | .long sys_clock_settime /* 245 */ | |
| 1374 | .long sys_clock_gettime | |
| 1375 | .long sys_clock_getres | |
| 1376 | .long sys_clock_nanosleep | |
| 1377 | .long ppc_swapcontext | |
| 1378 | .long sys_tgkill /* 250 */ | |
| 1379 | .long sys_utimes | |
| 1380 | .long sys_statfs64 | |
| 1381 | .long sys_fstatfs64 | |
| 1382 | .long ppc_fadvise64_64 | |
| 1383 | .long sys_ni_syscall /* 255 - rtas (used on ppc64) */ | |
| 1384 | .long sys_debug_setcontext | |
| 1385 | .long sys_ni_syscall /* 257 reserved for vserver */ | |
| 1386 | .long sys_ni_syscall /* 258 reserved for new sys_remap_file_pages */ | |
| 1387 | .long sys_ni_syscall /* 259 reserved for new sys_mbind */ | |
| 1388 | .long sys_ni_syscall /* 260 reserved for new sys_get_mempolicy */ | |
| 1389 | .long sys_ni_syscall /* 261 reserved for new sys_set_mempolicy */ | |
| 1390 | .long sys_mq_open | |
| 1391 | .long sys_mq_unlink | |
| 1392 | .long sys_mq_timedsend | |
| 1393 | .long sys_mq_timedreceive /* 265 */ | |
| 1394 | .long sys_mq_notify | |
| 1395 | .long sys_mq_getsetattr | |
| 70765aa4 | 1396 | .long sys_kexec_load |
| 1da177e4 LT |
1397 | .long sys_add_key |
| 1398 | .long sys_request_key /* 270 */ | |
| 1399 | .long sys_keyctl | |
| 1400 | .long sys_waitid | |
| 22e2c507 JA |
1401 | .long sys_ioprio_set |
| 1402 | .long sys_ioprio_get | |
| 141d751e RL |
1403 | .long sys_inotify_init /* 275 */ |
| 1404 | .long sys_inotify_add_watch | |
| 1405 | .long sys_inotify_rm_watch |