]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * arch/ppc/platforms/4xx/ash.h | |
3 | * | |
4 | * Macros, definitions, and data structures specific to the IBM PowerPC | |
5 | * Ash eval board. | |
6 | * | |
7 | * Author: Armin Kuster <akuster@mvista.com> | |
8 | * | |
9 | * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under | |
10 | * the terms of the GNU General Public License version 2. This program | |
11 | * is licensed "as is" without any warranty of any kind, whether express | |
12 | * or implied. | |
13 | */ | |
14 | ||
15 | #ifdef __KERNEL__ | |
16 | #ifndef __ASM_ASH_H__ | |
17 | #define __ASM_ASH_H__ | |
18 | #include <platforms/4xx/ibmnp405h.h> | |
19 | ||
20 | #ifndef __ASSEMBLY__ | |
21 | /* | |
22 | * Data structure defining board information maintained by the boot | |
23 | * ROM on IBM's "Ash" evaluation board. An effort has been made to | |
24 | * keep the field names consistent with the 8xx 'bd_t' board info | |
25 | * structures. | |
26 | */ | |
27 | ||
28 | typedef struct board_info { | |
29 | unsigned char bi_s_version[4]; /* Version of this structure */ | |
30 | unsigned char bi_r_version[30]; /* Version of the IBM ROM */ | |
31 | unsigned int bi_memsize; /* DRAM installed, in bytes */ | |
32 | unsigned char bi_enetaddr[4][6]; /* Local Ethernet MAC address */ | |
33 | unsigned char bi_pci_enetaddr[6]; | |
34 | unsigned int bi_intfreq; /* Processor speed, in Hz */ | |
35 | unsigned int bi_busfreq; /* PLB Bus speed, in Hz */ | |
36 | unsigned int bi_pci_busfreq; /* PCI speed in Hz */ | |
37 | } bd_t; | |
38 | ||
39 | /* Some 4xx parts use a different timebase frequency from the internal clock. | |
40 | */ | |
41 | #define bi_tbfreq bi_intfreq | |
42 | ||
43 | /* Memory map for the IBM "Ash" NP405H evaluation board. | |
44 | */ | |
45 | ||
46 | extern void *ash_rtc_base; | |
47 | #define ASH_RTC_PADDR ((uint)0xf0000000) | |
48 | #define ASH_RTC_VADDR ASH_RTC_PADDR | |
49 | #define ASH_RTC_SIZE ((uint)8*1024) | |
50 | ||
51 | ||
52 | /* Early initialization address mapping for block_io. | |
53 | * Standard 405GP map. | |
54 | */ | |
55 | #define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE) | |
56 | #define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR | |
57 | #define PPC4xx_PCI_IO_SIZE ((uint)64*1024) | |
58 | #define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR) | |
59 | #define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR | |
60 | #define PPC4xx_PCI_CFG_SIZE ((uint)4*1024) | |
61 | #define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000) | |
62 | #define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR | |
63 | #define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024) | |
64 | #define PPC4xx_ONB_IO_PADDR ((uint)0xef600000) | |
65 | #define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR | |
66 | #define PPC4xx_ONB_IO_SIZE ((uint)4*1024) | |
67 | ||
68 | #define NR_BOARD_IRQS 32 | |
69 | ||
70 | #ifdef CONFIG_PPC405GP_INTERNAL_CLOCK | |
71 | #define BASE_BAUD 201600 | |
72 | #else | |
73 | #define BASE_BAUD 691200 | |
74 | #endif | |
75 | ||
76 | #define PPC4xx_MACHINE_NAME "IBM NP405H Ash" | |
77 | ||
78 | extern char pci_irq_table[][4]; | |
79 | ||
80 | ||
81 | #endif /* !__ASSEMBLY__ */ | |
82 | #endif /* __ASM_ASH_H__ */ | |
83 | #endif /* __KERNEL__ */ |