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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Board setup routines for the esd CPCI-405 cPCI Board. |
3 | * | |
4 | * Author: Stefan Roese | |
5 | * stefan.roese@esd-electronics.com | |
6 | * | |
7 | * Copyright 2001 esd electronic system design - hannover germany | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/config.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/pci.h> | |
19 | #include <asm/system.h> | |
20 | #include <asm/pci-bridge.h> | |
21 | #include <asm/machdep.h> | |
22 | #include <asm/todc.h> | |
23 | #include <asm/ocp.h> | |
24 | ||
25 | void *cpci405_nvram; | |
26 | ||
27 | /* | |
28 | * Some IRQs unique to CPCI-405. | |
29 | */ | |
30 | int __init | |
31 | ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | |
32 | { | |
33 | static char pci_irq_table[][4] = | |
34 | /* | |
35 | * PCI IDSEL/INTPIN->INTLINE | |
36 | * A B C D | |
37 | */ | |
38 | { | |
39 | {28, 28, 28, 28}, /* IDSEL 15 - cPCI slot 8 */ | |
40 | {29, 29, 29, 29}, /* IDSEL 16 - cPCI slot 7 */ | |
41 | {30, 30, 30, 30}, /* IDSEL 17 - cPCI slot 6 */ | |
42 | {27, 27, 27, 27}, /* IDSEL 18 - cPCI slot 5 */ | |
43 | {28, 28, 28, 28}, /* IDSEL 19 - cPCI slot 4 */ | |
44 | {29, 29, 29, 29}, /* IDSEL 20 - cPCI slot 3 */ | |
45 | {30, 30, 30, 30}, /* IDSEL 21 - cPCI slot 2 */ | |
46 | }; | |
47 | const long min_idsel = 15, max_idsel = 21, irqs_per_slot = 4; | |
48 | return PCI_IRQ_TABLE_LOOKUP; | |
49 | }; | |
50 | ||
51 | void __init | |
52 | cpci405_setup_arch(void) | |
53 | { | |
54 | ppc4xx_setup_arch(); | |
55 | ||
56 | ibm_ocp_set_emac(0, 0); | |
57 | ||
58 | TODC_INIT(TODC_TYPE_MK48T35, cpci405_nvram, cpci405_nvram, cpci405_nvram, 8); | |
59 | } | |
60 | ||
61 | void __init | |
62 | cpci405_map_io(void) | |
63 | { | |
64 | ppc4xx_map_io(); | |
65 | cpci405_nvram = ioremap(CPCI405_NVRAM_PADDR, CPCI405_NVRAM_SIZE); | |
66 | } | |
67 | ||
68 | void __init | |
69 | platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
70 | unsigned long r6, unsigned long r7) | |
71 | { | |
72 | ppc4xx_init(r3, r4, r5, r6, r7); | |
73 | ||
74 | ppc_md.setup_arch = cpci405_setup_arch; | |
75 | ppc_md.setup_io_mappings = cpci405_map_io; | |
76 | ||
77 | ppc_md.time_init = todc_time_init; | |
78 | ppc_md.set_rtc_time = todc_set_rtc_time; | |
79 | ppc_md.get_rtc_time = todc_get_rtc_time; | |
80 | ppc_md.nvram_read_val = todc_direct_read_val; | |
81 | ppc_md.nvram_write_val = todc_direct_write_val; | |
82 | } |