[mirror_ubuntu-jammy-kernel.git] / arch / ppc / syslib / ppc4xx_setup.c

/*
 *
 *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
 *
 *    Copyright 2000-2001 MontaVista Software Inc.
 *      Completed implementation.
 *      Author: MontaVista Software, Inc.  <source@mvista.com>
 *              Frank Rowand <frank_rowand@mvista.com>
 *              Debbie Chu   <debbie_chu@mvista.com>
 *	Further modifications by Armin Kuster
 *
 *    Module name: ppc4xx_setup.c
 *
 */

#include <linux/init.h>
#include <linux/smp.h>
#include <linux/threads.h>
#include <linux/spinlock.h>
#include <linux/reboot.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/initrd.h>
#include <linux/pci.h>
#include <linux/rtc.h>
#include <linux/console.h>
#include <linux/serial_reg.h>
#include <linux/seq_file.h>

#include <asm/system.h>
#include <asm/processor.h>
#include <asm/machdep.h>
#include <asm/page.h>
#include <asm/kgdb.h>
#include <asm/ibm4xx.h>
#include <asm/time.h>
#include <asm/todc.h>
#include <asm/ppc4xx_pic.h>
#include <asm/pci-bridge.h>
#include <asm/bootinfo.h>

#include <syslib/gen550.h>

/* Function Prototypes */
extern void abort(void);
extern void ppc4xx_find_bridges(void);

/* Global Variables */
bd_t __res;

void __init
ppc4xx_setup_arch(void)
{
#if !defined(CONFIG_BDI_SWITCH)
	/*
	 * The Abatron BDI JTAG debugger does not tolerate others
	 * mucking with the debug registers.
	 */
        mtspr(SPRN_DBCR0, (DBCR0_IDM));
	mtspr(SPRN_DBSR, 0xffffffff);
#endif

	/* Setup PCI host bridges */
#ifdef CONFIG_PCI
	ppc4xx_find_bridges();
#endif
}

/*
 *   This routine pretty-prints the platform's internal CPU clock
 *   frequencies into the buffer for usage in /proc/cpuinfo.
 */

static int
ppc4xx_show_percpuinfo(struct seq_file *m, int i)
{
	seq_printf(m, "clock\t\t: %ldMHz\n", (long)__res.bi_intfreq / 1000000);

	return 0;
}

/*
 *   This routine pretty-prints the platform's internal bus clock
 *   frequencies into the buffer for usage in /proc/cpuinfo.
 */
static int
ppc4xx_show_cpuinfo(struct seq_file *m)
{
	bd_t *bip = &__res;

	seq_printf(m, "machine\t\t: %s\n", PPC4xx_MACHINE_NAME);
	seq_printf(m, "plb bus clock\t: %ldMHz\n",
		   (long) bip->bi_busfreq / 1000000);
#ifdef CONFIG_PCI
	seq_printf(m, "pci bus clock\t: %dMHz\n",
		   bip->bi_pci_busfreq / 1000000);
#endif

	return 0;
}

/*
 * Return the virtual address representing the top of physical RAM.
 */
static unsigned long __init
ppc4xx_find_end_of_memory(void)
{
	return ((unsigned long) __res.bi_memsize);
}

void __init
ppc4xx_map_io(void)
{
	io_block_mapping(PPC4xx_ONB_IO_VADDR,
			 PPC4xx_ONB_IO_PADDR, PPC4xx_ONB_IO_SIZE, _PAGE_IO);
#ifdef CONFIG_PCI
	io_block_mapping(PPC4xx_PCI_IO_VADDR,
			 PPC4xx_PCI_IO_PADDR, PPC4xx_PCI_IO_SIZE, _PAGE_IO);
	io_block_mapping(PPC4xx_PCI_CFG_VADDR,
			 PPC4xx_PCI_CFG_PADDR, PPC4xx_PCI_CFG_SIZE, _PAGE_IO);
	io_block_mapping(PPC4xx_PCI_LCFG_VADDR,
			 PPC4xx_PCI_LCFG_PADDR, PPC4xx_PCI_LCFG_SIZE, _PAGE_IO);
#endif
}

void __init
ppc4xx_init_IRQ(void)
{
	ppc4xx_pic_init();
}

static void
ppc4xx_restart(char *cmd)
{
	printk("%s\n", cmd);
	abort();
}

static void
ppc4xx_power_off(void)
{
	printk("System Halted\n");
	local_irq_disable();
	while (1) ;
}

static void
ppc4xx_halt(void)
{
	printk("System Halted\n");
	local_irq_disable();
	while (1) ;
}

/*
 * This routine retrieves the internal processor frequency from the board
 * information structure, sets up the kernel timer decrementer based on
 * that value, enables the 4xx programmable interval timer (PIT) and sets
 * it up for auto-reload.
 */
static void __init
ppc4xx_calibrate_decr(void)
{
	unsigned int freq;
	bd_t *bip = &__res;

#if defined(CONFIG_WALNUT) || defined(CONFIG_SYCAMORE)
	/* Walnut boot rom sets DCR CHCR1 (aka CPC0_CR1) bit CETE to 1 */
	mtdcr(DCRN_CHCR1, mfdcr(DCRN_CHCR1) & ~CHR1_CETE);
#endif
	freq = bip->bi_tbfreq;
	tb_ticks_per_jiffy = freq / HZ;
	tb_to_us = mulhwu_scale_factor(freq, 1000000);

	/* Set the time base to zero.
	   ** At 200 Mhz, time base will rollover in ~2925 years.
	 */

	mtspr(SPRN_TBWL, 0);
	mtspr(SPRN_TBWU, 0);

	/* Clear any pending timer interrupts */

	mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_PIS | TSR_FIS);
	mtspr(SPRN_TCR, TCR_PIE | TCR_ARE);

	/* Set the PIT reload value and just let it run. */
	mtspr(SPRN_PIT, tb_ticks_per_jiffy);
}

TODC_ALLOC();

/*
 * Input(s):
 *   r3 - Optional pointer to a board information structure.
 *   r4 - Optional pointer to the physical starting address of the init RAM
 *        disk.
 *   r5 - Optional pointer to the physical ending address of the init RAM
 *        disk.
 *   r6 - Optional pointer to the physical starting address of any kernel
 *        command-line parameters.
 *   r7 - Optional pointer to the physical ending address of any kernel
 *        command-line parameters.
 */
void __init
ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
	    unsigned long r6, unsigned long r7)
{
	parse_bootinfo(find_bootinfo());

	/*
	 * If we were passed in a board information, copy it into the
	 * residual data area.
	 */
	if (r3)
		__res = *(bd_t *)(r3 + KERNELBASE);

#if defined(CONFIG_BLK_DEV_INITRD)
	/*
	 * If the init RAM disk has been configured in, and there's a valid
	 * starting address for it, set it up.
	 */
	if (r4) {
		initrd_start = r4 + KERNELBASE;
		initrd_end = r5 + KERNELBASE;
	}
#endif				/* CONFIG_BLK_DEV_INITRD */

	/* Copy the kernel command line arguments to a safe place. */

	if (r6) {
		*(char *) (r7 + KERNELBASE) = 0;
		strcpy(cmd_line, (char *) (r6 + KERNELBASE));
	}

	/* Initialize machine-dependent vectors */

	ppc_md.setup_arch = ppc4xx_setup_arch;
	ppc_md.show_percpuinfo = ppc4xx_show_percpuinfo;
	ppc_md.show_cpuinfo = ppc4xx_show_cpuinfo;
	ppc_md.init_IRQ = ppc4xx_init_IRQ;

	ppc_md.restart = ppc4xx_restart;
	ppc_md.power_off = ppc4xx_power_off;
	ppc_md.halt = ppc4xx_halt;

	ppc_md.calibrate_decr = ppc4xx_calibrate_decr;

	ppc_md.find_end_of_memory = ppc4xx_find_end_of_memory;
	ppc_md.setup_io_mappings = ppc4xx_map_io;

#ifdef CONFIG_SERIAL_TEXT_DEBUG
	ppc_md.progress = gen550_progress;
#endif
}

/* Called from machine_check_exception */
void platform_machine_check(struct pt_regs *regs)
{
#if defined(DCRN_PLB0_BEAR)
	printk("PLB0: BEAR= 0x%08x ACR=   0x%08x BESR=  0x%08x\n",
	    mfdcr(DCRN_PLB0_BEAR), mfdcr(DCRN_PLB0_ACR),
	    mfdcr(DCRN_PLB0_BESR));
#endif
#if defined(DCRN_POB0_BEAR)
	printk("PLB0 to OPB: BEAR= 0x%08x BESR0= 0x%08x BESR1= 0x%08x\n",
	    mfdcr(DCRN_POB0_BEAR), mfdcr(DCRN_POB0_BESR0),
	    mfdcr(DCRN_POB0_BESR1));
#endif

}
Commit	Line	Data
1da177e4 LT	1	/*
	2	*
	3	* Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
	4	*
	5	* Copyright 2000-2001 MontaVista Software Inc.
	6	* Completed implementation.
	7	* Author: MontaVista Software, Inc. <source@mvista.com>
	8	* Frank Rowand <frank_rowand@mvista.com>
	9	* Debbie Chu <debbie_chu@mvista.com>
	10	* Further modifications by Armin Kuster
	11	*
	12	* Module name: ppc4xx_setup.c
	13	*
	14	*/
	15
1da177e4 LT	16	#include <linux/init.h>
	17	#include <linux/smp.h>
	18	#include <linux/threads.h>
	19	#include <linux/spinlock.h>
1da177e4 LT	20	#include <linux/reboot.h>
	21	#include <linux/param.h>
	22	#include <linux/string.h>
	23	#include <linux/initrd.h>
	24	#include <linux/pci.h>
	25	#include <linux/rtc.h>
	26	#include <linux/console.h>
1da177e4 LT	27	#include <linux/serial_reg.h>
	28	#include <linux/seq_file.h>
	29
	30	#include <asm/system.h>
	31	#include <asm/processor.h>
	32	#include <asm/machdep.h>
	33	#include <asm/page.h>
	34	#include <asm/kgdb.h>
	35	#include <asm/ibm4xx.h>
	36	#include <asm/time.h>
	37	#include <asm/todc.h>
	38	#include <asm/ppc4xx_pic.h>
	39	#include <asm/pci-bridge.h>
	40	#include <asm/bootinfo.h>
	41
	42	#include <syslib/gen550.h>
	43
	44	/* Function Prototypes */
	45	extern void abort(void);
	46	extern void ppc4xx_find_bridges(void);
	47
1da177e4 LT	48	/* Global Variables */
	49	bd_t __res;
	50
	51	void __init
	52	ppc4xx_setup_arch(void)
	53	{
	54	#if !defined(CONFIG_BDI_SWITCH)
	55	/*
	56	* The Abatron BDI JTAG debugger does not tolerate others
	57	* mucking with the debug registers.
	58	*/
	59	mtspr(SPRN_DBCR0, (DBCR0_IDM));
	60	mtspr(SPRN_DBSR, 0xffffffff);
	61	#endif
	62
	63	/* Setup PCI host bridges */
	64	#ifdef CONFIG_PCI
	65	ppc4xx_find_bridges();
	66	#endif
	67	}
	68
	69	/*
	70	* This routine pretty-prints the platform's internal CPU clock
	71	* frequencies into the buffer for usage in /proc/cpuinfo.
	72	*/
	73
	74	static int
	75	ppc4xx_show_percpuinfo(struct seq_file *m, int i)
	76	{
	77	seq_printf(m, "clock\t\t: %ldMHz\n", (long)__res.bi_intfreq / 1000000);
	78
	79	return 0;
	80	}
	81
	82	/*
	83	* This routine pretty-prints the platform's internal bus clock
	84	* frequencies into the buffer for usage in /proc/cpuinfo.
	85	*/
	86	static int
	87	ppc4xx_show_cpuinfo(struct seq_file *m)
	88	{
	89	bd_t *bip = &__res;
	90
	91	seq_printf(m, "machine\t\t: %s\n", PPC4xx_MACHINE_NAME);
	92	seq_printf(m, "plb bus clock\t: %ldMHz\n",
	93	(long) bip->bi_busfreq / 1000000);
	94	#ifdef CONFIG_PCI
	95	seq_printf(m, "pci bus clock\t: %dMHz\n",
	96	bip->bi_pci_busfreq / 1000000);
	97	#endif
	98
	99	return 0;
	100	}
	101
	102	/*
	103	* Return the virtual address representing the top of physical RAM.
	104	*/
	105	static unsigned long __init
	106	ppc4xx_find_end_of_memory(void)
	107	{
	108	return ((unsigned long) __res.bi_memsize);
	109	}
	110
	111	void __init
112	ppc4xx_map_io(void)
113	{
114	io_block_mapping(PPC4xx_ONB_IO_VADDR,
115	PPC4xx_ONB_IO_PADDR, PPC4xx_ONB_IO_SIZE, _PAGE_IO);
116	#ifdef CONFIG_PCI
117	io_block_mapping(PPC4xx_PCI_IO_VADDR,
118	PPC4xx_PCI_IO_PADDR, PPC4xx_PCI_IO_SIZE, _PAGE_IO);
119	io_block_mapping(PPC4xx_PCI_CFG_VADDR,
120	PPC4xx_PCI_CFG_PADDR, PPC4xx_PCI_CFG_SIZE, _PAGE_IO);
121	io_block_mapping(PPC4xx_PCI_LCFG_VADDR,
122	PPC4xx_PCI_LCFG_PADDR, PPC4xx_PCI_LCFG_SIZE, _PAGE_IO);
123	#endif
124	}
125
126	void __init
127	ppc4xx_init_IRQ(void)
128	{
129	ppc4xx_pic_init();
130	}
131
132	static void
133	ppc4xx_restart(char *cmd)
134	{
135	printk("%s\n", cmd);
136	abort();
137	}
138
139	static void
140	ppc4xx_power_off(void)
141	{
142	printk("System Halted\n");
143	local_irq_disable();
144	while (1) ;
145	}
146
147	static void
148	ppc4xx_halt(void)
149	{
150	printk("System Halted\n");
151	local_irq_disable();
152	while (1) ;
153	}
154
155	/*
156	* This routine retrieves the internal processor frequency from the board
157	* information structure, sets up the kernel timer decrementer based on
158	* that value, enables the 4xx programmable interval timer (PIT) and sets
159	* it up for auto-reload.
160	*/
161	static void __init
162	ppc4xx_calibrate_decr(void)
163	{
164	unsigned int freq;
165	bd_t *bip = &__res;
166
f4f1269c	167	#if defined(CONFIG_WALNUT) \|\| defined(CONFIG_SYCAMORE)
1da177e4 LT	168	/* Walnut boot rom sets DCR CHCR1 (aka CPC0_CR1) bit CETE to 1 */
	169	mtdcr(DCRN_CHCR1, mfdcr(DCRN_CHCR1) & ~CHR1_CETE);
	170	#endif
	171	freq = bip->bi_tbfreq;
	172	tb_ticks_per_jiffy = freq / HZ;
	173	tb_to_us = mulhwu_scale_factor(freq, 1000000);
	174
	175	/* Set the time base to zero.
	176	** At 200 Mhz, time base will rollover in ~2925 years.
	177	*/
	178
	179	mtspr(SPRN_TBWL, 0);
	180	mtspr(SPRN_TBWU, 0);
	181
	182	/* Clear any pending timer interrupts */
	183
	184	mtspr(SPRN_TSR, TSR_ENW \| TSR_WIS \| TSR_PIS \| TSR_FIS);
	185	mtspr(SPRN_TCR, TCR_PIE \| TCR_ARE);
	186
	187	/* Set the PIT reload value and just let it run. */
	188	mtspr(SPRN_PIT, tb_ticks_per_jiffy);
	189	}
	190
1da177e4 LT	191	TODC_ALLOC();
	192
	193	/*
	194	* Input(s):
	195	* r3 - Optional pointer to a board information structure.
	196	* r4 - Optional pointer to the physical starting address of the init RAM
	197	* disk.
	198	* r5 - Optional pointer to the physical ending address of the init RAM
	199	* disk.
	200	* r6 - Optional pointer to the physical starting address of any kernel
	201	* command-line parameters.
	202	* r7 - Optional pointer to the physical ending address of any kernel
	203	* command-line parameters.
	204	*/
	205	void __init
	206	ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
	207	unsigned long r6, unsigned long r7)
	208	{
	209	parse_bootinfo(find_bootinfo());
	210
	211	/*
	212	* If we were passed in a board information, copy it into the
	213	* residual data area.
	214	*/
	215	if (r3)
	216	__res = (bd_t )(r3 + KERNELBASE);
	217
	218	#if defined(CONFIG_BLK_DEV_INITRD)
	219	/*
	220	* If the init RAM disk has been configured in, and there's a valid
	221	* starting address for it, set it up.
	222	*/
	223	if (r4) {
	224	initrd_start = r4 + KERNELBASE;
	225	initrd_end = r5 + KERNELBASE;
	226	}
	227	#endif /* CONFIG_BLK_DEV_INITRD */
	228
	229	/* Copy the kernel command line arguments to a safe place. */
	230
	231	if (r6) {
	232	(char ) (r7 + KERNELBASE) = 0;
	233	strcpy(cmd_line, (char *) (r6 + KERNELBASE));
	234	}
1da177e4 LT	235
	236	/* Initialize machine-dependent vectors */
	237
	238	ppc_md.setup_arch = ppc4xx_setup_arch;
	239	ppc_md.show_percpuinfo = ppc4xx_show_percpuinfo;
	240	ppc_md.show_cpuinfo = ppc4xx_show_cpuinfo;
	241	ppc_md.init_IRQ = ppc4xx_init_IRQ;
	242
	243	ppc_md.restart = ppc4xx_restart;
	244	ppc_md.power_off = ppc4xx_power_off;
	245	ppc_md.halt = ppc4xx_halt;
	246
	247	ppc_md.calibrate_decr = ppc4xx_calibrate_decr;
	248
1da177e4 LT	249	ppc_md.find_end_of_memory = ppc4xx_find_end_of_memory;
	250	ppc_md.setup_io_mappings = ppc4xx_map_io;
	251
	252	#ifdef CONFIG_SERIAL_TEXT_DEBUG
	253	ppc_md.progress = gen550_progress;
	254	#endif
1da177e4 LT	255	}
1da177e4 LT	256
dc1c1ca3	257	/* Called from machine_check_exception */
1da177e4 LT	258	void platform_machine_check(struct pt_regs *regs)
	259	{
	260	#if defined(DCRN_PLB0_BEAR)
	261	printk("PLB0: BEAR= 0x%08x ACR= 0x%08x BESR= 0x%08x\n",
	262	mfdcr(DCRN_PLB0_BEAR), mfdcr(DCRN_PLB0_ACR),
	263	mfdcr(DCRN_PLB0_BESR));
	264	#endif
	265	#if defined(DCRN_POB0_BEAR)
	266	printk("PLB0 to OPB: BEAR= 0x%08x BESR0= 0x%08x BESR1= 0x%08x\n",
	267	mfdcr(DCRN_POB0_BEAR), mfdcr(DCRN_POB0_BESR0),
	268	mfdcr(DCRN_POB0_BESR1));
	269	#endif
	270
	271	}