[mirror_ubuntu-hirsute-kernel.git] / arch / ppc64 / kernel / pSeries_setup.c

/*
 *  linux/arch/ppc/kernel/setup.c
 *
 *  Copyright (C) 1995  Linus Torvalds
 *  Adapted from 'alpha' version by Gary Thomas
 *  Modified by Cort Dougan (cort@cs.nmt.edu)
 *  Modified by PPC64 Team, IBM Corp
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

/*
 * bootup setup stuff..
 */

#undef DEBUG

#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/major.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/console.h>
#include <linux/pci.h>
#include <linux/version.h>
#include <linux/adb.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>

#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/prom.h>
#include <asm/rtas.h>
#include <asm/pci-bridge.h>
#include <asm/iommu.h>
#include <asm/dma.h>
#include <asm/machdep.h>
#include <asm/irq.h>
#include <asm/time.h>
#include <asm/nvram.h>
#include <asm/plpar_wrappers.h>
#include <asm/xics.h>
#include <asm/cputable.h>

#include "i8259.h"
#include "mpic.h"
#include "pci.h"

#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif

extern void pSeries_final_fixup(void);

extern void pSeries_get_boot_time(struct rtc_time *rtc_time);
extern void pSeries_get_rtc_time(struct rtc_time *rtc_time);
extern int  pSeries_set_rtc_time(struct rtc_time *rtc_time);
extern void find_udbg_vterm(void);
extern void system_reset_fwnmi(void);	/* from head.S */
extern void machine_check_fwnmi(void);	/* from head.S */
extern void generic_find_legacy_serial_ports(u64 *physport,
		unsigned int *default_speed);

int fwnmi_active;  /* TRUE if an FWNMI handler is present */

extern void pSeries_system_reset_exception(struct pt_regs *regs);
extern int pSeries_machine_check_exception(struct pt_regs *regs);

static volatile void __iomem * chrp_int_ack_special;
struct mpic *pSeries_mpic;

void pSeries_get_cpuinfo(struct seq_file *m)
{
	struct device_node *root;
	const char *model = "";

	root = of_find_node_by_path("/");
	if (root)
		model = get_property(root, "model", NULL);
	seq_printf(m, "machine\t\t: CHRP %s\n", model);
	of_node_put(root);
}

/* Initialize firmware assisted non-maskable interrupts if
 * the firmware supports this feature.
 *
 */
static void __init fwnmi_init(void)
{
	int ret;
	int ibm_nmi_register = rtas_token("ibm,nmi-register");
	if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
		return;
	ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
			__pa((unsigned long)system_reset_fwnmi),
			__pa((unsigned long)machine_check_fwnmi));
	if (ret == 0)
		fwnmi_active = 1;
}

static int pSeries_irq_cascade(struct pt_regs *regs, void *data)
{
	if (chrp_int_ack_special)
		return readb(chrp_int_ack_special);
	else
		return i8259_irq(smp_processor_id());
}

static void __init pSeries_init_mpic(void)
{
        unsigned int *addrp;
	struct device_node *np;
        int i;

	/* All ISUs are setup, complete initialization */
	mpic_init(pSeries_mpic);

	/* Check what kind of cascade ACK we have */
        if (!(np = of_find_node_by_name(NULL, "pci"))
            || !(addrp = (unsigned int *)
                 get_property(np, "8259-interrupt-acknowledge", NULL)))
                printk(KERN_ERR "Cannot find pci to get ack address\n");
        else
		chrp_int_ack_special = ioremap(addrp[prom_n_addr_cells(np)-1], 1);
	of_node_put(np);

	/* Setup the legacy interrupts & controller */
        for (i = 0; i < NUM_ISA_INTERRUPTS; i++)
                irq_desc[i].handler = &i8259_pic;
	i8259_init(0);

	/* Hook cascade to mpic */
	mpic_setup_cascade(NUM_ISA_INTERRUPTS, pSeries_irq_cascade, NULL);
}

static void __init pSeries_setup_mpic(void)
{
	unsigned int *opprop;
	unsigned long openpic_addr = 0;
        unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
        struct device_node *root;
	int irq_count;

	/* Find the Open PIC if present */
	root = of_find_node_by_path("/");
	opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
	if (opprop != 0) {
		int n = prom_n_addr_cells(root);

		for (openpic_addr = 0; n > 0; --n)
			openpic_addr = (openpic_addr << 32) + *opprop++;
		printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
	}
	of_node_put(root);

	BUG_ON(openpic_addr == 0);

	/* Get the sense values from OF */
	prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
	
	/* Setup the openpic driver */
	irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
	pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
				  16, 16, irq_count, /* isu size, irq offset, irq count */ 
				  NR_IRQS - 4, /* ipi offset */
				  senses, irq_count, /* sense & sense size */
				  " MPIC     ");
}

static void __init pSeries_setup_arch(void)
{
	/* Fixup ppc_md depending on the type of interrupt controller */
	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
		ppc_md.init_IRQ       = pSeries_init_mpic; 
		ppc_md.get_irq        = mpic_get_irq;
		/* Allocate the mpic now, so that find_and_init_phbs() can
		 * fill the ISUs */
		pSeries_setup_mpic();
	} else {
		ppc_md.init_IRQ       = xics_init_IRQ;
		ppc_md.get_irq        = xics_get_irq;
	}

#ifdef CONFIG_SMP
	smp_init_pSeries();
#endif
	/* openpic global configuration register (64-bit format). */
	/* openpic Interrupt Source Unit pointer (64-bit format). */
	/* python0 facility area (mmio) (64-bit format) REAL address. */

	/* init to some ~sane value until calibrate_delay() runs */
	loops_per_jiffy = 50000000;

	if (ROOT_DEV == 0) {
		printk("No ramdisk, default root is /dev/sda2\n");
		ROOT_DEV = Root_SDA2;
	}

	fwnmi_init();

	/* Find and initialize PCI host bridges */
	init_pci_config_tokens();
	eeh_init();
	find_and_init_phbs();

#ifdef CONFIG_DUMMY_CONSOLE
	conswitchp = &dummy_con;
#endif

	pSeries_nvram_init();

	if (cur_cpu_spec->firmware_features & FW_FEATURE_SPLPAR)
		vpa_init(boot_cpuid);
}

static int __init pSeries_init_panel(void)
{
	/* Manually leave the kernel version on the panel. */
	ppc_md.progress("Linux ppc64\n", 0);
	ppc_md.progress(UTS_RELEASE, 0);

	return 0;
}
arch_initcall(pSeries_init_panel);


/* Build up the firmware_features bitmask field
 * using contents of device-tree/ibm,hypertas-functions.
 * Ultimately this functionality may be moved into prom.c prom_init().
 */
void __init fw_feature_init(void)
{
	struct device_node * dn;
	char * hypertas;
	unsigned int len;

	DBG(" -> fw_feature_init()\n");

	cur_cpu_spec->firmware_features = 0;
	dn = of_find_node_by_path("/rtas");
	if (dn == NULL) {
		printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
		goto no_rtas;
	}

	hypertas = get_property(dn, "ibm,hypertas-functions", &len);
	if (hypertas) {
		while (len > 0){
			int i, hypertas_len;
			/* check value against table of strings */
			for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
				if ((firmware_features_table[i].name) &&
				    (strcmp(firmware_features_table[i].name,hypertas))==0) {
					/* we have a match */
					cur_cpu_spec->firmware_features |= 
						(firmware_features_table[i].val);
					break;
				} 
			}
			hypertas_len = strlen(hypertas);
			len -= hypertas_len +1;
			hypertas+= hypertas_len +1;
		}
	}

	of_node_put(dn);
 no_rtas:
	printk(KERN_INFO "firmware_features = 0x%lx\n", 
	       cur_cpu_spec->firmware_features);

	DBG(" <- fw_feature_init()\n");
}


static  void __init pSeries_discover_pic(void)
{
	struct device_node *np;
	char *typep;

	/*
	 * Setup interrupt mapping options that are needed for finish_device_tree
	 * to properly parse the OF interrupt tree & do the virtual irq mapping
	 */
	__irq_offset_value = NUM_ISA_INTERRUPTS;
	ppc64_interrupt_controller = IC_INVALID;
	for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
		typep = (char *)get_property(np, "compatible", NULL);
		if (strstr(typep, "open-pic"))
			ppc64_interrupt_controller = IC_OPEN_PIC;
		else if (strstr(typep, "ppc-xicp"))
			ppc64_interrupt_controller = IC_PPC_XIC;
		else
			printk("pSeries_discover_pic: failed to recognize"
			       " interrupt-controller\n");
		break;
	}
}

static void pSeries_mach_cpu_die(void)
{
	local_irq_disable();
	idle_task_exit();
	/* Some hardware requires clearing the CPPR, while other hardware does not
	 * it is safe either way
	 */
	pSeriesLP_cppr_info(0, 0);
	rtas_stop_self();
	/* Should never get here... */
	BUG();
	for(;;);
}


/*
 * Early initialization.  Relocation is on but do not reference unbolted pages
 */
static void __init pSeries_init_early(void)
{
	void *comport;
	int iommu_off = 0;
	unsigned int default_speed;
	u64 physport;

	DBG(" -> pSeries_init_early()\n");

	fw_feature_init();
	
	if (systemcfg->platform & PLATFORM_LPAR)
		hpte_init_lpar();
	else {
		hpte_init_native();
		iommu_off = (of_chosen &&
			     get_property(of_chosen, "linux,iommu-off", NULL));
	}

	generic_find_legacy_serial_ports(&physport, &default_speed);

	if (systemcfg->platform & PLATFORM_LPAR)
		find_udbg_vterm();
	else if (physport) {
		/* Map the uart for udbg. */
		comport = (void *)ioremap(physport, 16);
		udbg_init_uart(comport, default_speed);

		ppc_md.udbg_putc = udbg_putc;
		ppc_md.udbg_getc = udbg_getc;
		ppc_md.udbg_getc_poll = udbg_getc_poll;
		DBG("Hello World !\n");
	}


	iommu_init_early_pSeries();

	pSeries_discover_pic();

	DBG(" <- pSeries_init_early()\n");
}


static void pSeries_progress(char *s, unsigned short hex)
{
	struct device_node *root;
	int width, *p;
	char *os;
	static int display_character, set_indicator;
	static int max_width;
	static DEFINE_SPINLOCK(progress_lock);
	static int pending_newline = 0;  /* did last write end with unprinted newline? */

	if (!rtas.base)
		return;

	if (max_width == 0) {
		if ((root = find_path_device("/rtas")) &&
		     (p = (unsigned int *)get_property(root,
						       "ibm,display-line-length",
						       NULL)))
			max_width = *p;
		else
			max_width = 0x10;
		display_character = rtas_token("display-character");
		set_indicator = rtas_token("set-indicator");
	}

	if (display_character == RTAS_UNKNOWN_SERVICE) {
		/* use hex display if available */
		if (set_indicator != RTAS_UNKNOWN_SERVICE)
			rtas_call(set_indicator, 3, 1, NULL, 6, 0, hex);
		return;
	}

	spin_lock(&progress_lock);

	/*
	 * Last write ended with newline, but we didn't print it since
	 * it would just clear the bottom line of output. Print it now
	 * instead.
	 *
	 * If no newline is pending, print a CR to start output at the
	 * beginning of the line.
	 */
	if (pending_newline) {
		rtas_call(display_character, 1, 1, NULL, '\r');
		rtas_call(display_character, 1, 1, NULL, '\n');
		pending_newline = 0;
	} else {
		rtas_call(display_character, 1, 1, NULL, '\r');
	}
 
	width = max_width;
	os = s;
	while (*os) {
		if (*os == '\n' || *os == '\r') {
			/* Blank to end of line. */
			while (width-- > 0)
				rtas_call(display_character, 1, 1, NULL, ' ');
 
			/* If newline is the last character, save it
			 * until next call to avoid bumping up the
			 * display output.
			 */
			if (*os == '\n' && !os[1]) {
				pending_newline = 1;
				spin_unlock(&progress_lock);
				return;
			}
 
			/* RTAS wants CR-LF, not just LF */
 
			if (*os == '\n') {
				rtas_call(display_character, 1, 1, NULL, '\r');
				rtas_call(display_character, 1, 1, NULL, '\n');
			} else {
				/* CR might be used to re-draw a line, so we'll
				 * leave it alone and not add LF.
				 */
				rtas_call(display_character, 1, 1, NULL, *os);
			}
 
			width = max_width;
		} else {
			width--;
			rtas_call(display_character, 1, 1, NULL, *os);
		}
 
		os++;
 
		/* if we overwrite the screen length */
		if (width <= 0)
			while ((*os != 0) && (*os != '\n') && (*os != '\r'))
				os++;
	}
 
	/* Blank to end of line. */
	while (width-- > 0)
		rtas_call(display_character, 1, 1, NULL, ' ');

	spin_unlock(&progress_lock);
}

static int pSeries_check_legacy_ioport(unsigned int baseport)
{
	struct device_node *np;

#define I8042_DATA_REG	0x60
#define FDC_BASE	0x3f0


	switch(baseport) {
	case I8042_DATA_REG:
		np = of_find_node_by_type(NULL, "8042");
		if (np == NULL)
			return -ENODEV;
		of_node_put(np);
		break;
	case FDC_BASE:
		np = of_find_node_by_type(NULL, "fdc");
		if (np == NULL)
			return -ENODEV;
		of_node_put(np);
		break;
	}
	return 0;
}

/*
 * Called very early, MMU is off, device-tree isn't unflattened
 */
extern struct machdep_calls pSeries_md;

static int __init pSeries_probe(int platform)
{
	if (platform != PLATFORM_PSERIES &&
	    platform != PLATFORM_PSERIES_LPAR)
		return 0;

	/* if we have some ppc_md fixups for LPAR to do, do
	 * it here ...
	 */

	return 1;
}

struct machdep_calls __initdata pSeries_md = {
	.probe			= pSeries_probe,
	.setup_arch		= pSeries_setup_arch,
	.init_early		= pSeries_init_early,
	.get_cpuinfo		= pSeries_get_cpuinfo,
	.log_error		= pSeries_log_error,
	.pcibios_fixup		= pSeries_final_fixup,
	.restart		= rtas_restart,
	.power_off		= rtas_power_off,
	.halt			= rtas_halt,
	.panic			= rtas_os_term,
	.cpu_die		= pSeries_mach_cpu_die,
	.get_boot_time		= pSeries_get_boot_time,
	.get_rtc_time		= pSeries_get_rtc_time,
	.set_rtc_time		= pSeries_set_rtc_time,
	.calibrate_decr		= generic_calibrate_decr,
	.progress		= pSeries_progress,
	.check_legacy_ioport	= pSeries_check_legacy_ioport,
	.system_reset_exception = pSeries_system_reset_exception,
	.machine_check_exception = pSeries_machine_check_exception,
};
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/ppc/kernel/setup.c
	3	*
	4	* Copyright (C) 1995 Linus Torvalds
	5	* Adapted from 'alpha' version by Gary Thomas
	6	* Modified by Cort Dougan (cort@cs.nmt.edu)
	7	* Modified by PPC64 Team, IBM Corp
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
	15	/*
	16	* bootup setup stuff..
	17	*/
	18
	19	#undef DEBUG
	20
	21	#include <linux/config.h>
	22	#include <linux/errno.h>
	23	#include <linux/sched.h>
	24	#include <linux/kernel.h>
	25	#include <linux/mm.h>
	26	#include <linux/stddef.h>
	27	#include <linux/unistd.h>
	28	#include <linux/slab.h>
	29	#include <linux/user.h>
	30	#include <linux/a.out.h>
	31	#include <linux/tty.h>
	32	#include <linux/major.h>
	33	#include <linux/interrupt.h>
	34	#include <linux/reboot.h>
	35	#include <linux/init.h>
	36	#include <linux/ioport.h>
	37	#include <linux/console.h>
	38	#include <linux/pci.h>
	39	#include <linux/version.h>
	40	#include <linux/adb.h>
	41	#include <linux/module.h>
	42	#include <linux/delay.h>
	43	#include <linux/irq.h>
	44	#include <linux/seq_file.h>
	45	#include <linux/root_dev.h>
	46
	47	#include <asm/mmu.h>
	48	#include <asm/processor.h>
	49	#include <asm/io.h>
	50	#include <asm/pgtable.h>
	51	#include <asm/prom.h>
	52	#include <asm/rtas.h>
	53	#include <asm/pci-bridge.h>
	54	#include <asm/iommu.h>
	55	#include <asm/dma.h>
	56	#include <asm/machdep.h>
	57	#include <asm/irq.h>
	58	#include <asm/time.h>
	59	#include <asm/nvram.h>
	60	#include <asm/plpar_wrappers.h>
	61	#include <asm/xics.h>
	62	#include <asm/cputable.h>
	63
	64	#include "i8259.h"
65	#include "mpic.h"
66	#include "pci.h"
67
68	#ifdef DEBUG
69	#define DBG(fmt...) udbg_printf(fmt)
70	#else
71	#define DBG(fmt...)
72	#endif
73
74	extern void pSeries_final_fixup(void);
75
76	extern void pSeries_get_boot_time(struct rtc_time *rtc_time);
77	extern void pSeries_get_rtc_time(struct rtc_time *rtc_time);
78	extern int pSeries_set_rtc_time(struct rtc_time *rtc_time);
79	extern void find_udbg_vterm(void);
80	extern void system_reset_fwnmi(void); /* from head.S */
81	extern void machine_check_fwnmi(void); /* from head.S */
82	extern void generic_find_legacy_serial_ports(u64 *physport,
83	unsigned int *default_speed);
84
85	int fwnmi_active; /* TRUE if an FWNMI handler is present */
86
1da177e4 LT	87	extern void pSeries_system_reset_exception(struct pt_regs *regs);
	88	extern int pSeries_machine_check_exception(struct pt_regs *regs);
	89
	90	static volatile void __iomem * chrp_int_ack_special;
	91	struct mpic *pSeries_mpic;
	92
	93	void pSeries_get_cpuinfo(struct seq_file *m)
	94	{
	95	struct device_node *root;
	96	const char *model = "";
	97
	98	root = of_find_node_by_path("/");
	99	if (root)
	100	model = get_property(root, "model", NULL);
	101	seq_printf(m, "machine\t\t: CHRP %s\n", model);
	102	of_node_put(root);
	103	}
	104
	105	/* Initialize firmware assisted non-maskable interrupts if
	106	* the firmware supports this feature.
	107	*
	108	*/
	109	static void __init fwnmi_init(void)
	110	{
	111	int ret;
	112	int ibm_nmi_register = rtas_token("ibm,nmi-register");
	113	if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
	114	return;
	115	ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
	116	__pa((unsigned long)system_reset_fwnmi),
	117	__pa((unsigned long)machine_check_fwnmi));
	118	if (ret == 0)
	119	fwnmi_active = 1;
	120	}
	121
	122	static int pSeries_irq_cascade(struct pt_regs regs, void data)
	123	{
	124	if (chrp_int_ack_special)
	125	return readb(chrp_int_ack_special);
	126	else
	127	return i8259_irq(smp_processor_id());
	128	}
	129
	130	static void __init pSeries_init_mpic(void)
	131	{
	132	unsigned int *addrp;
	133	struct device_node *np;
	134	int i;
	135
	136	/* All ISUs are setup, complete initialization */
	137	mpic_init(pSeries_mpic);
	138
	139	/* Check what kind of cascade ACK we have */
	140	if (!(np = of_find_node_by_name(NULL, "pci"))
	141	\|\| !(addrp = (unsigned int *)
	142	get_property(np, "8259-interrupt-acknowledge", NULL)))
	143	printk(KERN_ERR "Cannot find pci to get ack address\n");
	144	else
	145	chrp_int_ack_special = ioremap(addrp[prom_n_addr_cells(np)-1], 1);
	146	of_node_put(np);
	147
	148	/* Setup the legacy interrupts & controller */
	149	for (i = 0; i < NUM_ISA_INTERRUPTS; i++)
	150	irq_desc[i].handler = &i8259_pic;
151	i8259_init(0);
152
153	/* Hook cascade to mpic */
154	mpic_setup_cascade(NUM_ISA_INTERRUPTS, pSeries_irq_cascade, NULL);
155	}
156
157	static void __init pSeries_setup_mpic(void)
158	{
159	unsigned int *opprop;
160	unsigned long openpic_addr = 0;
161	unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
162	struct device_node *root;
163	int irq_count;
164
165	/* Find the Open PIC if present */
166	root = of_find_node_by_path("/");
167	opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
168	if (opprop != 0) {
169	int n = prom_n_addr_cells(root);
170
171	for (openpic_addr = 0; n > 0; --n)
172	openpic_addr = (openpic_addr << 32) + *opprop++;
173	printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
174	}
175	of_node_put(root);
176
177	BUG_ON(openpic_addr == 0);
178
179	/* Get the sense values from OF */
180	prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
181
182	/* Setup the openpic driver */
183	irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
184	pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
185	16, 16, irq_count, /* isu size, irq offset, irq count */
186	NR_IRQS - 4, /* ipi offset */
187	senses, irq_count, /* sense & sense size */
188	" MPIC ");
189	}
190
191	static void __init pSeries_setup_arch(void)
192	{
193	/* Fixup ppc_md depending on the type of interrupt controller */
194	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
195	ppc_md.init_IRQ = pSeries_init_mpic;
196	ppc_md.get_irq = mpic_get_irq;
197	/* Allocate the mpic now, so that find_and_init_phbs() can
198	* fill the ISUs */
199	pSeries_setup_mpic();
200	} else {
201	ppc_md.init_IRQ = xics_init_IRQ;
202	ppc_md.get_irq = xics_get_irq;
203	}
204
205	#ifdef CONFIG_SMP
206	smp_init_pSeries();
207	#endif
208	/* openpic global configuration register (64-bit format). */
209	/* openpic Interrupt Source Unit pointer (64-bit format). */
210	/* python0 facility area (mmio) (64-bit format) REAL address. */
211
212	/* init to some ~sane value until calibrate_delay() runs */
213	loops_per_jiffy = 50000000;
214
215	if (ROOT_DEV == 0) {
216	printk("No ramdisk, default root is /dev/sda2\n");
217	ROOT_DEV = Root_SDA2;
218	}
219
220	fwnmi_init();
221
222	/* Find and initialize PCI host bridges */
223	init_pci_config_tokens();
224	eeh_init();
225	find_and_init_phbs();
226
227	#ifdef CONFIG_DUMMY_CONSOLE
228	conswitchp = &dummy_con;
229	#endif
230
231	pSeries_nvram_init();
232
233	if (cur_cpu_spec->firmware_features & FW_FEATURE_SPLPAR)
234	vpa_init(boot_cpuid);
235	}
236
237	static int __init pSeries_init_panel(void)
238	{
239	/* Manually leave the kernel version on the panel. */
240	ppc_md.progress("Linux ppc64\n", 0);
241	ppc_md.progress(UTS_RELEASE, 0);
242
243	return 0;
244	}
245	arch_initcall(pSeries_init_panel);
246
247
248	/* Build up the firmware_features bitmask field
249	* using contents of device-tree/ibm,hypertas-functions.
250	* Ultimately this functionality may be moved into prom.c prom_init().
251	*/
252	void __init fw_feature_init(void)
253	{
254	struct device_node * dn;
255	char * hypertas;
256	unsigned int len;
257
258	DBG(" -> fw_feature_init()\n");
259
260	cur_cpu_spec->firmware_features = 0;
261	dn = of_find_node_by_path("/rtas");
262	if (dn == NULL) {
263	printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
264	goto no_rtas;
265	}
266
267	hypertas = get_property(dn, "ibm,hypertas-functions", &len);
268	if (hypertas) {
269	while (len > 0){
270	int i, hypertas_len;
271	/* check value against table of strings */
272	for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
273	if ((firmware_features_table[i].name) &&
274	(strcmp(firmware_features_table[i].name,hypertas))==0) {
275	/* we have a match */
276	cur_cpu_spec->firmware_features \|=
277	(firmware_features_table[i].val);
278	break;
279	}
280	}
281	hypertas_len = strlen(hypertas);
282	len -= hypertas_len +1;
283	hypertas+= hypertas_len +1;
284	}
285	}
286
287	of_node_put(dn);
288	no_rtas:
289	printk(KERN_INFO "firmware_features = 0x%lx\n",
290	cur_cpu_spec->firmware_features);
291
292	DBG(" <- fw_feature_init()\n");
293	}
294
295
296	static void __init pSeries_discover_pic(void)
297	{
298	struct device_node *np;
299	char *typep;
300
301	/*
302	* Setup interrupt mapping options that are needed for finish_device_tree
303	* to properly parse the OF interrupt tree & do the virtual irq mapping
304	*/
305	__irq_offset_value = NUM_ISA_INTERRUPTS;
306	ppc64_interrupt_controller = IC_INVALID;
307	for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
308	typep = (char *)get_property(np, "compatible", NULL);
309	if (strstr(typep, "open-pic"))
310	ppc64_interrupt_controller = IC_OPEN_PIC;
311	else if (strstr(typep, "ppc-xicp"))
312	ppc64_interrupt_controller = IC_PPC_XIC;
313	else
314	printk("pSeries_discover_pic: failed to recognize"
315	" interrupt-controller\n");
316	break;
317	}
318	}
319
320	static void pSeries_mach_cpu_die(void)
321	{
322	local_irq_disable();
323	idle_task_exit();
324	/* Some hardware requires clearing the CPPR, while other hardware does not
325	* it is safe either way
326	*/
327	pSeriesLP_cppr_info(0, 0);
328	rtas_stop_self();
329	/* Should never get here... */
330	BUG();
331	for(;;);
332	}
333
334
335	/*
336	* Early initialization. Relocation is on but do not reference unbolted pages
337	*/
338	static void __init pSeries_init_early(void)
339	{
340	void *comport;
341	int iommu_off = 0;
342	unsigned int default_speed;
343	u64 physport;
344
345	DBG(" -> pSeries_init_early()\n");
346
347	fw_feature_init();
348
349	if (systemcfg->platform & PLATFORM_LPAR)
350	hpte_init_lpar();
351	else {
352	hpte_init_native();
353	iommu_off = (of_chosen &&
354	get_property(of_chosen, "linux,iommu-off", NULL));
355	}
356
357	generic_find_legacy_serial_ports(&physport, &default_speed);
358
359	if (systemcfg->platform & PLATFORM_LPAR)
360	find_udbg_vterm();
361	else if (physport) {
362	/* Map the uart for udbg. */
dfbacdc1	363	comport = (void *)ioremap(physport, 16);
1da177e4 LT	364	udbg_init_uart(comport, default_speed);
	365
	366	ppc_md.udbg_putc = udbg_putc;
	367	ppc_md.udbg_getc = udbg_getc;
	368	ppc_md.udbg_getc_poll = udbg_getc_poll;
	369	DBG("Hello World !\n");
	370	}
	371
	372
	373	iommu_init_early_pSeries();
	374
	375	pSeries_discover_pic();
	376
	377	DBG(" <- pSeries_init_early()\n");
	378	}
	379
	380
	381	static void pSeries_progress(char *s, unsigned short hex)
	382	{
	383	struct device_node *root;
	384	int width, *p;
	385	char *os;
	386	static int display_character, set_indicator;
	387	static int max_width;
	388	static DEFINE_SPINLOCK(progress_lock);
	389	static int pending_newline = 0; /* did last write end with unprinted newline? */
	390
	391	if (!rtas.base)
	392	return;
	393
	394	if (max_width == 0) {
	395	if ((root = find_path_device("/rtas")) &&
	396	(p = (unsigned int *)get_property(root,
	397	"ibm,display-line-length",
	398	NULL)))
	399	max_width = *p;
	400	else
	401	max_width = 0x10;
	402	display_character = rtas_token("display-character");
	403	set_indicator = rtas_token("set-indicator");
	404	}
	405
	406	if (display_character == RTAS_UNKNOWN_SERVICE) {
	407	/* use hex display if available */
	408	if (set_indicator != RTAS_UNKNOWN_SERVICE)
	409	rtas_call(set_indicator, 3, 1, NULL, 6, 0, hex);
	410	return;
	411	}
	412
	413	spin_lock(&progress_lock);
	414
	415	/*
	416	* Last write ended with newline, but we didn't print it since
	417	* it would just clear the bottom line of output. Print it now
	418	* instead.
	419	*
	420	* If no newline is pending, print a CR to start output at the
	421	* beginning of the line.
	422	*/
	423	if (pending_newline) {
	424	rtas_call(display_character, 1, 1, NULL, '\r');
	425	rtas_call(display_character, 1, 1, NULL, '\n');
	426	pending_newline = 0;
	427	} else {
428	rtas_call(display_character, 1, 1, NULL, '\r');
429	}
430
431	width = max_width;
432	os = s;
433	while (*os) {
434	if (os == '\n' \|\| os == '\r') {
435	/* Blank to end of line. */
436	while (width-- > 0)
437	rtas_call(display_character, 1, 1, NULL, ' ');
438
439	/* If newline is the last character, save it
440	* until next call to avoid bumping up the
441	* display output.
442	*/
443	if (*os == '\n' && !os[1]) {
444	pending_newline = 1;
445	spin_unlock(&progress_lock);
446	return;
447	}
448
449	/* RTAS wants CR-LF, not just LF */
450
451	if (*os == '\n') {
452	rtas_call(display_character, 1, 1, NULL, '\r');
453	rtas_call(display_character, 1, 1, NULL, '\n');
454	} else {
455	/* CR might be used to re-draw a line, so we'll
456	* leave it alone and not add LF.
457	*/
458	rtas_call(display_character, 1, 1, NULL, *os);
459	}
460
461	width = max_width;
462	} else {
463	width--;
464	rtas_call(display_character, 1, 1, NULL, *os);
465	}
466
467	os++;
468
469	/* if we overwrite the screen length */
470	if (width <= 0)
471	while ((os != 0) && (os != '\n') && (*os != '\r'))
472	os++;
473	}
474
475	/* Blank to end of line. */
476	while (width-- > 0)
477	rtas_call(display_character, 1, 1, NULL, ' ');
478
479	spin_unlock(&progress_lock);
480	}
481
1da177e4 LT	482	static int pSeries_check_legacy_ioport(unsigned int baseport)
	483	{
	484	struct device_node *np;
	485
	486	#define I8042_DATA_REG 0x60
	487	#define FDC_BASE 0x3f0
	488
	489
	490	switch(baseport) {
	491	case I8042_DATA_REG:
	492	np = of_find_node_by_type(NULL, "8042");
	493	if (np == NULL)
	494	return -ENODEV;
	495	of_node_put(np);
	496	break;
	497	case FDC_BASE:
	498	np = of_find_node_by_type(NULL, "fdc");
	499	if (np == NULL)
	500	return -ENODEV;
	501	of_node_put(np);
	502	break;
	503	}
	504	return 0;
	505	}
	506
	507	/*
	508	* Called very early, MMU is off, device-tree isn't unflattened
	509	*/
	510	extern struct machdep_calls pSeries_md;
	511
	512	static int __init pSeries_probe(int platform)
	513	{
	514	if (platform != PLATFORM_PSERIES &&
	515	platform != PLATFORM_PSERIES_LPAR)
	516	return 0;
	517
	518	/* if we have some ppc_md fixups for LPAR to do, do
	519	* it here ...
	520	*/
	521
	522	return 1;
	523	}
	524
	525	struct machdep_calls __initdata pSeries_md = {
	526	.probe = pSeries_probe,
	527	.setup_arch = pSeries_setup_arch,
	528	.init_early = pSeries_init_early,
	529	.get_cpuinfo = pSeries_get_cpuinfo,
	530	.log_error = pSeries_log_error,
	531	.pcibios_fixup = pSeries_final_fixup,
	532	.restart = rtas_restart,
	533	.power_off = rtas_power_off,
	534	.halt = rtas_halt,
	535	.panic = rtas_os_term,
	536	.cpu_die = pSeries_mach_cpu_die,
	537	.get_boot_time = pSeries_get_boot_time,
	538	.get_rtc_time = pSeries_get_rtc_time,
	539	.set_rtc_time = pSeries_set_rtc_time,
10f7e7c1	540	.calibrate_decr = generic_calibrate_decr,
1da177e4 LT	541	.progress = pSeries_progress,
	542	.check_legacy_ioport = pSeries_check_legacy_ioport,
	543	.system_reset_exception = pSeries_system_reset_exception,
	544	.machine_check_exception = pSeries_machine_check_exception,
	545	};