[mirror_ubuntu-artful-kernel.git] / arch / s390 / include / asm / cpu_mf.h

/*
 * CPU-measurement facilities
 *
 *  Copyright IBM Corp. 2012
 *  Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
 *	       Jan Glauber <jang@linux.vnet.ibm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License (version 2 only)
 * as published by the Free Software Foundation.
 */
#ifndef _ASM_S390_CPU_MF_H
#define _ASM_S390_CPU_MF_H

#include <linux/errno.h>
#include <asm/facility.h>

#define CPU_MF_INT_SF_IAE	(1 << 31)	/* invalid entry address */
#define CPU_MF_INT_SF_ISE	(1 << 30)	/* incorrect SDBT entry */
#define CPU_MF_INT_SF_PRA	(1 << 29)	/* program request alert */
#define CPU_MF_INT_SF_SACA	(1 << 23)	/* sampler auth. change alert */
#define CPU_MF_INT_SF_LSDA	(1 << 22)	/* loss of sample data alert */
#define CPU_MF_INT_CF_CACA	(1 <<  7)	/* counter auth. change alert */
#define CPU_MF_INT_CF_LCDA	(1 <<  6)	/* loss of counter data alert */
#define CPU_MF_INT_CF_MASK	(CPU_MF_INT_CF_CACA|CPU_MF_INT_CF_LCDA)
#define CPU_MF_INT_SF_MASK	(CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE|	\
				 CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA|	\
				 CPU_MF_INT_SF_LSDA)

/* CPU measurement facility support */
static inline int cpum_cf_avail(void)
{
	return MACHINE_HAS_LPP && test_facility(67);
}

static inline int cpum_sf_avail(void)
{
	return MACHINE_HAS_LPP && test_facility(68);
}


struct cpumf_ctr_info {
	u16   cfvn;
	u16   auth_ctl;
	u16   enable_ctl;
	u16   act_ctl;
	u16   max_cpu;
	u16   csvn;
	u16   max_cg;
	u16   reserved1;
	u32   reserved2[12];
} __packed;

/* QUERY SAMPLING INFORMATION block */
struct hws_qsi_info_block {	    /* Bit(s) */
	unsigned int b0_13:14;	    /* 0-13: zeros			 */
	unsigned int as:1;	    /* 14: basic-sampling authorization	 */
	unsigned int ad:1;	    /* 15: diag-sampling authorization	 */
	unsigned int b16_21:6;	    /* 16-21: zeros			 */
	unsigned int es:1;	    /* 22: basic-sampling enable control */
	unsigned int ed:1;	    /* 23: diag-sampling enable control	 */
	unsigned int b24_29:6;	    /* 24-29: zeros			 */
	unsigned int cs:1;	    /* 30: basic-sampling activation control */
	unsigned int cd:1;	    /* 31: diag-sampling activation control */
	unsigned int bsdes:16;	    /* 4-5: size of basic sampling entry */
	unsigned int dsdes:16;	    /* 6-7: size of diagnostic sampling entry */
	unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
	unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
	unsigned long tear;	    /* 24-31: TEAR contents		 */
	unsigned long dear;	    /* 32-39: DEAR contents		 */
	unsigned int rsvrd0;	    /* 40-43: reserved			 */
	unsigned int cpu_speed;     /* 44-47: CPU speed 		 */
	unsigned long long rsvrd1;  /* 48-55: reserved			 */
	unsigned long long rsvrd2;  /* 56-63: reserved			 */
} __packed;

/* SET SAMPLING CONTROLS request block */
struct hws_lsctl_request_block {
	unsigned int s:1;	    /* 0: maximum buffer indicator	 */
	unsigned int h:1;	    /* 1: part. level reserved for VM use*/
	unsigned long long b2_53:52;/* 2-53: zeros			 */
	unsigned int es:1;	    /* 54: basic-sampling enable control */
	unsigned int ed:1;	    /* 55: diag-sampling enable control	 */
	unsigned int b56_61:6;	    /* 56-61: - zeros			 */
	unsigned int cs:1;	    /* 62: basic-sampling activation control */
	unsigned int cd:1;	    /* 63: diag-sampling activation control  */
	unsigned long interval;     /* 8-15: sampling interval		 */
	unsigned long tear;	    /* 16-23: TEAR contents		 */
	unsigned long dear;	    /* 24-31: DEAR contents		 */
	/* 32-63:							 */
	unsigned long rsvrd1;	    /* reserved 			 */
	unsigned long rsvrd2;	    /* reserved 			 */
	unsigned long rsvrd3;	    /* reserved 			 */
	unsigned long rsvrd4;	    /* reserved 			 */
} __packed;

struct hws_basic_entry {
	unsigned int def:16;	    /* 0-15  Data Entry Format		 */
	unsigned int R:4;	    /* 16-19 reserved			 */
	unsigned int U:4;	    /* 20-23 Number of unique instruct.  */
	unsigned int z:2;	    /* zeros				 */
	unsigned int T:1;	    /* 26 PSW DAT mode			 */
	unsigned int W:1;	    /* 27 PSW wait state		 */
	unsigned int P:1;	    /* 28 PSW Problem state		 */
	unsigned int AS:2;	    /* 29-30 PSW address-space control	 */
	unsigned int I:1;	    /* 31 entry valid or invalid	 */
	unsigned int CL:2;	    /* 32-33 Configuration Level	 */
	unsigned int:14;
	unsigned int prim_asn:16;   /* primary ASN			 */
	unsigned long long ia;	    /* Instruction Address		 */
	unsigned long long gpp;     /* Guest Program Parameter		 */
	unsigned long long hpp;     /* Host Program Parameter		 */
} __packed;

struct hws_diag_entry {
	unsigned int def:16;	    /* 0-15  Data Entry Format		 */
	unsigned int R:14;	    /* 16-19 and 20-30 reserved		 */
	unsigned int I:1;	    /* 31 entry valid or invalid	 */
	u8	     data[];	    /* Machine-dependent sample data	 */
} __packed;

struct hws_combined_entry {
	struct hws_basic_entry	basic;	/* Basic-sampling data entry */
	struct hws_diag_entry	diag;	/* Diagnostic-sampling data entry */
} __packed;

struct hws_trailer_entry {
	union {
		struct {
			unsigned int f:1;	/* 0 - Block Full Indicator   */
			unsigned int a:1;	/* 1 - Alert request control  */
			unsigned int t:1;	/* 2 - Timestamp format	      */
			unsigned long long:61;	/* 3 - 63: Reserved	      */
		};
		unsigned long long flags;	/* 0 - 63: All indicators     */
	};
	unsigned long long overflow;	 /* 64 - sample Overflow count	      */
	unsigned char timestamp[16];	 /* 16 - 31 timestamp		      */
	unsigned long long reserved1;	 /* 32 -Reserved		      */
	unsigned long long reserved2;	 /*				      */
	unsigned long long progusage1;	 /* 48 - reserved for programming use */
	unsigned long long progusage2;	 /*				      */
} __packed;

/* Query counter information */
static inline int qctri(struct cpumf_ctr_info *info)
{
	int rc = -EINVAL;

	asm volatile (
		"0:	.insn	s,0xb28e0000,%1\n"
		"1:	lhi	%0,0\n"
		"2:\n"
		EX_TABLE(1b, 2b)
		: "+d" (rc), "=Q" (*info));
	return rc;
}

/* Load CPU-counter-set controls */
static inline int lcctl(u64 ctl)
{
	int cc;

	asm volatile (
		"	.insn	s,0xb2840000,%1\n"
		"	ipm	%0\n"
		"	srl	%0,28\n"
		: "=d" (cc) : "m" (ctl) : "cc");
	return cc;
}

/* Extract CPU counter */
static inline int __ecctr(u64 ctr, u64 *content)
{
	register u64 _content asm("4") = 0;
	int cc;

	asm volatile (
		"	.insn	rre,0xb2e40000,%0,%2\n"
		"	ipm	%1\n"
		"	srl	%1,28\n"
		: "=d" (_content), "=d" (cc) : "d" (ctr) : "cc");
	*content = _content;
	return cc;
}

/* Extract CPU counter */
static inline int ecctr(u64 ctr, u64 *val)
{
	u64 content;
	int cc;

	cc = __ecctr(ctr, &content);
	if (!cc)
		*val = content;
	return cc;
}

/* Store CPU counter multiple for the MT utilization counter set */
static inline int stcctm5(u64 num, u64 *val)
{
	typedef struct { u64 _[num]; } addrtype;
	int cc;

	asm volatile (
		"	.insn	rsy,0xeb0000000017,%2,5,%1\n"
		"	ipm	%0\n"
		"	srl	%0,28\n"
		: "=d" (cc), "=Q" (*(addrtype *) val)  : "d" (num) : "cc");
	return cc;
}

/* Query sampling information */
static inline int qsi(struct hws_qsi_info_block *info)
{
	int cc = 1;

	asm volatile(
		"0:	.insn	s,0xb2860000,%1\n"
		"1:	lhi	%0,0\n"
		"2:\n"
		EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
		: "+d" (cc), "+Q" (*info));
	return cc ? -EINVAL : 0;
}

/* Load sampling controls */
static inline int lsctl(struct hws_lsctl_request_block *req)
{
	int cc;

	cc = 1;
	asm volatile(
		"0:	.insn	s,0xb2870000,0(%1)\n"
		"1:	ipm	%0\n"
		"	srl	%0,28\n"
		"2:\n"
		EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
		: "+d" (cc), "+a" (req)
		: "m" (*req)
		: "cc", "memory");

	return cc ? -EINVAL : 0;
}

/* Sampling control helper functions */

#include <linux/time.h>

static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi,
						unsigned long freq)
{
	return (USEC_PER_SEC / freq) * qsi->cpu_speed;
}

static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi,
						unsigned long rate)
{
	return USEC_PER_SEC * qsi->cpu_speed / rate;
}

#define SDB_TE_ALERT_REQ_MASK	0x4000000000000000UL
#define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL

/* Return TOD timestamp contained in an trailer entry */
static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te)
{
	/* TOD in STCKE format */
	if (te->t)
		return *((unsigned long long *) &te->timestamp[1]);

	/* TOD in STCK format */
	return *((unsigned long long *) &te->timestamp[0]);
}

/* Return pointer to trailer entry of an sample data block */
static inline unsigned long *trailer_entry_ptr(unsigned long v)
{
	void *ret;

	ret = (void *) v;
	ret += PAGE_SIZE;
	ret -= sizeof(struct hws_trailer_entry);

	return (unsigned long *) ret;
}

/* Return if the entry in the sample data block table (sdbt)
 * is a link to the next sdbt */
static inline int is_link_entry(unsigned long *s)
{
	return *s & 0x1ul ? 1 : 0;
}

/* Return pointer to the linked sdbt */
static inline unsigned long *get_next_sdbt(unsigned long *s)
{
	return (unsigned long *) (*s & ~0x1ul);
}
#endif /* _ASM_S390_CPU_MF_H */
Commit	Line	Data
212188a5 HB	1	/*
	2	* CPU-measurement facilities
	3	*
	4	* Copyright IBM Corp. 2012
	5	* Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
	6	* Jan Glauber <jang@linux.vnet.ibm.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License (version 2 only)
	10	* as published by the Free Software Foundation.
	11	*/
b03d541a JG	12	#ifndef _ASM_S390_CPU_MF_H
	13	#define _ASM_S390_CPU_MF_H
	14
cb16b91a	15	#include <linux/errno.h>
1e3cab2f HC	16	#include <asm/facility.h>
1e3cab2f HC	17
b03d541a JG	18	#define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */
	19	#define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */
	20	#define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */
	21	#define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */
	22	#define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */
212188a5 HB	23	#define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */
212188a5 HB	24	#define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */
212188a5 HB	25	#define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_CACA\|CPU_MF_INT_CF_LCDA)
	26	#define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE\|CPU_MF_INT_SF_ISE\| \
	27	CPU_MF_INT_SF_PRA\|CPU_MF_INT_SF_SACA\| \
	28	CPU_MF_INT_SF_LSDA)
	29
	30	/* CPU measurement facility support */
	31	static inline int cpum_cf_avail(void)
	32	{
23d18e8d	33	return MACHINE_HAS_LPP && test_facility(67);
212188a5 HB	34	}
	35
	36	static inline int cpum_sf_avail(void)
	37	{
23d18e8d	38	return MACHINE_HAS_LPP && test_facility(68);
212188a5 HB	39	}
	40
	41
	42	struct cpumf_ctr_info {
	43	u16 cfvn;
	44	u16 auth_ctl;
	45	u16 enable_ctl;
	46	u16 act_ctl;
	47	u16 max_cpu;
	48	u16 csvn;
	49	u16 max_cg;
	50	u16 reserved1;
	51	u32 reserved2[12];
	52	} __packed;
	53
cf48ad83 HB	54	/* QUERY SAMPLING INFORMATION block */
	55	struct hws_qsi_info_block { /* Bit(s) */
	56	unsigned int b0_13:14; /* 0-13: zeros */
7e75fc3f HB	57	unsigned int as:1; /* 14: basic-sampling authorization */
	58	unsigned int ad:1; /* 15: diag-sampling authorization */
	59	unsigned int b16_21:6; /* 16-21: zeros */
	60	unsigned int es:1; /* 22: basic-sampling enable control */
	61	unsigned int ed:1; /* 23: diag-sampling enable control */
	62	unsigned int b24_29:6; /* 24-29: zeros */
	63	unsigned int cs:1; /* 30: basic-sampling activation control */
	64	unsigned int cd:1; /* 31: diag-sampling activation control */
	65	unsigned int bsdes:16; /* 4-5: size of basic sampling entry */
cf48ad83 HB	66	unsigned int dsdes:16; /* 6-7: size of diagnostic sampling entry */
	67	unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
	68	unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
	69	unsigned long tear; /* 24-31: TEAR contents */
	70	unsigned long dear; /* 32-39: DEAR contents */
	71	unsigned int rsvrd0; /* 40-43: reserved */
	72	unsigned int cpu_speed; /* 44-47: CPU speed */
	73	unsigned long long rsvrd1; /* 48-55: reserved */
	74	unsigned long long rsvrd2; /* 56-63: reserved */
	75	} __packed;
	76
	77	/* SET SAMPLING CONTROLS request block */
	78	struct hws_lsctl_request_block {
	79	unsigned int s:1; /* 0: maximum buffer indicator */
	80	unsigned int h:1; /* 1: part. level reserved for VM use*/
	81	unsigned long long b2_53:52;/* 2-53: zeros */
7e75fc3f HB	82	unsigned int es:1; /* 54: basic-sampling enable control */
	83	unsigned int ed:1; /* 55: diag-sampling enable control */
	84	unsigned int b56_61:6; /* 56-61: - zeros */
	85	unsigned int cs:1; /* 62: basic-sampling activation control */
	86	unsigned int cd:1; /* 63: diag-sampling activation control */
cf48ad83 HB	87	unsigned long interval; /* 8-15: sampling interval */
	88	unsigned long tear; /* 16-23: TEAR contents */
	89	unsigned long dear; /* 24-31: DEAR contents */
	90	/* 32-63: */
	91	unsigned long rsvrd1; /* reserved */
	92	unsigned long rsvrd2; /* reserved */
	93	unsigned long rsvrd3; /* reserved */
	94	unsigned long rsvrd4; /* reserved */
	95	} __packed;
	96
7e75fc3f	97	struct hws_basic_entry {
cf48ad83 HB	98	unsigned int def:16; /* 0-15 Data Entry Format */
	99	unsigned int R:4; /* 16-19 reserved */
	100	unsigned int U:4; /* 20-23 Number of unique instruct. */
	101	unsigned int z:2; /* zeros */
	102	unsigned int T:1; /* 26 PSW DAT mode */
	103	unsigned int W:1; /* 27 PSW wait state */
	104	unsigned int P:1; /* 28 PSW Problem state */
	105	unsigned int AS:2; /* 29-30 PSW address-space control */
	106	unsigned int I:1; /* 31 entry valid or invalid */
c19805f8 CB	107	unsigned int CL:2; /* 32-33 Configuration Level */
c19805f8 CB	108	unsigned int:14;
cf48ad83 HB	109	unsigned int prim_asn:16; /* primary ASN */
	110	unsigned long long ia; /* Instruction Address */
	111	unsigned long long gpp; /* Guest Program Parameter */
	112	unsigned long long hpp; /* Host Program Parameter */
	113	} __packed;
	114
7e75fc3f HB	115	struct hws_diag_entry {
	116	unsigned int def:16; /* 0-15 Data Entry Format */
	117	unsigned int R:14; /* 16-19 and 20-30 reserved */
	118	unsigned int I:1; /* 31 entry valid or invalid */
	119	u8 data[]; /* Machine-dependent sample data */
	120	} __packed;
	121
	122	struct hws_combined_entry {
	123	struct hws_basic_entry basic; /* Basic-sampling data entry */
	124	struct hws_diag_entry diag; /* Diagnostic-sampling data entry */
	125	} __packed;
	126
cf48ad83	127	struct hws_trailer_entry {
fcc77f50 HB	128	union {
	129	struct {
	130	unsigned int f:1; /* 0 - Block Full Indicator */
	131	unsigned int a:1; /* 1 - Alert request control */
	132	unsigned int t:1; /* 2 - Timestamp format */
	133	unsigned long long:61; /* 3 - 63: Reserved */
	134	};
	135	unsigned long long flags; /* 0 - 63: All indicators */
	136	};
cf48ad83	137	unsigned long long overflow; /* 64 - sample Overflow count */
443d4beb	138	unsigned char timestamp[16]; /* 16 - 31 timestamp */
cf48ad83 HB	139	unsigned long long reserved1; /* 32 -Reserved */
	140	unsigned long long reserved2; /* */
	141	unsigned long long progusage1; /* 48 - reserved for programming use */
	142	unsigned long long progusage2; /* */
	143	} __packed;
	144
212188a5 HB	145	/* Query counter information */
	146	static inline int qctri(struct cpumf_ctr_info *info)
	147	{
	148	int rc = -EINVAL;
	149
	150	asm volatile (
	151	"0: .insn s,0xb28e0000,%1\n"
	152	"1: lhi %0,0\n"
	153	"2:\n"
	154	EX_TABLE(1b, 2b)
	155	: "+d" (rc), "=Q" (*info));
	156	return rc;
	157	}
	158
	159	/* Load CPU-counter-set controls */
	160	static inline int lcctl(u64 ctl)
	161	{
	162	int cc;
	163
	164	asm volatile (
	165	" .insn s,0xb2840000,%1\n"
	166	" ipm %0\n"
	167	" srl %0,28\n"
	168	: "=d" (cc) : "m" (ctl) : "cc");
	169	return cc;
	170	}
	171
	172	/* Extract CPU counter */
e238c15e	173	static inline int __ecctr(u64 ctr, u64 *content)
212188a5	174	{
e238c15e	175	register u64 _content asm("4") = 0;
212188a5 HB	176	int cc;
	177
	178	asm volatile (
	179	" .insn rre,0xb2e40000,%0,%2\n"
	180	" ipm %1\n"
	181	" srl %1,28\n"
e238c15e HC	182	: "=d" (_content), "=d" (cc) : "d" (ctr) : "cc");
	183	*content = _content;
	184	return cc;
	185	}
	186
	187	/* Extract CPU counter */
	188	static inline int ecctr(u64 ctr, u64 *val)
	189	{
	190	u64 content;
	191	int cc;
	192
	193	cc = __ecctr(ctr, &content);
212188a5 HB	194	if (!cc)
	195	*val = content;
	196	return cc;
	197	}
b03d541a	198
10ad34bc MS	199	/* Store CPU counter multiple for the MT utilization counter set */
	200	static inline int stcctm5(u64 num, u64 *val)
	201	{
	202	typedef struct { u64 _[num]; } addrtype;
	203	int cc;
	204
	205	asm volatile (
	206	" .insn rsy,0xeb0000000017,%2,5,%1\n"
	207	" ipm %0\n"
	208	" srl %0,28\n"
	209	: "=d" (cc), "=Q" ((addrtype ) val) : "d" (num) : "cc");
	210	return cc;
	211	}
	212
cf48ad83 HB	213	/* Query sampling information */
	214	static inline int qsi(struct hws_qsi_info_block *info)
	215	{
259acc5c	216	int cc = 1;
cf48ad83 HB	217
cf48ad83 HB	218	asm volatile(
259acc5c	219	"0: .insn s,0xb2860000,%1\n"
cf48ad83 HB	220	"1: lhi %0,0\n"
	221	"2:\n"
	222	EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
259acc5c	223	: "+d" (cc), "+Q" (*info));
cf48ad83 HB	224	return cc ? -EINVAL : 0;
	225	}
	226
	227	/* Load sampling controls */
	228	static inline int lsctl(struct hws_lsctl_request_block *req)
	229	{
	230	int cc;
	231
	232	cc = 1;
	233	asm volatile(
	234	"0: .insn s,0xb2870000,0(%1)\n"
	235	"1: ipm %0\n"
	236	" srl %0,28\n"
	237	"2:\n"
	238	EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
	239	: "+d" (cc), "+a" (req)
	240	: "m" (*req)
	241	: "cc", "memory");
	242
	243	return cc ? -EINVAL : 0;
	244	}
	245
	246	/* Sampling control helper functions */
	247
8c069ff4 HB	248	#include <linux/time.h>
	249
	250	static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi,
	251	unsigned long freq)
	252	{
	253	return (USEC_PER_SEC / freq) * qsi->cpu_speed;
	254	}
	255
	256	static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi,
	257	unsigned long rate)
	258	{
	259	return USEC_PER_SEC * qsi->cpu_speed / rate;
	260	}
	261
cf48ad83 HB	262	#define SDB_TE_ALERT_REQ_MASK 0x4000000000000000UL
	263	#define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL
	264
443d4beb HB	265	/* Return TOD timestamp contained in an trailer entry */
	266	static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te)
	267	{
	268	/* TOD in STCKE format */
	269	if (te->t)
	270	return ((unsigned long long ) &te->timestamp[1]);
	271
	272	/* TOD in STCK format */
	273	return ((unsigned long long ) &te->timestamp[0]);
	274	}
	275
cf48ad83 HB	276	/* Return pointer to trailer entry of an sample data block */
	277	static inline unsigned long *trailer_entry_ptr(unsigned long v)
	278	{
	279	void *ret;
	280
	281	ret = (void *) v;
	282	ret += PAGE_SIZE;
	283	ret -= sizeof(struct hws_trailer_entry);
	284
	285	return (unsigned long *) ret;
	286	}
	287
	288	/* Return if the entry in the sample data block table (sdbt)
	289	* is a link to the next sdbt */
	290	static inline int is_link_entry(unsigned long *s)
	291	{
	292	return *s & 0x1ul ? 1 : 0;
	293	}
	294
	295	/* Return pointer to the linked sdbt */
	296	static inline unsigned long get_next_sdbt(unsigned long s)
	297	{
	298	return (unsigned long ) (s & ~0x1ul);
	299	}
212188a5	300	#endif /* _ASM_S390_CPU_MF_H */