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b0c632db | 1 | /* |
a53c8fab | 2 | * definition for kernel virtual machines on s390 |
b0c632db | 3 | * |
a53c8fab | 4 | * Copyright IBM Corp. 2008, 2009 |
b0c632db HC |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License (version 2 only) | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * Author(s): Carsten Otte <cotte@de.ibm.com> | |
11 | */ | |
12 | ||
13 | ||
14 | #ifndef ASM_KVM_HOST_H | |
15 | #define ASM_KVM_HOST_H | |
65647300 PB |
16 | |
17 | #include <linux/types.h> | |
ca872302 CB |
18 | #include <linux/hrtimer.h> |
19 | #include <linux/interrupt.h> | |
65647300 | 20 | #include <linux/kvm_types.h> |
b0c632db | 21 | #include <linux/kvm_host.h> |
81aa8efe | 22 | #include <linux/kvm.h> |
b0c632db | 23 | #include <asm/debug.h> |
e86a6ed6 | 24 | #include <asm/cpu.h> |
b0753902 | 25 | #include <asm/fpu/api.h> |
841b91c5 | 26 | #include <asm/isc.h> |
b0c632db | 27 | |
bc784cce ED |
28 | #define KVM_S390_BSCA_CPU_SLOTS 64 |
29 | #define KVM_S390_ESCA_CPU_SLOTS 248 | |
30 | #define KVM_MAX_VCPUS KVM_S390_BSCA_CPU_SLOTS | |
bbacc0c1 | 31 | #define KVM_USER_MEM_SLOTS 32 |
b0c632db | 32 | |
84223598 CH |
33 | /* |
34 | * These seem to be used for allocating ->chip in the routing table, | |
35 | * which we don't use. 4096 is an out-of-thin-air value. If we need | |
36 | * to look at ->chip later on, we'll need to revisit this. | |
37 | */ | |
38 | #define KVM_NR_IRQCHIPS 1 | |
39 | #define KVM_IRQCHIP_NUM_PINS 4096 | |
920552b2 | 40 | #define KVM_HALT_POLL_NS_DEFAULT 0 |
84223598 | 41 | |
ea5f4969 DH |
42 | #define SIGP_CTRL_C 0x80 |
43 | #define SIGP_CTRL_SCN_MASK 0x3f | |
4953919f | 44 | |
bc784cce ED |
45 | union bsca_sigp_ctrl { |
46 | __u8 value; | |
47 | struct { | |
48 | __u8 c : 1; | |
49 | __u8 r : 1; | |
50 | __u8 scn : 6; | |
51 | }; | |
52 | } __packed; | |
53 | ||
54 | union esca_sigp_ctrl { | |
55 | __u16 value; | |
56 | struct { | |
57 | __u8 c : 1; | |
58 | __u8 reserved: 7; | |
59 | __u8 scn; | |
60 | }; | |
61 | } __packed; | |
62 | ||
63 | struct esca_entry { | |
64 | union esca_sigp_ctrl sigp_ctrl; | |
65 | __u16 reserved1[3]; | |
66 | __u64 sda; | |
67 | __u64 reserved2[6]; | |
68 | } __packed; | |
69 | ||
70 | struct bsca_entry { | |
ea5f4969 | 71 | __u8 reserved0; |
bc784cce | 72 | union bsca_sigp_ctrl sigp_ctrl; |
ea5f4969 | 73 | __u16 reserved[3]; |
b0c632db HC |
74 | __u64 sda; |
75 | __u64 reserved2[2]; | |
76 | } __attribute__((packed)); | |
77 | ||
8a242234 HC |
78 | union ipte_control { |
79 | unsigned long val; | |
80 | struct { | |
81 | unsigned long k : 1; | |
82 | unsigned long kh : 31; | |
83 | unsigned long kg : 32; | |
84 | }; | |
85 | }; | |
b0c632db | 86 | |
bc784cce | 87 | struct bsca_block { |
8a242234 | 88 | union ipte_control ipte_control; |
b0c632db HC |
89 | __u64 reserved[5]; |
90 | __u64 mcn; | |
91 | __u64 reserved2; | |
bc784cce | 92 | struct bsca_entry cpu[KVM_S390_BSCA_CPU_SLOTS]; |
b0c632db HC |
93 | } __attribute__((packed)); |
94 | ||
bc784cce ED |
95 | struct esca_block { |
96 | union ipte_control ipte_control; | |
97 | __u64 reserved1[7]; | |
98 | __u64 mcn[4]; | |
99 | __u64 reserved2[20]; | |
100 | struct esca_entry cpu[KVM_S390_ESCA_CPU_SLOTS]; | |
101 | } __packed; | |
102 | ||
9e6dabef | 103 | #define CPUSTAT_STOPPED 0x80000000 |
b0c632db HC |
104 | #define CPUSTAT_WAIT 0x10000000 |
105 | #define CPUSTAT_ECALL_PEND 0x08000000 | |
106 | #define CPUSTAT_STOP_INT 0x04000000 | |
107 | #define CPUSTAT_IO_INT 0x02000000 | |
108 | #define CPUSTAT_EXT_INT 0x01000000 | |
109 | #define CPUSTAT_RUNNING 0x00800000 | |
110 | #define CPUSTAT_RETAINED 0x00400000 | |
111 | #define CPUSTAT_TIMING_SUB 0x00020000 | |
112 | #define CPUSTAT_SIE_SUB 0x00010000 | |
113 | #define CPUSTAT_RRF 0x00008000 | |
114 | #define CPUSTAT_SLSV 0x00004000 | |
115 | #define CPUSTAT_SLSR 0x00002000 | |
116 | #define CPUSTAT_ZARCH 0x00000800 | |
117 | #define CPUSTAT_MCDS 0x00000100 | |
118 | #define CPUSTAT_SM 0x00000080 | |
8ad35755 | 119 | #define CPUSTAT_IBS 0x00000040 |
53df84f8 | 120 | #define CPUSTAT_GED2 0x00000010 |
b0c632db | 121 | #define CPUSTAT_G 0x00000008 |
69d0d3a3 | 122 | #define CPUSTAT_GED 0x00000004 |
b0c632db HC |
123 | #define CPUSTAT_J 0x00000002 |
124 | #define CPUSTAT_P 0x00000001 | |
125 | ||
180c12fb | 126 | struct kvm_s390_sie_block { |
b0c632db | 127 | atomic_t cpuflags; /* 0x0000 */ |
fda902cb MM |
128 | __u32 : 1; /* 0x0004 */ |
129 | __u32 prefix : 18; | |
658b6eda MM |
130 | __u32 : 1; |
131 | __u32 ibc : 12; | |
95d38fd0 CB |
132 | __u8 reserved08[4]; /* 0x0008 */ |
133 | #define PROG_IN_SIE (1<<0) | |
134 | __u32 prog0c; /* 0x000c */ | |
49b99e1e | 135 | __u8 reserved10[16]; /* 0x0010 */ |
8e236546 CB |
136 | #define PROG_BLOCK_SIE (1<<0) |
137 | #define PROG_REQUEST (1<<1) | |
49b99e1e CB |
138 | atomic_t prog20; /* 0x0020 */ |
139 | __u8 reserved24[4]; /* 0x0024 */ | |
b0c632db HC |
140 | __u64 cputm; /* 0x0028 */ |
141 | __u64 ckc; /* 0x0030 */ | |
142 | __u64 epoch; /* 0x0038 */ | |
143 | __u8 reserved40[4]; /* 0x0040 */ | |
ba5c1e9b | 144 | #define LCTL_CR0 0x8000 |
d8346b7d | 145 | #define LCTL_CR6 0x0200 |
27291e21 DH |
146 | #define LCTL_CR9 0x0040 |
147 | #define LCTL_CR10 0x0020 | |
148 | #define LCTL_CR11 0x0010 | |
48a3e950 | 149 | #define LCTL_CR14 0x0002 |
b0c632db HC |
150 | __u16 lctl; /* 0x0044 */ |
151 | __s16 icpua; /* 0x0046 */ | |
27291e21 DH |
152 | #define ICTL_PINT 0x20000000 |
153 | #define ICTL_LPSW 0x00400000 | |
154 | #define ICTL_STCTL 0x00040000 | |
155 | #define ICTL_ISKE 0x00004000 | |
156 | #define ICTL_SSKE 0x00002000 | |
157 | #define ICTL_RRBE 0x00001000 | |
5a5e6536 | 158 | #define ICTL_TPROT 0x00000200 |
b0c632db HC |
159 | __u32 ictl; /* 0x0048 */ |
160 | __u32 eca; /* 0x004c */ | |
8712836b DH |
161 | #define ICPT_INST 0x04 |
162 | #define ICPT_PROGI 0x08 | |
163 | #define ICPT_INSTPROGI 0x0C | |
164 | #define ICPT_OPEREXC 0x2C | |
165 | #define ICPT_PARTEXEC 0x38 | |
166 | #define ICPT_IOINST 0x40 | |
b0c632db | 167 | __u8 icptcode; /* 0x0050 */ |
04b41acd | 168 | __u8 icptstatus; /* 0x0051 */ |
b0c632db HC |
169 | __u16 ihcpu; /* 0x0052 */ |
170 | __u8 reserved54[2]; /* 0x0054 */ | |
171 | __u16 ipa; /* 0x0056 */ | |
172 | __u32 ipb; /* 0x0058 */ | |
173 | __u32 scaoh; /* 0x005c */ | |
174 | __u8 reserved60; /* 0x0060 */ | |
175 | __u8 ecb; /* 0x0061 */ | |
69d0d3a3 | 176 | __u8 ecb2; /* 0x0062 */ |
a374e892 TK |
177 | #define ECB3_AES 0x04 |
178 | #define ECB3_DEA 0x08 | |
179 | __u8 ecb3; /* 0x0063 */ | |
b0c632db HC |
180 | __u32 scaol; /* 0x0064 */ |
181 | __u8 reserved68[4]; /* 0x0068 */ | |
182 | __u32 todpr; /* 0x006c */ | |
092670cd | 183 | __u8 reserved70[32]; /* 0x0070 */ |
b0c632db HC |
184 | psw_t gpsw; /* 0x0090 */ |
185 | __u64 gg14; /* 0x00a0 */ | |
186 | __u64 gg15; /* 0x00a8 */ | |
f14d82e0 TH |
187 | __u8 reservedb0[20]; /* 0x00b0 */ |
188 | __u16 extcpuaddr; /* 0x00c4 */ | |
189 | __u16 eic; /* 0x00c6 */ | |
190 | __u32 reservedc8; /* 0x00c8 */ | |
439716a5 DH |
191 | __u16 pgmilc; /* 0x00cc */ |
192 | __u16 iprcc; /* 0x00ce */ | |
193 | __u32 dxc; /* 0x00d0 */ | |
194 | __u16 mcn; /* 0x00d4 */ | |
195 | __u8 perc; /* 0x00d6 */ | |
196 | __u8 peratmid; /* 0x00d7 */ | |
197 | __u64 peraddr; /* 0x00d8 */ | |
198 | __u8 eai; /* 0x00e0 */ | |
199 | __u8 peraid; /* 0x00e1 */ | |
200 | __u8 oai; /* 0x00e2 */ | |
201 | __u8 armid; /* 0x00e3 */ | |
202 | __u8 reservede4[4]; /* 0x00e4 */ | |
203 | __u64 tecmc; /* 0x00e8 */ | |
5102ee87 TK |
204 | __u8 reservedf0[12]; /* 0x00f0 */ |
205 | #define CRYCB_FORMAT1 0x00000001 | |
45c9b47c | 206 | #define CRYCB_FORMAT2 0x00000003 |
5102ee87 | 207 | __u32 crycbd; /* 0x00fc */ |
b0c632db HC |
208 | __u64 gcr[16]; /* 0x0100 */ |
209 | __u64 gbea; /* 0x0180 */ | |
ef50f7ac CB |
210 | __u8 reserved188[24]; /* 0x0188 */ |
211 | __u32 fac; /* 0x01a0 */ | |
b31288fa KW |
212 | __u8 reserved1a4[20]; /* 0x01a4 */ |
213 | __u64 cbrlo; /* 0x01b8 */ | |
13211ea7 EF |
214 | __u8 reserved1c0[8]; /* 0x01c0 */ |
215 | __u32 ecd; /* 0x01c8 */ | |
216 | __u8 reserved1cc[18]; /* 0x01cc */ | |
672550fb CB |
217 | __u64 pp; /* 0x01de */ |
218 | __u8 reserved1e6[2]; /* 0x01e6 */ | |
7feb6bb8 MM |
219 | __u64 itdba; /* 0x01e8 */ |
220 | __u8 reserved1f0[16]; /* 0x01f0 */ | |
b0c632db HC |
221 | } __attribute__((packed)); |
222 | ||
7feb6bb8 MM |
223 | struct kvm_s390_itdb { |
224 | __u8 data[256]; | |
225 | } __packed; | |
226 | ||
68c55750 EF |
227 | struct kvm_s390_vregs { |
228 | __vector128 vrs[32]; | |
229 | __u8 reserved200[512]; /* for future vector expansion */ | |
230 | } __packed; | |
231 | ||
7feb6bb8 MM |
232 | struct sie_page { |
233 | struct kvm_s390_sie_block sie_block; | |
234 | __u8 reserved200[1024]; /* 0x0200 */ | |
235 | struct kvm_s390_itdb itdb; /* 0x0600 */ | |
68c55750 EF |
236 | __u8 reserved700[1280]; /* 0x0700 */ |
237 | struct kvm_s390_vregs vregs; /* 0x0c00 */ | |
7feb6bb8 MM |
238 | } __packed; |
239 | ||
b0c632db HC |
240 | struct kvm_vcpu_stat { |
241 | u32 exit_userspace; | |
0eaeafa1 | 242 | u32 exit_null; |
8f2abe6a CB |
243 | u32 exit_external_request; |
244 | u32 exit_external_interrupt; | |
245 | u32 exit_stop_request; | |
246 | u32 exit_validity; | |
ba5c1e9b | 247 | u32 exit_instruction; |
f7819512 | 248 | u32 halt_successful_poll; |
62bea5bf | 249 | u32 halt_attempted_poll; |
ce2e4f0b | 250 | u32 halt_wakeup; |
ba5c1e9b | 251 | u32 instruction_lctl; |
f5e10b09 | 252 | u32 instruction_lctlg; |
aba07508 DH |
253 | u32 instruction_stctl; |
254 | u32 instruction_stctg; | |
ba5c1e9b CO |
255 | u32 exit_program_interruption; |
256 | u32 exit_instr_and_program; | |
7697e71f | 257 | u32 deliver_external_call; |
ba5c1e9b CO |
258 | u32 deliver_emergency_signal; |
259 | u32 deliver_service_signal; | |
260 | u32 deliver_virtio_interrupt; | |
261 | u32 deliver_stop_signal; | |
262 | u32 deliver_prefix_signal; | |
263 | u32 deliver_restart_signal; | |
264 | u32 deliver_program_int; | |
d8346b7d | 265 | u32 deliver_io_int; |
ba5c1e9b | 266 | u32 exit_wait_state; |
69d0d3a3 | 267 | u32 instruction_pfmf; |
453423dc CB |
268 | u32 instruction_stidp; |
269 | u32 instruction_spx; | |
270 | u32 instruction_stpx; | |
271 | u32 instruction_stap; | |
272 | u32 instruction_storage_key; | |
8a242234 | 273 | u32 instruction_ipte_interlock; |
453423dc CB |
274 | u32 instruction_stsch; |
275 | u32 instruction_chsc; | |
276 | u32 instruction_stsi; | |
277 | u32 instruction_stfl; | |
bb25b9ba | 278 | u32 instruction_tprot; |
b31288fa | 279 | u32 instruction_essa; |
5288fbf0 | 280 | u32 instruction_sigp_sense; |
bd59d3a4 | 281 | u32 instruction_sigp_sense_running; |
7697e71f | 282 | u32 instruction_sigp_external_call; |
5288fbf0 | 283 | u32 instruction_sigp_emergency; |
42cb0c9f DH |
284 | u32 instruction_sigp_cond_emergency; |
285 | u32 instruction_sigp_start; | |
5288fbf0 | 286 | u32 instruction_sigp_stop; |
42cb0c9f DH |
287 | u32 instruction_sigp_stop_store_status; |
288 | u32 instruction_sigp_store_status; | |
cd7b4b61 | 289 | u32 instruction_sigp_store_adtl_status; |
5288fbf0 CB |
290 | u32 instruction_sigp_arch; |
291 | u32 instruction_sigp_prefix; | |
292 | u32 instruction_sigp_restart; | |
42cb0c9f DH |
293 | u32 instruction_sigp_init_cpu_reset; |
294 | u32 instruction_sigp_cpu_reset; | |
295 | u32 instruction_sigp_unknown; | |
388186bc | 296 | u32 diagnose_10; |
e28acfea | 297 | u32 diagnose_44; |
41628d33 | 298 | u32 diagnose_9c; |
175a5c9e CB |
299 | u32 diagnose_258; |
300 | u32 diagnose_308; | |
301 | u32 diagnose_500; | |
b0c632db HC |
302 | }; |
303 | ||
bcd84683 JF |
304 | #define PGM_OPERATION 0x01 |
305 | #define PGM_PRIVILEGED_OP 0x02 | |
306 | #define PGM_EXECUTE 0x03 | |
307 | #define PGM_PROTECTION 0x04 | |
308 | #define PGM_ADDRESSING 0x05 | |
309 | #define PGM_SPECIFICATION 0x06 | |
310 | #define PGM_DATA 0x07 | |
311 | #define PGM_FIXED_POINT_OVERFLOW 0x08 | |
312 | #define PGM_FIXED_POINT_DIVIDE 0x09 | |
313 | #define PGM_DECIMAL_OVERFLOW 0x0a | |
314 | #define PGM_DECIMAL_DIVIDE 0x0b | |
315 | #define PGM_HFP_EXPONENT_OVERFLOW 0x0c | |
316 | #define PGM_HFP_EXPONENT_UNDERFLOW 0x0d | |
317 | #define PGM_HFP_SIGNIFICANCE 0x0e | |
318 | #define PGM_HFP_DIVIDE 0x0f | |
319 | #define PGM_SEGMENT_TRANSLATION 0x10 | |
320 | #define PGM_PAGE_TRANSLATION 0x11 | |
321 | #define PGM_TRANSLATION_SPEC 0x12 | |
322 | #define PGM_SPECIAL_OPERATION 0x13 | |
323 | #define PGM_OPERAND 0x15 | |
324 | #define PGM_TRACE_TABEL 0x16 | |
403c8648 | 325 | #define PGM_VECTOR_PROCESSING 0x1b |
bcd84683 JF |
326 | #define PGM_SPACE_SWITCH 0x1c |
327 | #define PGM_HFP_SQUARE_ROOT 0x1d | |
328 | #define PGM_PC_TRANSLATION_SPEC 0x1f | |
329 | #define PGM_AFX_TRANSLATION 0x20 | |
330 | #define PGM_ASX_TRANSLATION 0x21 | |
331 | #define PGM_LX_TRANSLATION 0x22 | |
332 | #define PGM_EX_TRANSLATION 0x23 | |
333 | #define PGM_PRIMARY_AUTHORITY 0x24 | |
334 | #define PGM_SECONDARY_AUTHORITY 0x25 | |
335 | #define PGM_LFX_TRANSLATION 0x26 | |
336 | #define PGM_LSX_TRANSLATION 0x27 | |
337 | #define PGM_ALET_SPECIFICATION 0x28 | |
338 | #define PGM_ALEN_TRANSLATION 0x29 | |
339 | #define PGM_ALE_SEQUENCE 0x2a | |
340 | #define PGM_ASTE_VALIDITY 0x2b | |
341 | #define PGM_ASTE_SEQUENCE 0x2c | |
342 | #define PGM_EXTENDED_AUTHORITY 0x2d | |
343 | #define PGM_LSTE_SEQUENCE 0x2e | |
344 | #define PGM_ASTE_INSTANCE 0x2f | |
345 | #define PGM_STACK_FULL 0x30 | |
346 | #define PGM_STACK_EMPTY 0x31 | |
347 | #define PGM_STACK_SPECIFICATION 0x32 | |
348 | #define PGM_STACK_TYPE 0x33 | |
349 | #define PGM_STACK_OPERATION 0x34 | |
350 | #define PGM_ASCE_TYPE 0x38 | |
351 | #define PGM_REGION_FIRST_TRANS 0x39 | |
352 | #define PGM_REGION_SECOND_TRANS 0x3a | |
353 | #define PGM_REGION_THIRD_TRANS 0x3b | |
354 | #define PGM_MONITOR 0x40 | |
355 | #define PGM_PER 0x80 | |
356 | #define PGM_CRYPTO_OPERATION 0x119 | |
ba5c1e9b | 357 | |
c0e6159d JF |
358 | /* irq types in order of priority */ |
359 | enum irq_types { | |
360 | IRQ_PEND_MCHK_EX = 0, | |
361 | IRQ_PEND_SVC, | |
362 | IRQ_PEND_PROG, | |
363 | IRQ_PEND_MCHK_REP, | |
364 | IRQ_PEND_EXT_IRQ_KEY, | |
365 | IRQ_PEND_EXT_MALFUNC, | |
366 | IRQ_PEND_EXT_EMERGENCY, | |
367 | IRQ_PEND_EXT_EXTERNAL, | |
368 | IRQ_PEND_EXT_CLOCK_COMP, | |
369 | IRQ_PEND_EXT_CPU_TIMER, | |
370 | IRQ_PEND_EXT_TIMING, | |
371 | IRQ_PEND_EXT_SERVICE, | |
372 | IRQ_PEND_EXT_HOST, | |
373 | IRQ_PEND_PFAULT_INIT, | |
374 | IRQ_PEND_PFAULT_DONE, | |
375 | IRQ_PEND_VIRTIO, | |
376 | IRQ_PEND_IO_ISC_0, | |
377 | IRQ_PEND_IO_ISC_1, | |
378 | IRQ_PEND_IO_ISC_2, | |
379 | IRQ_PEND_IO_ISC_3, | |
380 | IRQ_PEND_IO_ISC_4, | |
381 | IRQ_PEND_IO_ISC_5, | |
382 | IRQ_PEND_IO_ISC_6, | |
383 | IRQ_PEND_IO_ISC_7, | |
384 | IRQ_PEND_SIGP_STOP, | |
385 | IRQ_PEND_RESTART, | |
386 | IRQ_PEND_SET_PREFIX, | |
387 | IRQ_PEND_COUNT | |
388 | }; | |
389 | ||
6d3da241 JF |
390 | /* We have 2M for virtio device descriptor pages. Smallest amount of |
391 | * memory per page is 24 bytes (1 queue), so (2048*1024) / 24 = 87381 | |
392 | */ | |
393 | #define KVM_S390_MAX_VIRTIO_IRQS 87381 | |
394 | ||
c0e6159d JF |
395 | /* |
396 | * Repressible (non-floating) machine check interrupts | |
397 | * subclass bits in MCIC | |
398 | */ | |
399 | #define MCHK_EXTD_BIT 58 | |
400 | #define MCHK_DEGR_BIT 56 | |
401 | #define MCHK_WARN_BIT 55 | |
402 | #define MCHK_REP_MASK ((1UL << MCHK_DEGR_BIT) | \ | |
403 | (1UL << MCHK_EXTD_BIT) | \ | |
404 | (1UL << MCHK_WARN_BIT)) | |
405 | ||
406 | /* Exigent machine check interrupts subclass bits in MCIC */ | |
407 | #define MCHK_SD_BIT 63 | |
408 | #define MCHK_PD_BIT 62 | |
409 | #define MCHK_EX_MASK ((1UL << MCHK_SD_BIT) | (1UL << MCHK_PD_BIT)) | |
410 | ||
411 | #define IRQ_PEND_EXT_MASK ((1UL << IRQ_PEND_EXT_IRQ_KEY) | \ | |
412 | (1UL << IRQ_PEND_EXT_CLOCK_COMP) | \ | |
413 | (1UL << IRQ_PEND_EXT_CPU_TIMER) | \ | |
414 | (1UL << IRQ_PEND_EXT_MALFUNC) | \ | |
415 | (1UL << IRQ_PEND_EXT_EMERGENCY) | \ | |
416 | (1UL << IRQ_PEND_EXT_EXTERNAL) | \ | |
417 | (1UL << IRQ_PEND_EXT_TIMING) | \ | |
418 | (1UL << IRQ_PEND_EXT_HOST) | \ | |
419 | (1UL << IRQ_PEND_EXT_SERVICE) | \ | |
420 | (1UL << IRQ_PEND_VIRTIO) | \ | |
421 | (1UL << IRQ_PEND_PFAULT_INIT) | \ | |
422 | (1UL << IRQ_PEND_PFAULT_DONE)) | |
423 | ||
424 | #define IRQ_PEND_IO_MASK ((1UL << IRQ_PEND_IO_ISC_0) | \ | |
425 | (1UL << IRQ_PEND_IO_ISC_1) | \ | |
426 | (1UL << IRQ_PEND_IO_ISC_2) | \ | |
427 | (1UL << IRQ_PEND_IO_ISC_3) | \ | |
428 | (1UL << IRQ_PEND_IO_ISC_4) | \ | |
429 | (1UL << IRQ_PEND_IO_ISC_5) | \ | |
430 | (1UL << IRQ_PEND_IO_ISC_6) | \ | |
431 | (1UL << IRQ_PEND_IO_ISC_7)) | |
432 | ||
433 | #define IRQ_PEND_MCHK_MASK ((1UL << IRQ_PEND_MCHK_REP) | \ | |
434 | (1UL << IRQ_PEND_MCHK_EX)) | |
435 | ||
180c12fb | 436 | struct kvm_s390_interrupt_info { |
ba5c1e9b CO |
437 | struct list_head list; |
438 | u64 type; | |
439 | union { | |
180c12fb CB |
440 | struct kvm_s390_io_info io; |
441 | struct kvm_s390_ext_info ext; | |
442 | struct kvm_s390_pgm_info pgm; | |
8bb3a2eb | 443 | struct kvm_s390_emerg_info emerg; |
7697e71f | 444 | struct kvm_s390_extcall_info extcall; |
180c12fb | 445 | struct kvm_s390_prefix_info prefix; |
2822545f | 446 | struct kvm_s390_stop_info stop; |
48a3e950 | 447 | struct kvm_s390_mchk_info mchk; |
ba5c1e9b CO |
448 | }; |
449 | }; | |
450 | ||
c0e6159d JF |
451 | struct kvm_s390_irq_payload { |
452 | struct kvm_s390_io_info io; | |
453 | struct kvm_s390_ext_info ext; | |
454 | struct kvm_s390_pgm_info pgm; | |
455 | struct kvm_s390_emerg_info emerg; | |
456 | struct kvm_s390_extcall_info extcall; | |
457 | struct kvm_s390_prefix_info prefix; | |
2822545f | 458 | struct kvm_s390_stop_info stop; |
c0e6159d JF |
459 | struct kvm_s390_mchk_info mchk; |
460 | }; | |
461 | ||
180c12fb | 462 | struct kvm_s390_local_interrupt { |
ba5c1e9b | 463 | spinlock_t lock; |
180c12fb | 464 | struct kvm_s390_float_interrupt *float_int; |
d0321a24 | 465 | wait_queue_head_t *wq; |
5288fbf0 | 466 | atomic_t *cpuflags; |
c0e6159d JF |
467 | DECLARE_BITMAP(sigp_emerg_pending, KVM_MAX_VCPUS); |
468 | struct kvm_s390_irq_payload irq; | |
469 | unsigned long pending_irqs; | |
ba5c1e9b CO |
470 | }; |
471 | ||
6d3da241 JF |
472 | #define FIRQ_LIST_IO_ISC_0 0 |
473 | #define FIRQ_LIST_IO_ISC_1 1 | |
474 | #define FIRQ_LIST_IO_ISC_2 2 | |
475 | #define FIRQ_LIST_IO_ISC_3 3 | |
476 | #define FIRQ_LIST_IO_ISC_4 4 | |
477 | #define FIRQ_LIST_IO_ISC_5 5 | |
478 | #define FIRQ_LIST_IO_ISC_6 6 | |
479 | #define FIRQ_LIST_IO_ISC_7 7 | |
480 | #define FIRQ_LIST_PFAULT 8 | |
481 | #define FIRQ_LIST_VIRTIO 9 | |
482 | #define FIRQ_LIST_COUNT 10 | |
483 | #define FIRQ_CNTR_IO 0 | |
484 | #define FIRQ_CNTR_SERVICE 1 | |
485 | #define FIRQ_CNTR_VIRTIO 2 | |
486 | #define FIRQ_CNTR_PFAULT 3 | |
487 | #define FIRQ_MAX_COUNT 4 | |
488 | ||
180c12fb | 489 | struct kvm_s390_float_interrupt { |
6d3da241 | 490 | unsigned long pending_irqs; |
ba5c1e9b | 491 | spinlock_t lock; |
6d3da241 JF |
492 | struct list_head lists[FIRQ_LIST_COUNT]; |
493 | int counters[FIRQ_MAX_COUNT]; | |
494 | struct kvm_s390_mchk_info mchk; | |
495 | struct kvm_s390_ext_info srv_signal; | |
ba5c1e9b | 496 | int next_rr_cpu; |
609433fb | 497 | unsigned long idle_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)]; |
ba5c1e9b CO |
498 | }; |
499 | ||
27291e21 DH |
500 | struct kvm_hw_wp_info_arch { |
501 | unsigned long addr; | |
502 | unsigned long phys_addr; | |
503 | int len; | |
504 | char *old_data; | |
505 | }; | |
506 | ||
507 | struct kvm_hw_bp_info_arch { | |
508 | unsigned long addr; | |
509 | int len; | |
510 | }; | |
511 | ||
512 | /* | |
513 | * Only the upper 16 bits of kvm_guest_debug->control are arch specific. | |
514 | * Further KVM_GUESTDBG flags which an be used from userspace can be found in | |
515 | * arch/s390/include/uapi/asm/kvm.h | |
516 | */ | |
517 | #define KVM_GUESTDBG_EXIT_PENDING 0x10000000 | |
518 | ||
519 | #define guestdbg_enabled(vcpu) \ | |
520 | (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) | |
521 | #define guestdbg_sstep_enabled(vcpu) \ | |
522 | (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) | |
523 | #define guestdbg_hw_bp_enabled(vcpu) \ | |
524 | (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) | |
525 | #define guestdbg_exit_pending(vcpu) (guestdbg_enabled(vcpu) && \ | |
526 | (vcpu->guest_debug & KVM_GUESTDBG_EXIT_PENDING)) | |
527 | ||
528 | struct kvm_guestdbg_info_arch { | |
529 | unsigned long cr0; | |
530 | unsigned long cr9; | |
531 | unsigned long cr10; | |
532 | unsigned long cr11; | |
533 | struct kvm_hw_bp_info_arch *hw_bp_info; | |
534 | struct kvm_hw_wp_info_arch *hw_wp_info; | |
535 | int nr_hw_bp; | |
536 | int nr_hw_wp; | |
537 | unsigned long last_bp; | |
538 | }; | |
ba5c1e9b | 539 | |
b0c632db | 540 | struct kvm_vcpu_arch { |
180c12fb | 541 | struct kvm_s390_sie_block *sie_block; |
b0c632db | 542 | unsigned int host_acrs[NUM_ACRS]; |
9977e886 HB |
543 | struct fpu host_fpregs; |
544 | struct fpu guest_fpregs; | |
180c12fb | 545 | struct kvm_s390_local_interrupt local_int; |
ca872302 | 546 | struct hrtimer ckc_timer; |
1b0462e5 | 547 | struct kvm_s390_pgm_info pgm; |
453423dc | 548 | union { |
e86a6ed6 HC |
549 | struct cpuid cpu_id; |
550 | u64 stidp_data; | |
453423dc | 551 | }; |
598841ca | 552 | struct gmap *gmap; |
27291e21 | 553 | struct kvm_guestdbg_info_arch guestdbg; |
3c038e6b DD |
554 | unsigned long pfault_token; |
555 | unsigned long pfault_select; | |
556 | unsigned long pfault_compare; | |
b0c632db HC |
557 | }; |
558 | ||
559 | struct kvm_vm_stat { | |
560 | u32 remote_tlb_flush; | |
561 | }; | |
562 | ||
db3fe4eb TY |
563 | struct kvm_arch_memory_slot { |
564 | }; | |
565 | ||
841b91c5 CH |
566 | struct s390_map_info { |
567 | struct list_head list; | |
568 | __u64 guest_addr; | |
569 | __u64 addr; | |
570 | struct page *page; | |
571 | }; | |
572 | ||
573 | struct s390_io_adapter { | |
574 | unsigned int id; | |
575 | int isc; | |
576 | bool maskable; | |
577 | bool masked; | |
578 | bool swap; | |
579 | struct rw_semaphore maps_lock; | |
580 | struct list_head maps; | |
581 | atomic_t nr_maps; | |
582 | }; | |
583 | ||
584 | #define MAX_S390_IO_ADAPTERS ((MAX_ISC + 1) * 8) | |
585 | #define MAX_S390_ADAPTER_MAPS 256 | |
586 | ||
9d8d5786 MM |
587 | /* maximum size of facilities and facility mask is 2k bytes */ |
588 | #define S390_ARCH_FAC_LIST_SIZE_BYTE (1<<11) | |
589 | #define S390_ARCH_FAC_LIST_SIZE_U64 \ | |
590 | (S390_ARCH_FAC_LIST_SIZE_BYTE / sizeof(u64)) | |
591 | #define S390_ARCH_FAC_MASK_SIZE_BYTE S390_ARCH_FAC_LIST_SIZE_BYTE | |
592 | #define S390_ARCH_FAC_MASK_SIZE_U64 \ | |
593 | (S390_ARCH_FAC_MASK_SIZE_BYTE / sizeof(u64)) | |
594 | ||
981467c9 MM |
595 | struct kvm_s390_fac { |
596 | /* facility list requested by guest */ | |
597 | __u64 list[S390_ARCH_FAC_LIST_SIZE_U64]; | |
598 | /* facility mask supported by kvm & hosting machine */ | |
599 | __u64 mask[S390_ARCH_FAC_LIST_SIZE_U64]; | |
9d8d5786 MM |
600 | }; |
601 | ||
602 | struct kvm_s390_cpu_model { | |
981467c9 | 603 | struct kvm_s390_fac *fac; |
9d8d5786 | 604 | struct cpuid cpu_id; |
658b6eda | 605 | unsigned short ibc; |
9d8d5786 MM |
606 | }; |
607 | ||
5102ee87 TK |
608 | struct kvm_s390_crypto { |
609 | struct kvm_s390_crypto_cb *crycb; | |
610 | __u32 crycbd; | |
a374e892 TK |
611 | __u8 aes_kw; |
612 | __u8 dea_kw; | |
5102ee87 TK |
613 | }; |
614 | ||
615 | struct kvm_s390_crypto_cb { | |
a374e892 TK |
616 | __u8 reserved00[72]; /* 0x0000 */ |
617 | __u8 dea_wrapping_key_mask[24]; /* 0x0048 */ | |
618 | __u8 aes_wrapping_key_mask[32]; /* 0x0060 */ | |
45c9b47c | 619 | __u8 reserved80[128]; /* 0x0080 */ |
5102ee87 TK |
620 | }; |
621 | ||
b0c632db | 622 | struct kvm_arch{ |
7d43bafc ED |
623 | void *sca; |
624 | int use_esca; | |
b0c632db | 625 | debug_info_t *dbf; |
180c12fb | 626 | struct kvm_s390_float_interrupt float_int; |
c05c4186 | 627 | struct kvm_device *flic; |
598841ca | 628 | struct gmap *gmap; |
fa6b7fe9 | 629 | int css_support; |
84223598 | 630 | int use_irqchip; |
b31605c1 | 631 | int use_cmma; |
6352e4d2 | 632 | int user_cpu_state_ctrl; |
2444b352 | 633 | int user_sigp; |
e44fc8c9 | 634 | int user_stsi; |
841b91c5 | 635 | struct s390_io_adapter *adapters[MAX_S390_IO_ADAPTERS]; |
8a242234 | 636 | wait_queue_head_t ipte_wq; |
a6b7e459 TH |
637 | int ipte_lock_count; |
638 | struct mutex ipte_mutex; | |
8ad35755 | 639 | spinlock_t start_stop_lock; |
9d8d5786 | 640 | struct kvm_s390_cpu_model model; |
5102ee87 | 641 | struct kvm_s390_crypto crypto; |
72f25020 | 642 | u64 epoch; |
b0c632db HC |
643 | }; |
644 | ||
bf640876 DD |
645 | #define KVM_HVA_ERR_BAD (-1UL) |
646 | #define KVM_HVA_ERR_RO_BAD (-2UL) | |
647 | ||
648 | static inline bool kvm_is_error_hva(unsigned long addr) | |
649 | { | |
650 | return IS_ERR_VALUE(addr); | |
651 | } | |
652 | ||
3c038e6b | 653 | #define ASYNC_PF_PER_VCPU 64 |
3c038e6b DD |
654 | struct kvm_arch_async_pf { |
655 | unsigned long pfault_token; | |
656 | }; | |
657 | ||
658 | bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); | |
659 | ||
660 | void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, | |
661 | struct kvm_async_pf *work); | |
662 | ||
663 | void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, | |
664 | struct kvm_async_pf *work); | |
665 | ||
666 | void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, | |
667 | struct kvm_async_pf *work); | |
668 | ||
5a32c1af | 669 | extern int sie64a(struct kvm_s390_sie_block *, u64 *); |
b764bb1c | 670 | extern char sie_exit; |
0865e636 | 671 | |
13a34e06 | 672 | static inline void kvm_arch_hardware_disable(void) {} |
0865e636 | 673 | static inline void kvm_arch_check_processor_compat(void *rtn) {} |
0865e636 RK |
674 | static inline void kvm_arch_sync_events(struct kvm *kvm) {} |
675 | static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {} | |
676 | static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} | |
677 | static inline void kvm_arch_free_memslot(struct kvm *kvm, | |
678 | struct kvm_memory_slot *free, struct kvm_memory_slot *dont) {} | |
15f46015 | 679 | static inline void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) {} |
0865e636 RK |
680 | static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {} |
681 | static inline void kvm_arch_flush_shadow_memslot(struct kvm *kvm, | |
682 | struct kvm_memory_slot *slot) {} | |
3217f7c2 CD |
683 | static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} |
684 | static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} | |
0865e636 | 685 | |
b0c632db | 686 | #endif |