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0b73214f 1/* SPDX-License-Identifier: GPL-2.0 */
b0c632db 2/*
a53c8fab 3 * definition for kernel virtual machines on s390
b0c632db 4 *
a53c8fab 5 * Copyright IBM Corp. 2008, 2009
b0c632db 6 *
b0c632db
HC
7 * Author(s): Carsten Otte <cotte@de.ibm.com>
8 */
9
10
11#ifndef ASM_KVM_HOST_H
12#define ASM_KVM_HOST_H
65647300
PB
13
14#include <linux/types.h>
ca872302
CB
15#include <linux/hrtimer.h>
16#include <linux/interrupt.h>
65647300 17#include <linux/kvm_types.h>
b0c632db 18#include <linux/kvm_host.h>
81aa8efe 19#include <linux/kvm.h>
9c23a131 20#include <linux/seqlock.h>
b0c632db 21#include <asm/debug.h>
e86a6ed6 22#include <asm/cpu.h>
b0753902 23#include <asm/fpu/api.h>
841b91c5 24#include <asm/isc.h>
4e0b1ab7 25#include <asm/guarded_storage.h>
b0c632db 26
bc784cce
ED
27#define KVM_S390_BSCA_CPU_SLOTS 64
28#define KVM_S390_ESCA_CPU_SLOTS 248
a6940674 29#define KVM_MAX_VCPUS 255
bbacc0c1 30#define KVM_USER_MEM_SLOTS 32
b0c632db 31
84223598
CH
32/*
33 * These seem to be used for allocating ->chip in the routing table,
34 * which we don't use. 4096 is an out-of-thin-air value. If we need
35 * to look at ->chip later on, we'll need to revisit this.
36 */
37#define KVM_NR_IRQCHIPS 1
38#define KVM_IRQCHIP_NUM_PINS 4096
c4a8de35 39#define KVM_HALT_POLL_NS_DEFAULT 80000
84223598 40
2860c4b1 41/* s390-specific vcpu->requests bit members */
2387149e
AJ
42#define KVM_REQ_ENABLE_IBS KVM_ARCH_REQ(0)
43#define KVM_REQ_DISABLE_IBS KVM_ARCH_REQ(1)
44#define KVM_REQ_ICPT_OPEREXC KVM_ARCH_REQ(2)
04a7ea04
PB
45#define KVM_REQ_START_MIGRATION KVM_ARCH_REQ(3)
46#define KVM_REQ_STOP_MIGRATION KVM_ARCH_REQ(4)
2860c4b1 47
ea5f4969
DH
48#define SIGP_CTRL_C 0x80
49#define SIGP_CTRL_SCN_MASK 0x3f
4953919f 50
bc784cce
ED
51union bsca_sigp_ctrl {
52 __u8 value;
53 struct {
54 __u8 c : 1;
55 __u8 r : 1;
56 __u8 scn : 6;
57 };
1cae0255 58};
bc784cce
ED
59
60union esca_sigp_ctrl {
61 __u16 value;
62 struct {
63 __u8 c : 1;
64 __u8 reserved: 7;
65 __u8 scn;
66 };
1cae0255 67};
bc784cce
ED
68
69struct esca_entry {
70 union esca_sigp_ctrl sigp_ctrl;
71 __u16 reserved1[3];
72 __u64 sda;
73 __u64 reserved2[6];
1cae0255 74};
bc784cce
ED
75
76struct bsca_entry {
ea5f4969 77 __u8 reserved0;
bc784cce 78 union bsca_sigp_ctrl sigp_ctrl;
ea5f4969 79 __u16 reserved[3];
b0c632db
HC
80 __u64 sda;
81 __u64 reserved2[2];
1cae0255 82};
b0c632db 83
8a242234
HC
84union ipte_control {
85 unsigned long val;
86 struct {
87 unsigned long k : 1;
88 unsigned long kh : 31;
89 unsigned long kg : 32;
90 };
91};
b0c632db 92
bc784cce 93struct bsca_block {
8a242234 94 union ipte_control ipte_control;
b0c632db
HC
95 __u64 reserved[5];
96 __u64 mcn;
97 __u64 reserved2;
bc784cce 98 struct bsca_entry cpu[KVM_S390_BSCA_CPU_SLOTS];
1cae0255 99};
b0c632db 100
bc784cce
ED
101struct esca_block {
102 union ipte_control ipte_control;
103 __u64 reserved1[7];
104 __u64 mcn[4];
105 __u64 reserved2[20];
106 struct esca_entry cpu[KVM_S390_ESCA_CPU_SLOTS];
1cae0255 107};
bc784cce 108
da72ca4d
QH
109/*
110 * This struct is used to store some machine check info from lowcore
111 * for machine checks that happen while the guest is running.
112 * This info in host's lowcore might be overwritten by a second machine
113 * check from host when host is in the machine check's high-level handling.
114 * The size is 24 bytes.
115 */
116struct mcck_volatile_info {
117 __u64 mcic;
118 __u64 failing_storage_address;
119 __u32 ext_damage_code;
120 __u32 reserved;
121};
122
9e6dabef 123#define CPUSTAT_STOPPED 0x80000000
b0c632db
HC
124#define CPUSTAT_WAIT 0x10000000
125#define CPUSTAT_ECALL_PEND 0x08000000
126#define CPUSTAT_STOP_INT 0x04000000
127#define CPUSTAT_IO_INT 0x02000000
128#define CPUSTAT_EXT_INT 0x01000000
129#define CPUSTAT_RUNNING 0x00800000
130#define CPUSTAT_RETAINED 0x00400000
131#define CPUSTAT_TIMING_SUB 0x00020000
132#define CPUSTAT_SIE_SUB 0x00010000
133#define CPUSTAT_RRF 0x00008000
134#define CPUSTAT_SLSV 0x00004000
135#define CPUSTAT_SLSR 0x00002000
136#define CPUSTAT_ZARCH 0x00000800
137#define CPUSTAT_MCDS 0x00000100
730cd632 138#define CPUSTAT_KSS 0x00000200
b0c632db 139#define CPUSTAT_SM 0x00000080
8ad35755 140#define CPUSTAT_IBS 0x00000040
53df84f8 141#define CPUSTAT_GED2 0x00000010
b0c632db 142#define CPUSTAT_G 0x00000008
69d0d3a3 143#define CPUSTAT_GED 0x00000004
b0c632db
HC
144#define CPUSTAT_J 0x00000002
145#define CPUSTAT_P 0x00000001
146
180c12fb 147struct kvm_s390_sie_block {
b0c632db 148 atomic_t cpuflags; /* 0x0000 */
fda902cb
MM
149 __u32 : 1; /* 0x0004 */
150 __u32 prefix : 18;
658b6eda
MM
151 __u32 : 1;
152 __u32 ibc : 12;
95d38fd0
CB
153 __u8 reserved08[4]; /* 0x0008 */
154#define PROG_IN_SIE (1<<0)
155 __u32 prog0c; /* 0x000c */
49b99e1e 156 __u8 reserved10[16]; /* 0x0010 */
8e236546
CB
157#define PROG_BLOCK_SIE (1<<0)
158#define PROG_REQUEST (1<<1)
49b99e1e
CB
159 atomic_t prog20; /* 0x0020 */
160 __u8 reserved24[4]; /* 0x0024 */
b0c632db
HC
161 __u64 cputm; /* 0x0028 */
162 __u64 ckc; /* 0x0030 */
163 __u64 epoch; /* 0x0038 */
a3508fbe 164 __u32 svcc; /* 0x0040 */
ba5c1e9b 165#define LCTL_CR0 0x8000
d8346b7d 166#define LCTL_CR6 0x0200
27291e21
DH
167#define LCTL_CR9 0x0040
168#define LCTL_CR10 0x0020
169#define LCTL_CR11 0x0010
48a3e950 170#define LCTL_CR14 0x0002
b0c632db
HC
171 __u16 lctl; /* 0x0044 */
172 __s16 icpua; /* 0x0046 */
95ca2cb5 173#define ICTL_OPEREXC 0x80000000
27291e21
DH
174#define ICTL_PINT 0x20000000
175#define ICTL_LPSW 0x00400000
176#define ICTL_STCTL 0x00040000
177#define ICTL_ISKE 0x00004000
178#define ICTL_SSKE 0x00002000
179#define ICTL_RRBE 0x00001000
5a5e6536 180#define ICTL_TPROT 0x00000200
b0c632db 181 __u32 ictl; /* 0x0048 */
0c9d8683
DH
182#define ECA_CEI 0x80000000
183#define ECA_IB 0x40000000
184#define ECA_SIGPI 0x10000000
185#define ECA_MVPGI 0x01000000
186#define ECA_VX 0x00020000
187#define ECA_PROTEXCI 0x00002000
188#define ECA_SII 0x00000001
b0c632db 189 __u32 eca; /* 0x004c */
8712836b
DH
190#define ICPT_INST 0x04
191#define ICPT_PROGI 0x08
192#define ICPT_INSTPROGI 0x0C
947b8972 193#define ICPT_EXTREQ 0x10
a3508fbe 194#define ICPT_EXTINT 0x14
947b8972
FA
195#define ICPT_IOREQ 0x18
196#define ICPT_WAIT 0x1c
a3508fbe
DH
197#define ICPT_VALIDITY 0x20
198#define ICPT_STOP 0x28
8712836b
DH
199#define ICPT_OPEREXC 0x2C
200#define ICPT_PARTEXEC 0x38
201#define ICPT_IOINST 0x40
730cd632 202#define ICPT_KSS 0x5c
b0c632db 203 __u8 icptcode; /* 0x0050 */
04b41acd 204 __u8 icptstatus; /* 0x0051 */
b0c632db
HC
205 __u16 ihcpu; /* 0x0052 */
206 __u8 reserved54[2]; /* 0x0054 */
207 __u16 ipa; /* 0x0056 */
208 __u32 ipb; /* 0x0058 */
209 __u32 scaoh; /* 0x005c */
35b3fde6
CB
210#define FPF_BPBC 0x20
211 __u8 fpf; /* 0x0060 */
4e0b1ab7 212#define ECB_GS 0x40
0c9d8683
DH
213#define ECB_TE 0x10
214#define ECB_SRSI 0x04
215#define ECB_HOSTPROTINT 0x02
b0c632db 216 __u8 ecb; /* 0x0061 */
0c9d8683
DH
217#define ECB2_CMMA 0x80
218#define ECB2_IEP 0x20
219#define ECB2_PFMFI 0x08
220#define ECB2_ESCA 0x04
69d0d3a3 221 __u8 ecb2; /* 0x0062 */
a374e892 222#define ECB3_DEA 0x08
0c9d8683
DH
223#define ECB3_AES 0x04
224#define ECB3_RI 0x01
a374e892 225 __u8 ecb3; /* 0x0063 */
b0c632db 226 __u32 scaol; /* 0x0064 */
8fa1696e
CW
227 __u8 reserved68; /* 0x0068 */
228 __u8 epdx; /* 0x0069 */
229 __u8 reserved6a[2]; /* 0x006a */
b0c632db 230 __u32 todpr; /* 0x006c */
efed1104
DH
231 __u8 reserved70[16]; /* 0x0070 */
232 __u64 mso; /* 0x0080 */
233 __u64 msl; /* 0x0088 */
b0c632db
HC
234 psw_t gpsw; /* 0x0090 */
235 __u64 gg14; /* 0x00a0 */
236 __u64 gg15; /* 0x00a8 */
f14d82e0
TH
237 __u8 reservedb0[20]; /* 0x00b0 */
238 __u16 extcpuaddr; /* 0x00c4 */
239 __u16 eic; /* 0x00c6 */
240 __u32 reservedc8; /* 0x00c8 */
439716a5
DH
241 __u16 pgmilc; /* 0x00cc */
242 __u16 iprcc; /* 0x00ce */
243 __u32 dxc; /* 0x00d0 */
244 __u16 mcn; /* 0x00d4 */
245 __u8 perc; /* 0x00d6 */
246 __u8 peratmid; /* 0x00d7 */
247 __u64 peraddr; /* 0x00d8 */
248 __u8 eai; /* 0x00e0 */
249 __u8 peraid; /* 0x00e1 */
250 __u8 oai; /* 0x00e2 */
251 __u8 armid; /* 0x00e3 */
252 __u8 reservede4[4]; /* 0x00e4 */
253 __u64 tecmc; /* 0x00e8 */
5102ee87
TK
254 __u8 reservedf0[12]; /* 0x00f0 */
255#define CRYCB_FORMAT1 0x00000001
45c9b47c 256#define CRYCB_FORMAT2 0x00000003
5102ee87 257 __u32 crycbd; /* 0x00fc */
b0c632db
HC
258 __u64 gcr[16]; /* 0x0100 */
259 __u64 gbea; /* 0x0180 */
4e0b1ab7
FZ
260 __u8 reserved188[8]; /* 0x0188 */
261 __u64 sdnxo; /* 0x0190 */
262 __u8 reserved198[8]; /* 0x0198 */
ef50f7ac 263 __u32 fac; /* 0x01a0 */
b31288fa
KW
264 __u8 reserved1a4[20]; /* 0x01a4 */
265 __u64 cbrlo; /* 0x01b8 */
13211ea7 266 __u8 reserved1c0[8]; /* 0x01c0 */
0c9d8683 267#define ECD_HOSTREGMGMT 0x20000000
8fa1696e 268#define ECD_MEF 0x08000000
13211ea7
EF
269 __u32 ecd; /* 0x01c8 */
270 __u8 reserved1cc[18]; /* 0x01cc */
672550fb
CB
271 __u64 pp; /* 0x01de */
272 __u8 reserved1e6[2]; /* 0x01e6 */
7feb6bb8 273 __u64 itdba; /* 0x01e8 */
c6e5f166 274 __u64 riccbd; /* 0x01f0 */
c9bc1eab 275 __u64 gvrd; /* 0x01f8 */
b0c632db
HC
276} __attribute__((packed));
277
7feb6bb8
MM
278struct kvm_s390_itdb {
279 __u8 data[256];
1cae0255 280};
7feb6bb8
MM
281
282struct sie_page {
283 struct kvm_s390_sie_block sie_block;
da72ca4d
QH
284 struct mcck_volatile_info mcck_info; /* 0x0200 */
285 __u8 reserved218[1000]; /* 0x0218 */
7feb6bb8 286 struct kvm_s390_itdb itdb; /* 0x0600 */
efa48163 287 __u8 reserved700[2304]; /* 0x0700 */
1cae0255 288};
7feb6bb8 289
b0c632db 290struct kvm_vcpu_stat {
8a7e75d4
SJS
291 u64 exit_userspace;
292 u64 exit_null;
293 u64 exit_external_request;
294 u64 exit_external_interrupt;
295 u64 exit_stop_request;
296 u64 exit_validity;
297 u64 exit_instruction;
298 u64 exit_pei;
299 u64 halt_successful_poll;
300 u64 halt_attempted_poll;
301 u64 halt_poll_invalid;
302 u64 halt_wakeup;
303 u64 instruction_lctl;
304 u64 instruction_lctlg;
305 u64 instruction_stctl;
306 u64 instruction_stctg;
307 u64 exit_program_interruption;
308 u64 exit_instr_and_program;
309 u64 exit_operation_exception;
310 u64 deliver_external_call;
311 u64 deliver_emergency_signal;
312 u64 deliver_service_signal;
313 u64 deliver_virtio_interrupt;
314 u64 deliver_stop_signal;
315 u64 deliver_prefix_signal;
316 u64 deliver_restart_signal;
317 u64 deliver_program_int;
318 u64 deliver_io_int;
319 u64 exit_wait_state;
320 u64 instruction_pfmf;
321 u64 instruction_stidp;
322 u64 instruction_spx;
323 u64 instruction_stpx;
324 u64 instruction_stap;
325 u64 instruction_storage_key;
326 u64 instruction_ipte_interlock;
327 u64 instruction_stsch;
328 u64 instruction_chsc;
329 u64 instruction_stsi;
330 u64 instruction_stfl;
331 u64 instruction_tprot;
332 u64 instruction_sie;
333 u64 instruction_essa;
334 u64 instruction_sthyi;
335 u64 instruction_sigp_sense;
336 u64 instruction_sigp_sense_running;
337 u64 instruction_sigp_external_call;
338 u64 instruction_sigp_emergency;
339 u64 instruction_sigp_cond_emergency;
340 u64 instruction_sigp_start;
341 u64 instruction_sigp_stop;
342 u64 instruction_sigp_stop_store_status;
343 u64 instruction_sigp_store_status;
344 u64 instruction_sigp_store_adtl_status;
345 u64 instruction_sigp_arch;
346 u64 instruction_sigp_prefix;
347 u64 instruction_sigp_restart;
348 u64 instruction_sigp_init_cpu_reset;
349 u64 instruction_sigp_cpu_reset;
350 u64 instruction_sigp_unknown;
351 u64 diagnose_10;
352 u64 diagnose_44;
353 u64 diagnose_9c;
354 u64 diagnose_258;
355 u64 diagnose_308;
356 u64 diagnose_500;
b0c632db
HC
357};
358
bcd84683
JF
359#define PGM_OPERATION 0x01
360#define PGM_PRIVILEGED_OP 0x02
361#define PGM_EXECUTE 0x03
362#define PGM_PROTECTION 0x04
363#define PGM_ADDRESSING 0x05
364#define PGM_SPECIFICATION 0x06
365#define PGM_DATA 0x07
366#define PGM_FIXED_POINT_OVERFLOW 0x08
367#define PGM_FIXED_POINT_DIVIDE 0x09
368#define PGM_DECIMAL_OVERFLOW 0x0a
369#define PGM_DECIMAL_DIVIDE 0x0b
370#define PGM_HFP_EXPONENT_OVERFLOW 0x0c
371#define PGM_HFP_EXPONENT_UNDERFLOW 0x0d
372#define PGM_HFP_SIGNIFICANCE 0x0e
373#define PGM_HFP_DIVIDE 0x0f
374#define PGM_SEGMENT_TRANSLATION 0x10
375#define PGM_PAGE_TRANSLATION 0x11
376#define PGM_TRANSLATION_SPEC 0x12
377#define PGM_SPECIAL_OPERATION 0x13
378#define PGM_OPERAND 0x15
379#define PGM_TRACE_TABEL 0x16
403c8648 380#define PGM_VECTOR_PROCESSING 0x1b
bcd84683
JF
381#define PGM_SPACE_SWITCH 0x1c
382#define PGM_HFP_SQUARE_ROOT 0x1d
383#define PGM_PC_TRANSLATION_SPEC 0x1f
384#define PGM_AFX_TRANSLATION 0x20
385#define PGM_ASX_TRANSLATION 0x21
386#define PGM_LX_TRANSLATION 0x22
387#define PGM_EX_TRANSLATION 0x23
388#define PGM_PRIMARY_AUTHORITY 0x24
389#define PGM_SECONDARY_AUTHORITY 0x25
390#define PGM_LFX_TRANSLATION 0x26
391#define PGM_LSX_TRANSLATION 0x27
392#define PGM_ALET_SPECIFICATION 0x28
393#define PGM_ALEN_TRANSLATION 0x29
394#define PGM_ALE_SEQUENCE 0x2a
395#define PGM_ASTE_VALIDITY 0x2b
396#define PGM_ASTE_SEQUENCE 0x2c
397#define PGM_EXTENDED_AUTHORITY 0x2d
398#define PGM_LSTE_SEQUENCE 0x2e
399#define PGM_ASTE_INSTANCE 0x2f
400#define PGM_STACK_FULL 0x30
401#define PGM_STACK_EMPTY 0x31
402#define PGM_STACK_SPECIFICATION 0x32
403#define PGM_STACK_TYPE 0x33
404#define PGM_STACK_OPERATION 0x34
405#define PGM_ASCE_TYPE 0x38
406#define PGM_REGION_FIRST_TRANS 0x39
407#define PGM_REGION_SECOND_TRANS 0x3a
408#define PGM_REGION_THIRD_TRANS 0x3b
409#define PGM_MONITOR 0x40
410#define PGM_PER 0x80
411#define PGM_CRYPTO_OPERATION 0x119
ba5c1e9b 412
c0e6159d
JF
413/* irq types in order of priority */
414enum irq_types {
415 IRQ_PEND_MCHK_EX = 0,
416 IRQ_PEND_SVC,
417 IRQ_PEND_PROG,
418 IRQ_PEND_MCHK_REP,
419 IRQ_PEND_EXT_IRQ_KEY,
420 IRQ_PEND_EXT_MALFUNC,
421 IRQ_PEND_EXT_EMERGENCY,
422 IRQ_PEND_EXT_EXTERNAL,
423 IRQ_PEND_EXT_CLOCK_COMP,
424 IRQ_PEND_EXT_CPU_TIMER,
425 IRQ_PEND_EXT_TIMING,
426 IRQ_PEND_EXT_SERVICE,
427 IRQ_PEND_EXT_HOST,
428 IRQ_PEND_PFAULT_INIT,
429 IRQ_PEND_PFAULT_DONE,
430 IRQ_PEND_VIRTIO,
431 IRQ_PEND_IO_ISC_0,
432 IRQ_PEND_IO_ISC_1,
433 IRQ_PEND_IO_ISC_2,
434 IRQ_PEND_IO_ISC_3,
435 IRQ_PEND_IO_ISC_4,
436 IRQ_PEND_IO_ISC_5,
437 IRQ_PEND_IO_ISC_6,
438 IRQ_PEND_IO_ISC_7,
439 IRQ_PEND_SIGP_STOP,
440 IRQ_PEND_RESTART,
441 IRQ_PEND_SET_PREFIX,
442 IRQ_PEND_COUNT
443};
444
6d3da241
JF
445/* We have 2M for virtio device descriptor pages. Smallest amount of
446 * memory per page is 24 bytes (1 queue), so (2048*1024) / 24 = 87381
447 */
448#define KVM_S390_MAX_VIRTIO_IRQS 87381
449
c0e6159d
JF
450/*
451 * Repressible (non-floating) machine check interrupts
452 * subclass bits in MCIC
453 */
454#define MCHK_EXTD_BIT 58
455#define MCHK_DEGR_BIT 56
456#define MCHK_WARN_BIT 55
457#define MCHK_REP_MASK ((1UL << MCHK_DEGR_BIT) | \
458 (1UL << MCHK_EXTD_BIT) | \
459 (1UL << MCHK_WARN_BIT))
460
461/* Exigent machine check interrupts subclass bits in MCIC */
462#define MCHK_SD_BIT 63
463#define MCHK_PD_BIT 62
464#define MCHK_EX_MASK ((1UL << MCHK_SD_BIT) | (1UL << MCHK_PD_BIT))
465
466#define IRQ_PEND_EXT_MASK ((1UL << IRQ_PEND_EXT_IRQ_KEY) | \
467 (1UL << IRQ_PEND_EXT_CLOCK_COMP) | \
468 (1UL << IRQ_PEND_EXT_CPU_TIMER) | \
469 (1UL << IRQ_PEND_EXT_MALFUNC) | \
470 (1UL << IRQ_PEND_EXT_EMERGENCY) | \
471 (1UL << IRQ_PEND_EXT_EXTERNAL) | \
472 (1UL << IRQ_PEND_EXT_TIMING) | \
473 (1UL << IRQ_PEND_EXT_HOST) | \
474 (1UL << IRQ_PEND_EXT_SERVICE) | \
475 (1UL << IRQ_PEND_VIRTIO) | \
476 (1UL << IRQ_PEND_PFAULT_INIT) | \
477 (1UL << IRQ_PEND_PFAULT_DONE))
478
479#define IRQ_PEND_IO_MASK ((1UL << IRQ_PEND_IO_ISC_0) | \
480 (1UL << IRQ_PEND_IO_ISC_1) | \
481 (1UL << IRQ_PEND_IO_ISC_2) | \
482 (1UL << IRQ_PEND_IO_ISC_3) | \
483 (1UL << IRQ_PEND_IO_ISC_4) | \
484 (1UL << IRQ_PEND_IO_ISC_5) | \
485 (1UL << IRQ_PEND_IO_ISC_6) | \
486 (1UL << IRQ_PEND_IO_ISC_7))
487
488#define IRQ_PEND_MCHK_MASK ((1UL << IRQ_PEND_MCHK_REP) | \
489 (1UL << IRQ_PEND_MCHK_EX))
490
180c12fb 491struct kvm_s390_interrupt_info {
ba5c1e9b
CO
492 struct list_head list;
493 u64 type;
494 union {
180c12fb
CB
495 struct kvm_s390_io_info io;
496 struct kvm_s390_ext_info ext;
497 struct kvm_s390_pgm_info pgm;
8bb3a2eb 498 struct kvm_s390_emerg_info emerg;
7697e71f 499 struct kvm_s390_extcall_info extcall;
180c12fb 500 struct kvm_s390_prefix_info prefix;
2822545f 501 struct kvm_s390_stop_info stop;
48a3e950 502 struct kvm_s390_mchk_info mchk;
ba5c1e9b
CO
503 };
504};
505
c0e6159d
JF
506struct kvm_s390_irq_payload {
507 struct kvm_s390_io_info io;
508 struct kvm_s390_ext_info ext;
509 struct kvm_s390_pgm_info pgm;
510 struct kvm_s390_emerg_info emerg;
511 struct kvm_s390_extcall_info extcall;
512 struct kvm_s390_prefix_info prefix;
2822545f 513 struct kvm_s390_stop_info stop;
c0e6159d
JF
514 struct kvm_s390_mchk_info mchk;
515};
516
180c12fb 517struct kvm_s390_local_interrupt {
ba5c1e9b 518 spinlock_t lock;
180c12fb 519 struct kvm_s390_float_interrupt *float_int;
8577370f 520 struct swait_queue_head *wq;
5288fbf0 521 atomic_t *cpuflags;
c0e6159d
JF
522 DECLARE_BITMAP(sigp_emerg_pending, KVM_MAX_VCPUS);
523 struct kvm_s390_irq_payload irq;
524 unsigned long pending_irqs;
ba5c1e9b
CO
525};
526
6d3da241
JF
527#define FIRQ_LIST_IO_ISC_0 0
528#define FIRQ_LIST_IO_ISC_1 1
529#define FIRQ_LIST_IO_ISC_2 2
530#define FIRQ_LIST_IO_ISC_3 3
531#define FIRQ_LIST_IO_ISC_4 4
532#define FIRQ_LIST_IO_ISC_5 5
533#define FIRQ_LIST_IO_ISC_6 6
534#define FIRQ_LIST_IO_ISC_7 7
535#define FIRQ_LIST_PFAULT 8
536#define FIRQ_LIST_VIRTIO 9
537#define FIRQ_LIST_COUNT 10
538#define FIRQ_CNTR_IO 0
539#define FIRQ_CNTR_SERVICE 1
540#define FIRQ_CNTR_VIRTIO 2
541#define FIRQ_CNTR_PFAULT 3
542#define FIRQ_MAX_COUNT 4
543
51978393
FL
544/* mask the AIS mode for a given ISC */
545#define AIS_MODE_MASK(isc) (0x80 >> isc)
546
547#define KVM_S390_AIS_MODE_ALL 0
548#define KVM_S390_AIS_MODE_SINGLE 1
549
180c12fb 550struct kvm_s390_float_interrupt {
6d3da241 551 unsigned long pending_irqs;
ba5c1e9b 552 spinlock_t lock;
6d3da241
JF
553 struct list_head lists[FIRQ_LIST_COUNT];
554 int counters[FIRQ_MAX_COUNT];
555 struct kvm_s390_mchk_info mchk;
556 struct kvm_s390_ext_info srv_signal;
ba5c1e9b 557 int next_rr_cpu;
609433fb 558 unsigned long idle_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)];
51978393
FL
559 struct mutex ais_lock;
560 u8 simm;
561 u8 nimm;
ba5c1e9b
CO
562};
563
27291e21
DH
564struct kvm_hw_wp_info_arch {
565 unsigned long addr;
566 unsigned long phys_addr;
567 int len;
568 char *old_data;
569};
570
571struct kvm_hw_bp_info_arch {
572 unsigned long addr;
573 int len;
574};
575
576/*
577 * Only the upper 16 bits of kvm_guest_debug->control are arch specific.
578 * Further KVM_GUESTDBG flags which an be used from userspace can be found in
579 * arch/s390/include/uapi/asm/kvm.h
580 */
581#define KVM_GUESTDBG_EXIT_PENDING 0x10000000
582
583#define guestdbg_enabled(vcpu) \
584 (vcpu->guest_debug & KVM_GUESTDBG_ENABLE)
585#define guestdbg_sstep_enabled(vcpu) \
586 (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
587#define guestdbg_hw_bp_enabled(vcpu) \
588 (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
589#define guestdbg_exit_pending(vcpu) (guestdbg_enabled(vcpu) && \
590 (vcpu->guest_debug & KVM_GUESTDBG_EXIT_PENDING))
591
592struct kvm_guestdbg_info_arch {
593 unsigned long cr0;
594 unsigned long cr9;
595 unsigned long cr10;
596 unsigned long cr11;
597 struct kvm_hw_bp_info_arch *hw_bp_info;
598 struct kvm_hw_wp_info_arch *hw_wp_info;
599 int nr_hw_bp;
600 int nr_hw_wp;
601 unsigned long last_bp;
602};
ba5c1e9b 603
b0c632db 604struct kvm_vcpu_arch {
180c12fb 605 struct kvm_s390_sie_block *sie_block;
adbf1698
DH
606 /* if vsie is active, currently executed shadow sie control block */
607 struct kvm_s390_sie_block *vsie_block;
b0c632db 608 unsigned int host_acrs[NUM_ACRS];
4e0b1ab7 609 struct gs_cb *host_gscb;
9977e886 610 struct fpu host_fpregs;
180c12fb 611 struct kvm_s390_local_interrupt local_int;
ca872302 612 struct hrtimer ckc_timer;
1b0462e5 613 struct kvm_s390_pgm_info pgm;
598841ca 614 struct gmap *gmap;
37d9df98
DH
615 /* backup location for the currently enabled gmap when scheduled out */
616 struct gmap *enabled_gmap;
27291e21 617 struct kvm_guestdbg_info_arch guestdbg;
3c038e6b
DD
618 unsigned long pfault_token;
619 unsigned long pfault_select;
620 unsigned long pfault_compare;
db0758b2 621 bool cputm_enabled;
9c23a131
DH
622 /*
623 * The seqcount protects updates to cputm_start and sie_block.cputm,
624 * this way we can have non-blocking reads with consistent values.
625 * Only the owning VCPU thread (vcpu->cpu) is allowed to change these
626 * values and to start/stop/enable/disable cpu timer accounting.
627 */
628 seqcount_t cputm_seqcount;
db0758b2 629 __u64 cputm_start;
4e0b1ab7 630 bool gs_enabled;
b0c632db
HC
631};
632
633struct kvm_vm_stat {
8a7e75d4 634 ulong remote_tlb_flush;
b0c632db
HC
635};
636
db3fe4eb
TY
637struct kvm_arch_memory_slot {
638};
639
841b91c5
CH
640struct s390_map_info {
641 struct list_head list;
642 __u64 guest_addr;
643 __u64 addr;
644 struct page *page;
645};
646
647struct s390_io_adapter {
648 unsigned int id;
649 int isc;
650 bool maskable;
651 bool masked;
652 bool swap;
08fab50d 653 bool suppressible;
841b91c5
CH
654 struct rw_semaphore maps_lock;
655 struct list_head maps;
656 atomic_t nr_maps;
657};
658
659#define MAX_S390_IO_ADAPTERS ((MAX_ISC + 1) * 8)
660#define MAX_S390_ADAPTER_MAPS 256
661
9d8d5786
MM
662/* maximum size of facilities and facility mask is 2k bytes */
663#define S390_ARCH_FAC_LIST_SIZE_BYTE (1<<11)
664#define S390_ARCH_FAC_LIST_SIZE_U64 \
665 (S390_ARCH_FAC_LIST_SIZE_BYTE / sizeof(u64))
666#define S390_ARCH_FAC_MASK_SIZE_BYTE S390_ARCH_FAC_LIST_SIZE_BYTE
667#define S390_ARCH_FAC_MASK_SIZE_U64 \
668 (S390_ARCH_FAC_MASK_SIZE_BYTE / sizeof(u64))
669
9d8d5786 670struct kvm_s390_cpu_model {
c54f0d6a
DH
671 /* facility mask supported by kvm & hosting machine */
672 __u64 fac_mask[S390_ARCH_FAC_LIST_SIZE_U64];
673 /* facility list requested by guest (in dma page) */
674 __u64 *fac_list;
9bb0ec09 675 u64 cpuid;
658b6eda 676 unsigned short ibc;
9d8d5786
MM
677};
678
5102ee87
TK
679struct kvm_s390_crypto {
680 struct kvm_s390_crypto_cb *crycb;
681 __u32 crycbd;
a374e892
TK
682 __u8 aes_kw;
683 __u8 dea_kw;
5102ee87
TK
684};
685
ba850a8e
TK
686#define APCB0_MASK_SIZE 1
687struct kvm_s390_apcb0 {
688 __u64 apm[APCB0_MASK_SIZE]; /* 0x0000 */
689 __u64 aqm[APCB0_MASK_SIZE]; /* 0x0008 */
690 __u64 adm[APCB0_MASK_SIZE]; /* 0x0010 */
691 __u64 reserved18; /* 0x0018 */
692};
693
694#define APCB1_MASK_SIZE 4
695struct kvm_s390_apcb1 {
696 __u64 apm[APCB1_MASK_SIZE]; /* 0x0000 */
697 __u64 aqm[APCB1_MASK_SIZE]; /* 0x0020 */
698 __u64 adm[APCB1_MASK_SIZE]; /* 0x0040 */
699 __u64 reserved60[4]; /* 0x0060 */
700};
701
5102ee87 702struct kvm_s390_crypto_cb {
ba850a8e
TK
703 struct kvm_s390_apcb0 apcb0; /* 0x0000 */
704 __u8 reserved20[0x0048 - 0x0020]; /* 0x0020 */
705 __u8 dea_wrapping_key_mask[24]; /* 0x0048 */
706 __u8 aes_wrapping_key_mask[32]; /* 0x0060 */
707 struct kvm_s390_apcb1 apcb1; /* 0x0080 */
5102ee87
TK
708};
709
c54f0d6a
DH
710/*
711 * sie_page2 has to be allocated as DMA because fac_list and crycb need
712 * 31bit addresses in the sie control block.
713 */
714struct sie_page2 {
715 __u64 fac_list[S390_ARCH_FAC_LIST_SIZE_U64]; /* 0x0000 */
716 struct kvm_s390_crypto_cb crycb; /* 0x0800 */
717 u8 reserved900[0x1000 - 0x900]; /* 0x0900 */
1cae0255 718};
c54f0d6a 719
a3508fbe
DH
720struct kvm_s390_vsie {
721 struct mutex mutex;
722 struct radix_tree_root addr_to_page;
723 int page_count;
724 int next;
725 struct page *pages[KVM_MAX_VCPUS];
726};
727
190df4a2
CI
728struct kvm_s390_migration_state {
729 unsigned long bitmap_size; /* in bits (number of guest pages) */
730 atomic64_t dirty_pages; /* number of dirty pages */
731 unsigned long *pgste_bitmap;
732};
733
b0c632db 734struct kvm_arch{
7d43bafc
ED
735 void *sca;
736 int use_esca;
5e044315 737 rwlock_t sca_lock;
b0c632db 738 debug_info_t *dbf;
180c12fb 739 struct kvm_s390_float_interrupt float_int;
c05c4186 740 struct kvm_device *flic;
598841ca 741 struct gmap *gmap;
a3a92c31 742 unsigned long mem_limit;
fa6b7fe9 743 int css_support;
84223598 744 int use_irqchip;
b31605c1 745 int use_cmma;
6352e4d2 746 int user_cpu_state_ctrl;
2444b352 747 int user_sigp;
e44fc8c9 748 int user_stsi;
6502a34c 749 int user_instr0;
841b91c5 750 struct s390_io_adapter *adapters[MAX_S390_IO_ADAPTERS];
8a242234 751 wait_queue_head_t ipte_wq;
a6b7e459
TH
752 int ipte_lock_count;
753 struct mutex ipte_mutex;
8ad35755 754 spinlock_t start_stop_lock;
c54f0d6a 755 struct sie_page2 *sie_page2;
9d8d5786 756 struct kvm_s390_cpu_model model;
5102ee87 757 struct kvm_s390_crypto crypto;
a3508fbe 758 struct kvm_s390_vsie vsie;
8fa1696e 759 u8 epdx;
72f25020 760 u64 epoch;
190df4a2 761 struct kvm_s390_migration_state *migration_state;
15c9705f
DH
762 /* subset of available cpu features enabled by user space */
763 DECLARE_BITMAP(cpu_feat, KVM_S390_VM_CPU_FEAT_NR_BITS);
b0c632db
HC
764};
765
bf640876
DD
766#define KVM_HVA_ERR_BAD (-1UL)
767#define KVM_HVA_ERR_RO_BAD (-2UL)
768
769static inline bool kvm_is_error_hva(unsigned long addr)
770{
771 return IS_ERR_VALUE(addr);
772}
773
3c038e6b 774#define ASYNC_PF_PER_VCPU 64
3c038e6b
DD
775struct kvm_arch_async_pf {
776 unsigned long pfault_token;
777};
778
779bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
780
781void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
782 struct kvm_async_pf *work);
783
784void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
785 struct kvm_async_pf *work);
786
787void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
788 struct kvm_async_pf *work);
789
5a32c1af 790extern int sie64a(struct kvm_s390_sie_block *, u64 *);
b764bb1c 791extern char sie_exit;
0865e636 792
13a34e06 793static inline void kvm_arch_hardware_disable(void) {}
0865e636 794static inline void kvm_arch_check_processor_compat(void *rtn) {}
0865e636
RK
795static inline void kvm_arch_sync_events(struct kvm *kvm) {}
796static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
797static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
798static inline void kvm_arch_free_memslot(struct kvm *kvm,
799 struct kvm_memory_slot *free, struct kvm_memory_slot *dont) {}
15f46015 800static inline void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) {}
0865e636
RK
801static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
802static inline void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
803 struct kvm_memory_slot *slot) {}
3217f7c2
CD
804static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
805static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
0865e636 806
3491caf2
CB
807void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu);
808
b0c632db 809#endif