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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * S390 version |
3 | * | |
4 | * Derived from "include/asm-i386/mmu_context.h" | |
5 | */ | |
6 | ||
7 | #ifndef __S390_MMU_CONTEXT_H | |
8 | #define __S390_MMU_CONTEXT_H | |
9 | ||
c1821c2e | 10 | #include <asm/pgalloc.h> |
7c0f6ba6 | 11 | #include <linux/uaccess.h> |
050eef36 | 12 | #include <asm/tlbflush.h> |
a0616cde | 13 | #include <asm/ctl_reg.h> |
d6dd61c8 | 14 | |
6f457e1a MS |
15 | static inline int init_new_context(struct task_struct *tsk, |
16 | struct mm_struct *mm) | |
17 | { | |
f8ce57a2 | 18 | spin_lock_init(&mm->context.lock); |
8ecb1a59 | 19 | spin_lock_init(&mm->context.pgtable_lock); |
3446c13b | 20 | INIT_LIST_HEAD(&mm->context.pgtable_list); |
8ecb1a59 | 21 | spin_lock_init(&mm->context.gmap_lock); |
3446c13b | 22 | INIT_LIST_HEAD(&mm->context.gmap_list); |
1b948d6c | 23 | cpumask_clear(&mm->context.cpu_attach_mask); |
64f31d58 | 24 | atomic_set(&mm->context.flush_count, 0); |
44b6cc81 | 25 | mm->context.gmap_asce = 0; |
050eef36 | 26 | mm->context.flush_mm = 0; |
0b46e0a3 MS |
27 | #ifdef CONFIG_PGSTE |
28 | mm->context.alloc_pgste = page_table_allocate_pgste; | |
3eabaee9 | 29 | mm->context.has_pgste = 0; |
693ffc08 | 30 | mm->context.use_skey = 0; |
0b46e0a3 | 31 | #endif |
723cacbd GS |
32 | switch (mm->context.asce_limit) { |
33 | case 1UL << 42: | |
34 | /* | |
35 | * forked 3-level task, fall through to set new asce with new | |
36 | * mm->pgd | |
37 | */ | |
38 | case 0: | |
3446c13b | 39 | /* context created by exec, set asce limit to 4TB */ |
3446c13b | 40 | mm->context.asce_limit = STACK_TOP_MAX; |
723cacbd GS |
41 | mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | |
42 | _ASCE_USER_BITS | _ASCE_TYPE_REGION3; | |
43 | break; | |
44 | case 1UL << 53: | |
45 | /* forked 4-level task, set new asce with new mm->pgd */ | |
46 | mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | | |
47 | _ASCE_USER_BITS | _ASCE_TYPE_REGION2; | |
48 | break; | |
49 | case 1UL << 31: | |
50 | /* forked 2-level compat task, set new asce with new mm->pgd */ | |
51 | mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | | |
52 | _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT; | |
53 | /* pgd_alloc() did not increase mm->nr_pmds */ | |
3446c13b MS |
54 | mm_inc_nr_pmds(mm); |
55 | } | |
6252d702 | 56 | crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm)); |
6f457e1a MS |
57 | return 0; |
58 | } | |
1da177e4 LT |
59 | |
60 | #define destroy_context(mm) do { } while (0) | |
61 | ||
beef560b | 62 | static inline void set_user_asce(struct mm_struct *mm) |
1da177e4 | 63 | { |
723cacbd | 64 | S390_lowcore.user_asce = mm->context.asce; |
f8b13505 MS |
65 | if (current->thread.mm_segment.ar4) |
66 | __ctl_load(S390_lowcore.user_asce, 7, 7); | |
d3a73acb | 67 | set_cpu_flag(CIF_ASCE); |
1da177e4 LT |
68 | } |
69 | ||
beef560b | 70 | static inline void clear_user_asce(void) |
02a8f3ab MS |
71 | { |
72 | S390_lowcore.user_asce = S390_lowcore.kernel_asce; | |
457f2180 | 73 | |
beef560b | 74 | __ctl_load(S390_lowcore.user_asce, 1, 1); |
457f2180 HC |
75 | __ctl_load(S390_lowcore.user_asce, 7, 7); |
76 | } | |
77 | ||
beef560b | 78 | static inline void load_kernel_asce(void) |
457f2180 HC |
79 | { |
80 | unsigned long asce; | |
81 | ||
82 | __ctl_store(asce, 1, 1); | |
83 | if (asce != S390_lowcore.kernel_asce) | |
84 | __ctl_load(S390_lowcore.kernel_asce, 1, 1); | |
d3a73acb | 85 | set_cpu_flag(CIF_ASCE); |
02a8f3ab MS |
86 | } |
87 | ||
1da177e4 | 88 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, |
c1821c2e | 89 | struct task_struct *tsk) |
1da177e4 | 90 | { |
53e857f3 MS |
91 | int cpu = smp_processor_id(); |
92 | ||
723cacbd | 93 | S390_lowcore.user_asce = next->context.asce; |
53e857f3 MS |
94 | if (prev == next) |
95 | return; | |
64f31d58 | 96 | cpumask_set_cpu(cpu, &next->context.cpu_attach_mask); |
beef560b MS |
97 | /* Clear old ASCE by loading the kernel ASCE. */ |
98 | __ctl_load(S390_lowcore.kernel_asce, 1, 1); | |
99 | __ctl_load(S390_lowcore.kernel_asce, 7, 7); | |
64f31d58 | 100 | cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); |
53e857f3 MS |
101 | } |
102 | ||
103 | #define finish_arch_post_lock_switch finish_arch_post_lock_switch | |
104 | static inline void finish_arch_post_lock_switch(void) | |
105 | { | |
106 | struct task_struct *tsk = current; | |
107 | struct mm_struct *mm = tsk->mm; | |
108 | ||
f8b13505 MS |
109 | load_kernel_asce(); |
110 | if (mm) { | |
111 | preempt_disable(); | |
64f31d58 | 112 | while (atomic_read(&mm->context.flush_count)) |
f8b13505 | 113 | cpu_relax(); |
f14180d0 | 114 | cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); |
f8ce57a2 | 115 | __tlb_flush_mm_lazy(mm); |
f8b13505 MS |
116 | preempt_enable(); |
117 | } | |
118 | set_fs(current->thread.mm_segment); | |
1da177e4 LT |
119 | } |
120 | ||
3610cce8 | 121 | #define enter_lazy_tlb(mm,tsk) do { } while (0) |
1da177e4 LT |
122 | #define deactivate_mm(tsk,mm) do { } while (0) |
123 | ||
4448aaf0 | 124 | static inline void activate_mm(struct mm_struct *prev, |
1da177e4 LT |
125 | struct mm_struct *next) |
126 | { | |
beef560b | 127 | switch_mm(prev, next, current); |
f14180d0 | 128 | cpumask_set_cpu(smp_processor_id(), mm_cpumask(next)); |
beef560b | 129 | set_user_asce(next); |
1da177e4 LT |
130 | } |
131 | ||
0f6f281b MS |
132 | static inline void arch_dup_mmap(struct mm_struct *oldmm, |
133 | struct mm_struct *mm) | |
134 | { | |
0f6f281b MS |
135 | } |
136 | ||
137 | static inline void arch_exit_mmap(struct mm_struct *mm) | |
138 | { | |
139 | } | |
140 | ||
62e88b1c DH |
141 | static inline void arch_unmap(struct mm_struct *mm, |
142 | struct vm_area_struct *vma, | |
143 | unsigned long start, unsigned long end) | |
144 | { | |
145 | } | |
146 | ||
147 | static inline void arch_bprm_mm_init(struct mm_struct *mm, | |
148 | struct vm_area_struct *vma) | |
149 | { | |
150 | } | |
151 | ||
1b2ee126 | 152 | static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, |
d61172b4 | 153 | bool write, bool execute, bool foreign) |
33a709b2 DH |
154 | { |
155 | /* by default, allow everything */ | |
156 | return true; | |
157 | } | |
158 | ||
159 | static inline bool arch_pte_access_permitted(pte_t pte, bool write) | |
160 | { | |
161 | /* by default, allow everything */ | |
162 | return true; | |
163 | } | |
c1821c2e | 164 | #endif /* __S390_MMU_CONTEXT_H */ |