[mirror_ubuntu-artful-kernel.git] / arch / s390 / include / asm / pci_dma.h

#ifndef _ASM_S390_PCI_DMA_H
#define _ASM_S390_PCI_DMA_H

/* I/O Translation Anchor (IOTA) */
enum zpci_ioat_dtype {
	ZPCI_IOTA_STO = 0,
	ZPCI_IOTA_RTTO = 1,
	ZPCI_IOTA_RSTO = 2,
	ZPCI_IOTA_RFTO = 3,
	ZPCI_IOTA_PFAA = 4,
	ZPCI_IOTA_IOPFAA = 5,
	ZPCI_IOTA_IOPTO = 7
};

#define ZPCI_IOTA_IOT_ENABLED		0x800UL
#define ZPCI_IOTA_DT_ST			(ZPCI_IOTA_STO	<< 2)
#define ZPCI_IOTA_DT_RT			(ZPCI_IOTA_RTTO << 2)
#define ZPCI_IOTA_DT_RS			(ZPCI_IOTA_RSTO << 2)
#define ZPCI_IOTA_DT_RF			(ZPCI_IOTA_RFTO << 2)
#define ZPCI_IOTA_DT_PF			(ZPCI_IOTA_PFAA << 2)
#define ZPCI_IOTA_FS_4K			0
#define ZPCI_IOTA_FS_1M			1
#define ZPCI_IOTA_FS_2G			2
#define ZPCI_KEY			(PAGE_DEFAULT_KEY << 5)

#define ZPCI_TABLE_SIZE_RT	(1UL << 42)

#define ZPCI_IOTA_STO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_ST)
#define ZPCI_IOTA_RTTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RT)
#define ZPCI_IOTA_RSTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RS)
#define ZPCI_IOTA_RFTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RF)
#define ZPCI_IOTA_RFAA_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_PF | ZPCI_IOTA_FS_2G)

/* I/O Region and segment tables */
#define ZPCI_INDEX_MASK			0x7ffUL

#define ZPCI_TABLE_TYPE_MASK		0xc
#define ZPCI_TABLE_TYPE_RFX		0xc
#define ZPCI_TABLE_TYPE_RSX		0x8
#define ZPCI_TABLE_TYPE_RTX		0x4
#define ZPCI_TABLE_TYPE_SX		0x0

#define ZPCI_TABLE_LEN_RFX		0x3
#define ZPCI_TABLE_LEN_RSX		0x3
#define ZPCI_TABLE_LEN_RTX		0x3

#define ZPCI_TABLE_OFFSET_MASK		0xc0
#define ZPCI_TABLE_SIZE			0x4000
#define ZPCI_TABLE_ALIGN		ZPCI_TABLE_SIZE
#define ZPCI_TABLE_ENTRY_SIZE		(sizeof(unsigned long))
#define ZPCI_TABLE_ENTRIES		(ZPCI_TABLE_SIZE / ZPCI_TABLE_ENTRY_SIZE)

#define ZPCI_TABLE_BITS			11
#define ZPCI_PT_BITS			8
#define ZPCI_ST_SHIFT			(ZPCI_PT_BITS + PAGE_SHIFT)
#define ZPCI_RT_SHIFT			(ZPCI_ST_SHIFT + ZPCI_TABLE_BITS)

#define ZPCI_RTE_FLAG_MASK		0x3fffUL
#define ZPCI_RTE_ADDR_MASK		(~ZPCI_RTE_FLAG_MASK)
#define ZPCI_STE_FLAG_MASK		0x7ffUL
#define ZPCI_STE_ADDR_MASK		(~ZPCI_STE_FLAG_MASK)

/* I/O Page tables */
#define ZPCI_PTE_VALID_MASK		0x400
#define ZPCI_PTE_INVALID		0x400
#define ZPCI_PTE_VALID			0x000
#define ZPCI_PT_SIZE			0x800
#define ZPCI_PT_ALIGN			ZPCI_PT_SIZE
#define ZPCI_PT_ENTRIES			(ZPCI_PT_SIZE / ZPCI_TABLE_ENTRY_SIZE)
#define ZPCI_PT_MASK			(ZPCI_PT_ENTRIES - 1)

#define ZPCI_PTE_FLAG_MASK		0xfffUL
#define ZPCI_PTE_ADDR_MASK		(~ZPCI_PTE_FLAG_MASK)

/* Shared bits */
#define ZPCI_TABLE_VALID		0x00
#define ZPCI_TABLE_INVALID		0x20
#define ZPCI_TABLE_PROTECTED		0x200
#define ZPCI_TABLE_UNPROTECTED		0x000

#define ZPCI_TABLE_VALID_MASK		0x20
#define ZPCI_TABLE_PROT_MASK		0x200

static inline unsigned int calc_rtx(dma_addr_t ptr)
{
	return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
}

static inline unsigned int calc_sx(dma_addr_t ptr)
{
	return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
}

static inline unsigned int calc_px(dma_addr_t ptr)
{
	return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
}

static inline void set_pt_pfaa(unsigned long *entry, void *pfaa)
{
	*entry &= ZPCI_PTE_FLAG_MASK;
	*entry |= ((unsigned long) pfaa & ZPCI_PTE_ADDR_MASK);
}

static inline void set_rt_sto(unsigned long *entry, void *sto)
{
	*entry &= ZPCI_RTE_FLAG_MASK;
	*entry |= ((unsigned long) sto & ZPCI_RTE_ADDR_MASK);
	*entry |= ZPCI_TABLE_TYPE_RTX;
}

static inline void set_st_pto(unsigned long *entry, void *pto)
{
	*entry &= ZPCI_STE_FLAG_MASK;
	*entry |= ((unsigned long) pto & ZPCI_STE_ADDR_MASK);
	*entry |= ZPCI_TABLE_TYPE_SX;
}

static inline void validate_rt_entry(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_VALID_MASK;
	*entry &= ~ZPCI_TABLE_OFFSET_MASK;
	*entry |= ZPCI_TABLE_VALID;
	*entry |= ZPCI_TABLE_LEN_RTX;
}

static inline void validate_st_entry(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_VALID_MASK;
	*entry |= ZPCI_TABLE_VALID;
}

static inline void invalidate_table_entry(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_VALID_MASK;
	*entry |= ZPCI_TABLE_INVALID;
}

static inline void invalidate_pt_entry(unsigned long *entry)
{
	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_INVALID);
	*entry &= ~ZPCI_PTE_VALID_MASK;
	*entry |= ZPCI_PTE_INVALID;
}

static inline void validate_pt_entry(unsigned long *entry)
{
	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID);
	*entry &= ~ZPCI_PTE_VALID_MASK;
	*entry |= ZPCI_PTE_VALID;
}

static inline void entry_set_protected(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_PROT_MASK;
	*entry |= ZPCI_TABLE_PROTECTED;
}

static inline void entry_clr_protected(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_PROT_MASK;
	*entry |= ZPCI_TABLE_UNPROTECTED;
}

static inline int reg_entry_isvalid(unsigned long entry)
{
	return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
}

static inline int pt_entry_isvalid(unsigned long entry)
{
	return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
}

static inline int entry_isprotected(unsigned long entry)
{
	return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED;
}

static inline unsigned long *get_rt_sto(unsigned long entry)
{
	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
		? (unsigned long *) (entry & ZPCI_RTE_ADDR_MASK)
		: NULL;
}

static inline unsigned long *get_st_pto(unsigned long entry)
{
	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
		? (unsigned long *) (entry & ZPCI_STE_ADDR_MASK)
		: NULL;
}

/* Prototypes */
int zpci_dma_init_device(struct zpci_dev *);
void zpci_dma_exit_device(struct zpci_dev *);
void dma_free_seg_table(unsigned long);
unsigned long *dma_alloc_cpu_table(void);
void dma_cleanup_tables(unsigned long *);
unsigned long *dma_walk_cpu_trans(unsigned long *rto, dma_addr_t dma_addr);
void dma_update_cpu_trans(unsigned long *entry, void *page_addr, int flags);

#endif
Commit	Line	Data
828b35f6 JG	1	#ifndef _ASM_S390_PCI_DMA_H
	2	#define _ASM_S390_PCI_DMA_H
	3
	4	/* I/O Translation Anchor (IOTA) */
	5	enum zpci_ioat_dtype {
	6	ZPCI_IOTA_STO = 0,
	7	ZPCI_IOTA_RTTO = 1,
	8	ZPCI_IOTA_RSTO = 2,
	9	ZPCI_IOTA_RFTO = 3,
	10	ZPCI_IOTA_PFAA = 4,
	11	ZPCI_IOTA_IOPFAA = 5,
	12	ZPCI_IOTA_IOPTO = 7
	13	};
	14
	15	#define ZPCI_IOTA_IOT_ENABLED 0x800UL
	16	#define ZPCI_IOTA_DT_ST (ZPCI_IOTA_STO << 2)
	17	#define ZPCI_IOTA_DT_RT (ZPCI_IOTA_RTTO << 2)
	18	#define ZPCI_IOTA_DT_RS (ZPCI_IOTA_RSTO << 2)
	19	#define ZPCI_IOTA_DT_RF (ZPCI_IOTA_RFTO << 2)
	20	#define ZPCI_IOTA_DT_PF (ZPCI_IOTA_PFAA << 2)
	21	#define ZPCI_IOTA_FS_4K 0
	22	#define ZPCI_IOTA_FS_1M 1
	23	#define ZPCI_IOTA_FS_2G 2
	24	#define ZPCI_KEY (PAGE_DEFAULT_KEY << 5)
	25
69eea95c GS	26	#define ZPCI_TABLE_SIZE_RT (1UL << 42)
69eea95c GS	27
828b35f6 JG	28	#define ZPCI_IOTA_STO_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_ST)
	29	#define ZPCI_IOTA_RTTO_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_RT)
	30	#define ZPCI_IOTA_RSTO_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_RS)
	31	#define ZPCI_IOTA_RFTO_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_RF)
	32	#define ZPCI_IOTA_RFAA_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_PF \| ZPCI_IOTA_FS_2G)
	33
	34	/* I/O Region and segment tables */
	35	#define ZPCI_INDEX_MASK 0x7ffUL
	36
	37	#define ZPCI_TABLE_TYPE_MASK 0xc
	38	#define ZPCI_TABLE_TYPE_RFX 0xc
	39	#define ZPCI_TABLE_TYPE_RSX 0x8
	40	#define ZPCI_TABLE_TYPE_RTX 0x4
	41	#define ZPCI_TABLE_TYPE_SX 0x0
	42
	43	#define ZPCI_TABLE_LEN_RFX 0x3
	44	#define ZPCI_TABLE_LEN_RSX 0x3
	45	#define ZPCI_TABLE_LEN_RTX 0x3
	46
	47	#define ZPCI_TABLE_OFFSET_MASK 0xc0
	48	#define ZPCI_TABLE_SIZE 0x4000
	49	#define ZPCI_TABLE_ALIGN ZPCI_TABLE_SIZE
	50	#define ZPCI_TABLE_ENTRY_SIZE (sizeof(unsigned long))
	51	#define ZPCI_TABLE_ENTRIES (ZPCI_TABLE_SIZE / ZPCI_TABLE_ENTRY_SIZE)
	52
	53	#define ZPCI_TABLE_BITS 11
	54	#define ZPCI_PT_BITS 8
	55	#define ZPCI_ST_SHIFT (ZPCI_PT_BITS + PAGE_SHIFT)
	56	#define ZPCI_RT_SHIFT (ZPCI_ST_SHIFT + ZPCI_TABLE_BITS)
	57
	58	#define ZPCI_RTE_FLAG_MASK 0x3fffUL
	59	#define ZPCI_RTE_ADDR_MASK (~ZPCI_RTE_FLAG_MASK)
	60	#define ZPCI_STE_FLAG_MASK 0x7ffUL
	61	#define ZPCI_STE_ADDR_MASK (~ZPCI_STE_FLAG_MASK)
	62
	63	/* I/O Page tables */
	64	#define ZPCI_PTE_VALID_MASK 0x400
	65	#define ZPCI_PTE_INVALID 0x400
	66	#define ZPCI_PTE_VALID 0x000
	67	#define ZPCI_PT_SIZE 0x800
	68	#define ZPCI_PT_ALIGN ZPCI_PT_SIZE
	69	#define ZPCI_PT_ENTRIES (ZPCI_PT_SIZE / ZPCI_TABLE_ENTRY_SIZE)
	70	#define ZPCI_PT_MASK (ZPCI_PT_ENTRIES - 1)
	71
	72	#define ZPCI_PTE_FLAG_MASK 0xfffUL
	73	#define ZPCI_PTE_ADDR_MASK (~ZPCI_PTE_FLAG_MASK)
	74
	75	/* Shared bits */
	76	#define ZPCI_TABLE_VALID 0x00
	77	#define ZPCI_TABLE_INVALID 0x20
	78	#define ZPCI_TABLE_PROTECTED 0x200
	79	#define ZPCI_TABLE_UNPROTECTED 0x000
	80
	81	#define ZPCI_TABLE_VALID_MASK 0x20
	82	#define ZPCI_TABLE_PROT_MASK 0x200
	83
	84	static inline unsigned int calc_rtx(dma_addr_t ptr)
	85	{
	86	return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
	87	}
	88
	89	static inline unsigned int calc_sx(dma_addr_t ptr)
	90	{
	91	return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
92	}
93
94	static inline unsigned int calc_px(dma_addr_t ptr)
95	{
96	return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
97	}
98
99	static inline void set_pt_pfaa(unsigned long entry, void pfaa)
100	{
101	*entry &= ZPCI_PTE_FLAG_MASK;
102	*entry \|= ((unsigned long) pfaa & ZPCI_PTE_ADDR_MASK);
103	}
104
105	static inline void set_rt_sto(unsigned long entry, void sto)
106	{
107	*entry &= ZPCI_RTE_FLAG_MASK;
108	*entry \|= ((unsigned long) sto & ZPCI_RTE_ADDR_MASK);
109	*entry \|= ZPCI_TABLE_TYPE_RTX;
110	}
111
112	static inline void set_st_pto(unsigned long entry, void pto)
113	{
114	*entry &= ZPCI_STE_FLAG_MASK;
115	*entry \|= ((unsigned long) pto & ZPCI_STE_ADDR_MASK);
116	*entry \|= ZPCI_TABLE_TYPE_SX;
117	}
118
119	static inline void validate_rt_entry(unsigned long *entry)
120	{
121	*entry &= ~ZPCI_TABLE_VALID_MASK;
122	*entry &= ~ZPCI_TABLE_OFFSET_MASK;
123	*entry \|= ZPCI_TABLE_VALID;
124	*entry \|= ZPCI_TABLE_LEN_RTX;
125	}
126
127	static inline void validate_st_entry(unsigned long *entry)
128	{
129	*entry &= ~ZPCI_TABLE_VALID_MASK;
130	*entry \|= ZPCI_TABLE_VALID;
131	}
132
133	static inline void invalidate_table_entry(unsigned long *entry)
134	{
135	*entry &= ~ZPCI_TABLE_VALID_MASK;
136	*entry \|= ZPCI_TABLE_INVALID;
137	}
138
139	static inline void invalidate_pt_entry(unsigned long *entry)
140	{
141	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_INVALID);
142	*entry &= ~ZPCI_PTE_VALID_MASK;
143	*entry \|= ZPCI_PTE_INVALID;
144	}
145
146	static inline void validate_pt_entry(unsigned long *entry)
147	{
148	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID);
149	*entry &= ~ZPCI_PTE_VALID_MASK;
150	*entry \|= ZPCI_PTE_VALID;
151	}
152
153	static inline void entry_set_protected(unsigned long *entry)
154	{
155	*entry &= ~ZPCI_TABLE_PROT_MASK;
156	*entry \|= ZPCI_TABLE_PROTECTED;
157	}
158
159	static inline void entry_clr_protected(unsigned long *entry)
160	{
161	*entry &= ~ZPCI_TABLE_PROT_MASK;
162	*entry \|= ZPCI_TABLE_UNPROTECTED;
163	}
164
165	static inline int reg_entry_isvalid(unsigned long entry)
166	{
167	return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
168	}
169
170	static inline int pt_entry_isvalid(unsigned long entry)
171	{
172	return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
173	}
174
175	static inline int entry_isprotected(unsigned long entry)
176	{
177	return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED;
178	}
179
180	static inline unsigned long *get_rt_sto(unsigned long entry)
181	{
182	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
183	? (unsigned long *) (entry & ZPCI_RTE_ADDR_MASK)
184	: NULL;
185	}
186
187	static inline unsigned long *get_st_pto(unsigned long entry)
188	{
189	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
190	? (unsigned long *) (entry & ZPCI_STE_ADDR_MASK)
191	: NULL;
192	}
193
194	/* Prototypes */
195	int zpci_dma_init_device(struct zpci_dev *);
196	void zpci_dma_exit_device(struct zpci_dev *);
8128f23c GS	197	void dma_free_seg_table(unsigned long);
	198	unsigned long *dma_alloc_cpu_table(void);
	199	void dma_cleanup_tables(unsigned long *);
66728eee SO	200	unsigned long dma_walk_cpu_trans(unsigned long rto, dma_addr_t dma_addr);
	201	void dma_update_cpu_trans(unsigned long entry, void page_addr, int flags);
	202
828b35f6	203	#endif