[mirror_ubuntu-bionic-kernel.git] / arch / s390 / include / asm / ptrace.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 *  S390 version
 *    Copyright IBM Corp. 1999, 2000
 *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
 */
#ifndef _S390_PTRACE_H
#define _S390_PTRACE_H

#include <linux/const.h>
#include <uapi/asm/ptrace.h>

#define PIF_SYSCALL		0	/* inside a system call */
#define PIF_PER_TRAP		1	/* deliver sigtrap on return to user */
#define PIF_SYSCALL_RESTART	2	/* restart the current system call */
#define PIF_GUEST_FAULT		3	/* indicates program check in sie64a */

#define _PIF_SYSCALL		_BITUL(PIF_SYSCALL)
#define _PIF_PER_TRAP		_BITUL(PIF_PER_TRAP)
#define _PIF_SYSCALL_RESTART	_BITUL(PIF_SYSCALL_RESTART)
#define _PIF_GUEST_FAULT	_BITUL(PIF_GUEST_FAULT)

#ifndef __ASSEMBLY__

#define PSW_KERNEL_BITS	(PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
			 PSW_MASK_EA | PSW_MASK_BA)
#define PSW_USER_BITS	(PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
			 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
			 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)

struct psw_bits {
	unsigned long	     :	1;
	unsigned long per    :	1; /* PER-Mask */
	unsigned long	     :	3;
	unsigned long dat    :	1; /* DAT Mode */
	unsigned long io     :	1; /* Input/Output Mask */
	unsigned long ext    :	1; /* External Mask */
	unsigned long key    :	4; /* PSW Key */
	unsigned long	     :	1;
	unsigned long mcheck :	1; /* Machine-Check Mask */
	unsigned long wait   :	1; /* Wait State */
	unsigned long pstate :	1; /* Problem State */
	unsigned long as     :	2; /* Address Space Control */
	unsigned long cc     :	2; /* Condition Code */
	unsigned long pm     :	4; /* Program Mask */
	unsigned long ri     :	1; /* Runtime Instrumentation */
	unsigned long	     :	6;
	unsigned long eaba   :	2; /* Addressing Mode */
	unsigned long	     : 31;
	unsigned long ia     : 64; /* Instruction Address */
};

enum {
	PSW_BITS_AMODE_24BIT = 0,
	PSW_BITS_AMODE_31BIT = 1,
	PSW_BITS_AMODE_64BIT = 3
};

enum {
	PSW_BITS_AS_PRIMARY	= 0,
	PSW_BITS_AS_ACCREG	= 1,
	PSW_BITS_AS_SECONDARY	= 2,
	PSW_BITS_AS_HOME	= 3
};

#define psw_bits(__psw) (*({			\
	typecheck(psw_t, __psw);		\
	&(*(struct psw_bits *)(&(__psw)));	\
}))

/*
 * The pt_regs struct defines the way the registers are stored on
 * the stack during a system call.
 */
struct pt_regs 
{
	union {
		user_pt_regs user_regs;
		struct {
			unsigned long args[1];
			psw_t psw;
			unsigned long gprs[NUM_GPRS];
		};
	};
	unsigned long orig_gpr2;
	unsigned int int_code;
	unsigned int int_parm;
	unsigned long int_parm_long;
	unsigned long flags;
};

/*
 * Program event recording (PER) register set.
 */
struct per_regs {
	unsigned long control;		/* PER control bits */
	unsigned long start;		/* PER starting address */
	unsigned long end;		/* PER ending address */
};

/*
 * PER event contains information about the cause of the last PER exception.
 */
struct per_event {
	unsigned short cause;		/* PER code, ATMID and AI */
	unsigned long address;		/* PER address */
	unsigned char paid;		/* PER access identification */
};

/*
 * Simplified per_info structure used to decode the ptrace user space ABI.
 */
struct per_struct_kernel {
	unsigned long cr9;		/* PER control bits */
	unsigned long cr10;		/* PER starting address */
	unsigned long cr11;		/* PER ending address */
	unsigned long bits;		/* Obsolete software bits */
	unsigned long starting_addr;	/* User specified start address */
	unsigned long ending_addr;	/* User specified end address */
	unsigned short perc_atmid;	/* PER trap ATMID */
	unsigned long address;		/* PER trap instruction address */
	unsigned char access_id;	/* PER trap access identification */
};

#define PER_EVENT_MASK			0xEB000000UL

#define PER_EVENT_BRANCH		0x80000000UL
#define PER_EVENT_IFETCH		0x40000000UL
#define PER_EVENT_STORE			0x20000000UL
#define PER_EVENT_STORE_REAL		0x08000000UL
#define PER_EVENT_TRANSACTION_END	0x02000000UL
#define PER_EVENT_NULLIFICATION		0x01000000UL

#define PER_CONTROL_MASK		0x00e00000UL

#define PER_CONTROL_BRANCH_ADDRESS	0x00800000UL
#define PER_CONTROL_SUSPENSION		0x00400000UL
#define PER_CONTROL_ALTERATION		0x00200000UL

static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
{
	regs->flags |= (1UL << flag);
}

static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
{
	regs->flags &= ~(1UL << flag);
}

static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
{
	return !!(regs->flags & (1UL << flag));
}

/*
 * These are defined as per linux/ptrace.h, which see.
 */
#define arch_has_single_step()	(1)
#define arch_has_block_step()	(1)

#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
#define instruction_pointer(regs) ((regs)->psw.addr)
#define user_stack_pointer(regs)((regs)->gprs[15])
#define profile_pc(regs) instruction_pointer(regs)

static inline long regs_return_value(struct pt_regs *regs)
{
	return regs->gprs[2];
}

static inline void instruction_pointer_set(struct pt_regs *regs,
					   unsigned long val)
{
	regs->psw.addr = val;
}

int regs_query_register_offset(const char *name);
const char *regs_query_register_name(unsigned int offset);
unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);

static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
{
	return regs->gprs[15];
}

#endif /* __ASSEMBLY__ */
#endif /* _S390_PTRACE_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4	2	/*
1da177e4	3	* S390 version
a53c8fab	4	* Copyright IBM Corp. 1999, 2000
1da177e4 LT	5	* Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
1da177e4 LT	6	*/
1da177e4 LT	7	#ifndef _S390_PTRACE_H
	8	#define _S390_PTRACE_H
	9
92778b99	10	#include <linux/const.h>
9807f759	11	#include <uapi/asm/ptrace.h>
1da177e4	12
d3a73acb MS	13	#define PIF_SYSCALL 0 /* inside a system call */
d3a73acb MS	14	#define PIF_PER_TRAP 1 /* deliver sigtrap on return to user */
23fefe11	15	#define PIF_SYSCALL_RESTART 2 /* restart the current system call */
c771320e	16	#define PIF_GUEST_FAULT 3 /* indicates program check in sie64a */
d3a73acb	17
92778b99 HC	18	#define _PIF_SYSCALL _BITUL(PIF_SYSCALL)
92778b99 HC	19	#define _PIF_PER_TRAP _BITUL(PIF_PER_TRAP)
23fefe11	20	#define _PIF_SYSCALL_RESTART _BITUL(PIF_SYSCALL_RESTART)
c771320e	21	#define _PIF_GUEST_FAULT _BITUL(PIF_GUEST_FAULT)
d3a73acb	22
1da177e4	23	#ifndef __ASSEMBLY__
63dd9b44	24
e258d719 MS	25	#define PSW_KERNEL_BITS (PSW_DEFAULT_KEY \| PSW_MASK_BASE \| PSW_ASC_HOME \| \
	26	PSW_MASK_EA \| PSW_MASK_BA)
	27	#define PSW_USER_BITS (PSW_MASK_DAT \| PSW_MASK_IO \| PSW_MASK_EXT \| \
	28	PSW_DEFAULT_KEY \| PSW_MASK_BASE \| PSW_MASK_MCHECK \| \
	29	PSW_MASK_PSTATE \| PSW_ASC_PRIMARY)
274f5946	30
1365632b	31	struct psw_bits {
a7525982 HC	32	unsigned long : 1;
	33	unsigned long per : 1; /* PER-Mask */
	34	unsigned long : 3;
	35	unsigned long dat : 1; /* DAT Mode */
	36	unsigned long io : 1; /* Input/Output Mask */
	37	unsigned long ext : 1; /* External Mask */
	38	unsigned long key : 4; /* PSW Key */
	39	unsigned long : 1;
	40	unsigned long mcheck : 1; /* Machine-Check Mask */
	41	unsigned long wait : 1; /* Wait State */
	42	unsigned long pstate : 1; /* Problem State */
	43	unsigned long as : 2; /* Address Space Control */
	44	unsigned long cc : 2; /* Condition Code */
	45	unsigned long pm : 4; /* Program Mask */
	46	unsigned long ri : 1; /* Runtime Instrumentation */
	47	unsigned long : 6;
	48	unsigned long eaba : 2; /* Addressing Mode */
	49	unsigned long : 31;
	50	unsigned long ia : 64; /* Instruction Address */
1365632b HC	51	};
	52
	53	enum {
8bb3fdd6 HC	54	PSW_BITS_AMODE_24BIT = 0,
	55	PSW_BITS_AMODE_31BIT = 1,
	56	PSW_BITS_AMODE_64BIT = 3
1365632b HC	57	};
	58
	59	enum {
8bb3fdd6 HC	60	PSW_BITS_AS_PRIMARY = 0,
	61	PSW_BITS_AS_ACCREG = 1,
	62	PSW_BITS_AS_SECONDARY = 2,
	63	PSW_BITS_AS_HOME = 3
1365632b HC	64	};
	65
	66	#define psw_bits(__psw) (*({ \
	67	typecheck(psw_t, __psw); \
	68	&((struct psw_bits )(&(__psw))); \
	69	}))
	70
1da177e4 LT	71	/*
	72	* The pt_regs struct defines the way the registers are stored on
	73	* the stack during a system call.
	74	*/
	75	struct pt_regs
	76	{
466698e6 HB	77	union {
	78	user_pt_regs user_regs;
	79	struct {
	80	unsigned long args[1];
	81	psw_t psw;
	82	unsigned long gprs[NUM_GPRS];
	83	};
	84	};
1da177e4	85	unsigned long orig_gpr2;
aa33c8cb	86	unsigned int int_code;
48f6b00c	87	unsigned int int_parm;
aa33c8cb	88	unsigned long int_parm_long;
d3a73acb	89	unsigned long flags;
1da177e4	90	};
5e9a2692 MS	91
	92	/*
	93	* Program event recording (PER) register set.
	94	*/
	95	struct per_regs {
	96	unsigned long control; /* PER control bits */
	97	unsigned long start; /* PER starting address */
	98	unsigned long end; /* PER ending address */
	99	};
	100
	101	/*
	102	* PER event contains information about the cause of the last PER exception.
	103	*/
	104	struct per_event {
	105	unsigned short cause; /* PER code, ATMID and AI */
	106	unsigned long address; /* PER address */
	107	unsigned char paid; /* PER access identification */
	108	};
	109
	110	/*
	111	* Simplified per_info structure used to decode the ptrace user space ABI.
	112	*/
	113	struct per_struct_kernel {
	114	unsigned long cr9; /* PER control bits */
	115	unsigned long cr10; /* PER starting address */
	116	unsigned long cr11; /* PER ending address */
	117	unsigned long bits; /* Obsolete software bits */
	118	unsigned long starting_addr; /* User specified start address */
	119	unsigned long ending_addr; /* User specified end address */
	120	unsigned short perc_atmid; /* PER trap ATMID */
	121	unsigned long address; /* PER trap instruction address */
	122	unsigned char access_id; /* PER trap access identification */
	123	};
	124
d35339a4	125	#define PER_EVENT_MASK 0xEB000000UL
5e9a2692 MS	126
	127	#define PER_EVENT_BRANCH 0x80000000UL
	128	#define PER_EVENT_IFETCH 0x40000000UL
	129	#define PER_EVENT_STORE 0x20000000UL
	130	#define PER_EVENT_STORE_REAL 0x08000000UL
d35339a4	131	#define PER_EVENT_TRANSACTION_END 0x02000000UL
5e9a2692 MS	132	#define PER_EVENT_NULLIFICATION 0x01000000UL
5e9a2692 MS	133
d35339a4	134	#define PER_CONTROL_MASK 0x00e00000UL
5e9a2692 MS	135
5e9a2692 MS	136	#define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
d35339a4	137	#define PER_CONTROL_SUSPENSION 0x00400000UL
5e9a2692 MS	138	#define PER_CONTROL_ALTERATION 0x00200000UL
5e9a2692 MS	139
d3a73acb MS	140	static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
d3a73acb MS	141	{
ac25e790	142	regs->flags \|= (1UL << flag);
d3a73acb MS	143	}
	144
	145	static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
	146	{
ac25e790	147	regs->flags &= ~(1UL << flag);
d3a73acb MS	148	}
	149
	150	static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
	151	{
ac25e790	152	return !!(regs->flags & (1UL << flag));
d3a73acb MS	153	}
d3a73acb MS	154
0ac30be4 RM	155	/*
	156	* These are defined as per linux/ptrace.h, which see.
	157	*/
	158	#define arch_has_single_step() (1)
818a330c	159	#define arch_has_block_step() (1)
0ac30be4	160
1da177e4	161	#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
9cb1ccec	162	#define instruction_pointer(regs) ((regs)->psw.addr)
753c4dd6	163	#define user_stack_pointer(regs)((regs)->gprs[15])
1da177e4	164	#define profile_pc(regs) instruction_pointer(regs)
952974ac	165
d7e7528b EP	166	static inline long regs_return_value(struct pt_regs *regs)
	167	{
	168	return regs->gprs[2];
	169	}
	170
2a0a5b22 JW	171	static inline void instruction_pointer_set(struct pt_regs *regs,
	172	unsigned long val)
	173	{
fecc868a	174	regs->psw.addr = val;
2a0a5b22 JW	175	}
2a0a5b22 JW	176
952974ac HC	177	int regs_query_register_offset(const char *name);
	178	const char *regs_query_register_name(unsigned int offset);
	179	unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
	180	unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
	181
	182	static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
	183	{
9cb1ccec	184	return regs->gprs[15];
952974ac HC	185	}
952974ac HC	186
1da177e4	187	#endif /* __ASSEMBLY__ */
1da177e4	188	#endif /* _S390_PTRACE_H */