[mirror_ubuntu-artful-kernel.git] / arch / s390 / include / asm / sigp.h

#ifndef __S390_ASM_SIGP_H
#define __S390_ASM_SIGP_H

/* SIGP order codes */
#define SIGP_SENSE		      1
#define SIGP_EXTERNAL_CALL	      2
#define SIGP_EMERGENCY_SIGNAL	      3
#define SIGP_START		      4
#define SIGP_STOP		      5
#define SIGP_RESTART		      6
#define SIGP_STOP_AND_STORE_STATUS    9
#define SIGP_INITIAL_CPU_RESET	     11
#define SIGP_CPU_RESET		     12
#define SIGP_SET_PREFIX		     13
#define SIGP_STORE_STATUS_AT_ADDRESS 14
#define SIGP_SET_ARCHITECTURE	     18
#define SIGP_COND_EMERGENCY_SIGNAL   19
#define SIGP_SENSE_RUNNING	     21
#define SIGP_SET_MULTI_THREADING     22
#define SIGP_STORE_ADDITIONAL_STATUS 23

/* SIGP condition codes */
#define SIGP_CC_ORDER_CODE_ACCEPTED 0
#define SIGP_CC_STATUS_STORED	    1
#define SIGP_CC_BUSY		    2
#define SIGP_CC_NOT_OPERATIONAL	    3

/* SIGP cpu status bits */

#define SIGP_STATUS_INVALID_ORDER	0x00000002UL
#define SIGP_STATUS_CHECK_STOP		0x00000010UL
#define SIGP_STATUS_STOPPED		0x00000040UL
#define SIGP_STATUS_EXT_CALL_PENDING	0x00000080UL
#define SIGP_STATUS_INVALID_PARAMETER	0x00000100UL
#define SIGP_STATUS_INCORRECT_STATE	0x00000200UL
#define SIGP_STATUS_NOT_RUNNING		0x00000400UL

#ifndef __ASSEMBLY__

static inline int ____pcpu_sigp(u16 addr, u8 order, unsigned long parm,
				u32 *status)
{
	register unsigned long reg1 asm ("1") = parm;
	int cc;

	asm volatile(
		"	sigp	%1,%2,0(%3)\n"
		"	ipm	%0\n"
		"	srl	%0,28\n"
		: "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
	*status = reg1;
	return cc;
}

static inline int __pcpu_sigp(u16 addr, u8 order, unsigned long parm,
			      u32 *status)
{
	u32 _status;
	int cc;

	cc = ____pcpu_sigp(addr, order, parm, &_status);
	if (status && cc == 1)
		*status = _status;
	return cc;
}

#endif /* __ASSEMBLY__ */

#endif /* __S390_ASM_SIGP_H */
Commit	Line	Data
9b747530 HC	1	#ifndef __S390_ASM_SIGP_H
	2	#define __S390_ASM_SIGP_H
	3
	4	/* SIGP order codes */
	5	#define SIGP_SENSE 1
	6	#define SIGP_EXTERNAL_CALL 2
	7	#define SIGP_EMERGENCY_SIGNAL 3
58bc33b2	8	#define SIGP_START 4
9b747530 HC	9	#define SIGP_STOP 5
	10	#define SIGP_RESTART 6
	11	#define SIGP_STOP_AND_STORE_STATUS 9
	12	#define SIGP_INITIAL_CPU_RESET 11
b8983830	13	#define SIGP_CPU_RESET 12
9b747530 HC	14	#define SIGP_SET_PREFIX 13
	15	#define SIGP_STORE_STATUS_AT_ADDRESS 14
	16	#define SIGP_SET_ARCHITECTURE 18
b13d3580	17	#define SIGP_COND_EMERGENCY_SIGNAL 19
9b747530	18	#define SIGP_SENSE_RUNNING 21
10ad34bc	19	#define SIGP_SET_MULTI_THREADING 22
a62bc073	20	#define SIGP_STORE_ADDITIONAL_STATUS 23
9b747530 HC	21
	22	/* SIGP condition codes */
	23	#define SIGP_CC_ORDER_CODE_ACCEPTED 0
	24	#define SIGP_CC_STATUS_STORED 1
	25	#define SIGP_CC_BUSY 2
	26	#define SIGP_CC_NOT_OPERATIONAL 3
	27
	28	/* SIGP cpu status bits */
	29
bd50e8ec	30	#define SIGP_STATUS_INVALID_ORDER 0x00000002UL
9b747530 HC	31	#define SIGP_STATUS_CHECK_STOP 0x00000010UL
9b747530 HC	32	#define SIGP_STATUS_STOPPED 0x00000040UL
21b26c08	33	#define SIGP_STATUS_EXT_CALL_PENDING 0x00000080UL
9b747530 HC	34	#define SIGP_STATUS_INVALID_PARAMETER 0x00000100UL
	35	#define SIGP_STATUS_INCORRECT_STATE 0x00000200UL
	36	#define SIGP_STATUS_NOT_RUNNING 0x00000400UL
	37
e7c46c66 HC	38	#ifndef __ASSEMBLY__
e7c46c66 HC	39
80a60f6e HC	40	static inline int ____pcpu_sigp(u16 addr, u8 order, unsigned long parm,
80a60f6e HC	41	u32 *status)
e7c46c66	42	{
a62bc073	43	register unsigned long reg1 asm ("1") = parm;
e7c46c66 HC	44	int cc;
	45
	46	asm volatile(
	47	" sigp %1,%2,0(%3)\n"
	48	" ipm %0\n"
	49	" srl %0,28\n"
	50	: "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
80a60f6e HC	51	*status = reg1;
	52	return cc;
	53	}
	54
	55	static inline int __pcpu_sigp(u16 addr, u8 order, unsigned long parm,
	56	u32 *status)
	57	{
	58	u32 _status;
	59	int cc;
	60
	61	cc = ____pcpu_sigp(addr, order, parm, &_status);
e7c46c66	62	if (status && cc == 1)
80a60f6e	63	*status = _status;
e7c46c66 HC	64	return cc;
	65	}
	66
	67	#endif /* __ASSEMBLY__ */
	68
9b747530	69	#endif /* __S390_ASM_SIGP_H */