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1da177e4 LT |
1 | #ifndef _S390_TLBFLUSH_H |
2 | #define _S390_TLBFLUSH_H | |
3 | ||
1da177e4 | 4 | #include <linux/mm.h> |
53492b1d | 5 | #include <linux/sched.h> |
1da177e4 | 6 | #include <asm/processor.h> |
c1821c2e | 7 | #include <asm/pgalloc.h> |
1da177e4 LT |
8 | |
9 | /* | |
ba8a9229 | 10 | * Flush all tlb entries on the local cpu. |
1da177e4 | 11 | */ |
ba8a9229 | 12 | static inline void __tlb_flush_local(void) |
1da177e4 | 13 | { |
ba8a9229 | 14 | asm volatile("ptlb" : : : "memory"); |
1da177e4 | 15 | } |
1da177e4 | 16 | |
374b8f45 | 17 | #ifdef CONFIG_SMP |
ba8a9229 MS |
18 | /* |
19 | * Flush all tlb entries on all cpus. | |
20 | */ | |
a806170e HC |
21 | void smp_ptlb_all(void); |
22 | ||
ba8a9229 | 23 | static inline void __tlb_flush_global(void) |
1da177e4 | 24 | { |
94c12cc7 MS |
25 | register unsigned long reg2 asm("2"); |
26 | register unsigned long reg3 asm("3"); | |
27 | register unsigned long reg4 asm("4"); | |
28 | long dummy; | |
29 | ||
1da177e4 LT |
30 | #ifndef __s390x__ |
31 | if (!MACHINE_HAS_CSP) { | |
32 | smp_ptlb_all(); | |
33 | return; | |
34 | } | |
35 | #endif /* __s390x__ */ | |
94c12cc7 MS |
36 | |
37 | dummy = 0; | |
38 | reg2 = reg3 = 0; | |
39 | reg4 = ((unsigned long) &dummy) + 1; | |
40 | asm volatile( | |
41 | " csp %0,%2" | |
42 | : : "d" (reg2), "d" (reg3), "d" (reg4), "m" (dummy) : "cc" ); | |
1da177e4 LT |
43 | } |
44 | ||
374b8f45 MS |
45 | static inline void __tlb_flush_full(struct mm_struct *mm) |
46 | { | |
47 | cpumask_t local_cpumask; | |
48 | ||
49 | preempt_disable(); | |
50 | /* | |
51 | * If the process only ran on the local cpu, do a local flush. | |
52 | */ | |
0f1959f5 | 53 | cpumask_copy(&local_cpumask, cpumask_of(smp_processor_id())); |
005f8eee | 54 | if (cpumask_equal(mm_cpumask(mm), &local_cpumask)) |
374b8f45 MS |
55 | __tlb_flush_local(); |
56 | else | |
57 | __tlb_flush_global(); | |
58 | preempt_enable(); | |
59 | } | |
60 | #else | |
61 | #define __tlb_flush_full(mm) __tlb_flush_local() | |
62 | #endif | |
63 | ||
1da177e4 | 64 | /* |
ba8a9229 | 65 | * Flush all tlb entries of a page table on all cpus. |
1da177e4 | 66 | */ |
6f457e1a | 67 | static inline void __tlb_flush_idte(unsigned long asce) |
ba8a9229 MS |
68 | { |
69 | asm volatile( | |
70 | " .insn rrf,0xb98e0000,0,%0,%1,0" | |
6f457e1a | 71 | : : "a" (2048), "a" (asce) : "cc" ); |
ba8a9229 | 72 | } |
1da177e4 | 73 | |
ba8a9229 | 74 | static inline void __tlb_flush_mm(struct mm_struct * mm) |
1da177e4 | 75 | { |
005f8eee | 76 | if (unlikely(cpumask_empty(mm_cpumask(mm)))) |
1da177e4 | 77 | return; |
ba8a9229 MS |
78 | /* |
79 | * If the machine has IDTE we prefer to do a per mm flush | |
80 | * on all cpus instead of doing a local flush if the mm | |
81 | * only ran on the local cpu. | |
82 | */ | |
e5992f2e | 83 | if (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list)) |
146e4b3c MS |
84 | __tlb_flush_idte((unsigned long) mm->pgd | |
85 | mm->context.asce_bits); | |
043d0708 MS |
86 | else |
87 | __tlb_flush_full(mm); | |
1da177e4 LT |
88 | } |
89 | ||
ba8a9229 | 90 | static inline void __tlb_flush_mm_cond(struct mm_struct * mm) |
1da177e4 | 91 | { |
050eef36 MS |
92 | spin_lock(&mm->page_table_lock); |
93 | if (mm->context.flush_mm) { | |
ba8a9229 | 94 | __tlb_flush_mm(mm); |
050eef36 MS |
95 | mm->context.flush_mm = 0; |
96 | } | |
97 | spin_unlock(&mm->page_table_lock); | |
1da177e4 LT |
98 | } |
99 | ||
ba8a9229 MS |
100 | /* |
101 | * TLB flushing: | |
102 | * flush_tlb() - flushes the current mm struct TLBs | |
103 | * flush_tlb_all() - flushes all processes TLBs | |
104 | * flush_tlb_mm(mm) - flushes the specified mm context TLB's | |
105 | * flush_tlb_page(vma, vmaddr) - flushes one page | |
106 | * flush_tlb_range(vma, start, end) - flushes a range of pages | |
107 | * flush_tlb_kernel_range(start, end) - flushes a range of kernel pages | |
108 | */ | |
1da177e4 | 109 | |
ba8a9229 MS |
110 | /* |
111 | * flush_tlb_mm goes together with ptep_set_wrprotect for the | |
112 | * copy_page_range operation and flush_tlb_range is related to | |
113 | * ptep_get_and_clear for change_protection. ptep_set_wrprotect and | |
114 | * ptep_get_and_clear do not flush the TLBs directly if the mm has | |
115 | * only one user. At the end of the update the flush_tlb_mm and | |
116 | * flush_tlb_range functions need to do the flush. | |
117 | */ | |
118 | #define flush_tlb() do { } while (0) | |
119 | #define flush_tlb_all() do { } while (0) | |
ba8a9229 | 120 | #define flush_tlb_page(vma, addr) do { } while (0) |
8ffd74a0 MS |
121 | |
122 | static inline void flush_tlb_mm(struct mm_struct *mm) | |
123 | { | |
124 | __tlb_flush_mm_cond(mm); | |
125 | } | |
126 | ||
127 | static inline void flush_tlb_range(struct vm_area_struct *vma, | |
128 | unsigned long start, unsigned long end) | |
129 | { | |
130 | __tlb_flush_mm_cond(vma->vm_mm); | |
131 | } | |
132 | ||
133 | static inline void flush_tlb_kernel_range(unsigned long start, | |
134 | unsigned long end) | |
135 | { | |
136 | __tlb_flush_mm(&init_mm); | |
137 | } | |
1da177e4 | 138 | |
1da177e4 | 139 | #endif /* _S390_TLBFLUSH_H */ |