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Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 | 2 | /* |
1da177e4 LT |
3 | * S390 low-level entry points. |
4 | * | |
a53c8fab | 5 | * Copyright IBM Corp. 1999, 2012 |
1da177e4 | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
2bc89b5e | 12 | #include <linux/init.h> |
144d634a | 13 | #include <linux/linkage.h> |
eb608fb3 | 14 | #include <asm/processor.h> |
1da177e4 | 15 | #include <asm/cache.h> |
3037a52f | 16 | #include <asm/ctl_reg.h> |
1da177e4 LT |
17 | #include <asm/errno.h> |
18 | #include <asm/ptrace.h> | |
19 | #include <asm/thread_info.h> | |
0013a854 | 20 | #include <asm/asm-offsets.h> |
1da177e4 LT |
21 | #include <asm/unistd.h> |
22 | #include <asm/page.h> | |
eb546195 | 23 | #include <asm/sigp.h> |
1f44a225 | 24 | #include <asm/irq.h> |
9977e886 | 25 | #include <asm/vx-insn.h> |
83abeffb HB |
26 | #include <asm/setup.h> |
27 | #include <asm/nmi.h> | |
711f5df7 | 28 | #include <asm/export.h> |
1da177e4 | 29 | |
c5328901 MS |
30 | __PT_R0 = __PT_GPRS |
31 | __PT_R1 = __PT_GPRS + 8 | |
32 | __PT_R2 = __PT_GPRS + 16 | |
33 | __PT_R3 = __PT_GPRS + 24 | |
34 | __PT_R4 = __PT_GPRS + 32 | |
35 | __PT_R5 = __PT_GPRS + 40 | |
36 | __PT_R6 = __PT_GPRS + 48 | |
37 | __PT_R7 = __PT_GPRS + 56 | |
38 | __PT_R8 = __PT_GPRS + 64 | |
39 | __PT_R9 = __PT_GPRS + 72 | |
40 | __PT_R10 = __PT_GPRS + 80 | |
41 | __PT_R11 = __PT_GPRS + 88 | |
42 | __PT_R12 = __PT_GPRS + 96 | |
43 | __PT_R13 = __PT_GPRS + 104 | |
44 | __PT_R14 = __PT_GPRS + 112 | |
45 | __PT_R15 = __PT_GPRS + 120 | |
1da177e4 | 46 | |
3a890380 | 47 | STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER |
1da177e4 | 48 | STACK_SIZE = 1 << STACK_SHIFT |
dc7ee00d | 49 | STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE |
1da177e4 | 50 | |
2a0a5b22 | 51 | _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
76f1948a | 52 | _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING) |
d3a73acb MS |
53 | _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ |
54 | _TIF_SYSCALL_TRACEPOINT) | |
b5a882fc HC |
55 | _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \ |
56 | _CIF_ASCE_SECONDARY | _CIF_FPU) | |
23fefe11 | 57 | _PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART) |
1da177e4 | 58 | |
9977e886 | 59 | #define BASED(name) name-cleanup_critical(%r13) |
1da177e4 | 60 | |
1f194a4c | 61 | .macro TRACE_IRQS_ON |
c5328901 | 62 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
63 | basr %r2,%r0 |
64 | brasl %r14,trace_hardirqs_on_caller | |
c5328901 | 65 | #endif |
1f194a4c HC |
66 | .endm |
67 | ||
68 | .macro TRACE_IRQS_OFF | |
c5328901 | 69 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
70 | basr %r2,%r0 |
71 | brasl %r14,trace_hardirqs_off_caller | |
411788ea | 72 | #endif |
c5328901 | 73 | .endm |
411788ea | 74 | |
411788ea | 75 | .macro LOCKDEP_SYS_EXIT |
c5328901 MS |
76 | #ifdef CONFIG_LOCKDEP |
77 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
78 | jz .+10 | |
411788ea | 79 | brasl %r14,lockdep_sys_exit |
1f194a4c | 80 | #endif |
1da177e4 | 81 | .endm |
1da177e4 | 82 | |
c5328901 | 83 | .macro CHECK_STACK stacksize,savearea |
63b12246 | 84 | #ifdef CONFIG_CHECK_STACK |
c5328901 MS |
85 | tml %r15,\stacksize - CONFIG_STACK_GUARD |
86 | lghi %r14,\savearea | |
87 | jz stack_overflow | |
63b12246 | 88 | #endif |
63b12246 MS |
89 | .endm |
90 | ||
2acb94f4 | 91 | .macro SWITCH_ASYNC savearea,timer |
c5328901 MS |
92 | tmhh %r8,0x0001 # interrupting from user ? |
93 | jnz 1f | |
94 | lgr %r14,%r9 | |
95 | slg %r14,BASED(.Lcritical_start) | |
96 | clg %r14,BASED(.Lcritical_length) | |
1da177e4 | 97 | jhe 0f |
c5328901 | 98 | lghi %r11,\savearea # inside critical section, do cleanup |
1da177e4 | 99 | brasl %r14,cleanup_critical |
c5328901 | 100 | tmhh %r8,0x0001 # retest problem state after cleanup |
1da177e4 | 101 | jnz 1f |
2acb94f4 | 102 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? |
1da177e4 | 103 | slgr %r14,%r15 |
2acb94f4 | 104 | srag %r14,%r14,STACK_SHIFT |
a359bb11 | 105 | jnz 2f |
2acb94f4 | 106 | CHECK_STACK 1<<STACK_SHIFT,\savearea |
dc7ee00d | 107 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
a359bb11 | 108 | j 3f |
34525e1f | 109 | 1: UPDATE_VTIME %r14,%r15,\timer |
2acb94f4 | 110 | 2: lg %r15,__LC_ASYNC_STACK # load async stack |
a359bb11 | 111 | 3: la %r11,STACK_FRAME_OVERHEAD(%r15) |
25d83cbf | 112 | .endm |
1da177e4 | 113 | |
a359bb11 MS |
114 | .macro UPDATE_VTIME w1,w2,enter_timer |
115 | lg \w1,__LC_EXIT_TIMER | |
116 | lg \w2,__LC_LAST_UPDATE_TIMER | |
117 | slg \w1,\enter_timer | |
118 | slg \w2,__LC_EXIT_TIMER | |
119 | alg \w1,__LC_USER_TIMER | |
120 | alg \w2,__LC_SYSTEM_TIMER | |
121 | stg \w1,__LC_USER_TIMER | |
122 | stg \w2,__LC_SYSTEM_TIMER | |
c5328901 | 123 | mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer |
1da177e4 LT |
124 | .endm |
125 | ||
1e54622e | 126 | .macro REENABLE_IRQS |
c5328901 MS |
127 | stg %r8,__LC_RETURN_PSW |
128 | ni __LC_RETURN_PSW,0xbf | |
129 | ssm __LC_RETURN_PSW | |
1e54622e MS |
130 | .endm |
131 | ||
473e66ba | 132 | .macro STCK savearea |
d652d596 | 133 | #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES |
473e66ba HC |
134 | .insn s,0xb27c0000,\savearea # store clock fast |
135 | #else | |
136 | .insn s,0xb2050000,\savearea # store clock | |
137 | #endif | |
138 | .endm | |
139 | ||
83abeffb HB |
140 | /* |
141 | * The TSTMSK macro generates a test-under-mask instruction by | |
142 | * calculating the memory offset for the specified mask value. | |
143 | * Mask value can be any constant. The macro shifts the mask | |
144 | * value to calculate the memory offset for the test-under-mask | |
145 | * instruction. | |
146 | */ | |
147 | .macro TSTMSK addr, mask, size=8, bytepos=0 | |
148 | .if (\bytepos < \size) && (\mask >> 8) | |
149 | .if (\mask & 0xff) | |
150 | .error "Mask exceeds byte boundary" | |
151 | .endif | |
152 | TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" | |
153 | .exitm | |
154 | .endif | |
155 | .ifeq \mask | |
156 | .error "Mask must not be zero" | |
157 | .endif | |
158 | off = \size - \bytepos - 1 | |
159 | tm off+\addr, \mask | |
160 | .endm | |
161 | ||
860dba45 | 162 | .section .kprobes.text, "ax" |
46210c44 HC |
163 | .Ldummy: |
164 | /* | |
165 | * This nop exists only in order to avoid that __switch_to starts at | |
166 | * the beginning of the kprobes text section. In that case we would | |
167 | * have several symbols at the same address. E.g. objdump would take | |
168 | * an arbitrary symbol name when disassembling this code. | |
169 | * With the added nop in between the __switch_to symbol is unique | |
170 | * again. | |
171 | */ | |
172 | nop 0 | |
860dba45 | 173 | |
1da177e4 LT |
174 | /* |
175 | * Scheduler resume function, called by switch_to | |
176 | * gpr2 = (task_struct *) prev | |
177 | * gpr3 = (task_struct *) next | |
178 | * Returns: | |
179 | * gpr2 = prev | |
180 | */ | |
144d634a | 181 | ENTRY(__switch_to) |
eda0c6d6 | 182 | stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task |
3241d3eb HC |
183 | lghi %r4,__TASK_stack |
184 | lghi %r1,__TASK_thread | |
185 | lg %r5,0(%r4,%r3) # start of kernel stack of next | |
186 | stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev | |
eda0c6d6 | 187 | lgr %r15,%r5 |
dc7ee00d | 188 | aghi %r15,STACK_INIT # end of kernel stack of next |
eda0c6d6 | 189 | stg %r3,__LC_CURRENT # store task struct of next |
eda0c6d6 | 190 | stg %r15,__LC_KERNEL_STACK # store end of kernel stack |
3241d3eb HC |
191 | lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next |
192 | aghi %r3,__TASK_pid | |
193 | mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next | |
d3a73acb | 194 | lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task |
e22cf8ca CB |
195 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
196 | bzr %r14 | |
197 | .insn s,0xb2800000,__LC_LPP # set program parameter | |
1da177e4 LT |
198 | br %r14 |
199 | ||
86ed42f4 | 200 | .L__critical_start: |
d0fc4107 MS |
201 | |
202 | #if IS_ENABLED(CONFIG_KVM) | |
203 | /* | |
204 | * sie64a calling convention: | |
205 | * %r2 pointer to sie control block | |
206 | * %r3 guest register save area | |
207 | */ | |
208 | ENTRY(sie64a) | |
209 | stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers | |
210 | stg %r2,__SF_EMPTY(%r15) # save control block pointer | |
211 | stg %r3,__SF_EMPTY+8(%r15) # save guest register save area | |
e22cf8ca | 212 | xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 |
83abeffb | 213 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? |
d0fc4107 | 214 | jno .Lsie_load_guest_gprs |
d0fc4107 MS |
215 | brasl %r14,load_fpu_regs # load guest fp/vx regs |
216 | .Lsie_load_guest_gprs: | |
217 | lmg %r0,%r13,0(%r3) # load guest gprs 0-13 | |
218 | lg %r14,__LC_GMAP # get gmap pointer | |
219 | ltgr %r14,%r14 | |
220 | jz .Lsie_gmap | |
221 | lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce | |
222 | .Lsie_gmap: | |
223 | lg %r14,__SF_EMPTY(%r15) # get control block pointer | |
224 | oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now | |
225 | tm __SIE_PROG20+3(%r14),3 # last exit... | |
226 | jnz .Lsie_skip | |
83abeffb | 227 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
d0fc4107 | 228 | jo .Lsie_skip # exit if fp/vx regs changed |
c929500d | 229 | .Lsie_entry: |
d0fc4107 | 230 | sie 0(%r14) |
d0fc4107 MS |
231 | .Lsie_skip: |
232 | ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE | |
233 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce | |
234 | .Lsie_done: | |
235 | # some program checks are suppressing. C code (e.g. do_protection_exception) | |
c0e7bb38 CB |
236 | # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There |
237 | # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable. | |
238 | # Other instructions between sie64a and .Lsie_done should not cause program | |
239 | # interrupts. So lets use 3 nops as a landing pad for all possible rewinds. | |
d0fc4107 | 240 | # See also .Lcleanup_sie |
c0e7bb38 CB |
241 | .Lrewind_pad6: |
242 | nopr 7 | |
243 | .Lrewind_pad4: | |
244 | nopr 7 | |
245 | .Lrewind_pad2: | |
246 | nopr 7 | |
d0fc4107 MS |
247 | .globl sie_exit |
248 | sie_exit: | |
249 | lg %r14,__SF_EMPTY+8(%r15) # load guest register save area | |
250 | stmg %r0,%r13,0(%r14) # save guest gprs 0-13 | |
251 | lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers | |
e22cf8ca | 252 | lg %r2,__SF_EMPTY+16(%r15) # return exit reason code |
d0fc4107 MS |
253 | br %r14 |
254 | .Lsie_fault: | |
255 | lghi %r14,-EFAULT | |
e22cf8ca | 256 | stg %r14,__SF_EMPTY+16(%r15) # set exit reason code |
d0fc4107 MS |
257 | j sie_exit |
258 | ||
c0e7bb38 CB |
259 | EX_TABLE(.Lrewind_pad6,.Lsie_fault) |
260 | EX_TABLE(.Lrewind_pad4,.Lsie_fault) | |
261 | EX_TABLE(.Lrewind_pad2,.Lsie_fault) | |
d0fc4107 | 262 | EX_TABLE(sie_exit,.Lsie_fault) |
711f5df7 AV |
263 | EXPORT_SYMBOL(sie64a) |
264 | EXPORT_SYMBOL(sie_exit) | |
d0fc4107 MS |
265 | #endif |
266 | ||
1da177e4 LT |
267 | /* |
268 | * SVC interrupt handler routine. System calls are synchronous events and | |
269 | * are executed with interrupts enabled. | |
270 | */ | |
271 | ||
144d634a | 272 | ENTRY(system_call) |
c185b783 | 273 | stpt __LC_SYNC_ENTER_TIMER |
86ed42f4 | 274 | .Lsysc_stmg: |
c5328901 | 275 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
d5c352cd | 276 | lg %r12,__LC_CURRENT |
34525e1f | 277 | lghi %r13,__TASK_thread |
d3a73acb | 278 | lghi %r14,_PIF_SYSCALL |
86ed42f4 | 279 | .Lsysc_per: |
c5328901 | 280 | lg %r15,__LC_KERNEL_STACK |
c5328901 | 281 | la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs |
a359bb11 | 282 | .Lsysc_vtime: |
34525e1f | 283 | UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER |
c5328901 MS |
284 | stmg %r0,%r7,__PT_R0(%r11) |
285 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
286 | mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW | |
aa33c8cb | 287 | mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC |
d3a73acb | 288 | stg %r14,__PT_FLAGS(%r11) |
86ed42f4 | 289 | .Lsysc_do_svc: |
ef280c85 | 290 | # load address of system call table |
ef280c85 | 291 | lg %r10,__THREAD_sysc_table(%r13,%r12) |
aa33c8cb | 292 | llgh %r8,__PT_INT_CODE+2(%r11) |
c5328901 | 293 | slag %r8,%r8,2 # shift and test for svc 0 |
86ed42f4 | 294 | jnz .Lsysc_nr_ok |
1da177e4 | 295 | # svc 0: system call number in %r1 |
c5328901 | 296 | llgfr %r1,%r1 # clear high word in r1 |
86f2552b | 297 | cghi %r1,NR_syscalls |
86ed42f4 | 298 | jnl .Lsysc_nr_ok |
aa33c8cb | 299 | sth %r1,__PT_INT_CODE+2(%r11) |
c5328901 | 300 | slag %r8,%r1,2 |
86ed42f4 | 301 | .Lsysc_nr_ok: |
c5328901 MS |
302 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
303 | stg %r2,__PT_ORIG_GPR2(%r11) | |
304 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
305 | lgf %r9,0(%r8,%r10) # get system call add. | |
83abeffb | 306 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 307 | jnz .Lsysc_tracesys |
c5328901 MS |
308 | basr %r14,%r9 # call sys_xxxx |
309 | stg %r2,__PT_R2(%r11) # store return value | |
1da177e4 | 310 | |
86ed42f4 | 311 | .Lsysc_return: |
6a2df3a8 | 312 | LOCKDEP_SYS_EXIT |
86ed42f4 | 313 | .Lsysc_tif: |
83abeffb | 314 | TSTMSK __PT_FLAGS(%r11),_PIF_WORK |
86ed42f4 | 315 | jnz .Lsysc_work |
83abeffb | 316 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 317 | jnz .Lsysc_work # check for work |
83abeffb | 318 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
319 | jnz .Lsysc_work |
320 | .Lsysc_restore: | |
c5328901 MS |
321 | lg %r14,__LC_VDSO_PER_CPU |
322 | lmg %r0,%r10,__PT_R0(%r11) | |
323 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
07a63cbe | 324 | .Lsysc_exit_timer: |
c5328901 MS |
325 | stpt __LC_EXIT_TIMER |
326 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
327 | lmg %r11,%r15,__PT_R11(%r11) | |
328 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 329 | .Lsysc_done: |
411788ea | 330 | |
43d399d2 MS |
331 | # |
332 | # One of the work bits is on. Find out which one. | |
333 | # | |
86ed42f4 | 334 | .Lsysc_work: |
83abeffb | 335 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 336 | jo .Lsysc_mcck_pending |
83abeffb | 337 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 338 | jo .Lsysc_reschedule |
23fefe11 MS |
339 | TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART |
340 | jo .Lsysc_syscall_restart | |
2a0a5b22 | 341 | #ifdef CONFIG_UPROBES |
83abeffb | 342 | TSTMSK __TI_flags(%r12),_TIF_UPROBE |
86ed42f4 | 343 | jo .Lsysc_uprobe_notify |
2a0a5b22 | 344 | #endif |
916cda1a MS |
345 | TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE |
346 | jo .Lsysc_guarded_storage | |
83abeffb | 347 | TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP |
86ed42f4 | 348 | jo .Lsysc_singlestep |
2f09ca60 MB |
349 | #ifdef CONFIG_LIVEPATCH |
350 | TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING | |
351 | jo .Lsysc_patch_pending # handle live patching just before | |
352 | # signals and possible syscall restart | |
353 | #endif | |
23fefe11 MS |
354 | TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART |
355 | jo .Lsysc_syscall_restart | |
83abeffb | 356 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 357 | jo .Lsysc_sigpending |
83abeffb | 358 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 359 | jo .Lsysc_notify_resume |
83abeffb | 360 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 361 | jo .Lsysc_vxrs |
b5a882fc HC |
362 | TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) |
363 | jnz .Lsysc_asce | |
86ed42f4 | 364 | j .Lsysc_return # beware of critical section cleanup |
1da177e4 LT |
365 | |
366 | # | |
367 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 368 | # |
86ed42f4 MS |
369 | .Lsysc_reschedule: |
370 | larl %r14,.Lsysc_return | |
c5328901 | 371 | jg schedule |
1da177e4 | 372 | |
77fa2245 | 373 | # |
d3a73acb | 374 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 375 | # |
86ed42f4 MS |
376 | .Lsysc_mcck_pending: |
377 | larl %r14,.Lsysc_return | |
25d83cbf | 378 | jg s390_handle_mcck # TIF bit will be cleared by handler |
77fa2245 | 379 | |
457f2180 | 380 | # |
0aaba41b | 381 | # _CIF_ASCE_PRIMARY and/or _CIF_ASCE_SECONDARY set, load user space asce |
457f2180 | 382 | # |
b5a882fc | 383 | .Lsysc_asce: |
0aaba41b MS |
384 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY |
385 | lctlg %c7,%c7,__LC_VDSO_ASCE # load secondary asce | |
386 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_PRIMARY | |
387 | jz .Lsysc_return | |
388 | #ifndef CONFIG_HAVE_MARCH_Z10_FEATURES | |
389 | tm __LC_STFLE_FAC_LIST+3,0x10 # has MVCOS ? | |
390 | jnz .Lsysc_set_fs_fixup | |
606aa4aa | 391 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY |
457f2180 | 392 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
0aaba41b MS |
393 | j .Lsysc_return |
394 | .Lsysc_set_fs_fixup: | |
395 | #endif | |
b5a882fc HC |
396 | larl %r14,.Lsysc_return |
397 | jg set_fs_fixup | |
457f2180 | 398 | |
9977e886 HB |
399 | # |
400 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
401 | # | |
402 | .Lsysc_vxrs: | |
403 | larl %r14,.Lsysc_return | |
404 | jg load_fpu_regs | |
405 | ||
1da177e4 | 406 | # |
02a029b3 | 407 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 408 | # |
86ed42f4 | 409 | .Lsysc_sigpending: |
c5328901 MS |
410 | lgr %r2,%r11 # pass pointer to pt_regs |
411 | brasl %r14,do_signal | |
83abeffb | 412 | TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL |
86ed42f4 | 413 | jno .Lsysc_return |
57d7f939 MS |
414 | .Lsysc_do_syscall: |
415 | lghi %r13,__TASK_thread | |
c5328901 | 416 | lmg %r2,%r7,__PT_R2(%r11) # load svc arguments |
57d7f939 MS |
417 | lghi %r1,0 # svc 0 returns -ENOSYS |
418 | j .Lsysc_do_svc | |
1da177e4 | 419 | |
753c4dd6 MS |
420 | # |
421 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
422 | # | |
86ed42f4 | 423 | .Lsysc_notify_resume: |
c5328901 | 424 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 425 | larl %r14,.Lsysc_return |
c5328901 | 426 | jg do_notify_resume |
753c4dd6 | 427 | |
2a0a5b22 JW |
428 | # |
429 | # _TIF_UPROBE is set, call uprobe_notify_resume | |
430 | # | |
431 | #ifdef CONFIG_UPROBES | |
86ed42f4 | 432 | .Lsysc_uprobe_notify: |
2a0a5b22 | 433 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 434 | larl %r14,.Lsysc_return |
2a0a5b22 JW |
435 | jg uprobe_notify_resume |
436 | #endif | |
437 | ||
916cda1a MS |
438 | # |
439 | # _TIF_GUARDED_STORAGE is set, call guarded_storage_load | |
440 | # | |
441 | .Lsysc_guarded_storage: | |
442 | lgr %r2,%r11 # pass pointer to pt_regs | |
443 | larl %r14,.Lsysc_return | |
444 | jg gs_load_bc_cb | |
2f09ca60 MB |
445 | # |
446 | # _TIF_PATCH_PENDING is set, call klp_update_patch_state | |
447 | # | |
448 | #ifdef CONFIG_LIVEPATCH | |
449 | .Lsysc_patch_pending: | |
450 | lg %r2,__LC_CURRENT # pass pointer to task struct | |
451 | larl %r14,.Lsysc_return | |
452 | jg klp_update_patch_state | |
453 | #endif | |
916cda1a | 454 | |
1da177e4 | 455 | # |
d3a73acb | 456 | # _PIF_PER_TRAP is set, call do_per_trap |
1da177e4 | 457 | # |
86ed42f4 | 458 | .Lsysc_singlestep: |
d3a73acb | 459 | ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP |
c5328901 | 460 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 461 | larl %r14,.Lsysc_return |
5e9a2692 | 462 | jg do_per_trap |
1da177e4 | 463 | |
23fefe11 MS |
464 | # |
465 | # _PIF_SYSCALL_RESTART is set, repeat the current system call | |
466 | # | |
467 | .Lsysc_syscall_restart: | |
468 | ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART | |
469 | lmg %r1,%r7,__PT_R1(%r11) # load svc arguments | |
470 | lg %r2,__PT_ORIG_GPR2(%r11) | |
471 | j .Lsysc_do_svc | |
472 | ||
1da177e4 | 473 | # |
753c4dd6 MS |
474 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
475 | # and after the system call | |
1da177e4 | 476 | # |
86ed42f4 | 477 | .Lsysc_tracesys: |
c5328901 | 478 | lgr %r2,%r11 # pass pointer to pt_regs |
1da177e4 | 479 | la %r3,0 |
aa33c8cb | 480 | llgh %r0,__PT_INT_CODE+2(%r11) |
c5328901 | 481 | stg %r0,__PT_R2(%r11) |
753c4dd6 | 482 | brasl %r14,do_syscall_trace_enter |
1da177e4 | 483 | lghi %r0,NR_syscalls |
753c4dd6 | 484 | clgr %r0,%r2 |
86ed42f4 | 485 | jnh .Lsysc_tracenogo |
c5328901 MS |
486 | sllg %r8,%r2,2 |
487 | lgf %r9,0(%r8,%r10) | |
86ed42f4 | 488 | .Lsysc_tracego: |
c5328901 MS |
489 | lmg %r3,%r7,__PT_R3(%r11) |
490 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
491 | lg %r2,__PT_ORIG_GPR2(%r11) | |
492 | basr %r14,%r9 # call sys_xxx | |
493 | stg %r2,__PT_R2(%r11) # store return value | |
86ed42f4 | 494 | .Lsysc_tracenogo: |
83abeffb | 495 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 496 | jz .Lsysc_return |
c5328901 | 497 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 498 | larl %r14,.Lsysc_return |
753c4dd6 | 499 | jg do_syscall_trace_exit |
1da177e4 LT |
500 | |
501 | # | |
502 | # a new process exits the kernel with ret_from_fork | |
503 | # | |
144d634a | 504 | ENTRY(ret_from_fork) |
c5328901 | 505 | la %r11,STACK_FRAME_OVERHEAD(%r15) |
d5c352cd | 506 | lg %r12,__LC_CURRENT |
37fe5d41 AV |
507 | brasl %r14,schedule_tail |
508 | TRACE_IRQS_ON | |
509 | ssm __LC_SVC_NEW_PSW # reenable interrupts | |
30dcb099 | 510 | tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? |
86ed42f4 | 511 | jne .Lsysc_tracenogo |
30dcb099 AV |
512 | # it's a kernel thread |
513 | lmg %r9,%r10,__PT_R9(%r11) # load gprs | |
37fe5d41 AV |
514 | ENTRY(kernel_thread_starter) |
515 | la %r2,0(%r10) | |
516 | basr %r14,%r9 | |
86ed42f4 | 517 | j .Lsysc_tracenogo |
1da177e4 LT |
518 | |
519 | /* | |
520 | * Program check handler routine | |
521 | */ | |
522 | ||
144d634a | 523 | ENTRY(pgm_check_handler) |
c185b783 | 524 | stpt __LC_SYNC_ENTER_TIMER |
c5328901 MS |
525 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
526 | lg %r10,__LC_LAST_BREAK | |
d5c352cd | 527 | lg %r12,__LC_CURRENT |
c771320e | 528 | lghi %r11,0 |
9977e886 | 529 | larl %r13,cleanup_critical |
c5328901 | 530 | lmg %r8,%r9,__LC_PGM_OLD_PSW |
c5328901 | 531 | tmhh %r8,0x0001 # test problem state bit |
d0fc4107 MS |
532 | jnz 2f # -> fault in user space |
533 | #if IS_ENABLED(CONFIG_KVM) | |
0a5e2ec2 | 534 | # cleanup critical section for program checks in sie64a |
d0fc4107 MS |
535 | lgr %r14,%r9 |
536 | slg %r14,BASED(.Lsie_critical_start) | |
537 | clg %r14,BASED(.Lsie_critical_length) | |
538 | jhe 0f | |
0a5e2ec2 MS |
539 | lg %r14,__SF_EMPTY(%r15) # get control block pointer |
540 | ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE | |
541 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce | |
542 | larl %r9,sie_exit # skip forward to sie_exit | |
c771320e | 543 | lghi %r11,_PIF_GUEST_FAULT |
d0fc4107 MS |
544 | #endif |
545 | 0: tmhh %r8,0x4000 # PER bit set in old PSW ? | |
546 | jnz 1f # -> enabled, can't be a double fault | |
c5328901 | 547 | tm __LC_PGM_ILC+3,0x80 # check for per exception |
86ed42f4 | 548 | jnz .Lpgm_svcper # -> single stepped svc |
d0fc4107 | 549 | 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC |
dc7ee00d | 550 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
d9fcf2a1 | 551 | j 4f |
34525e1f | 552 | 2: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER |
c5328901 | 553 | lg %r15,__LC_KERNEL_STACK |
d5c352cd | 554 | lgr %r14,%r12 |
3827ec3d | 555 | aghi %r14,__TASK_thread # pointer to thread_struct |
d35339a4 MS |
556 | lghi %r13,__LC_PGM_TDB |
557 | tm __LC_PGM_ILC+2,0x02 # check for transaction abort | |
d0fc4107 | 558 | jz 3f |
d35339a4 | 559 | mvc __THREAD_trap_tdb(256,%r14),0(%r13) |
d9fcf2a1 | 560 | 3: stg %r10,__THREAD_last_break(%r14) |
c771320e MS |
561 | 4: lgr %r13,%r11 |
562 | la %r11,STACK_FRAME_OVERHEAD(%r15) | |
c5328901 MS |
563 | stmg %r0,%r7,__PT_R0(%r11) |
564 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
565 | stmg %r8,%r9,__PT_PSW(%r11) | |
aa33c8cb MS |
566 | mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC |
567 | mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE | |
c771320e | 568 | stg %r13,__PT_FLAGS(%r11) |
c5328901 MS |
569 | stg %r10,__PT_ARGS(%r11) |
570 | tm __LC_PGM_ILC+3,0x80 # check for per exception | |
d9fcf2a1 | 571 | jz 5f |
c5328901 | 572 | tmhh %r8,0x0001 # kernel per event ? |
86ed42f4 | 573 | jz .Lpgm_kprobe |
d3a73acb | 574 | oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP |
d35339a4 | 575 | mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS |
21ee7ffd JF |
576 | mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE |
577 | mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID | |
d9fcf2a1 | 578 | 5: REENABLE_IRQS |
c5328901 | 579 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
f5cdac27 | 580 | larl %r1,pgm_check_table |
aa33c8cb MS |
581 | llgh %r10,__PT_INT_CODE+2(%r11) |
582 | nill %r10,0x007f | |
b01a37a7 | 583 | sll %r10,2 |
a359bb11 | 584 | je .Lpgm_return |
b01a37a7 | 585 | lgf %r1,0(%r10,%r1) # load address of handler routine |
c5328901 | 586 | lgr %r2,%r11 # pass pointer to pt_regs |
f5cdac27 | 587 | basr %r14,%r1 # branch to interrupt-handler |
a359bb11 MS |
588 | .Lpgm_return: |
589 | LOCKDEP_SYS_EXIT | |
590 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
591 | jno .Lsysc_restore | |
57d7f939 MS |
592 | TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL |
593 | jo .Lsysc_do_syscall | |
a359bb11 | 594 | j .Lsysc_tif |
1da177e4 LT |
595 | |
596 | # | |
c5328901 | 597 | # PER event in supervisor state, must be kprobes |
1da177e4 | 598 | # |
86ed42f4 | 599 | .Lpgm_kprobe: |
c5328901 MS |
600 | REENABLE_IRQS |
601 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | |
602 | lgr %r2,%r11 # pass pointer to pt_regs | |
603 | brasl %r14,do_per_trap | |
a359bb11 | 604 | j .Lpgm_return |
1da177e4 | 605 | |
4ba069b8 | 606 | # |
c5328901 | 607 | # single stepped system call |
4ba069b8 | 608 | # |
86ed42f4 | 609 | .Lpgm_svcper: |
c5328901 | 610 | mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW |
d24b98e3 | 611 | lghi %r13,__TASK_thread |
86ed42f4 | 612 | larl %r14,.Lsysc_per |
c5328901 | 613 | stg %r14,__LC_RETURN_PSW+8 |
d3a73acb | 614 | lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP |
86ed42f4 | 615 | lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs |
4ba069b8 | 616 | |
1da177e4 LT |
617 | /* |
618 | * IO interrupt handler routine | |
619 | */ | |
144d634a | 620 | ENTRY(io_int_handler) |
473e66ba | 621 | STCK __LC_INT_CLOCK |
9cfb9b3c | 622 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 | 623 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
d5c352cd | 624 | lg %r12,__LC_CURRENT |
9977e886 | 625 | larl %r13,cleanup_critical |
c5328901 | 626 | lmg %r8,%r9,__LC_IO_OLD_PSW |
2acb94f4 | 627 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
628 | stmg %r0,%r7,__PT_R0(%r11) |
629 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
630 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c | 631 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
d3a73acb | 632 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
633 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
634 | jo .Lio_restore | |
1f194a4c | 635 | TRACE_IRQS_OFF |
c5328901 | 636 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
86ed42f4 | 637 | .Lio_loop: |
c5328901 | 638 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
639 | lghi %r3,IO_INTERRUPT |
640 | tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? | |
86ed42f4 | 641 | jz .Lio_call |
1f44a225 | 642 | lghi %r3,THIN_INTERRUPT |
86ed42f4 | 643 | .Lio_call: |
c5328901 | 644 | brasl %r14,do_IRQ |
83abeffb | 645 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR |
86ed42f4 | 646 | jz .Lio_return |
48f6b00c | 647 | tpi 0 |
86ed42f4 | 648 | jz .Lio_return |
48f6b00c | 649 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
86ed42f4 MS |
650 | j .Lio_loop |
651 | .Lio_return: | |
6a2df3a8 MS |
652 | LOCKDEP_SYS_EXIT |
653 | TRACE_IRQS_ON | |
86ed42f4 | 654 | .Lio_tif: |
83abeffb | 655 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 656 | jnz .Lio_work # there is work to do (signals etc.) |
83abeffb | 657 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
658 | jnz .Lio_work |
659 | .Lio_restore: | |
c5328901 MS |
660 | lg %r14,__LC_VDSO_PER_CPU |
661 | lmg %r0,%r10,__PT_R0(%r11) | |
662 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
07a63cbe | 663 | .Lio_exit_timer: |
c5328901 MS |
664 | stpt __LC_EXIT_TIMER |
665 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
666 | lmg %r11,%r15,__PT_R11(%r11) | |
667 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 668 | .Lio_done: |
1da177e4 | 669 | |
2688905e | 670 | # |
43d399d2 | 671 | # There is work todo, find out in which context we have been interrupted: |
d3a73acb | 672 | # 1) if we return to user space we can do all _TIF_WORK work |
43d399d2 MS |
673 | # 2) if we return to kernel code and kvm is enabled check if we need to |
674 | # modify the psw to leave SIE | |
675 | # 3) if we return to kernel code and preemptive scheduling is enabled check | |
676 | # the preemption counter and if it is zero call preempt_schedule_irq | |
677 | # Before any work can be done, a switch to the kernel stack is required. | |
2688905e | 678 | # |
86ed42f4 | 679 | .Lio_work: |
c5328901 | 680 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 681 | jo .Lio_work_user # yes -> do resched & signal |
43d399d2 | 682 | #ifdef CONFIG_PREEMPT |
2688905e | 683 | # check for preemptive scheduling |
c360192b | 684 | icm %r0,15,__LC_PREEMPT_COUNT |
86ed42f4 | 685 | jnz .Lio_restore # preemption is disabled |
83abeffb | 686 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 687 | jno .Lio_restore |
1da177e4 | 688 | # switch to kernel stack |
c5328901 MS |
689 | lg %r1,__PT_R15(%r11) |
690 | aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) | |
691 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) | |
692 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
693 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 694 | lgr %r15,%r1 |
86ed42f4 | 695 | # TRACE_IRQS_ON already done at .Lio_return, call |
6a2df3a8 MS |
696 | # TRACE_IRQS_OFF to keep things symmetrical |
697 | TRACE_IRQS_OFF | |
698 | brasl %r14,preempt_schedule_irq | |
86ed42f4 | 699 | j .Lio_return |
6a2df3a8 | 700 | #else |
86ed42f4 | 701 | j .Lio_restore |
6a2df3a8 | 702 | #endif |
1da177e4 | 703 | |
43d399d2 MS |
704 | # |
705 | # Need to do work before returning to userspace, switch to kernel stack | |
706 | # | |
86ed42f4 | 707 | .Lio_work_user: |
1da177e4 | 708 | lg %r1,__LC_KERNEL_STACK |
c5328901 MS |
709 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
710 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
711 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 712 | lgr %r15,%r1 |
43d399d2 | 713 | |
1da177e4 LT |
714 | # |
715 | # One of the work bits is on. Find out which one. | |
1da177e4 | 716 | # |
86ed42f4 | 717 | .Lio_work_tif: |
83abeffb | 718 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 719 | jo .Lio_mcck_pending |
83abeffb | 720 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 721 | jo .Lio_reschedule |
2f09ca60 MB |
722 | #ifdef CONFIG_LIVEPATCH |
723 | TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING | |
724 | jo .Lio_patch_pending | |
725 | #endif | |
83abeffb | 726 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 727 | jo .Lio_sigpending |
83abeffb | 728 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 729 | jo .Lio_notify_resume |
916cda1a MS |
730 | TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE |
731 | jo .Lio_guarded_storage | |
83abeffb | 732 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 733 | jo .Lio_vxrs |
b5a882fc HC |
734 | TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) |
735 | jnz .Lio_asce | |
86ed42f4 | 736 | j .Lio_return # beware of critical section cleanup |
0eaeafa1 | 737 | |
77fa2245 | 738 | # |
d3a73acb | 739 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 740 | # |
86ed42f4 MS |
741 | .Lio_mcck_pending: |
742 | # TRACE_IRQS_ON already done at .Lio_return | |
b771aeac | 743 | brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler |
6a2df3a8 | 744 | TRACE_IRQS_OFF |
86ed42f4 | 745 | j .Lio_return |
77fa2245 | 746 | |
457f2180 | 747 | # |
b5a882fc | 748 | # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce |
457f2180 | 749 | # |
b5a882fc | 750 | .Lio_asce: |
0aaba41b MS |
751 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY |
752 | lctlg %c7,%c7,__LC_VDSO_ASCE # load secondary asce | |
753 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_PRIMARY | |
754 | jz .Lio_return | |
755 | #ifndef CONFIG_HAVE_MARCH_Z10_FEATURES | |
756 | tm __LC_STFLE_FAC_LIST+3,0x10 # has MVCOS ? | |
757 | jnz .Lio_set_fs_fixup | |
606aa4aa | 758 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY |
457f2180 | 759 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
0aaba41b MS |
760 | j .Lio_return |
761 | .Lio_set_fs_fixup: | |
762 | #endif | |
b5a882fc HC |
763 | larl %r14,.Lio_return |
764 | jg set_fs_fixup | |
457f2180 | 765 | |
9977e886 HB |
766 | # |
767 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
768 | # | |
769 | .Lio_vxrs: | |
770 | larl %r14,.Lio_return | |
771 | jg load_fpu_regs | |
772 | ||
916cda1a MS |
773 | # |
774 | # _TIF_GUARDED_STORAGE is set, call guarded_storage_load | |
775 | # | |
776 | .Lio_guarded_storage: | |
777 | # TRACE_IRQS_ON already done at .Lio_return | |
778 | ssm __LC_SVC_NEW_PSW # reenable interrupts | |
779 | lgr %r2,%r11 # pass pointer to pt_regs | |
780 | brasl %r14,gs_load_bc_cb | |
781 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
782 | TRACE_IRQS_OFF | |
783 | j .Lio_return | |
784 | ||
1da177e4 LT |
785 | # |
786 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 787 | # |
86ed42f4 MS |
788 | .Lio_reschedule: |
789 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 | 790 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
25d83cbf | 791 | brasl %r14,schedule # call scheduler |
c5328901 | 792 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts |
411788ea | 793 | TRACE_IRQS_OFF |
86ed42f4 | 794 | j .Lio_return |
1da177e4 | 795 | |
2f09ca60 MB |
796 | # |
797 | # _TIF_PATCH_PENDING is set, call klp_update_patch_state | |
798 | # | |
799 | #ifdef CONFIG_LIVEPATCH | |
800 | .Lio_patch_pending: | |
801 | lg %r2,__LC_CURRENT # pass pointer to task struct | |
802 | larl %r14,.Lio_return | |
803 | jg klp_update_patch_state | |
804 | #endif | |
805 | ||
1da177e4 | 806 | # |
02a029b3 | 807 | # _TIF_SIGPENDING or is set, call do_signal |
1da177e4 | 808 | # |
86ed42f4 MS |
809 | .Lio_sigpending: |
810 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
811 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
812 | lgr %r2,%r11 # pass pointer to pt_regs | |
813 | brasl %r14,do_signal | |
814 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
411788ea | 815 | TRACE_IRQS_OFF |
86ed42f4 | 816 | j .Lio_return |
1da177e4 | 817 | |
753c4dd6 MS |
818 | # |
819 | # _TIF_NOTIFY_RESUME or is set, call do_notify_resume | |
820 | # | |
86ed42f4 MS |
821 | .Lio_notify_resume: |
822 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
823 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
824 | lgr %r2,%r11 # pass pointer to pt_regs | |
825 | brasl %r14,do_notify_resume | |
826 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
753c4dd6 | 827 | TRACE_IRQS_OFF |
86ed42f4 | 828 | j .Lio_return |
753c4dd6 | 829 | |
1da177e4 LT |
830 | /* |
831 | * External interrupt handler routine | |
832 | */ | |
144d634a | 833 | ENTRY(ext_int_handler) |
473e66ba | 834 | STCK __LC_INT_CLOCK |
9cfb9b3c | 835 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 | 836 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
d5c352cd | 837 | lg %r12,__LC_CURRENT |
9977e886 | 838 | larl %r13,cleanup_critical |
c5328901 | 839 | lmg %r8,%r9,__LC_EXT_OLD_PSW |
2acb94f4 | 840 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
841 | stmg %r0,%r7,__PT_R0(%r11) |
842 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
843 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c MS |
844 | lghi %r1,__LC_EXT_PARAMS2 |
845 | mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR | |
846 | mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS | |
847 | mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) | |
d3a73acb | 848 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
849 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
850 | jo .Lio_restore | |
1f194a4c | 851 | TRACE_IRQS_OFF |
0de9db37 | 852 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
c5328901 | 853 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
854 | lghi %r3,EXT_INTERRUPT |
855 | brasl %r14,do_IRQ | |
86ed42f4 | 856 | j .Lio_return |
1da177e4 | 857 | |
4c1051e3 | 858 | /* |
86ed42f4 | 859 | * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. |
4c1051e3 MS |
860 | */ |
861 | ENTRY(psw_idle) | |
27f6b416 | 862 | stg %r3,__SF_EMPTY(%r15) |
86ed42f4 | 863 | larl %r1,.Lpsw_idle_lpsw+4 |
4c1051e3 | 864 | stg %r1,__SF_EMPTY+8(%r15) |
72d38b19 MS |
865 | #ifdef CONFIG_SMP |
866 | larl %r1,smp_cpu_mtid | |
867 | llgf %r1,0(%r1) | |
868 | ltgr %r1,%r1 | |
869 | jz .Lpsw_idle_stcctm | |
870 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) | |
871 | .Lpsw_idle_stcctm: | |
872 | #endif | |
419123f9 | 873 | oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT |
27f6b416 MS |
874 | STCK __CLOCK_IDLE_ENTER(%r2) |
875 | stpt __TIMER_IDLE_ENTER(%r2) | |
86ed42f4 | 876 | .Lpsw_idle_lpsw: |
4c1051e3 MS |
877 | lpswe __SF_EMPTY(%r15) |
878 | br %r14 | |
86ed42f4 | 879 | .Lpsw_idle_end: |
4c1051e3 | 880 | |
b5510d9b HB |
881 | /* |
882 | * Store floating-point controls and floating-point or vector register | |
883 | * depending whether the vector facility is available. A critical section | |
884 | * cleanup assures that the registers are stored even if interrupted for | |
885 | * some other work. The CIF_FPU flag is set to trigger a lazy restore | |
886 | * of the register contents at return from io or a system call. | |
9977e886 HB |
887 | */ |
888 | ENTRY(save_fpu_regs) | |
d0164ee2 HB |
889 | lg %r2,__LC_CURRENT |
890 | aghi %r2,__TASK_thread | |
83abeffb | 891 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 892 | bor %r14 |
d0164ee2 | 893 | stfpc __THREAD_FPU_fpc(%r2) |
d0164ee2 | 894 | lg %r3,__THREAD_FPU_regs(%r2) |
83abeffb | 895 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
9977e886 | 896 | jz .Lsave_fpu_regs_fp # no -> store FP regs |
9977e886 | 897 | VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) |
9977e886 HB |
898 | VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) |
899 | j .Lsave_fpu_regs_done # -> set CIF_FPU flag | |
900 | .Lsave_fpu_regs_fp: | |
901 | std 0,0(%r3) | |
902 | std 1,8(%r3) | |
903 | std 2,16(%r3) | |
904 | std 3,24(%r3) | |
905 | std 4,32(%r3) | |
906 | std 5,40(%r3) | |
907 | std 6,48(%r3) | |
908 | std 7,56(%r3) | |
909 | std 8,64(%r3) | |
910 | std 9,72(%r3) | |
911 | std 10,80(%r3) | |
912 | std 11,88(%r3) | |
913 | std 12,96(%r3) | |
914 | std 13,104(%r3) | |
915 | std 14,112(%r3) | |
916 | std 15,120(%r3) | |
917 | .Lsave_fpu_regs_done: | |
918 | oi __LC_CPU_FLAGS+7,_CIF_FPU | |
919 | br %r14 | |
920 | .Lsave_fpu_regs_end: | |
711f5df7 | 921 | EXPORT_SYMBOL(save_fpu_regs) |
9977e886 | 922 | |
b5510d9b HB |
923 | /* |
924 | * Load floating-point controls and floating-point or vector registers. | |
925 | * A critical section cleanup assures that the register contents are | |
926 | * loaded even if interrupted for some other work. | |
9977e886 HB |
927 | * |
928 | * There are special calling conventions to fit into sysc and io return work: | |
9977e886 HB |
929 | * %r15: <kernel stack> |
930 | * The function requires: | |
b5510d9b | 931 | * %r4 |
9977e886 HB |
932 | */ |
933 | load_fpu_regs: | |
d0164ee2 HB |
934 | lg %r4,__LC_CURRENT |
935 | aghi %r4,__TASK_thread | |
83abeffb | 936 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 937 | bnor %r14 |
d0164ee2 | 938 | lfpc __THREAD_FPU_fpc(%r4) |
83abeffb | 939 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
d0164ee2 | 940 | lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area |
b5510d9b | 941 | jz .Lload_fpu_regs_fp # -> no VX, load FP regs |
9977e886 | 942 | VLM %v0,%v15,0,%r4 |
9977e886 HB |
943 | VLM %v16,%v31,256,%r4 |
944 | j .Lload_fpu_regs_done | |
9977e886 HB |
945 | .Lload_fpu_regs_fp: |
946 | ld 0,0(%r4) | |
947 | ld 1,8(%r4) | |
948 | ld 2,16(%r4) | |
949 | ld 3,24(%r4) | |
950 | ld 4,32(%r4) | |
951 | ld 5,40(%r4) | |
952 | ld 6,48(%r4) | |
953 | ld 7,56(%r4) | |
954 | ld 8,64(%r4) | |
955 | ld 9,72(%r4) | |
956 | ld 10,80(%r4) | |
957 | ld 11,88(%r4) | |
958 | ld 12,96(%r4) | |
959 | ld 13,104(%r4) | |
960 | ld 14,112(%r4) | |
961 | ld 15,120(%r4) | |
962 | .Lload_fpu_regs_done: | |
963 | ni __LC_CPU_FLAGS+7,255-_CIF_FPU | |
964 | br %r14 | |
965 | .Lload_fpu_regs_end: | |
966 | ||
86ed42f4 | 967 | .L__critical_end: |
ae6aa2ea | 968 | |
1da177e4 LT |
969 | /* |
970 | * Machine check handler routines | |
971 | */ | |
144d634a | 972 | ENTRY(mcck_int_handler) |
473e66ba | 973 | STCK __LC_MCCK_CLOCK |
3037a52f MS |
974 | la %r1,4095 # validate r1 |
975 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer | |
976 | sckc __LC_CLOCK_COMPARATOR # validate comparator | |
977 | lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs | |
978 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs | |
d5c352cd | 979 | lg %r12,__LC_CURRENT |
9977e886 | 980 | larl %r13,cleanup_critical |
c5328901 | 981 | lmg %r8,%r9,__LC_MCK_OLD_PSW |
83abeffb | 982 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE |
86ed42f4 | 983 | jo .Lmcck_panic # yes -> rest of mcck code invalid |
3037a52f MS |
984 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID |
985 | jno .Lmcck_panic # control registers invalid -> panic | |
986 | la %r14,4095 | |
987 | lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs | |
988 | ptlb | |
2a2d7bef | 989 | lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area |
3037a52f MS |
990 | nill %r11,0xfc00 # MCESA_ORIGIN_MASK |
991 | TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE | |
992 | jno 0f | |
993 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID | |
994 | jno 0f | |
995 | .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC | |
996 | 0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14) | |
997 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID | |
998 | jo 0f | |
999 | sr %r14,%r14 | |
1000 | 0: sfpc %r14 | |
1001 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX | |
1002 | jo 0f | |
1003 | lghi %r14,__LC_FPREGS_SAVE_AREA | |
1004 | ld %f0,0(%r14) | |
1005 | ld %f1,8(%r14) | |
1006 | ld %f2,16(%r14) | |
1007 | ld %f3,24(%r14) | |
1008 | ld %f4,32(%r14) | |
1009 | ld %f5,40(%r14) | |
1010 | ld %f6,48(%r14) | |
1011 | ld %f7,56(%r14) | |
1012 | ld %f8,64(%r14) | |
1013 | ld %f9,72(%r14) | |
1014 | ld %f10,80(%r14) | |
1015 | ld %f11,88(%r14) | |
1016 | ld %f12,96(%r14) | |
1017 | ld %f13,104(%r14) | |
1018 | ld %f14,112(%r14) | |
1019 | ld %f15,120(%r14) | |
1020 | j 1f | |
1021 | 0: VLM %v0,%v15,0,%r11 | |
1022 | VLM %v16,%v31,256,%r11 | |
1023 | 1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA | |
c5328901 | 1024 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) |
83abeffb | 1025 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID |
c5328901 | 1026 | jo 3f |
63b12246 MS |
1027 | la %r14,__LC_SYNC_ENTER_TIMER |
1028 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
1029 | jl 0f | |
1030 | la %r14,__LC_ASYNC_ENTER_TIMER | |
1031 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
c5328901 | 1032 | jl 1f |
63b12246 | 1033 | la %r14,__LC_EXIT_TIMER |
c5328901 MS |
1034 | 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER |
1035 | jl 2f | |
63b12246 | 1036 | la %r14,__LC_LAST_UPDATE_TIMER |
c5328901 | 1037 | 2: spt 0(%r14) |
6377981f | 1038 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) |
3037a52f MS |
1039 | 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID |
1040 | jno .Lmcck_panic | |
1041 | tmhh %r8,0x0001 # interrupting from user ? | |
1042 | jnz 4f | |
1043 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID | |
1044 | jno .Lmcck_panic | |
1045 | 4: SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER | |
86ed42f4 | 1046 | .Lmcck_skip: |
6551fbdf MS |
1047 | lghi %r14,__LC_GPREGS_SAVE_AREA+64 |
1048 | stmg %r0,%r7,__PT_R0(%r11) | |
1049 | mvc __PT_R8(64,%r11),0(%r14) | |
c5328901 | 1050 | stmg %r8,%r9,__PT_PSW(%r11) |
d3a73acb | 1051 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
c5328901 MS |
1052 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
1053 | lgr %r2,%r11 # pass pointer to pt_regs | |
77fa2245 | 1054 | brasl %r14,s390_do_machine_check |
c5328901 | 1055 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 1056 | jno .Lmcck_return |
77fa2245 | 1057 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack |
c5328901 MS |
1058 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
1059 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
1060 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
77fa2245 | 1061 | lgr %r15,%r1 |
c5328901 | 1062 | ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off |
83abeffb | 1063 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 1064 | jno .Lmcck_return |
1f194a4c | 1065 | TRACE_IRQS_OFF |
77fa2245 | 1066 | brasl %r14,s390_handle_mcck |
1f194a4c | 1067 | TRACE_IRQS_ON |
86ed42f4 | 1068 | .Lmcck_return: |
c5328901 MS |
1069 | lg %r14,__LC_VDSO_PER_CPU |
1070 | lmg %r0,%r10,__PT_R0(%r11) | |
1071 | mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW | |
63b12246 MS |
1072 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? |
1073 | jno 0f | |
1074 | stpt __LC_EXIT_TIMER | |
c5328901 MS |
1075 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER |
1076 | 0: lmg %r11,%r15,__PT_R11(%r11) | |
1077 | lpswe __LC_RETURN_MCCK_PSW | |
1078 | ||
86ed42f4 | 1079 | .Lmcck_panic: |
c5328901 | 1080 | lg %r15,__LC_PANIC_STACK |
ce4dda3f | 1081 | la %r11,STACK_FRAME_OVERHEAD(%r15) |
86ed42f4 | 1082 | j .Lmcck_skip |
1da177e4 | 1083 | |
7dd6b334 MH |
1084 | # |
1085 | # PSW restart interrupt handler | |
1086 | # | |
8b646bd7 | 1087 | ENTRY(restart_int_handler) |
e22cf8ca CB |
1088 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
1089 | jz 0f | |
1090 | .insn s,0xb2800000,__LC_LPP | |
1091 | 0: stg %r15,__LC_SAVE_AREA_RESTART | |
8b646bd7 | 1092 | lg %r15,__LC_RESTART_STACK |
c5328901 | 1093 | aghi %r15,-__PT_SIZE # create pt_regs on stack |
8b646bd7 | 1094 | xc 0(__PT_SIZE,%r15),0(%r15) |
c5328901 MS |
1095 | stmg %r0,%r14,__PT_R0(%r15) |
1096 | mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART | |
1097 | mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw | |
8b646bd7 MS |
1098 | aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack |
1099 | xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) | |
fbe76568 HC |
1100 | lg %r1,__LC_RESTART_FN # load fn, parm & source cpu |
1101 | lg %r2,__LC_RESTART_DATA | |
1102 | lg %r3,__LC_RESTART_SOURCE | |
8b646bd7 MS |
1103 | ltgr %r3,%r3 # test source cpu address |
1104 | jm 1f # negative -> skip source stop | |
eb546195 | 1105 | 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu |
8b646bd7 MS |
1106 | brc 10,0b # wait for status stored |
1107 | 1: basr %r14,%r1 # call function | |
1108 | stap __SF_EMPTY(%r15) # store cpu address | |
1109 | llgh %r3,__SF_EMPTY(%r15) | |
eb546195 | 1110 | 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu |
8b646bd7 MS |
1111 | brc 2,2b |
1112 | 3: j 3b | |
7dd6b334 | 1113 | |
860dba45 MS |
1114 | .section .kprobes.text, "ax" |
1115 | ||
1da177e4 LT |
1116 | #ifdef CONFIG_CHECK_STACK |
1117 | /* | |
1118 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
1119 | * No need to properly save the registers, we are going to panic anyway. | |
1120 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
1121 | */ | |
1122 | stack_overflow: | |
dc7ee00d MS |
1123 | lg %r15,__LC_PANIC_STACK # change to panic stack |
1124 | la %r11,STACK_FRAME_OVERHEAD(%r15) | |
c5328901 MS |
1125 | stmg %r0,%r7,__PT_R0(%r11) |
1126 | stmg %r8,%r9,__PT_PSW(%r11) | |
1127 | mvc __PT_R8(64,%r11),0(%r14) | |
1128 | stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 | |
c5328901 MS |
1129 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
1130 | lgr %r2,%r11 # pass pointer to pt_regs | |
1da177e4 LT |
1131 | jg kernel_stack_overflow |
1132 | #endif | |
1133 | ||
1da177e4 | 1134 | cleanup_critical: |
d0fc4107 MS |
1135 | #if IS_ENABLED(CONFIG_KVM) |
1136 | clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap | |
1137 | jl 0f | |
1138 | clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done | |
1139 | jl .Lcleanup_sie | |
1140 | #endif | |
86ed42f4 | 1141 | clg %r9,BASED(.Lcleanup_table) # system_call |
1da177e4 | 1142 | jl 0f |
86ed42f4 MS |
1143 | clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc |
1144 | jl .Lcleanup_system_call | |
1145 | clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif | |
1da177e4 | 1146 | jl 0f |
86ed42f4 MS |
1147 | clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore |
1148 | jl .Lcleanup_sysc_tif | |
1149 | clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done | |
1150 | jl .Lcleanup_sysc_restore | |
1151 | clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif | |
63b12246 | 1152 | jl 0f |
86ed42f4 MS |
1153 | clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore |
1154 | jl .Lcleanup_io_tif | |
1155 | clg %r9,BASED(.Lcleanup_table+56) # .Lio_done | |
1156 | jl .Lcleanup_io_restore | |
1157 | clg %r9,BASED(.Lcleanup_table+64) # psw_idle | |
4c1051e3 | 1158 | jl 0f |
86ed42f4 MS |
1159 | clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end |
1160 | jl .Lcleanup_idle | |
9977e886 HB |
1161 | clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs |
1162 | jl 0f | |
1163 | clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end | |
1164 | jl .Lcleanup_save_fpu_regs | |
1165 | clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs | |
1166 | jl 0f | |
1167 | clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end | |
1168 | jl .Lcleanup_load_fpu_regs | |
c5328901 MS |
1169 | 0: br %r14 |
1170 | ||
d0fc4107 MS |
1171 | .align 8 |
1172 | .Lcleanup_table: | |
1173 | .quad system_call | |
1174 | .quad .Lsysc_do_svc | |
1175 | .quad .Lsysc_tif | |
1176 | .quad .Lsysc_restore | |
1177 | .quad .Lsysc_done | |
1178 | .quad .Lio_tif | |
1179 | .quad .Lio_restore | |
1180 | .quad .Lio_done | |
1181 | .quad psw_idle | |
1182 | .quad .Lpsw_idle_end | |
1183 | .quad save_fpu_regs | |
1184 | .quad .Lsave_fpu_regs_end | |
1185 | .quad load_fpu_regs | |
1186 | .quad .Lload_fpu_regs_end | |
d0fc4107 MS |
1187 | |
1188 | #if IS_ENABLED(CONFIG_KVM) | |
1189 | .Lcleanup_table_sie: | |
1190 | .quad .Lsie_gmap | |
1191 | .quad .Lsie_done | |
1192 | ||
1193 | .Lcleanup_sie: | |
c929500d QH |
1194 | cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt? |
1195 | je 1f | |
1196 | slg %r9,BASED(.Lsie_crit_mcck_start) | |
1197 | clg %r9,BASED(.Lsie_crit_mcck_length) | |
1198 | jh 1f | |
1199 | oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST | |
1200 | 1: lg %r9,__SF_EMPTY(%r15) # get control block pointer | |
e22cf8ca | 1201 | ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE |
d0fc4107 MS |
1202 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
1203 | larl %r9,sie_exit # skip forward to sie_exit | |
1204 | br %r14 | |
1205 | #endif | |
1da177e4 | 1206 | |
86ed42f4 | 1207 | .Lcleanup_system_call: |
c5328901 | 1208 | # check if stpt has been executed |
86ed42f4 | 1209 | clg %r9,BASED(.Lcleanup_system_call_insn) |
1da177e4 LT |
1210 | jh 0f |
1211 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
c5328901 | 1212 | cghi %r11,__LC_SAVE_AREA_ASYNC |
6377981f | 1213 | je 0f |
c5328901 MS |
1214 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER |
1215 | 0: # check if stmg has been executed | |
86ed42f4 | 1216 | clg %r9,BASED(.Lcleanup_system_call_insn+8) |
1da177e4 | 1217 | jh 0f |
c5328901 MS |
1218 | mvc __LC_SAVE_AREA_SYNC(64),0(%r11) |
1219 | 0: # check if base register setup + TIF bit load has been done | |
86ed42f4 | 1220 | clg %r9,BASED(.Lcleanup_system_call_insn+16) |
c5328901 | 1221 | jhe 0f |
34525e1f MS |
1222 | # set up saved register r12 task struct pointer |
1223 | stg %r12,32(%r11) | |
1224 | # set up saved register r13 __TASK_thread offset | |
1225 | mvc 40(8,%r11),BASED(.Lcleanup_system_call_const) | |
c5328901 | 1226 | 0: # check if the user time update has been done |
86ed42f4 | 1227 | clg %r9,BASED(.Lcleanup_system_call_insn+24) |
c5328901 MS |
1228 | jh 0f |
1229 | lg %r15,__LC_EXIT_TIMER | |
1230 | slg %r15,__LC_SYNC_ENTER_TIMER | |
1231 | alg %r15,__LC_USER_TIMER | |
1232 | stg %r15,__LC_USER_TIMER | |
1233 | 0: # check if the system time update has been done | |
86ed42f4 | 1234 | clg %r9,BASED(.Lcleanup_system_call_insn+32) |
c5328901 MS |
1235 | jh 0f |
1236 | lg %r15,__LC_LAST_UPDATE_TIMER | |
1237 | slg %r15,__LC_EXIT_TIMER | |
1238 | alg %r15,__LC_SYSTEM_TIMER | |
1239 | stg %r15,__LC_SYSTEM_TIMER | |
1240 | 0: # update accounting time stamp | |
1da177e4 | 1241 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER |
34525e1f | 1242 | # set up saved register r11 |
c5328901 | 1243 | lg %r15,__LC_KERNEL_STACK |
dc7ee00d MS |
1244 | la %r9,STACK_FRAME_OVERHEAD(%r15) |
1245 | stg %r9,24(%r11) # r11 pt_regs pointer | |
c5328901 | 1246 | # fill pt_regs |
dc7ee00d MS |
1247 | mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC |
1248 | stmg %r0,%r7,__PT_R0(%r9) | |
1249 | mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW | |
1250 | mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC | |
d3a73acb MS |
1251 | xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) |
1252 | mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL | |
c5328901 | 1253 | # setup saved register r15 |
c5328901 MS |
1254 | stg %r15,56(%r11) # r15 stack pointer |
1255 | # set new psw address and exit | |
86ed42f4 | 1256 | larl %r9,.Lsysc_do_svc |
1da177e4 | 1257 | br %r14 |
86ed42f4 | 1258 | .Lcleanup_system_call_insn: |
25d83cbf | 1259 | .quad system_call |
86ed42f4 MS |
1260 | .quad .Lsysc_stmg |
1261 | .quad .Lsysc_per | |
a359bb11 | 1262 | .quad .Lsysc_vtime+36 |
86ed42f4 | 1263 | .quad .Lsysc_vtime+42 |
34525e1f MS |
1264 | .Lcleanup_system_call_const: |
1265 | .quad __TASK_thread | |
1da177e4 | 1266 | |
86ed42f4 MS |
1267 | .Lcleanup_sysc_tif: |
1268 | larl %r9,.Lsysc_tif | |
1da177e4 LT |
1269 | br %r14 |
1270 | ||
86ed42f4 | 1271 | .Lcleanup_sysc_restore: |
07a63cbe | 1272 | # check if stpt has been executed |
86ed42f4 | 1273 | clg %r9,BASED(.Lcleanup_sysc_restore_insn) |
07a63cbe MS |
1274 | jh 0f |
1275 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
1276 | cghi %r11,__LC_SAVE_AREA_ASYNC | |
6377981f | 1277 | je 0f |
07a63cbe MS |
1278 | mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER |
1279 | 0: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8) | |
1280 | je 1f | |
c5328901 MS |
1281 | lg %r9,24(%r11) # get saved pointer to pt_regs |
1282 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
1283 | mvc 0(64,%r11),__PT_R8(%r9) | |
1284 | lmg %r0,%r7,__PT_R0(%r9) | |
07a63cbe | 1285 | 1: lmg %r8,%r9,__LC_RETURN_PSW |
1da177e4 | 1286 | br %r14 |
86ed42f4 | 1287 | .Lcleanup_sysc_restore_insn: |
07a63cbe | 1288 | .quad .Lsysc_exit_timer |
86ed42f4 | 1289 | .quad .Lsysc_done - 4 |
1da177e4 | 1290 | |
86ed42f4 MS |
1291 | .Lcleanup_io_tif: |
1292 | larl %r9,.Lio_tif | |
176b1803 MS |
1293 | br %r14 |
1294 | ||
86ed42f4 | 1295 | .Lcleanup_io_restore: |
07a63cbe | 1296 | # check if stpt has been executed |
86ed42f4 | 1297 | clg %r9,BASED(.Lcleanup_io_restore_insn) |
07a63cbe MS |
1298 | jh 0f |
1299 | mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER | |
1300 | 0: clg %r9,BASED(.Lcleanup_io_restore_insn+8) | |
1301 | je 1f | |
c5328901 MS |
1302 | lg %r9,24(%r11) # get saved r11 pointer to pt_regs |
1303 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
c5328901 MS |
1304 | mvc 0(64,%r11),__PT_R8(%r9) |
1305 | lmg %r0,%r7,__PT_R0(%r9) | |
07a63cbe | 1306 | 1: lmg %r8,%r9,__LC_RETURN_PSW |
ae6aa2ea | 1307 | br %r14 |
86ed42f4 | 1308 | .Lcleanup_io_restore_insn: |
07a63cbe | 1309 | .quad .Lio_exit_timer |
86ed42f4 | 1310 | .quad .Lio_done - 4 |
ae6aa2ea | 1311 | |
86ed42f4 | 1312 | .Lcleanup_idle: |
419123f9 | 1313 | ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT |
4c1051e3 | 1314 | # copy interrupt clock & cpu timer |
27f6b416 MS |
1315 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK |
1316 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER | |
4c1051e3 MS |
1317 | cghi %r11,__LC_SAVE_AREA_ASYNC |
1318 | je 0f | |
27f6b416 MS |
1319 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK |
1320 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER | |
4c1051e3 | 1321 | 0: # check if stck & stpt have been executed |
86ed42f4 | 1322 | clg %r9,BASED(.Lcleanup_idle_insn) |
4c1051e3 | 1323 | jhe 1f |
27f6b416 MS |
1324 | mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) |
1325 | mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) | |
72d38b19 MS |
1326 | 1: # calculate idle cycles |
1327 | #ifdef CONFIG_SMP | |
1328 | clg %r9,BASED(.Lcleanup_idle_insn) | |
1329 | jl 3f | |
1330 | larl %r1,smp_cpu_mtid | |
1331 | llgf %r1,0(%r1) | |
1332 | ltgr %r1,%r1 | |
1333 | jz 3f | |
1334 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) | |
1335 | larl %r3,mt_cycles | |
1336 | ag %r3,__LC_PERCPU_OFFSET | |
1337 | la %r4,__SF_EMPTY+16(%r15) | |
1338 | 2: lg %r0,0(%r3) | |
1339 | slg %r0,0(%r4) | |
1340 | alg %r0,64(%r4) | |
1341 | stg %r0,0(%r3) | |
1342 | la %r3,8(%r3) | |
1343 | la %r4,8(%r4) | |
1344 | brct %r1,2b | |
1345 | #endif | |
1346 | 3: # account system time going idle | |
4c1051e3 | 1347 | lg %r9,__LC_STEAL_TIMER |
27f6b416 | 1348 | alg %r9,__CLOCK_IDLE_ENTER(%r2) |
4c1051e3 MS |
1349 | slg %r9,__LC_LAST_UPDATE_CLOCK |
1350 | stg %r9,__LC_STEAL_TIMER | |
27f6b416 | 1351 | mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) |
4c1051e3 MS |
1352 | lg %r9,__LC_SYSTEM_TIMER |
1353 | alg %r9,__LC_LAST_UPDATE_TIMER | |
27f6b416 | 1354 | slg %r9,__TIMER_IDLE_ENTER(%r2) |
4c1051e3 | 1355 | stg %r9,__LC_SYSTEM_TIMER |
27f6b416 | 1356 | mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) |
4c1051e3 | 1357 | # prepare return psw |
0587d409 | 1358 | nihh %r8,0xfcfd # clear irq & wait state bits |
4c1051e3 MS |
1359 | lg %r9,48(%r11) # return from psw_idle |
1360 | br %r14 | |
86ed42f4 MS |
1361 | .Lcleanup_idle_insn: |
1362 | .quad .Lpsw_idle_lpsw | |
4c1051e3 | 1363 | |
9977e886 | 1364 | .Lcleanup_save_fpu_regs: |
e370e476 | 1365 | larl %r9,save_fpu_regs |
9977e886 | 1366 | br %r14 |
9977e886 HB |
1367 | |
1368 | .Lcleanup_load_fpu_regs: | |
e370e476 | 1369 | larl %r9,load_fpu_regs |
9977e886 | 1370 | br %r14 |
9977e886 | 1371 | |
1da177e4 LT |
1372 | /* |
1373 | * Integer constants | |
1374 | */ | |
c5328901 | 1375 | .align 8 |
1da177e4 | 1376 | .Lcritical_start: |
86ed42f4 | 1377 | .quad .L__critical_start |
c5328901 | 1378 | .Lcritical_length: |
86ed42f4 | 1379 | .quad .L__critical_end - .L__critical_start |
61aa4884 | 1380 | #if IS_ENABLED(CONFIG_KVM) |
d0fc4107 | 1381 | .Lsie_critical_start: |
86ed42f4 | 1382 | .quad .Lsie_gmap |
7c470539 | 1383 | .Lsie_critical_length: |
86ed42f4 | 1384 | .quad .Lsie_done - .Lsie_gmap |
c929500d QH |
1385 | .Lsie_crit_mcck_start: |
1386 | .quad .Lsie_entry | |
1387 | .Lsie_crit_mcck_length: | |
1388 | .quad .Lsie_skip - .Lsie_entry | |
603d1a50 MS |
1389 | #endif |
1390 | ||
a876cb3f HC |
1391 | .section .rodata, "a" |
1392 | #define SYSCALL(esame,emu) .long esame | |
9bf1226b | 1393 | .globl sys_call_table |
1da177e4 LT |
1394 | sys_call_table: |
1395 | #include "syscalls.S" | |
1396 | #undef SYSCALL | |
1397 | ||
347a8dc3 | 1398 | #ifdef CONFIG_COMPAT |
1da177e4 | 1399 | |
a876cb3f | 1400 | #define SYSCALL(esame,emu) .long emu |
61649881 | 1401 | .globl sys_call_table_emu |
1da177e4 LT |
1402 | sys_call_table_emu: |
1403 | #include "syscalls.S" | |
1404 | #undef SYSCALL | |
1405 | #endif |