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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/entry.S | |
3 | * S390 low-level entry points. | |
4 | * | |
5 | * S390 version | |
6 | * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
7 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), | |
8 | * Hartmut Penner (hp@de.ibm.com), | |
9 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 10 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
11 | */ |
12 | ||
13 | #include <linux/sys.h> | |
14 | #include <linux/linkage.h> | |
15 | #include <linux/config.h> | |
16 | #include <asm/cache.h> | |
17 | #include <asm/lowcore.h> | |
18 | #include <asm/errno.h> | |
19 | #include <asm/ptrace.h> | |
20 | #include <asm/thread_info.h> | |
0013a854 | 21 | #include <asm/asm-offsets.h> |
1da177e4 LT |
22 | #include <asm/unistd.h> |
23 | #include <asm/page.h> | |
24 | ||
25 | /* | |
26 | * Stack layout for the system_call stack entry. | |
27 | * The first few entries are identical to the user_regs_struct. | |
28 | */ | |
29 | SP_PTREGS = STACK_FRAME_OVERHEAD | |
30 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
31 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
32 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
33 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 | |
34 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
35 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 | |
36 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
37 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 | |
38 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
39 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 | |
40 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
41 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36 | |
42 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
43 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44 | |
44 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
45 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52 | |
46 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
47 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60 | |
48 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
49 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
50 | SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP | |
51 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE | |
52 | ||
77fa2245 | 53 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING | \ |
1da177e4 | 54 | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) |
77fa2245 | 55 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING) |
1da177e4 LT |
56 | |
57 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
58 | STACK_SIZE = 1 << STACK_SHIFT | |
59 | ||
60 | #define BASED(name) name-system_call(%r13) | |
61 | ||
62 | /* | |
63 | * Register usage in interrupt handlers: | |
64 | * R9 - pointer to current task structure | |
65 | * R13 - pointer to literal pool | |
66 | * R14 - return register for function calls | |
67 | * R15 - kernel stack pointer | |
68 | */ | |
69 | ||
70 | .macro STORE_TIMER lc_offset | |
71 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
72 | stpt \lc_offset | |
73 | #endif | |
74 | .endm | |
75 | ||
76 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
77 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum | |
78 | lm %r10,%r11,\lc_from | |
79 | sl %r10,\lc_to | |
80 | sl %r11,\lc_to+4 | |
81 | bc 3,BASED(0f) | |
82 | sl %r10,BASED(.Lc_1) | |
83 | 0: al %r10,\lc_sum | |
84 | al %r11,\lc_sum+4 | |
85 | bc 12,BASED(1f) | |
86 | al %r10,BASED(.Lc_1) | |
87 | 1: stm %r10,%r11,\lc_sum | |
88 | .endm | |
89 | #endif | |
90 | ||
91 | .macro SAVE_ALL_BASE savearea | |
92 | stm %r12,%r15,\savearea | |
93 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 | |
94 | .endm | |
95 | ||
96 | .macro SAVE_ALL psworg,savearea,sync | |
97 | la %r12,\psworg | |
98 | .if \sync | |
99 | tm \psworg+1,0x01 # test problem state bit | |
100 | bz BASED(2f) # skip stack setup save | |
101 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
102 | .else | |
103 | tm \psworg+1,0x01 # test problem state bit | |
104 | bnz BASED(1f) # from user -> load async stack | |
105 | clc \psworg+4(4),BASED(.Lcritical_end) | |
106 | bhe BASED(0f) | |
107 | clc \psworg+4(4),BASED(.Lcritical_start) | |
108 | bl BASED(0f) | |
109 | l %r14,BASED(.Lcleanup_critical) | |
110 | basr %r14,%r14 | |
111 | tm 0(%r12),0x01 # retest problem state after cleanup | |
112 | bnz BASED(1f) | |
113 | 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ? | |
114 | slr %r14,%r15 | |
115 | sra %r14,STACK_SHIFT | |
116 | be BASED(2f) | |
117 | 1: l %r15,__LC_ASYNC_STACK | |
118 | .endif | |
119 | #ifdef CONFIG_CHECK_STACK | |
120 | b BASED(3f) | |
121 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
122 | bz BASED(stack_overflow) | |
123 | 3: | |
124 | #endif | |
77fa2245 HC |
125 | 2: |
126 | .endm | |
127 | ||
128 | .macro CREATE_STACK_FRAME psworg,savearea | |
129 | s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
1da177e4 LT |
130 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack |
131 | la %r12,\psworg | |
132 | st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 | |
133 | icm %r12,12,__LC_SVC_ILC | |
134 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
135 | st %r12,SP_ILC(%r15) | |
136 | mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack | |
137 | la %r12,0 | |
138 | st %r12,__SF_BACKCHAIN(%r15) # clear back chain | |
139 | .endm | |
140 | ||
ae6aa2ea MS |
141 | .macro RESTORE_ALL psworg,sync |
142 | mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore | |
1da177e4 | 143 | .if !\sync |
ae6aa2ea | 144 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 LT |
145 | .endif |
146 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user | |
147 | STORE_TIMER __LC_EXIT_TIMER | |
ae6aa2ea | 148 | lpsw \psworg # back to caller |
1da177e4 LT |
149 | .endm |
150 | ||
151 | /* | |
152 | * Scheduler resume function, called by switch_to | |
153 | * gpr2 = (task_struct *) prev | |
154 | * gpr3 = (task_struct *) next | |
155 | * Returns: | |
156 | * gpr2 = prev | |
157 | */ | |
158 | .globl __switch_to | |
159 | __switch_to: | |
160 | basr %r1,0 | |
161 | __switch_to_base: | |
162 | tm __THREAD_per(%r3),0xe8 # new process is using per ? | |
163 | bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine | |
164 | stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff | |
165 | clc __THREAD_per(12,%r3),__SF_EMPTY(%r15) | |
166 | be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's | |
167 | lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
168 | __switch_to_noper: | |
77fa2245 HC |
169 | l %r4,__THREAD_info(%r2) # get thread_info of prev |
170 | tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? | |
171 | bz __switch_to_no_mcck-__switch_to_base(%r1) | |
172 | ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
173 | l %r4,__THREAD_info(%r3) # get thread_info of next | |
174 | oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next | |
175 | __switch_to_no_mcck: | |
1da177e4 LT |
176 | stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
177 | st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp | |
178 | l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
179 | lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task | |
180 | st %r3,__LC_CURRENT # __LC_CURRENT = current task struct | |
181 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
182 | l %r3,__THREAD_info(%r3) # load thread_info from task struct | |
183 | st %r3,__LC_THREAD_INFO | |
184 | ahi %r3,STACK_SIZE | |
185 | st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
186 | br %r14 | |
187 | ||
188 | __critical_start: | |
189 | /* | |
190 | * SVC interrupt handler routine. System calls are synchronous events and | |
191 | * are executed with interrupts enabled. | |
192 | */ | |
193 | ||
194 | .globl system_call | |
195 | system_call: | |
196 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
197 | sysc_saveall: | |
198 | SAVE_ALL_BASE __LC_SAVE_AREA | |
199 | SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 | |
77fa2245 | 200 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
201 | lh %r7,0x8a # get svc number from lowcore |
202 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
203 | sysc_vtime: | |
204 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
205 | bz BASED(sysc_do_svc) | |
206 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
207 | sysc_stime: | |
208 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
209 | sysc_update: | |
210 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
211 | #endif | |
212 | sysc_do_svc: | |
213 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
214 | sla %r7,2 # *4 and test for svc 0 | |
215 | bnz BASED(sysc_nr_ok) # svc number > 0 | |
216 | # svc 0: system call number in %r1 | |
217 | cl %r1,BASED(.Lnr_syscalls) | |
218 | bnl BASED(sysc_nr_ok) | |
219 | lr %r7,%r1 # copy svc number to %r7 | |
220 | sla %r7,2 # *4 | |
221 | sysc_nr_ok: | |
222 | mvc SP_ARGS(4,%r15),SP_R7(%r15) | |
223 | sysc_do_restart: | |
224 | tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
225 | l %r8,sys_call_table-system_call(%r7,%r13) # get system call addr. | |
226 | bnz BASED(sysc_tracesys) | |
227 | basr %r14,%r8 # call sys_xxxx | |
228 | st %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
229 | # ATTENTION: check sys_execve_glue before | |
230 | # changing anything here !! | |
231 | ||
232 | sysc_return: | |
233 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
234 | bno BASED(sysc_leave) | |
235 | tm __TI_flags+3(%r9),_TIF_WORK_SVC | |
236 | bnz BASED(sysc_work) # there is work to do (signals etc.) | |
237 | sysc_leave: | |
ae6aa2ea | 238 | RESTORE_ALL __LC_RETURN_PSW,1 |
1da177e4 LT |
239 | |
240 | # | |
241 | # recheck if there is more work to do | |
242 | # | |
243 | sysc_work_loop: | |
244 | tm __TI_flags+3(%r9),_TIF_WORK_SVC | |
245 | bz BASED(sysc_leave) # there is no work to do | |
246 | # | |
247 | # One of the work bits is on. Find out which one. | |
248 | # | |
249 | sysc_work: | |
77fa2245 HC |
250 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
251 | bo BASED(sysc_mcck_pending) | |
1da177e4 LT |
252 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
253 | bo BASED(sysc_reschedule) | |
254 | tm __TI_flags+3(%r9),_TIF_SIGPENDING | |
255 | bo BASED(sysc_sigpending) | |
256 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC | |
257 | bo BASED(sysc_restart) | |
258 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
259 | bo BASED(sysc_singlestep) | |
260 | b BASED(sysc_leave) | |
261 | ||
262 | # | |
263 | # _TIF_NEED_RESCHED is set, call schedule | |
264 | # | |
265 | sysc_reschedule: | |
266 | l %r1,BASED(.Lschedule) | |
267 | la %r14,BASED(sysc_work_loop) | |
268 | br %r1 # call scheduler | |
269 | ||
77fa2245 HC |
270 | # |
271 | # _TIF_MCCK_PENDING is set, call handler | |
272 | # | |
273 | sysc_mcck_pending: | |
274 | l %r1,BASED(.Ls390_handle_mcck) | |
275 | la %r14,BASED(sysc_work_loop) | |
276 | br %r1 # TIF bit will be cleared by handler | |
277 | ||
1da177e4 LT |
278 | # |
279 | # _TIF_SIGPENDING is set, call do_signal | |
280 | # | |
281 | sysc_sigpending: | |
282 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP | |
283 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
284 | sr %r3,%r3 # clear *oldset | |
285 | l %r1,BASED(.Ldo_signal) | |
286 | basr %r14,%r1 # call do_signal | |
287 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC | |
288 | bo BASED(sysc_restart) | |
289 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
290 | bo BASED(sysc_singlestep) | |
291 | b BASED(sysc_leave) # out of here, do NOT recheck | |
292 | ||
293 | # | |
294 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
295 | # | |
296 | sysc_restart: | |
297 | ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC | |
298 | l %r7,SP_R2(%r15) # load new svc number | |
299 | sla %r7,2 | |
300 | mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument | |
301 | lm %r2,%r6,SP_R2(%r15) # load svc arguments | |
302 | b BASED(sysc_do_restart) # restart svc | |
303 | ||
304 | # | |
305 | # _TIF_SINGLE_STEP is set, call do_single_step | |
306 | # | |
307 | sysc_singlestep: | |
308 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP | |
309 | mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check | |
310 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
311 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
312 | la %r14,BASED(sysc_return) # load adr. of system return | |
313 | br %r1 # branch to do_single_step | |
314 | ||
1da177e4 LT |
315 | # |
316 | # call trace before and after sys_call | |
317 | # | |
318 | sysc_tracesys: | |
319 | l %r1,BASED(.Ltrace) | |
320 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
321 | la %r3,0 | |
322 | srl %r7,2 | |
323 | st %r7,SP_R2(%r15) | |
324 | basr %r14,%r1 | |
325 | clc SP_R2(4,%r15),BASED(.Lnr_syscalls) | |
326 | bnl BASED(sysc_tracenogo) | |
327 | l %r7,SP_R2(%r15) # strace might have changed the | |
328 | sll %r7,2 # system call | |
329 | l %r8,sys_call_table-system_call(%r7,%r13) | |
330 | sysc_tracego: | |
331 | lm %r3,%r6,SP_R3(%r15) | |
332 | l %r2,SP_ORIG_R2(%r15) | |
333 | basr %r14,%r8 # call sys_xxx | |
334 | st %r2,SP_R2(%r15) # store return value | |
335 | sysc_tracenogo: | |
336 | tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
337 | bz BASED(sysc_return) | |
338 | l %r1,BASED(.Ltrace) | |
339 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
340 | la %r3,1 | |
341 | la %r14,BASED(sysc_return) | |
342 | br %r1 | |
343 | ||
344 | # | |
345 | # a new process exits the kernel with ret_from_fork | |
346 | # | |
347 | .globl ret_from_fork | |
348 | ret_from_fork: | |
349 | l %r13,__LC_SVC_NEW_PSW+4 | |
350 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
351 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? | |
352 | bo BASED(0f) | |
353 | st %r15,SP_R15(%r15) # store stack pointer for new kthread | |
354 | 0: l %r1,BASED(.Lschedtail) | |
355 | basr %r14,%r1 | |
356 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
357 | b BASED(sysc_return) | |
358 | ||
359 | # | |
360 | # clone, fork, vfork, exec and sigreturn need glue, | |
361 | # because they all expect pt_regs as parameter, | |
362 | # but are called with different parameter. | |
363 | # return-address is set up above | |
364 | # | |
365 | sys_clone_glue: | |
366 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
367 | l %r1,BASED(.Lclone) | |
368 | br %r1 # branch to sys_clone | |
369 | ||
370 | sys_fork_glue: | |
371 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
372 | l %r1,BASED(.Lfork) | |
373 | br %r1 # branch to sys_fork | |
374 | ||
375 | sys_vfork_glue: | |
376 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
377 | l %r1,BASED(.Lvfork) | |
378 | br %r1 # branch to sys_vfork | |
379 | ||
380 | sys_execve_glue: | |
381 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
382 | l %r1,BASED(.Lexecve) | |
383 | lr %r12,%r14 # save return address | |
384 | basr %r14,%r1 # call sys_execve | |
385 | ltr %r2,%r2 # check if execve failed | |
386 | bnz 0(%r12) # it did fail -> store result in gpr2 | |
387 | b 4(%r12) # SKIP ST 2,SP_R2(15) after BASR 14,8 | |
388 | # in system_call/sysc_tracesys | |
389 | ||
390 | sys_sigreturn_glue: | |
391 | la %r2,SP_PTREGS(%r15) # load pt_regs as parameter | |
392 | l %r1,BASED(.Lsigreturn) | |
393 | br %r1 # branch to sys_sigreturn | |
394 | ||
395 | sys_rt_sigreturn_glue: | |
396 | la %r2,SP_PTREGS(%r15) # load pt_regs as parameter | |
397 | l %r1,BASED(.Lrt_sigreturn) | |
398 | br %r1 # branch to sys_sigreturn | |
399 | ||
400 | # | |
401 | # sigsuspend and rt_sigsuspend need pt_regs as an additional | |
402 | # parameter and they have to skip the store of %r2 into the | |
403 | # user register %r2 because the return value was set in | |
404 | # sigsuspend and rt_sigsuspend already and must not be overwritten! | |
405 | # | |
406 | ||
407 | sys_sigsuspend_glue: | |
408 | lr %r5,%r4 # move mask back | |
409 | lr %r4,%r3 # move history1 parameter | |
410 | lr %r3,%r2 # move history0 parameter | |
411 | la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter | |
412 | l %r1,BASED(.Lsigsuspend) | |
413 | la %r14,4(%r14) # skip store of return value | |
414 | br %r1 # branch to sys_sigsuspend | |
415 | ||
416 | sys_rt_sigsuspend_glue: | |
417 | lr %r4,%r3 # move sigsetsize parameter | |
418 | lr %r3,%r2 # move unewset parameter | |
419 | la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter | |
420 | l %r1,BASED(.Lrt_sigsuspend) | |
421 | la %r14,4(%r14) # skip store of return value | |
422 | br %r1 # branch to sys_rt_sigsuspend | |
423 | ||
424 | sys_sigaltstack_glue: | |
425 | la %r4,SP_PTREGS(%r15) # load pt_regs as parameter | |
426 | l %r1,BASED(.Lsigaltstack) | |
427 | br %r1 # branch to sys_sigreturn | |
428 | ||
429 | ||
430 | /* | |
431 | * Program check handler routine | |
432 | */ | |
433 | ||
434 | .globl pgm_check_handler | |
435 | pgm_check_handler: | |
436 | /* | |
437 | * First we need to check for a special case: | |
438 | * Single stepping an instruction that disables the PER event mask will | |
439 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
440 | * For a single stepped SVC the program check handler gets control after | |
441 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
442 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
443 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
444 | * if we have to load the kernel stack register. | |
445 | * For every other possible cause for PER event without the PER mask set | |
446 | * we just ignore the PER event (FIXME: is there anything we have to do | |
447 | * for LPSW?). | |
448 | */ | |
449 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
450 | SAVE_ALL_BASE __LC_SAVE_AREA | |
451 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception | |
452 | bnz BASED(pgm_per) # got per exception -> special case | |
453 | SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1 | |
77fa2245 | 454 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
455 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
456 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
457 | bz BASED(pgm_no_vtime) | |
458 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
459 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
460 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
461 | pgm_no_vtime: | |
462 | #endif | |
463 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
464 | l %r3,__LC_PGM_ILC # load program interruption code | |
465 | la %r8,0x7f | |
466 | nr %r8,%r3 | |
467 | pgm_do_call: | |
468 | l %r7,BASED(.Ljump_table) | |
469 | sll %r8,2 | |
470 | l %r7,0(%r8,%r7) # load address of handler routine | |
471 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
472 | la %r14,BASED(sysc_return) | |
473 | br %r7 # branch to interrupt-handler | |
474 | ||
475 | # | |
476 | # handle per exception | |
477 | # | |
478 | pgm_per: | |
479 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on | |
480 | bnz BASED(pgm_per_std) # ok, normal per event from user space | |
481 | # ok its one of the special cases, now we need to find out which one | |
482 | clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW | |
483 | be BASED(pgm_svcper) | |
484 | # no interesting special case, ignore PER event | |
485 | lm %r12,%r15,__LC_SAVE_AREA | |
486 | lpsw 0x28 | |
487 | ||
488 | # | |
489 | # Normal per exception | |
490 | # | |
491 | pgm_per_std: | |
492 | SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1 | |
77fa2245 | 493 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
494 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
495 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
496 | bz BASED(pgm_no_vtime2) | |
497 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
498 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
499 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
500 | pgm_no_vtime2: | |
501 | #endif | |
502 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
503 | l %r1,__TI_task(%r9) | |
504 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
505 | mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS | |
506 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
507 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
508 | l %r3,__LC_PGM_ILC # load program interruption code | |
509 | la %r8,0x7f | |
510 | nr %r8,%r3 # clear per-event-bit and ilc | |
511 | be BASED(sysc_return) # only per or per+check ? | |
512 | b BASED(pgm_do_call) | |
513 | ||
514 | # | |
515 | # it was a single stepped SVC that is causing all the trouble | |
516 | # | |
517 | pgm_svcper: | |
518 | SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 | |
77fa2245 | 519 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
520 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
521 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
522 | bz BASED(pgm_no_vtime3) | |
523 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
524 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
525 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
526 | pgm_no_vtime3: | |
527 | #endif | |
528 | lh %r7,0x8a # get svc number from lowcore | |
529 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
530 | l %r1,__TI_task(%r9) | |
531 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
532 | mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS | |
533 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
534 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
535 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
536 | b BASED(sysc_do_svc) | |
537 | ||
538 | /* | |
539 | * IO interrupt handler routine | |
540 | */ | |
541 | ||
542 | .globl io_int_handler | |
543 | io_int_handler: | |
544 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
545 | stck __LC_INT_CLOCK | |
546 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | |
547 | SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+16,0 | |
77fa2245 | 548 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
549 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
550 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
551 | bz BASED(io_no_vtime) | |
552 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
553 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
554 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
555 | io_no_vtime: | |
556 | #endif | |
557 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
558 | l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ | |
559 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
560 | basr %r14,%r1 # branch to standard irq handler | |
561 | ||
562 | io_return: | |
563 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
564 | #ifdef CONFIG_PREEMPT | |
565 | bno BASED(io_preempt) # no -> check for preemptive scheduling | |
566 | #else | |
567 | bno BASED(io_leave) # no-> skip resched & signal | |
568 | #endif | |
569 | tm __TI_flags+3(%r9),_TIF_WORK_INT | |
570 | bnz BASED(io_work) # there is work to do (signals etc.) | |
571 | io_leave: | |
ae6aa2ea MS |
572 | RESTORE_ALL __LC_RETURN_PSW,0 |
573 | io_done: | |
1da177e4 LT |
574 | |
575 | #ifdef CONFIG_PREEMPT | |
576 | io_preempt: | |
577 | icm %r0,15,__TI_precount(%r9) | |
578 | bnz BASED(io_leave) | |
579 | l %r1,SP_R15(%r15) | |
580 | s %r1,BASED(.Lc_spsize) | |
581 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
582 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
583 | lr %r15,%r1 | |
584 | io_resume_loop: | |
585 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED | |
586 | bno BASED(io_leave) | |
587 | mvc __TI_precount(4,%r9),BASED(.Lc_pactive) | |
588 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
589 | l %r1,BASED(.Lschedule) | |
590 | basr %r14,%r1 # call schedule | |
591 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
592 | xc __TI_precount(4,%r9),__TI_precount(%r9) | |
593 | b BASED(io_resume_loop) | |
594 | #endif | |
595 | ||
596 | # | |
597 | # switch to kernel stack, then check the TIF bits | |
598 | # | |
599 | io_work: | |
600 | l %r1,__LC_KERNEL_STACK | |
601 | s %r1,BASED(.Lc_spsize) | |
602 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
603 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
604 | lr %r15,%r1 | |
605 | # | |
606 | # One of the work bits is on. Find out which one. | |
77fa2245 | 607 | # Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED and _TIF_MCCK_PENDING |
1da177e4 LT |
608 | # |
609 | io_work_loop: | |
77fa2245 HC |
610 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
611 | bo BASED(io_mcck_pending) | |
1da177e4 LT |
612 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
613 | bo BASED(io_reschedule) | |
614 | tm __TI_flags+3(%r9),_TIF_SIGPENDING | |
615 | bo BASED(io_sigpending) | |
616 | b BASED(io_leave) | |
617 | ||
77fa2245 HC |
618 | # |
619 | # _TIF_MCCK_PENDING is set, call handler | |
620 | # | |
621 | io_mcck_pending: | |
622 | l %r1,BASED(.Ls390_handle_mcck) | |
ae6aa2ea | 623 | la %r14,BASED(io_work_loop) |
77fa2245 HC |
624 | br %r1 # TIF bit will be cleared by handler |
625 | ||
1da177e4 LT |
626 | # |
627 | # _TIF_NEED_RESCHED is set, call schedule | |
628 | # | |
629 | io_reschedule: | |
630 | l %r1,BASED(.Lschedule) | |
631 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
632 | basr %r14,%r1 # call scheduler | |
633 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
634 | tm __TI_flags+3(%r9),_TIF_WORK_INT | |
635 | bz BASED(io_leave) # there is no work to do | |
636 | b BASED(io_work_loop) | |
637 | ||
638 | # | |
639 | # _TIF_SIGPENDING is set, call do_signal | |
640 | # | |
641 | io_sigpending: | |
642 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
643 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
644 | sr %r3,%r3 # clear *oldset | |
645 | l %r1,BASED(.Ldo_signal) | |
646 | basr %r14,%r1 # call do_signal | |
647 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
648 | b BASED(io_leave) # out of here, do NOT recheck | |
649 | ||
650 | /* | |
651 | * External interrupt handler routine | |
652 | */ | |
653 | ||
654 | .globl ext_int_handler | |
655 | ext_int_handler: | |
656 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
657 | stck __LC_INT_CLOCK | |
658 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | |
659 | SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16,0 | |
77fa2245 | 660 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
661 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
662 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
663 | bz BASED(ext_no_vtime) | |
664 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
665 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
666 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
667 | ext_no_vtime: | |
668 | #endif | |
669 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
670 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
671 | lh %r3,__LC_EXT_INT_CODE # get interruption code | |
672 | l %r1,BASED(.Ldo_extint) | |
673 | basr %r14,%r1 | |
674 | b BASED(io_return) | |
675 | ||
ae6aa2ea MS |
676 | __critical_end: |
677 | ||
1da177e4 LT |
678 | /* |
679 | * Machine check handler routines | |
680 | */ | |
681 | ||
682 | .globl mcck_int_handler | |
683 | mcck_int_handler: | |
77fa2245 | 684 | spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer |
ae6aa2ea | 685 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA |
77fa2245 | 686 | lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs |
1da177e4 | 687 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
77fa2245 HC |
688 | la %r12,__LC_MCK_OLD_PSW |
689 | tm __LC_MCCK_CODE,0x80 # system damage? | |
690 | bo BASED(mcck_int_main) # yes -> rest of mcck code invalid | |
691 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | |
692 | bo BASED(0f) | |
693 | spt __LC_LAST_UPDATE_TIMER # revalidate cpu timer | |
1da177e4 | 694 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
8ffa7405 HC |
695 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER |
696 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER | |
697 | mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER | |
1da177e4 | 698 | #endif |
ae6aa2ea | 699 | 0: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 HC |
700 | bno BASED(mcck_int_main) # no -> skip cleanup critical |
701 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit | |
702 | bnz BASED(mcck_int_main) # from user -> load async stack | |
703 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) | |
704 | bhe BASED(mcck_int_main) | |
705 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) | |
706 | bl BASED(mcck_int_main) | |
707 | l %r14,BASED(.Lcleanup_critical) | |
708 | basr %r14,%r14 | |
709 | mcck_int_main: | |
710 | l %r14,__LC_PANIC_STACK # are we already on the panic stack? | |
711 | slr %r14,%r15 | |
712 | sra %r14,PAGE_SHIFT | |
713 | be BASED(0f) | |
714 | l %r15,__LC_PANIC_STACK # load panic stack | |
715 | 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 | |
ae6aa2ea MS |
716 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
717 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? | |
718 | bno BASED(mcck_no_vtime) # no -> skip cleanup critical | |
719 | tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ? | |
720 | bz BASED(mcck_no_vtime) | |
721 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
722 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
723 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
724 | mcck_no_vtime: | |
725 | #endif | |
77fa2245 HC |
726 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
727 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 | 728 | l %r1,BASED(.Ls390_mcck) |
77fa2245 HC |
729 | basr %r14,%r1 # call machine check handler |
730 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
731 | bno BASED(mcck_return) | |
732 | l %r1,__LC_KERNEL_STACK # switch to kernel stack | |
733 | s %r1,BASED(.Lc_spsize) | |
734 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
735 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
736 | lr %r15,%r1 | |
737 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
738 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING | |
739 | bno BASED(mcck_return) | |
740 | l %r1,BASED(.Ls390_handle_mcck) | |
741 | basr %r14,%r1 # call machine check handler | |
1da177e4 | 742 | mcck_return: |
ae6aa2ea | 743 | RESTORE_ALL __LC_RETURN_MCCK_PSW,0 |
1da177e4 LT |
744 | |
745 | #ifdef CONFIG_SMP | |
746 | /* | |
747 | * Restart interruption handler, kick starter for additional CPUs | |
748 | */ | |
749 | .globl restart_int_handler | |
750 | restart_int_handler: | |
751 | l %r15,__LC_SAVE_AREA+60 # load ksp | |
752 | lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs | |
753 | lam %a0,%a15,__LC_AREGS_SAVE_AREA | |
754 | lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
755 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on | |
756 | basr %r14,0 | |
757 | l %r14,restart_addr-.(%r14) | |
758 | br %r14 # branch to start_secondary | |
759 | restart_addr: | |
760 | .long start_secondary | |
761 | #else | |
762 | /* | |
763 | * If we do not run with SMP enabled, let the new CPU crash ... | |
764 | */ | |
765 | .globl restart_int_handler | |
766 | restart_int_handler: | |
767 | basr %r1,0 | |
768 | restart_base: | |
769 | lpsw restart_crash-restart_base(%r1) | |
770 | .align 8 | |
771 | restart_crash: | |
772 | .long 0x000a0000,0x00000000 | |
773 | restart_go: | |
774 | #endif | |
775 | ||
776 | #ifdef CONFIG_CHECK_STACK | |
777 | /* | |
778 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
779 | * No need to properly save the registers, we are going to panic anyway. | |
780 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
781 | */ | |
782 | stack_overflow: | |
783 | l %r15,__LC_PANIC_STACK # change to panic stack | |
784 | sl %r15,BASED(.Lc_spsize) | |
785 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack | |
786 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
787 | la %r1,__LC_SAVE_AREA | |
788 | ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? | |
789 | be BASED(0f) | |
790 | ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? | |
791 | be BASED(0f) | |
792 | la %r1,__LC_SAVE_AREA+16 | |
793 | 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack | |
794 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain | |
795 | l %r1,BASED(1f) # branch to kernel_stack_overflow | |
796 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
797 | br %r1 | |
798 | 1: .long kernel_stack_overflow | |
799 | #endif | |
800 | ||
801 | cleanup_table_system_call: | |
802 | .long system_call + 0x80000000, sysc_do_svc + 0x80000000 | |
803 | cleanup_table_sysc_return: | |
804 | .long sysc_return + 0x80000000, sysc_leave + 0x80000000 | |
805 | cleanup_table_sysc_leave: | |
806 | .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000 | |
807 | cleanup_table_sysc_work_loop: | |
808 | .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000 | |
ae6aa2ea MS |
809 | cleanup_table_io_leave: |
810 | .long io_leave + 0x80000000, io_done + 0x80000000 | |
811 | cleanup_table_io_work_loop: | |
812 | .long io_work_loop + 0x80000000, io_mcck_pending + 0x80000000 | |
1da177e4 LT |
813 | |
814 | cleanup_critical: | |
815 | clc 4(4,%r12),BASED(cleanup_table_system_call) | |
816 | bl BASED(0f) | |
817 | clc 4(4,%r12),BASED(cleanup_table_system_call+4) | |
818 | bl BASED(cleanup_system_call) | |
819 | 0: | |
820 | clc 4(4,%r12),BASED(cleanup_table_sysc_return) | |
821 | bl BASED(0f) | |
822 | clc 4(4,%r12),BASED(cleanup_table_sysc_return+4) | |
823 | bl BASED(cleanup_sysc_return) | |
824 | 0: | |
825 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave) | |
826 | bl BASED(0f) | |
827 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4) | |
828 | bl BASED(cleanup_sysc_leave) | |
829 | 0: | |
830 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop) | |
831 | bl BASED(0f) | |
832 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) | |
77fa2245 | 833 | bl BASED(cleanup_sysc_return) |
ae6aa2ea MS |
834 | 0: |
835 | clc 4(4,%r12),BASED(cleanup_table_io_leave) | |
836 | bl BASED(0f) | |
837 | clc 4(4,%r12),BASED(cleanup_table_io_leave+4) | |
838 | bl BASED(cleanup_io_leave) | |
839 | 0: | |
840 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop) | |
841 | bl BASED(0f) | |
842 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4) | |
843 | bl BASED(cleanup_io_return) | |
1da177e4 LT |
844 | 0: |
845 | br %r14 | |
846 | ||
847 | cleanup_system_call: | |
848 | mvc __LC_RETURN_PSW(8),0(%r12) | |
ae6aa2ea MS |
849 | c %r12,BASED(.Lmck_old_psw) |
850 | be BASED(0f) | |
851 | la %r12,__LC_SAVE_AREA+16 | |
852 | b BASED(1f) | |
853 | 0: la %r12,__LC_SAVE_AREA+32 | |
854 | 1: | |
1da177e4 LT |
855 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
856 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) | |
857 | bh BASED(0f) | |
858 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
859 | 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) | |
860 | bhe BASED(cleanup_vtime) | |
861 | #endif | |
862 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) | |
863 | bh BASED(0f) | |
ae6aa2ea MS |
864 | mvc __LC_SAVE_AREA(16),0(%r12) |
865 | 0: st %r13,4(%r12) | |
866 | st %r12,__LC_SAVE_AREA+48 # argh | |
1da177e4 | 867 | SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 |
77fa2245 | 868 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
ae6aa2ea MS |
869 | l %r12,__LC_SAVE_AREA+48 # argh |
870 | st %r15,12(%r12) | |
1da177e4 LT |
871 | lh %r7,0x8a |
872 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
873 | cleanup_vtime: | |
874 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) | |
875 | bhe BASED(cleanup_stime) | |
876 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
877 | bz BASED(cleanup_novtime) | |
878 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
879 | cleanup_stime: | |
880 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) | |
881 | bh BASED(cleanup_update) | |
882 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
883 | cleanup_update: | |
884 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
885 | cleanup_novtime: | |
886 | #endif | |
887 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) | |
888 | la %r12,__LC_RETURN_PSW | |
889 | br %r14 | |
890 | cleanup_system_call_insn: | |
891 | .long sysc_saveall + 0x80000000 | |
892 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
893 | .long system_call + 0x80000000 | |
894 | .long sysc_vtime + 0x80000000 | |
895 | .long sysc_stime + 0x80000000 | |
896 | .long sysc_update + 0x80000000 | |
897 | #endif | |
898 | ||
899 | cleanup_sysc_return: | |
900 | mvc __LC_RETURN_PSW(4),0(%r12) | |
901 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return) | |
902 | la %r12,__LC_RETURN_PSW | |
903 | br %r14 | |
904 | ||
905 | cleanup_sysc_leave: | |
906 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) | |
ae6aa2ea | 907 | be BASED(2f) |
1da177e4 LT |
908 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
909 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
910 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) | |
ae6aa2ea | 911 | be BASED(2f) |
1da177e4 LT |
912 | #endif |
913 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) | |
ae6aa2ea MS |
914 | c %r12,BASED(.Lmck_old_psw) |
915 | bne BASED(0f) | |
916 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
917 | b BASED(1f) | |
918 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
919 | 1: lm %r0,%r11,SP_R0(%r15) | |
1da177e4 | 920 | l %r15,SP_R15(%r15) |
ae6aa2ea | 921 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 LT |
922 | br %r14 |
923 | cleanup_sysc_leave_insn: | |
924 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
925 | .long sysc_leave + 14 + 0x80000000 | |
926 | #endif | |
927 | .long sysc_leave + 10 + 0x80000000 | |
928 | ||
ae6aa2ea MS |
929 | cleanup_io_return: |
930 | mvc __LC_RETURN_PSW(4),0(%r12) | |
931 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop) | |
932 | la %r12,__LC_RETURN_PSW | |
933 | br %r14 | |
934 | ||
935 | cleanup_io_leave: | |
936 | clc 4(4,%r12),BASED(cleanup_io_leave_insn) | |
937 | be BASED(2f) | |
938 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
939 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
940 | clc 4(4,%r12),BASED(cleanup_io_leave_insn+4) | |
941 | be BASED(2f) | |
942 | #endif | |
943 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) | |
944 | c %r12,BASED(.Lmck_old_psw) | |
945 | bne BASED(0f) | |
946 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
947 | b BASED(1f) | |
948 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
949 | 1: lm %r0,%r11,SP_R0(%r15) | |
950 | l %r15,SP_R15(%r15) | |
951 | 2: la %r12,__LC_RETURN_PSW | |
952 | br %r14 | |
953 | cleanup_io_leave_insn: | |
954 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
955 | .long io_leave + 18 + 0x80000000 | |
956 | #endif | |
957 | .long io_leave + 14 + 0x80000000 | |
958 | ||
1da177e4 LT |
959 | /* |
960 | * Integer constants | |
961 | */ | |
962 | .align 4 | |
963 | .Lc_spsize: .long SP_SIZE | |
964 | .Lc_overhead: .long STACK_FRAME_OVERHEAD | |
965 | .Lc_pactive: .long PREEMPT_ACTIVE | |
966 | .Lnr_syscalls: .long NR_syscalls | |
967 | .L0x018: .short 0x018 | |
968 | .L0x020: .short 0x020 | |
969 | .L0x028: .short 0x028 | |
970 | .L0x030: .short 0x030 | |
971 | .L0x038: .short 0x038 | |
972 | .Lc_1: .long 1 | |
973 | ||
974 | /* | |
975 | * Symbol constants | |
976 | */ | |
977 | .Ls390_mcck: .long s390_do_machine_check | |
77fa2245 HC |
978 | .Ls390_handle_mcck: |
979 | .long s390_handle_mcck | |
ae6aa2ea | 980 | .Lmck_old_psw: .long __LC_MCK_OLD_PSW |
1da177e4 LT |
981 | .Ldo_IRQ: .long do_IRQ |
982 | .Ldo_extint: .long do_extint | |
983 | .Ldo_signal: .long do_signal | |
984 | .Lhandle_per: .long do_single_step | |
985 | .Ljump_table: .long pgm_check_table | |
986 | .Lschedule: .long schedule | |
987 | .Lclone: .long sys_clone | |
988 | .Lexecve: .long sys_execve | |
989 | .Lfork: .long sys_fork | |
990 | .Lrt_sigreturn:.long sys_rt_sigreturn | |
991 | .Lrt_sigsuspend: | |
992 | .long sys_rt_sigsuspend | |
993 | .Lsigreturn: .long sys_sigreturn | |
994 | .Lsigsuspend: .long sys_sigsuspend | |
995 | .Lsigaltstack: .long sys_sigaltstack | |
996 | .Ltrace: .long syscall_trace | |
997 | .Lvfork: .long sys_vfork | |
998 | .Lschedtail: .long schedule_tail | |
999 | ||
1000 | .Lcritical_start: | |
1001 | .long __critical_start + 0x80000000 | |
1002 | .Lcritical_end: | |
1003 | .long __critical_end + 0x80000000 | |
1004 | .Lcleanup_critical: | |
1005 | .long cleanup_critical | |
1006 | ||
1007 | #define SYSCALL(esa,esame,emu) .long esa | |
1008 | .globl sys_call_table | |
1009 | sys_call_table: | |
1010 | #include "syscalls.S" | |
1011 | #undef SYSCALL | |
1012 |