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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/entry.S | |
3 | * S390 low-level entry points. | |
4 | * | |
54dfe5dd | 5 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
12 | #include <linux/sys.h> | |
13 | #include <linux/linkage.h> | |
1da177e4 LT |
14 | #include <asm/cache.h> |
15 | #include <asm/lowcore.h> | |
16 | #include <asm/errno.h> | |
17 | #include <asm/ptrace.h> | |
18 | #include <asm/thread_info.h> | |
0013a854 | 19 | #include <asm/asm-offsets.h> |
1da177e4 LT |
20 | #include <asm/unistd.h> |
21 | #include <asm/page.h> | |
22 | ||
23 | /* | |
24 | * Stack layout for the system_call stack entry. | |
25 | * The first few entries are identical to the user_regs_struct. | |
26 | */ | |
25d83cbf HC |
27 | SP_PTREGS = STACK_FRAME_OVERHEAD |
28 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
29 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
30 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
31 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 | |
32 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
33 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 | |
34 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
35 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 | |
36 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
37 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 | |
38 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
39 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36 | |
40 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
41 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44 | |
42 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
43 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52 | |
44 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
45 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60 | |
46 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
47 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
48 | SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP | |
49 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE | |
1da177e4 | 50 | |
54dfe5dd HC |
51 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ |
52 | _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) | |
53 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ | |
54 | _TIF_MCCK_PENDING) | |
1da177e4 LT |
55 | |
56 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
57 | STACK_SIZE = 1 << STACK_SHIFT | |
58 | ||
59 | #define BASED(name) name-system_call(%r13) | |
60 | ||
1f194a4c HC |
61 | #ifdef CONFIG_TRACE_IRQFLAGS |
62 | .macro TRACE_IRQS_ON | |
63 | l %r1,BASED(.Ltrace_irq_on) | |
64 | basr %r14,%r1 | |
65 | .endm | |
66 | ||
67 | .macro TRACE_IRQS_OFF | |
68 | l %r1,BASED(.Ltrace_irq_off) | |
69 | basr %r14,%r1 | |
70 | .endm | |
523b44cf | 71 | |
411788ea HC |
72 | .macro TRACE_IRQS_CHECK |
73 | tm SP_PSW(%r15),0x03 # irqs enabled? | |
74 | jz 0f | |
75 | l %r1,BASED(.Ltrace_irq_on) | |
523b44cf | 76 | basr %r14,%r1 |
411788ea HC |
77 | j 1f |
78 | 0: l %r1,BASED(.Ltrace_irq_off) | |
79 | basr %r14,%r1 | |
80 | 1: | |
523b44cf | 81 | .endm |
1f194a4c HC |
82 | #else |
83 | #define TRACE_IRQS_ON | |
84 | #define TRACE_IRQS_OFF | |
411788ea HC |
85 | #define TRACE_IRQS_CHECK |
86 | #endif | |
87 | ||
88 | #ifdef CONFIG_LOCKDEP | |
89 | .macro LOCKDEP_SYS_EXIT | |
90 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
91 | jz 0f | |
92 | l %r1,BASED(.Llockdep_sys_exit) | |
93 | basr %r14,%r1 | |
94 | 0: | |
95 | .endm | |
96 | #else | |
523b44cf | 97 | #define LOCKDEP_SYS_EXIT |
1f194a4c HC |
98 | #endif |
99 | ||
1da177e4 LT |
100 | /* |
101 | * Register usage in interrupt handlers: | |
102 | * R9 - pointer to current task structure | |
103 | * R13 - pointer to literal pool | |
104 | * R14 - return register for function calls | |
105 | * R15 - kernel stack pointer | |
106 | */ | |
107 | ||
25d83cbf | 108 | .macro STORE_TIMER lc_offset |
1da177e4 LT |
109 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
110 | stpt \lc_offset | |
111 | #endif | |
112 | .endm | |
113 | ||
114 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
25d83cbf | 115 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum |
1da177e4 LT |
116 | lm %r10,%r11,\lc_from |
117 | sl %r10,\lc_to | |
118 | sl %r11,\lc_to+4 | |
119 | bc 3,BASED(0f) | |
120 | sl %r10,BASED(.Lc_1) | |
121 | 0: al %r10,\lc_sum | |
122 | al %r11,\lc_sum+4 | |
123 | bc 12,BASED(1f) | |
124 | al %r10,BASED(.Lc_1) | |
125 | 1: stm %r10,%r11,\lc_sum | |
126 | .endm | |
127 | #endif | |
128 | ||
129 | .macro SAVE_ALL_BASE savearea | |
130 | stm %r12,%r15,\savearea | |
131 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 | |
132 | .endm | |
133 | ||
987ad70a MS |
134 | .macro SAVE_ALL_SVC psworg,savearea |
135 | la %r12,\psworg | |
136 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
137 | .endm | |
138 | ||
63b12246 | 139 | .macro SAVE_ALL_SYNC psworg,savearea |
1da177e4 | 140 | la %r12,\psworg |
1da177e4 LT |
141 | tm \psworg+1,0x01 # test problem state bit |
142 | bz BASED(2f) # skip stack setup save | |
143 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
63b12246 MS |
144 | #ifdef CONFIG_CHECK_STACK |
145 | b BASED(3f) | |
146 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
147 | bz BASED(stack_overflow) | |
148 | 3: | |
149 | #endif | |
150 | 2: | |
151 | .endm | |
152 | ||
153 | .macro SAVE_ALL_ASYNC psworg,savearea | |
154 | la %r12,\psworg | |
1da177e4 LT |
155 | tm \psworg+1,0x01 # test problem state bit |
156 | bnz BASED(1f) # from user -> load async stack | |
157 | clc \psworg+4(4),BASED(.Lcritical_end) | |
158 | bhe BASED(0f) | |
159 | clc \psworg+4(4),BASED(.Lcritical_start) | |
160 | bl BASED(0f) | |
161 | l %r14,BASED(.Lcleanup_critical) | |
162 | basr %r14,%r14 | |
6add9f7f | 163 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
164 | bnz BASED(1f) |
165 | 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ? | |
166 | slr %r14,%r15 | |
167 | sra %r14,STACK_SHIFT | |
168 | be BASED(2f) | |
169 | 1: l %r15,__LC_ASYNC_STACK | |
1da177e4 LT |
170 | #ifdef CONFIG_CHECK_STACK |
171 | b BASED(3f) | |
172 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
173 | bz BASED(stack_overflow) | |
174 | 3: | |
175 | #endif | |
77fa2245 HC |
176 | 2: |
177 | .endm | |
178 | ||
25d83cbf | 179 | .macro CREATE_STACK_FRAME psworg,savearea |
77fa2245 | 180 | s %r15,BASED(.Lc_spsize) # make room for registers & psw |
1da177e4 LT |
181 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack |
182 | la %r12,\psworg | |
183 | st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 | |
184 | icm %r12,12,__LC_SVC_ILC | |
185 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
186 | st %r12,SP_ILC(%r15) | |
187 | mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack | |
188 | la %r12,0 | |
189 | st %r12,__SF_BACKCHAIN(%r15) # clear back chain | |
190 | .endm | |
191 | ||
25d83cbf | 192 | .macro RESTORE_ALL psworg,sync |
ae6aa2ea | 193 | mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore |
1da177e4 | 194 | .if !\sync |
ae6aa2ea | 195 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 LT |
196 | .endif |
197 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user | |
198 | STORE_TIMER __LC_EXIT_TIMER | |
ae6aa2ea | 199 | lpsw \psworg # back to caller |
1da177e4 LT |
200 | .endm |
201 | ||
202 | /* | |
203 | * Scheduler resume function, called by switch_to | |
204 | * gpr2 = (task_struct *) prev | |
205 | * gpr3 = (task_struct *) next | |
206 | * Returns: | |
207 | * gpr2 = prev | |
208 | */ | |
25d83cbf | 209 | .globl __switch_to |
1da177e4 | 210 | __switch_to: |
25d83cbf | 211 | basr %r1,0 |
1da177e4 LT |
212 | __switch_to_base: |
213 | tm __THREAD_per(%r3),0xe8 # new process is using per ? | |
214 | bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine | |
25d83cbf HC |
215 | stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff |
216 | clc __THREAD_per(12,%r3),__SF_EMPTY(%r15) | |
217 | be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's | |
218 | lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
1da177e4 | 219 | __switch_to_noper: |
77fa2245 HC |
220 | l %r4,__THREAD_info(%r2) # get thread_info of prev |
221 | tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? | |
222 | bz __switch_to_no_mcck-__switch_to_base(%r1) | |
223 | ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
224 | l %r4,__THREAD_info(%r3) # get thread_info of next | |
225 | oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next | |
226 | __switch_to_no_mcck: | |
25d83cbf | 227 | stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
1da177e4 LT |
228 | st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp |
229 | l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
230 | lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task | |
231 | st %r3,__LC_CURRENT # __LC_CURRENT = current task struct | |
232 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
25d83cbf | 233 | l %r3,__THREAD_info(%r3) # load thread_info from task struct |
1da177e4 LT |
234 | st %r3,__LC_THREAD_INFO |
235 | ahi %r3,STACK_SIZE | |
236 | st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
237 | br %r14 | |
238 | ||
239 | __critical_start: | |
240 | /* | |
241 | * SVC interrupt handler routine. System calls are synchronous events and | |
242 | * are executed with interrupts enabled. | |
243 | */ | |
244 | ||
25d83cbf | 245 | .globl system_call |
1da177e4 LT |
246 | system_call: |
247 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
248 | sysc_saveall: | |
249 | SAVE_ALL_BASE __LC_SAVE_AREA | |
987ad70a | 250 | SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 251 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
252 | lh %r7,0x8a # get svc number from lowcore |
253 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
254 | sysc_vtime: | |
1da177e4 LT |
255 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
256 | sysc_stime: | |
257 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
258 | sysc_update: | |
259 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
260 | #endif | |
261 | sysc_do_svc: | |
262 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
25d83cbf HC |
263 | sla %r7,2 # *4 and test for svc 0 |
264 | bnz BASED(sysc_nr_ok) # svc number > 0 | |
1da177e4 LT |
265 | # svc 0: system call number in %r1 |
266 | cl %r1,BASED(.Lnr_syscalls) | |
267 | bnl BASED(sysc_nr_ok) | |
25d83cbf HC |
268 | lr %r7,%r1 # copy svc number to %r7 |
269 | sla %r7,2 # *4 | |
1da177e4 LT |
270 | sysc_nr_ok: |
271 | mvc SP_ARGS(4,%r15),SP_R7(%r15) | |
272 | sysc_do_restart: | |
d882b172 | 273 | l %r8,BASED(.Lsysc_table) |
1da177e4 | 274 | tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) |
d882b172 | 275 | l %r8,0(%r7,%r8) # get system call addr. |
25d83cbf HC |
276 | bnz BASED(sysc_tracesys) |
277 | basr %r14,%r8 # call sys_xxxx | |
278 | st %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
1da177e4 LT |
279 | |
280 | sysc_return: | |
281 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
411788ea | 282 | bno BASED(sysc_restore) |
1da177e4 LT |
283 | tm __TI_flags+3(%r9),_TIF_WORK_SVC |
284 | bnz BASED(sysc_work) # there is work to do (signals etc.) | |
411788ea HC |
285 | sysc_restore: |
286 | #ifdef CONFIG_TRACE_IRQFLAGS | |
287 | la %r1,BASED(sysc_restore_trace_psw) | |
288 | lpsw 0(%r1) | |
289 | sysc_restore_trace: | |
290 | TRACE_IRQS_CHECK | |
523b44cf | 291 | LOCKDEP_SYS_EXIT |
411788ea | 292 | #endif |
1da177e4 | 293 | sysc_leave: |
25d83cbf | 294 | RESTORE_ALL __LC_RETURN_PSW,1 |
411788ea HC |
295 | sysc_done: |
296 | ||
297 | #ifdef CONFIG_TRACE_IRQFLAGS | |
298 | .align 8 | |
299 | .globl sysc_restore_trace_psw | |
300 | sysc_restore_trace_psw: | |
301 | .long 0, sysc_restore_trace + 0x80000000 | |
302 | #endif | |
1da177e4 LT |
303 | |
304 | # | |
305 | # recheck if there is more work to do | |
306 | # | |
307 | sysc_work_loop: | |
308 | tm __TI_flags+3(%r9),_TIF_WORK_SVC | |
411788ea | 309 | bz BASED(sysc_restore) # there is no work to do |
1da177e4 LT |
310 | # |
311 | # One of the work bits is on. Find out which one. | |
312 | # | |
313 | sysc_work: | |
77fa2245 HC |
314 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
315 | bo BASED(sysc_mcck_pending) | |
1da177e4 LT |
316 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
317 | bo BASED(sysc_reschedule) | |
54dfe5dd HC |
318 | tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) |
319 | bnz BASED(sysc_sigpending) | |
1da177e4 LT |
320 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC |
321 | bo BASED(sysc_restart) | |
322 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
323 | bo BASED(sysc_singlestep) | |
411788ea HC |
324 | b BASED(sysc_restore) |
325 | sysc_work_done: | |
1da177e4 LT |
326 | |
327 | # | |
328 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
329 | # |
330 | sysc_reschedule: | |
331 | l %r1,BASED(.Lschedule) | |
332 | la %r14,BASED(sysc_work_loop) | |
333 | br %r1 # call scheduler | |
1da177e4 | 334 | |
77fa2245 HC |
335 | # |
336 | # _TIF_MCCK_PENDING is set, call handler | |
337 | # | |
338 | sysc_mcck_pending: | |
339 | l %r1,BASED(.Ls390_handle_mcck) | |
340 | la %r14,BASED(sysc_work_loop) | |
341 | br %r1 # TIF bit will be cleared by handler | |
342 | ||
1da177e4 | 343 | # |
54dfe5dd | 344 | # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal |
1da177e4 | 345 | # |
25d83cbf | 346 | sysc_sigpending: |
1da177e4 | 347 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
25d83cbf HC |
348 | la %r2,SP_PTREGS(%r15) # load pt_regs |
349 | l %r1,BASED(.Ldo_signal) | |
350 | basr %r14,%r1 # call do_signal | |
1da177e4 LT |
351 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC |
352 | bo BASED(sysc_restart) | |
353 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
354 | bo BASED(sysc_singlestep) | |
e1c3ad96 | 355 | b BASED(sysc_work_loop) |
1da177e4 LT |
356 | |
357 | # | |
358 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
359 | # | |
360 | sysc_restart: | |
361 | ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC | |
25d83cbf | 362 | l %r7,SP_R2(%r15) # load new svc number |
1da177e4 LT |
363 | sla %r7,2 |
364 | mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument | |
25d83cbf HC |
365 | lm %r2,%r6,SP_R2(%r15) # load svc arguments |
366 | b BASED(sysc_do_restart) # restart svc | |
1da177e4 LT |
367 | |
368 | # | |
369 | # _TIF_SINGLE_STEP is set, call do_single_step | |
370 | # | |
371 | sysc_singlestep: | |
372 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP | |
373 | mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check | |
374 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
375 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
376 | la %r14,BASED(sysc_return) # load adr. of system return | |
377 | br %r1 # branch to do_single_step | |
378 | ||
1da177e4 LT |
379 | # |
380 | # call trace before and after sys_call | |
381 | # | |
382 | sysc_tracesys: | |
25d83cbf HC |
383 | l %r1,BASED(.Ltrace) |
384 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
385 | la %r3,0 |
386 | srl %r7,2 | |
387 | st %r7,SP_R2(%r15) | |
388 | basr %r14,%r1 | |
389 | clc SP_R2(4,%r15),BASED(.Lnr_syscalls) | |
390 | bnl BASED(sysc_tracenogo) | |
d882b172 | 391 | l %r8,BASED(.Lsysc_table) |
25d83cbf HC |
392 | l %r7,SP_R2(%r15) # strace might have changed the |
393 | sll %r7,2 # system call | |
d882b172 | 394 | l %r8,0(%r7,%r8) |
1da177e4 LT |
395 | sysc_tracego: |
396 | lm %r3,%r6,SP_R3(%r15) | |
397 | l %r2,SP_ORIG_R2(%r15) | |
25d83cbf HC |
398 | basr %r14,%r8 # call sys_xxx |
399 | st %r2,SP_R2(%r15) # store return value | |
1da177e4 LT |
400 | sysc_tracenogo: |
401 | tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
25d83cbf | 402 | bz BASED(sysc_return) |
1da177e4 | 403 | l %r1,BASED(.Ltrace) |
25d83cbf | 404 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 LT |
405 | la %r3,1 |
406 | la %r14,BASED(sysc_return) | |
407 | br %r1 | |
408 | ||
409 | # | |
410 | # a new process exits the kernel with ret_from_fork | |
411 | # | |
25d83cbf | 412 | .globl ret_from_fork |
1da177e4 LT |
413 | ret_from_fork: |
414 | l %r13,__LC_SVC_NEW_PSW+4 | |
415 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
416 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? | |
417 | bo BASED(0f) | |
418 | st %r15,SP_R15(%r15) # store stack pointer for new kthread | |
25d83cbf HC |
419 | 0: l %r1,BASED(.Lschedtail) |
420 | basr %r14,%r1 | |
1f194a4c | 421 | TRACE_IRQS_ON |
25d83cbf | 422 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
1da177e4 LT |
423 | b BASED(sysc_return) |
424 | ||
425 | # | |
03ff9a23 MS |
426 | # kernel_execve function needs to deal with pt_regs that is not |
427 | # at the usual place | |
1da177e4 | 428 | # |
03ff9a23 MS |
429 | .globl kernel_execve |
430 | kernel_execve: | |
431 | stm %r12,%r15,48(%r15) | |
432 | lr %r14,%r15 | |
433 | l %r13,__LC_SVC_NEW_PSW+4 | |
434 | s %r15,BASED(.Lc_spsize) | |
435 | st %r14,__SF_BACKCHAIN(%r15) | |
436 | la %r12,SP_PTREGS(%r15) | |
437 | xc 0(__PT_SIZE,%r12),0(%r12) | |
438 | l %r1,BASED(.Ldo_execve) | |
439 | lr %r5,%r12 | |
440 | basr %r14,%r1 | |
441 | ltr %r2,%r2 | |
442 | be BASED(0f) | |
443 | a %r15,BASED(.Lc_spsize) | |
444 | lm %r12,%r15,48(%r15) | |
445 | br %r14 | |
446 | # execve succeeded. | |
447 | 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts | |
448 | l %r15,__LC_KERNEL_STACK # load ksp | |
449 | s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
450 | l %r9,__LC_THREAD_INFO | |
451 | mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs | |
452 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) | |
453 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
454 | l %r1,BASED(.Lexecve_tail) | |
455 | basr %r14,%r1 | |
456 | b BASED(sysc_return) | |
1da177e4 LT |
457 | |
458 | /* | |
459 | * Program check handler routine | |
460 | */ | |
461 | ||
25d83cbf | 462 | .globl pgm_check_handler |
1da177e4 LT |
463 | pgm_check_handler: |
464 | /* | |
465 | * First we need to check for a special case: | |
466 | * Single stepping an instruction that disables the PER event mask will | |
467 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
468 | * For a single stepped SVC the program check handler gets control after | |
469 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
470 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
471 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
472 | * if we have to load the kernel stack register. | |
473 | * For every other possible cause for PER event without the PER mask set | |
474 | * we just ignore the PER event (FIXME: is there anything we have to do | |
475 | * for LPSW?). | |
476 | */ | |
477 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
478 | SAVE_ALL_BASE __LC_SAVE_AREA | |
25d83cbf HC |
479 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
480 | bnz BASED(pgm_per) # got per exception -> special case | |
63b12246 | 481 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 482 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
483 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
484 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
485 | bz BASED(pgm_no_vtime) | |
486 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
487 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
488 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
489 | pgm_no_vtime: | |
490 | #endif | |
491 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
411788ea | 492 | TRACE_IRQS_OFF |
25d83cbf | 493 | l %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 LT |
494 | la %r8,0x7f |
495 | nr %r8,%r3 | |
496 | pgm_do_call: | |
25d83cbf HC |
497 | l %r7,BASED(.Ljump_table) |
498 | sll %r8,2 | |
499 | l %r7,0(%r8,%r7) # load address of handler routine | |
500 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
501 | la %r14,BASED(sysc_return) | |
502 | br %r7 # branch to interrupt-handler | |
1da177e4 LT |
503 | |
504 | # | |
505 | # handle per exception | |
506 | # | |
507 | pgm_per: | |
25d83cbf HC |
508 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on |
509 | bnz BASED(pgm_per_std) # ok, normal per event from user space | |
1da177e4 | 510 | # ok its one of the special cases, now we need to find out which one |
25d83cbf HC |
511 | clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW |
512 | be BASED(pgm_svcper) | |
1da177e4 | 513 | # no interesting special case, ignore PER event |
25d83cbf HC |
514 | lm %r12,%r15,__LC_SAVE_AREA |
515 | lpsw 0x28 | |
1da177e4 LT |
516 | |
517 | # | |
518 | # Normal per exception | |
519 | # | |
520 | pgm_per_std: | |
63b12246 | 521 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 522 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
523 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
524 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
525 | bz BASED(pgm_no_vtime2) | |
526 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
527 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
528 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
529 | pgm_no_vtime2: | |
530 | #endif | |
531 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
411788ea | 532 | TRACE_IRQS_OFF |
1da177e4 LT |
533 | l %r1,__TI_task(%r9) |
534 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
535 | mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS | |
536 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
537 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
4ba069b8 MG |
538 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
539 | bz BASED(kernel_per) | |
25d83cbf | 540 | l %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 | 541 | la %r8,0x7f |
25d83cbf HC |
542 | nr %r8,%r3 # clear per-event-bit and ilc |
543 | be BASED(sysc_return) # only per or per+check ? | |
1da177e4 LT |
544 | b BASED(pgm_do_call) |
545 | ||
546 | # | |
547 | # it was a single stepped SVC that is causing all the trouble | |
548 | # | |
549 | pgm_svcper: | |
63b12246 | 550 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 551 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 | 552 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
1da177e4 LT |
553 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
554 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
555 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
556 | #endif |
557 | lh %r7,0x8a # get svc number from lowcore | |
558 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
411788ea | 559 | TRACE_IRQS_OFF |
1da177e4 LT |
560 | l %r1,__TI_task(%r9) |
561 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
562 | mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS | |
563 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
564 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
1f194a4c | 565 | TRACE_IRQS_ON |
1da177e4 LT |
566 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
567 | b BASED(sysc_do_svc) | |
568 | ||
4ba069b8 MG |
569 | # |
570 | # per was called from kernel, must be kprobes | |
571 | # | |
572 | kernel_per: | |
573 | mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check | |
574 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
575 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
411788ea | 576 | la %r14,BASED(sysc_restore)# load adr. of system return |
4ba069b8 MG |
577 | br %r1 # branch to do_single_step |
578 | ||
1da177e4 LT |
579 | /* |
580 | * IO interrupt handler routine | |
581 | */ | |
582 | ||
25d83cbf | 583 | .globl io_int_handler |
1da177e4 LT |
584 | io_int_handler: |
585 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
586 | stck __LC_INT_CLOCK | |
587 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | |
63b12246 | 588 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
77fa2245 | 589 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
590 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
591 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
592 | bz BASED(io_no_vtime) | |
593 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
594 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
595 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
596 | io_no_vtime: | |
597 | #endif | |
598 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
1f194a4c | 599 | TRACE_IRQS_OFF |
25d83cbf HC |
600 | l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ |
601 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
602 | basr %r14,%r1 # branch to standard irq handler | |
1da177e4 | 603 | io_return: |
25d83cbf | 604 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
1da177e4 | 605 | #ifdef CONFIG_PREEMPT |
25d83cbf | 606 | bno BASED(io_preempt) # no -> check for preemptive scheduling |
1da177e4 | 607 | #else |
411788ea | 608 | bno BASED(io_restore) # no-> skip resched & signal |
1da177e4 LT |
609 | #endif |
610 | tm __TI_flags+3(%r9),_TIF_WORK_INT | |
25d83cbf | 611 | bnz BASED(io_work) # there is work to do (signals etc.) |
411788ea HC |
612 | io_restore: |
613 | #ifdef CONFIG_TRACE_IRQFLAGS | |
614 | la %r1,BASED(io_restore_trace_psw) | |
615 | lpsw 0(%r1) | |
616 | io_restore_trace: | |
617 | TRACE_IRQS_CHECK | |
523b44cf | 618 | LOCKDEP_SYS_EXIT |
411788ea | 619 | #endif |
1da177e4 | 620 | io_leave: |
25d83cbf | 621 | RESTORE_ALL __LC_RETURN_PSW,0 |
ae6aa2ea | 622 | io_done: |
1da177e4 | 623 | |
411788ea HC |
624 | #ifdef CONFIG_TRACE_IRQFLAGS |
625 | .align 8 | |
626 | .globl io_restore_trace_psw | |
627 | io_restore_trace_psw: | |
628 | .long 0, io_restore_trace + 0x80000000 | |
629 | #endif | |
630 | ||
1da177e4 LT |
631 | #ifdef CONFIG_PREEMPT |
632 | io_preempt: | |
633 | icm %r0,15,__TI_precount(%r9) | |
411788ea | 634 | bnz BASED(io_restore) |
1da177e4 LT |
635 | l %r1,SP_R15(%r15) |
636 | s %r1,BASED(.Lc_spsize) | |
637 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 638 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
639 | lr %r15,%r1 |
640 | io_resume_loop: | |
641 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED | |
411788ea | 642 | bno BASED(io_restore) |
b8e7a54c HC |
643 | l %r1,BASED(.Lpreempt_schedule_irq) |
644 | la %r14,BASED(io_resume_loop) | |
645 | br %r1 # call schedule | |
1da177e4 LT |
646 | #endif |
647 | ||
648 | # | |
649 | # switch to kernel stack, then check the TIF bits | |
650 | # | |
651 | io_work: | |
652 | l %r1,__LC_KERNEL_STACK | |
653 | s %r1,BASED(.Lc_spsize) | |
654 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 655 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
656 | lr %r15,%r1 |
657 | # | |
658 | # One of the work bits is on. Find out which one. | |
54dfe5dd | 659 | # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGMASK, _TIF_NEED_RESCHED |
25d83cbf | 660 | # and _TIF_MCCK_PENDING |
1da177e4 LT |
661 | # |
662 | io_work_loop: | |
77fa2245 | 663 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
25d83cbf | 664 | bo BASED(io_mcck_pending) |
1da177e4 LT |
665 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
666 | bo BASED(io_reschedule) | |
54dfe5dd HC |
667 | tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) |
668 | bnz BASED(io_sigpending) | |
411788ea HC |
669 | b BASED(io_restore) |
670 | io_work_done: | |
1da177e4 | 671 | |
77fa2245 HC |
672 | # |
673 | # _TIF_MCCK_PENDING is set, call handler | |
674 | # | |
675 | io_mcck_pending: | |
676 | l %r1,BASED(.Ls390_handle_mcck) | |
b771aeac | 677 | basr %r14,%r1 # TIF bit will be cleared by handler |
b771aeac | 678 | b BASED(io_work_loop) |
77fa2245 | 679 | |
1da177e4 LT |
680 | # |
681 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
682 | # |
683 | io_reschedule: | |
411788ea | 684 | TRACE_IRQS_ON |
25d83cbf HC |
685 | l %r1,BASED(.Lschedule) |
686 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
687 | basr %r14,%r1 # call scheduler | |
688 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 689 | TRACE_IRQS_OFF |
1da177e4 | 690 | tm __TI_flags+3(%r9),_TIF_WORK_INT |
411788ea | 691 | bz BASED(io_restore) # there is no work to do |
1da177e4 LT |
692 | b BASED(io_work_loop) |
693 | ||
694 | # | |
54dfe5dd | 695 | # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal |
1da177e4 | 696 | # |
25d83cbf | 697 | io_sigpending: |
411788ea | 698 | TRACE_IRQS_ON |
25d83cbf HC |
699 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
700 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
701 | l %r1,BASED(.Ldo_signal) | |
702 | basr %r14,%r1 # call do_signal | |
703 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 704 | TRACE_IRQS_OFF |
e1c3ad96 | 705 | b BASED(io_work_loop) |
1da177e4 LT |
706 | |
707 | /* | |
708 | * External interrupt handler routine | |
709 | */ | |
710 | ||
25d83cbf | 711 | .globl ext_int_handler |
1da177e4 LT |
712 | ext_int_handler: |
713 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
714 | stck __LC_INT_CLOCK | |
715 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | |
63b12246 | 716 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
77fa2245 | 717 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
718 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
719 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
720 | bz BASED(ext_no_vtime) | |
721 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
722 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
723 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
724 | ext_no_vtime: | |
725 | #endif | |
726 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
1f194a4c | 727 | TRACE_IRQS_OFF |
25d83cbf HC |
728 | la %r2,SP_PTREGS(%r15) # address of register-save area |
729 | lh %r3,__LC_EXT_INT_CODE # get interruption code | |
1da177e4 LT |
730 | l %r1,BASED(.Ldo_extint) |
731 | basr %r14,%r1 | |
732 | b BASED(io_return) | |
733 | ||
ae6aa2ea MS |
734 | __critical_end: |
735 | ||
1da177e4 LT |
736 | /* |
737 | * Machine check handler routines | |
738 | */ | |
739 | ||
25d83cbf | 740 | .globl mcck_int_handler |
1da177e4 | 741 | mcck_int_handler: |
77fa2245 HC |
742 | spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer |
743 | lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs | |
1da177e4 | 744 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
77fa2245 | 745 | la %r12,__LC_MCK_OLD_PSW |
25d83cbf | 746 | tm __LC_MCCK_CODE,0x80 # system damage? |
77fa2245 | 747 | bo BASED(mcck_int_main) # yes -> rest of mcck code invalid |
1da177e4 | 748 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
63b12246 MS |
749 | mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER |
750 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA | |
751 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | |
752 | bo BASED(1f) | |
753 | la %r14,__LC_SYNC_ENTER_TIMER | |
754 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
755 | bl BASED(0f) | |
756 | la %r14,__LC_ASYNC_ENTER_TIMER | |
757 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
758 | bl BASED(0f) | |
759 | la %r14,__LC_EXIT_TIMER | |
760 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
761 | bl BASED(0f) | |
762 | la %r14,__LC_LAST_UPDATE_TIMER | |
763 | 0: spt 0(%r14) | |
764 | mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) | |
765 | 1: | |
1da177e4 | 766 | #endif |
63b12246 | 767 | tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 HC |
768 | bno BASED(mcck_int_main) # no -> skip cleanup critical |
769 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit | |
770 | bnz BASED(mcck_int_main) # from user -> load async stack | |
771 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) | |
772 | bhe BASED(mcck_int_main) | |
773 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) | |
774 | bl BASED(mcck_int_main) | |
775 | l %r14,BASED(.Lcleanup_critical) | |
776 | basr %r14,%r14 | |
777 | mcck_int_main: | |
778 | l %r14,__LC_PANIC_STACK # are we already on the panic stack? | |
779 | slr %r14,%r15 | |
780 | sra %r14,PAGE_SHIFT | |
781 | be BASED(0f) | |
782 | l %r15,__LC_PANIC_STACK # load panic stack | |
783 | 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 | |
ae6aa2ea | 784 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
25d83cbf | 785 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
ae6aa2ea | 786 | bno BASED(mcck_no_vtime) # no -> skip cleanup critical |
63b12246 | 787 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea MS |
788 | bz BASED(mcck_no_vtime) |
789 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
790 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
791 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
792 | mcck_no_vtime: | |
793 | #endif | |
77fa2245 HC |
794 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
795 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
25d83cbf HC |
796 | l %r1,BASED(.Ls390_mcck) |
797 | basr %r14,%r1 # call machine check handler | |
798 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
77fa2245 | 799 | bno BASED(mcck_return) |
25d83cbf | 800 | l %r1,__LC_KERNEL_STACK # switch to kernel stack |
77fa2245 HC |
801 | s %r1,BASED(.Lc_spsize) |
802 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 803 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
77fa2245 HC |
804 | lr %r15,%r1 |
805 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
806 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING | |
807 | bno BASED(mcck_return) | |
1f194a4c | 808 | TRACE_IRQS_OFF |
77fa2245 HC |
809 | l %r1,BASED(.Ls390_handle_mcck) |
810 | basr %r14,%r1 # call machine check handler | |
1f194a4c | 811 | TRACE_IRQS_ON |
1da177e4 | 812 | mcck_return: |
63b12246 MS |
813 | mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW |
814 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
815 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
816 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52 | |
817 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? | |
818 | bno BASED(0f) | |
819 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
820 | stpt __LC_EXIT_TIMER | |
821 | lpsw __LC_RETURN_MCCK_PSW # back to caller | |
822 | 0: | |
823 | #endif | |
824 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
825 | lpsw __LC_RETURN_MCCK_PSW # back to caller | |
826 | ||
25d83cbf | 827 | RESTORE_ALL __LC_RETURN_MCCK_PSW,0 |
1da177e4 | 828 | |
1da177e4 LT |
829 | /* |
830 | * Restart interruption handler, kick starter for additional CPUs | |
831 | */ | |
84b36a8e HC |
832 | #ifdef CONFIG_SMP |
833 | #ifndef CONFIG_HOTPLUG_CPU | |
834 | .section .init.text,"ax" | |
835 | #endif | |
25d83cbf | 836 | .globl restart_int_handler |
1da177e4 | 837 | restart_int_handler: |
25d83cbf HC |
838 | l %r15,__LC_SAVE_AREA+60 # load ksp |
839 | lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs | |
840 | lam %a0,%a15,__LC_AREGS_SAVE_AREA | |
841 | lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
842 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on | |
843 | basr %r14,0 | |
844 | l %r14,restart_addr-.(%r14) | |
845 | br %r14 # branch to start_secondary | |
1da177e4 | 846 | restart_addr: |
25d83cbf | 847 | .long start_secondary |
84b36a8e HC |
848 | #ifndef CONFIG_HOTPLUG_CPU |
849 | .previous | |
850 | #endif | |
1da177e4 LT |
851 | #else |
852 | /* | |
853 | * If we do not run with SMP enabled, let the new CPU crash ... | |
854 | */ | |
25d83cbf | 855 | .globl restart_int_handler |
1da177e4 | 856 | restart_int_handler: |
25d83cbf | 857 | basr %r1,0 |
1da177e4 | 858 | restart_base: |
25d83cbf HC |
859 | lpsw restart_crash-restart_base(%r1) |
860 | .align 8 | |
1da177e4 | 861 | restart_crash: |
25d83cbf | 862 | .long 0x000a0000,0x00000000 |
1da177e4 LT |
863 | restart_go: |
864 | #endif | |
865 | ||
866 | #ifdef CONFIG_CHECK_STACK | |
867 | /* | |
868 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
869 | * No need to properly save the registers, we are going to panic anyway. | |
870 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
871 | */ | |
872 | stack_overflow: | |
873 | l %r15,__LC_PANIC_STACK # change to panic stack | |
874 | sl %r15,BASED(.Lc_spsize) | |
875 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack | |
876 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
877 | la %r1,__LC_SAVE_AREA | |
878 | ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? | |
879 | be BASED(0f) | |
880 | ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? | |
881 | be BASED(0f) | |
882 | la %r1,__LC_SAVE_AREA+16 | |
883 | 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack | |
25d83cbf | 884 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain |
1da177e4 | 885 | l %r1,BASED(1f) # branch to kernel_stack_overflow |
25d83cbf | 886 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 | 887 | br %r1 |
25d83cbf | 888 | 1: .long kernel_stack_overflow |
1da177e4 LT |
889 | #endif |
890 | ||
891 | cleanup_table_system_call: | |
892 | .long system_call + 0x80000000, sysc_do_svc + 0x80000000 | |
893 | cleanup_table_sysc_return: | |
894 | .long sysc_return + 0x80000000, sysc_leave + 0x80000000 | |
895 | cleanup_table_sysc_leave: | |
411788ea | 896 | .long sysc_leave + 0x80000000, sysc_done + 0x80000000 |
1da177e4 | 897 | cleanup_table_sysc_work_loop: |
411788ea | 898 | .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000 |
63b12246 MS |
899 | cleanup_table_io_return: |
900 | .long io_return + 0x80000000, io_leave + 0x80000000 | |
ae6aa2ea MS |
901 | cleanup_table_io_leave: |
902 | .long io_leave + 0x80000000, io_done + 0x80000000 | |
903 | cleanup_table_io_work_loop: | |
411788ea | 904 | .long io_work_loop + 0x80000000, io_work_done + 0x80000000 |
1da177e4 LT |
905 | |
906 | cleanup_critical: | |
907 | clc 4(4,%r12),BASED(cleanup_table_system_call) | |
908 | bl BASED(0f) | |
909 | clc 4(4,%r12),BASED(cleanup_table_system_call+4) | |
910 | bl BASED(cleanup_system_call) | |
911 | 0: | |
912 | clc 4(4,%r12),BASED(cleanup_table_sysc_return) | |
913 | bl BASED(0f) | |
914 | clc 4(4,%r12),BASED(cleanup_table_sysc_return+4) | |
915 | bl BASED(cleanup_sysc_return) | |
916 | 0: | |
917 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave) | |
918 | bl BASED(0f) | |
919 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4) | |
920 | bl BASED(cleanup_sysc_leave) | |
921 | 0: | |
922 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop) | |
923 | bl BASED(0f) | |
924 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) | |
77fa2245 | 925 | bl BASED(cleanup_sysc_return) |
63b12246 MS |
926 | 0: |
927 | clc 4(4,%r12),BASED(cleanup_table_io_return) | |
928 | bl BASED(0f) | |
929 | clc 4(4,%r12),BASED(cleanup_table_io_return+4) | |
930 | bl BASED(cleanup_io_return) | |
ae6aa2ea MS |
931 | 0: |
932 | clc 4(4,%r12),BASED(cleanup_table_io_leave) | |
933 | bl BASED(0f) | |
934 | clc 4(4,%r12),BASED(cleanup_table_io_leave+4) | |
935 | bl BASED(cleanup_io_leave) | |
936 | 0: | |
937 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop) | |
938 | bl BASED(0f) | |
939 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4) | |
940 | bl BASED(cleanup_io_return) | |
1da177e4 LT |
941 | 0: |
942 | br %r14 | |
943 | ||
944 | cleanup_system_call: | |
945 | mvc __LC_RETURN_PSW(8),0(%r12) | |
ae6aa2ea MS |
946 | c %r12,BASED(.Lmck_old_psw) |
947 | be BASED(0f) | |
948 | la %r12,__LC_SAVE_AREA+16 | |
949 | b BASED(1f) | |
950 | 0: la %r12,__LC_SAVE_AREA+32 | |
951 | 1: | |
1da177e4 LT |
952 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
953 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) | |
954 | bh BASED(0f) | |
955 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
956 | 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) | |
957 | bhe BASED(cleanup_vtime) | |
958 | #endif | |
959 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) | |
960 | bh BASED(0f) | |
ae6aa2ea MS |
961 | mvc __LC_SAVE_AREA(16),0(%r12) |
962 | 0: st %r13,4(%r12) | |
963 | st %r12,__LC_SAVE_AREA+48 # argh | |
63b12246 | 964 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 965 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
ae6aa2ea MS |
966 | l %r12,__LC_SAVE_AREA+48 # argh |
967 | st %r15,12(%r12) | |
1da177e4 LT |
968 | lh %r7,0x8a |
969 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
970 | cleanup_vtime: | |
971 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) | |
972 | bhe BASED(cleanup_stime) | |
1da177e4 LT |
973 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
974 | cleanup_stime: | |
975 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) | |
976 | bh BASED(cleanup_update) | |
977 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
978 | cleanup_update: | |
979 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
980 | #endif |
981 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) | |
982 | la %r12,__LC_RETURN_PSW | |
983 | br %r14 | |
984 | cleanup_system_call_insn: | |
985 | .long sysc_saveall + 0x80000000 | |
986 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
25d83cbf HC |
987 | .long system_call + 0x80000000 |
988 | .long sysc_vtime + 0x80000000 | |
989 | .long sysc_stime + 0x80000000 | |
990 | .long sysc_update + 0x80000000 | |
1da177e4 LT |
991 | #endif |
992 | ||
993 | cleanup_sysc_return: | |
994 | mvc __LC_RETURN_PSW(4),0(%r12) | |
995 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return) | |
996 | la %r12,__LC_RETURN_PSW | |
997 | br %r14 | |
998 | ||
999 | cleanup_sysc_leave: | |
1000 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) | |
ae6aa2ea | 1001 | be BASED(2f) |
1da177e4 LT |
1002 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
1003 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
1004 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) | |
ae6aa2ea | 1005 | be BASED(2f) |
1da177e4 LT |
1006 | #endif |
1007 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) | |
ae6aa2ea MS |
1008 | c %r12,BASED(.Lmck_old_psw) |
1009 | bne BASED(0f) | |
1010 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
1011 | b BASED(1f) | |
1012 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
1013 | 1: lm %r0,%r11,SP_R0(%r15) | |
1da177e4 | 1014 | l %r15,SP_R15(%r15) |
ae6aa2ea | 1015 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 LT |
1016 | br %r14 |
1017 | cleanup_sysc_leave_insn: | |
411788ea | 1018 | .long sysc_done - 4 + 0x80000000 |
1da177e4 | 1019 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
411788ea | 1020 | .long sysc_done - 8 + 0x80000000 |
1da177e4 | 1021 | #endif |
1da177e4 | 1022 | |
ae6aa2ea MS |
1023 | cleanup_io_return: |
1024 | mvc __LC_RETURN_PSW(4),0(%r12) | |
1025 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop) | |
1026 | la %r12,__LC_RETURN_PSW | |
1027 | br %r14 | |
1028 | ||
1029 | cleanup_io_leave: | |
1030 | clc 4(4,%r12),BASED(cleanup_io_leave_insn) | |
1031 | be BASED(2f) | |
1032 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
1033 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
1034 | clc 4(4,%r12),BASED(cleanup_io_leave_insn+4) | |
1035 | be BASED(2f) | |
1036 | #endif | |
1037 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) | |
1038 | c %r12,BASED(.Lmck_old_psw) | |
1039 | bne BASED(0f) | |
1040 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
1041 | b BASED(1f) | |
1042 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
1043 | 1: lm %r0,%r11,SP_R0(%r15) | |
1044 | l %r15,SP_R15(%r15) | |
1045 | 2: la %r12,__LC_RETURN_PSW | |
1046 | br %r14 | |
1047 | cleanup_io_leave_insn: | |
411788ea | 1048 | .long io_done - 4 + 0x80000000 |
ae6aa2ea | 1049 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
411788ea | 1050 | .long io_done - 8 + 0x80000000 |
ae6aa2ea | 1051 | #endif |
ae6aa2ea | 1052 | |
1da177e4 LT |
1053 | /* |
1054 | * Integer constants | |
1055 | */ | |
25d83cbf HC |
1056 | .align 4 |
1057 | .Lc_spsize: .long SP_SIZE | |
1058 | .Lc_overhead: .long STACK_FRAME_OVERHEAD | |
25d83cbf HC |
1059 | .Lnr_syscalls: .long NR_syscalls |
1060 | .L0x018: .short 0x018 | |
1061 | .L0x020: .short 0x020 | |
1062 | .L0x028: .short 0x028 | |
1063 | .L0x030: .short 0x030 | |
1064 | .L0x038: .short 0x038 | |
1065 | .Lc_1: .long 1 | |
1da177e4 LT |
1066 | |
1067 | /* | |
1068 | * Symbol constants | |
1069 | */ | |
25d83cbf | 1070 | .Ls390_mcck: .long s390_do_machine_check |
77fa2245 | 1071 | .Ls390_handle_mcck: |
25d83cbf HC |
1072 | .long s390_handle_mcck |
1073 | .Lmck_old_psw: .long __LC_MCK_OLD_PSW | |
1074 | .Ldo_IRQ: .long do_IRQ | |
1075 | .Ldo_extint: .long do_extint | |
1076 | .Ldo_signal: .long do_signal | |
1077 | .Lhandle_per: .long do_single_step | |
03ff9a23 MS |
1078 | .Ldo_execve: .long do_execve |
1079 | .Lexecve_tail: .long execve_tail | |
25d83cbf HC |
1080 | .Ljump_table: .long pgm_check_table |
1081 | .Lschedule: .long schedule | |
ab1809b4 | 1082 | #ifdef CONFIG_PREEMPT |
b8e7a54c HC |
1083 | .Lpreempt_schedule_irq: |
1084 | .long preempt_schedule_irq | |
ab1809b4 | 1085 | #endif |
25d83cbf | 1086 | .Ltrace: .long syscall_trace |
25d83cbf HC |
1087 | .Lschedtail: .long schedule_tail |
1088 | .Lsysc_table: .long sys_call_table | |
1f194a4c | 1089 | #ifdef CONFIG_TRACE_IRQFLAGS |
25d83cbf | 1090 | .Ltrace_irq_on: .long trace_hardirqs_on |
1f194a4c | 1091 | .Ltrace_irq_off: |
25d83cbf | 1092 | .long trace_hardirqs_off |
523b44cf HC |
1093 | .Llockdep_sys_exit: |
1094 | .long lockdep_sys_exit | |
1f194a4c | 1095 | #endif |
1da177e4 | 1096 | .Lcritical_start: |
25d83cbf | 1097 | .long __critical_start + 0x80000000 |
1da177e4 | 1098 | .Lcritical_end: |
25d83cbf | 1099 | .long __critical_end + 0x80000000 |
1da177e4 | 1100 | .Lcleanup_critical: |
25d83cbf | 1101 | .long cleanup_critical |
1da177e4 | 1102 | |
25d83cbf | 1103 | .section .rodata, "a" |
1da177e4 | 1104 | #define SYSCALL(esa,esame,emu) .long esa |
1da177e4 LT |
1105 | sys_call_table: |
1106 | #include "syscalls.S" | |
1107 | #undef SYSCALL |