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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * S390 low-level entry points. |
3 | * | |
a53c8fab | 4 | * Copyright IBM Corp. 1999, 2012 |
1da177e4 | 5 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
6 | * Hartmut Penner (hp@de.ibm.com), |
7 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 8 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
9 | */ |
10 | ||
2bc89b5e | 11 | #include <linux/init.h> |
144d634a | 12 | #include <linux/linkage.h> |
eb608fb3 | 13 | #include <asm/processor.h> |
1da177e4 | 14 | #include <asm/cache.h> |
1da177e4 LT |
15 | #include <asm/errno.h> |
16 | #include <asm/ptrace.h> | |
17 | #include <asm/thread_info.h> | |
0013a854 | 18 | #include <asm/asm-offsets.h> |
1da177e4 LT |
19 | #include <asm/unistd.h> |
20 | #include <asm/page.h> | |
eb546195 | 21 | #include <asm/sigp.h> |
1f44a225 | 22 | #include <asm/irq.h> |
9977e886 | 23 | #include <asm/vx-insn.h> |
83abeffb HB |
24 | #include <asm/setup.h> |
25 | #include <asm/nmi.h> | |
711f5df7 | 26 | #include <asm/export.h> |
1da177e4 | 27 | |
c5328901 MS |
28 | __PT_R0 = __PT_GPRS |
29 | __PT_R1 = __PT_GPRS + 8 | |
30 | __PT_R2 = __PT_GPRS + 16 | |
31 | __PT_R3 = __PT_GPRS + 24 | |
32 | __PT_R4 = __PT_GPRS + 32 | |
33 | __PT_R5 = __PT_GPRS + 40 | |
34 | __PT_R6 = __PT_GPRS + 48 | |
35 | __PT_R7 = __PT_GPRS + 56 | |
36 | __PT_R8 = __PT_GPRS + 64 | |
37 | __PT_R9 = __PT_GPRS + 72 | |
38 | __PT_R10 = __PT_GPRS + 80 | |
39 | __PT_R11 = __PT_GPRS + 88 | |
40 | __PT_R12 = __PT_GPRS + 96 | |
41 | __PT_R13 = __PT_GPRS + 104 | |
42 | __PT_R14 = __PT_GPRS + 112 | |
43 | __PT_R15 = __PT_GPRS + 120 | |
1da177e4 | 44 | |
3a890380 | 45 | STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER |
1da177e4 | 46 | STACK_SIZE = 1 << STACK_SHIFT |
dc7ee00d | 47 | STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE |
1da177e4 | 48 | |
2a0a5b22 JW |
49 | _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
50 | _TIF_UPROBE) | |
d3a73acb MS |
51 | _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ |
52 | _TIF_SYSCALL_TRACEPOINT) | |
9977e886 | 53 | _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU) |
d3a73acb | 54 | _PIF_WORK = (_PIF_PER_TRAP) |
1da177e4 | 55 | |
9977e886 | 56 | #define BASED(name) name-cleanup_critical(%r13) |
1da177e4 | 57 | |
1f194a4c | 58 | .macro TRACE_IRQS_ON |
c5328901 | 59 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
60 | basr %r2,%r0 |
61 | brasl %r14,trace_hardirqs_on_caller | |
c5328901 | 62 | #endif |
1f194a4c HC |
63 | .endm |
64 | ||
65 | .macro TRACE_IRQS_OFF | |
c5328901 | 66 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
67 | basr %r2,%r0 |
68 | brasl %r14,trace_hardirqs_off_caller | |
411788ea | 69 | #endif |
c5328901 | 70 | .endm |
411788ea | 71 | |
411788ea | 72 | .macro LOCKDEP_SYS_EXIT |
c5328901 MS |
73 | #ifdef CONFIG_LOCKDEP |
74 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
75 | jz .+10 | |
411788ea | 76 | brasl %r14,lockdep_sys_exit |
1f194a4c | 77 | #endif |
1da177e4 | 78 | .endm |
1da177e4 | 79 | |
c5328901 | 80 | .macro CHECK_STACK stacksize,savearea |
63b12246 | 81 | #ifdef CONFIG_CHECK_STACK |
c5328901 MS |
82 | tml %r15,\stacksize - CONFIG_STACK_GUARD |
83 | lghi %r14,\savearea | |
84 | jz stack_overflow | |
63b12246 | 85 | #endif |
63b12246 MS |
86 | .endm |
87 | ||
2acb94f4 | 88 | .macro SWITCH_ASYNC savearea,timer |
c5328901 MS |
89 | tmhh %r8,0x0001 # interrupting from user ? |
90 | jnz 1f | |
91 | lgr %r14,%r9 | |
92 | slg %r14,BASED(.Lcritical_start) | |
93 | clg %r14,BASED(.Lcritical_length) | |
1da177e4 | 94 | jhe 0f |
c5328901 | 95 | lghi %r11,\savearea # inside critical section, do cleanup |
1da177e4 | 96 | brasl %r14,cleanup_critical |
c5328901 | 97 | tmhh %r8,0x0001 # retest problem state after cleanup |
1da177e4 | 98 | jnz 1f |
2acb94f4 | 99 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? |
1da177e4 | 100 | slgr %r14,%r15 |
2acb94f4 | 101 | srag %r14,%r14,STACK_SHIFT |
a359bb11 | 102 | jnz 2f |
2acb94f4 | 103 | CHECK_STACK 1<<STACK_SHIFT,\savearea |
dc7ee00d | 104 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
a359bb11 MS |
105 | j 3f |
106 | 1: LAST_BREAK %r14 | |
107 | UPDATE_VTIME %r14,%r15,\timer | |
2acb94f4 | 108 | 2: lg %r15,__LC_ASYNC_STACK # load async stack |
a359bb11 | 109 | 3: la %r11,STACK_FRAME_OVERHEAD(%r15) |
25d83cbf | 110 | .endm |
1da177e4 | 111 | |
a359bb11 MS |
112 | .macro UPDATE_VTIME w1,w2,enter_timer |
113 | lg \w1,__LC_EXIT_TIMER | |
114 | lg \w2,__LC_LAST_UPDATE_TIMER | |
115 | slg \w1,\enter_timer | |
116 | slg \w2,__LC_EXIT_TIMER | |
117 | alg \w1,__LC_USER_TIMER | |
118 | alg \w2,__LC_SYSTEM_TIMER | |
119 | stg \w1,__LC_USER_TIMER | |
120 | stg \w2,__LC_SYSTEM_TIMER | |
c5328901 | 121 | mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer |
1da177e4 LT |
122 | .endm |
123 | ||
c5328901 MS |
124 | .macro LAST_BREAK scratch |
125 | srag \scratch,%r10,23 | |
ef280c85 | 126 | #ifdef CONFIG_HAVE_MARCH_Z990_FEATURES |
61aaef51 | 127 | jz .+10 |
ef280c85 MS |
128 | stg %r10,__TASK_thread+__THREAD_last_break(%r12) |
129 | #else | |
61aaef51 | 130 | jz .+14 |
ef280c85 MS |
131 | lghi \scratch,__TASK_thread |
132 | stg %r10,__THREAD_last_break(\scratch,%r12) | |
133 | #endif | |
86f2552b MS |
134 | .endm |
135 | ||
1e54622e | 136 | .macro REENABLE_IRQS |
c5328901 MS |
137 | stg %r8,__LC_RETURN_PSW |
138 | ni __LC_RETURN_PSW,0xbf | |
139 | ssm __LC_RETURN_PSW | |
1e54622e MS |
140 | .endm |
141 | ||
473e66ba | 142 | .macro STCK savearea |
d652d596 | 143 | #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES |
473e66ba HC |
144 | .insn s,0xb27c0000,\savearea # store clock fast |
145 | #else | |
146 | .insn s,0xb2050000,\savearea # store clock | |
147 | #endif | |
148 | .endm | |
149 | ||
83abeffb HB |
150 | /* |
151 | * The TSTMSK macro generates a test-under-mask instruction by | |
152 | * calculating the memory offset for the specified mask value. | |
153 | * Mask value can be any constant. The macro shifts the mask | |
154 | * value to calculate the memory offset for the test-under-mask | |
155 | * instruction. | |
156 | */ | |
157 | .macro TSTMSK addr, mask, size=8, bytepos=0 | |
158 | .if (\bytepos < \size) && (\mask >> 8) | |
159 | .if (\mask & 0xff) | |
160 | .error "Mask exceeds byte boundary" | |
161 | .endif | |
162 | TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" | |
163 | .exitm | |
164 | .endif | |
165 | .ifeq \mask | |
166 | .error "Mask must not be zero" | |
167 | .endif | |
168 | off = \size - \bytepos - 1 | |
169 | tm off+\addr, \mask | |
170 | .endm | |
171 | ||
860dba45 | 172 | .section .kprobes.text, "ax" |
46210c44 HC |
173 | .Ldummy: |
174 | /* | |
175 | * This nop exists only in order to avoid that __switch_to starts at | |
176 | * the beginning of the kprobes text section. In that case we would | |
177 | * have several symbols at the same address. E.g. objdump would take | |
178 | * an arbitrary symbol name when disassembling this code. | |
179 | * With the added nop in between the __switch_to symbol is unique | |
180 | * again. | |
181 | */ | |
182 | nop 0 | |
860dba45 | 183 | |
1da177e4 LT |
184 | /* |
185 | * Scheduler resume function, called by switch_to | |
186 | * gpr2 = (task_struct *) prev | |
187 | * gpr3 = (task_struct *) next | |
188 | * Returns: | |
189 | * gpr2 = prev | |
190 | */ | |
144d634a | 191 | ENTRY(__switch_to) |
eda0c6d6 | 192 | stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task |
3827ec3d MS |
193 | lgr %r1,%r2 |
194 | aghi %r1,__TASK_thread # thread_struct of prev task | |
d5c352cd | 195 | lg %r5,__TASK_stack(%r3) # start of kernel stack of next |
3827ec3d MS |
196 | stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev |
197 | lgr %r1,%r3 | |
198 | aghi %r1,__TASK_thread # thread_struct of next task | |
eda0c6d6 | 199 | lgr %r15,%r5 |
dc7ee00d | 200 | aghi %r15,STACK_INIT # end of kernel stack of next |
eda0c6d6 | 201 | stg %r3,__LC_CURRENT # store task struct of next |
eda0c6d6 | 202 | stg %r15,__LC_KERNEL_STACK # store end of kernel stack |
3827ec3d | 203 | lg %r15,__THREAD_ksp(%r1) # load kernel stack of next |
b1685ab9 | 204 | /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */ |
eda0c6d6 | 205 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 |
e22cf8ca | 206 | mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next |
d3a73acb | 207 | lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task |
e22cf8ca CB |
208 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
209 | bzr %r14 | |
210 | .insn s,0xb2800000,__LC_LPP # set program parameter | |
1da177e4 LT |
211 | br %r14 |
212 | ||
86ed42f4 | 213 | .L__critical_start: |
d0fc4107 MS |
214 | |
215 | #if IS_ENABLED(CONFIG_KVM) | |
216 | /* | |
217 | * sie64a calling convention: | |
218 | * %r2 pointer to sie control block | |
219 | * %r3 guest register save area | |
220 | */ | |
221 | ENTRY(sie64a) | |
222 | stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers | |
223 | stg %r2,__SF_EMPTY(%r15) # save control block pointer | |
224 | stg %r3,__SF_EMPTY+8(%r15) # save guest register save area | |
e22cf8ca | 225 | xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 |
83abeffb | 226 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? |
d0fc4107 | 227 | jno .Lsie_load_guest_gprs |
d0fc4107 MS |
228 | brasl %r14,load_fpu_regs # load guest fp/vx regs |
229 | .Lsie_load_guest_gprs: | |
230 | lmg %r0,%r13,0(%r3) # load guest gprs 0-13 | |
231 | lg %r14,__LC_GMAP # get gmap pointer | |
232 | ltgr %r14,%r14 | |
233 | jz .Lsie_gmap | |
234 | lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce | |
235 | .Lsie_gmap: | |
236 | lg %r14,__SF_EMPTY(%r15) # get control block pointer | |
237 | oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now | |
238 | tm __SIE_PROG20+3(%r14),3 # last exit... | |
239 | jnz .Lsie_skip | |
83abeffb | 240 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
d0fc4107 | 241 | jo .Lsie_skip # exit if fp/vx regs changed |
d0fc4107 | 242 | sie 0(%r14) |
d0fc4107 MS |
243 | .Lsie_skip: |
244 | ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE | |
245 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce | |
246 | .Lsie_done: | |
247 | # some program checks are suppressing. C code (e.g. do_protection_exception) | |
248 | # will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other | |
249 | # instructions between sie64a and .Lsie_done should not cause program | |
250 | # interrupts. So lets use a nop (47 00 00 00) as a landing pad. | |
251 | # See also .Lcleanup_sie | |
252 | .Lrewind_pad: | |
253 | nop 0 | |
254 | .globl sie_exit | |
255 | sie_exit: | |
256 | lg %r14,__SF_EMPTY+8(%r15) # load guest register save area | |
257 | stmg %r0,%r13,0(%r14) # save guest gprs 0-13 | |
258 | lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers | |
e22cf8ca | 259 | lg %r2,__SF_EMPTY+16(%r15) # return exit reason code |
d0fc4107 MS |
260 | br %r14 |
261 | .Lsie_fault: | |
262 | lghi %r14,-EFAULT | |
e22cf8ca | 263 | stg %r14,__SF_EMPTY+16(%r15) # set exit reason code |
d0fc4107 MS |
264 | j sie_exit |
265 | ||
266 | EX_TABLE(.Lrewind_pad,.Lsie_fault) | |
267 | EX_TABLE(sie_exit,.Lsie_fault) | |
711f5df7 AV |
268 | EXPORT_SYMBOL(sie64a) |
269 | EXPORT_SYMBOL(sie_exit) | |
d0fc4107 MS |
270 | #endif |
271 | ||
1da177e4 LT |
272 | /* |
273 | * SVC interrupt handler routine. System calls are synchronous events and | |
274 | * are executed with interrupts enabled. | |
275 | */ | |
276 | ||
144d634a | 277 | ENTRY(system_call) |
c185b783 | 278 | stpt __LC_SYNC_ENTER_TIMER |
86ed42f4 | 279 | .Lsysc_stmg: |
c5328901 MS |
280 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
281 | lg %r10,__LC_LAST_BREAK | |
d5c352cd | 282 | lg %r12,__LC_CURRENT |
d3a73acb | 283 | lghi %r14,_PIF_SYSCALL |
86ed42f4 | 284 | .Lsysc_per: |
c5328901 | 285 | lg %r15,__LC_KERNEL_STACK |
c5328901 | 286 | la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs |
c5328901 | 287 | LAST_BREAK %r13 |
a359bb11 MS |
288 | .Lsysc_vtime: |
289 | UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER | |
c5328901 MS |
290 | stmg %r0,%r7,__PT_R0(%r11) |
291 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
292 | mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW | |
aa33c8cb | 293 | mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC |
d3a73acb | 294 | stg %r14,__PT_FLAGS(%r11) |
86ed42f4 | 295 | .Lsysc_do_svc: |
ef280c85 MS |
296 | # load address of system call table |
297 | #ifdef CONFIG_HAVE_MARCH_Z990_FEATURES | |
298 | lg %r10,__TASK_thread+__THREAD_sysc_table(%r12) | |
299 | #else | |
300 | lghi %r13,__TASK_thread | |
301 | lg %r10,__THREAD_sysc_table(%r13,%r12) | |
302 | #endif | |
aa33c8cb | 303 | llgh %r8,__PT_INT_CODE+2(%r11) |
c5328901 | 304 | slag %r8,%r8,2 # shift and test for svc 0 |
86ed42f4 | 305 | jnz .Lsysc_nr_ok |
1da177e4 | 306 | # svc 0: system call number in %r1 |
c5328901 | 307 | llgfr %r1,%r1 # clear high word in r1 |
86f2552b | 308 | cghi %r1,NR_syscalls |
86ed42f4 | 309 | jnl .Lsysc_nr_ok |
aa33c8cb | 310 | sth %r1,__PT_INT_CODE+2(%r11) |
c5328901 | 311 | slag %r8,%r1,2 |
86ed42f4 | 312 | .Lsysc_nr_ok: |
c5328901 MS |
313 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
314 | stg %r2,__PT_ORIG_GPR2(%r11) | |
315 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
316 | lgf %r9,0(%r8,%r10) # get system call add. | |
83abeffb | 317 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 318 | jnz .Lsysc_tracesys |
c5328901 MS |
319 | basr %r14,%r9 # call sys_xxxx |
320 | stg %r2,__PT_R2(%r11) # store return value | |
1da177e4 | 321 | |
86ed42f4 | 322 | .Lsysc_return: |
6a2df3a8 | 323 | LOCKDEP_SYS_EXIT |
86ed42f4 | 324 | .Lsysc_tif: |
83abeffb | 325 | TSTMSK __PT_FLAGS(%r11),_PIF_WORK |
86ed42f4 | 326 | jnz .Lsysc_work |
83abeffb | 327 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 328 | jnz .Lsysc_work # check for work |
83abeffb | 329 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
330 | jnz .Lsysc_work |
331 | .Lsysc_restore: | |
c5328901 MS |
332 | lg %r14,__LC_VDSO_PER_CPU |
333 | lmg %r0,%r10,__PT_R0(%r11) | |
334 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
335 | stpt __LC_EXIT_TIMER | |
336 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
337 | lmg %r11,%r15,__PT_R11(%r11) | |
338 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 339 | .Lsysc_done: |
411788ea | 340 | |
43d399d2 MS |
341 | # |
342 | # One of the work bits is on. Find out which one. | |
343 | # | |
86ed42f4 | 344 | .Lsysc_work: |
83abeffb | 345 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 346 | jo .Lsysc_mcck_pending |
83abeffb | 347 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 348 | jo .Lsysc_reschedule |
2a0a5b22 | 349 | #ifdef CONFIG_UPROBES |
83abeffb | 350 | TSTMSK __TI_flags(%r12),_TIF_UPROBE |
86ed42f4 | 351 | jo .Lsysc_uprobe_notify |
2a0a5b22 | 352 | #endif |
83abeffb | 353 | TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP |
86ed42f4 | 354 | jo .Lsysc_singlestep |
83abeffb | 355 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 356 | jo .Lsysc_sigpending |
83abeffb | 357 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 358 | jo .Lsysc_notify_resume |
83abeffb | 359 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 360 | jo .Lsysc_vxrs |
83abeffb | 361 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE |
86ed42f4 MS |
362 | jo .Lsysc_uaccess |
363 | j .Lsysc_return # beware of critical section cleanup | |
1da177e4 LT |
364 | |
365 | # | |
366 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 367 | # |
86ed42f4 MS |
368 | .Lsysc_reschedule: |
369 | larl %r14,.Lsysc_return | |
c5328901 | 370 | jg schedule |
1da177e4 | 371 | |
77fa2245 | 372 | # |
d3a73acb | 373 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 374 | # |
86ed42f4 MS |
375 | .Lsysc_mcck_pending: |
376 | larl %r14,.Lsysc_return | |
25d83cbf | 377 | jg s390_handle_mcck # TIF bit will be cleared by handler |
77fa2245 | 378 | |
457f2180 | 379 | # |
d3a73acb | 380 | # _CIF_ASCE is set, load user space asce |
457f2180 | 381 | # |
86ed42f4 | 382 | .Lsysc_uaccess: |
d3a73acb | 383 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE |
457f2180 | 384 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
86ed42f4 | 385 | j .Lsysc_return |
457f2180 | 386 | |
9977e886 HB |
387 | # |
388 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
389 | # | |
390 | .Lsysc_vxrs: | |
391 | larl %r14,.Lsysc_return | |
392 | jg load_fpu_regs | |
393 | ||
1da177e4 | 394 | # |
02a029b3 | 395 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 396 | # |
86ed42f4 | 397 | .Lsysc_sigpending: |
c5328901 MS |
398 | lgr %r2,%r11 # pass pointer to pt_regs |
399 | brasl %r14,do_signal | |
83abeffb | 400 | TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL |
86ed42f4 | 401 | jno .Lsysc_return |
c5328901 MS |
402 | lmg %r2,%r7,__PT_R2(%r11) # load svc arguments |
403 | lghi %r8,0 # svc 0 returns -ENOSYS | |
450e47da | 404 | llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number |
b6ef5bb3 | 405 | cghi %r1,NR_syscalls |
86ed42f4 | 406 | jnl .Lsysc_nr_ok # invalid svc number -> do svc 0 |
c5328901 | 407 | slag %r8,%r1,2 |
86ed42f4 | 408 | j .Lsysc_nr_ok # restart svc |
1da177e4 | 409 | |
753c4dd6 MS |
410 | # |
411 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
412 | # | |
86ed42f4 | 413 | .Lsysc_notify_resume: |
c5328901 | 414 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 415 | larl %r14,.Lsysc_return |
c5328901 | 416 | jg do_notify_resume |
753c4dd6 | 417 | |
2a0a5b22 JW |
418 | # |
419 | # _TIF_UPROBE is set, call uprobe_notify_resume | |
420 | # | |
421 | #ifdef CONFIG_UPROBES | |
86ed42f4 | 422 | .Lsysc_uprobe_notify: |
2a0a5b22 | 423 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 424 | larl %r14,.Lsysc_return |
2a0a5b22 JW |
425 | jg uprobe_notify_resume |
426 | #endif | |
427 | ||
1da177e4 | 428 | # |
d3a73acb | 429 | # _PIF_PER_TRAP is set, call do_per_trap |
1da177e4 | 430 | # |
86ed42f4 | 431 | .Lsysc_singlestep: |
d3a73acb | 432 | ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP |
c5328901 | 433 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 434 | larl %r14,.Lsysc_return |
5e9a2692 | 435 | jg do_per_trap |
1da177e4 | 436 | |
1da177e4 | 437 | # |
753c4dd6 MS |
438 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
439 | # and after the system call | |
1da177e4 | 440 | # |
86ed42f4 | 441 | .Lsysc_tracesys: |
c5328901 | 442 | lgr %r2,%r11 # pass pointer to pt_regs |
1da177e4 | 443 | la %r3,0 |
aa33c8cb | 444 | llgh %r0,__PT_INT_CODE+2(%r11) |
c5328901 | 445 | stg %r0,__PT_R2(%r11) |
753c4dd6 | 446 | brasl %r14,do_syscall_trace_enter |
1da177e4 | 447 | lghi %r0,NR_syscalls |
753c4dd6 | 448 | clgr %r0,%r2 |
86ed42f4 | 449 | jnh .Lsysc_tracenogo |
c5328901 MS |
450 | sllg %r8,%r2,2 |
451 | lgf %r9,0(%r8,%r10) | |
86ed42f4 | 452 | .Lsysc_tracego: |
c5328901 MS |
453 | lmg %r3,%r7,__PT_R3(%r11) |
454 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
455 | lg %r2,__PT_ORIG_GPR2(%r11) | |
456 | basr %r14,%r9 # call sys_xxx | |
457 | stg %r2,__PT_R2(%r11) # store return value | |
86ed42f4 | 458 | .Lsysc_tracenogo: |
83abeffb | 459 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 460 | jz .Lsysc_return |
c5328901 | 461 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 462 | larl %r14,.Lsysc_return |
753c4dd6 | 463 | jg do_syscall_trace_exit |
1da177e4 LT |
464 | |
465 | # | |
466 | # a new process exits the kernel with ret_from_fork | |
467 | # | |
144d634a | 468 | ENTRY(ret_from_fork) |
c5328901 | 469 | la %r11,STACK_FRAME_OVERHEAD(%r15) |
d5c352cd | 470 | lg %r12,__LC_CURRENT |
37fe5d41 AV |
471 | brasl %r14,schedule_tail |
472 | TRACE_IRQS_ON | |
473 | ssm __LC_SVC_NEW_PSW # reenable interrupts | |
30dcb099 | 474 | tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? |
86ed42f4 | 475 | jne .Lsysc_tracenogo |
30dcb099 AV |
476 | # it's a kernel thread |
477 | lmg %r9,%r10,__PT_R9(%r11) # load gprs | |
37fe5d41 AV |
478 | ENTRY(kernel_thread_starter) |
479 | la %r2,0(%r10) | |
480 | basr %r14,%r9 | |
86ed42f4 | 481 | j .Lsysc_tracenogo |
1da177e4 LT |
482 | |
483 | /* | |
484 | * Program check handler routine | |
485 | */ | |
486 | ||
144d634a | 487 | ENTRY(pgm_check_handler) |
c185b783 | 488 | stpt __LC_SYNC_ENTER_TIMER |
c5328901 MS |
489 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
490 | lg %r10,__LC_LAST_BREAK | |
d5c352cd | 491 | lg %r12,__LC_CURRENT |
9977e886 | 492 | larl %r13,cleanup_critical |
c5328901 | 493 | lmg %r8,%r9,__LC_PGM_OLD_PSW |
c5328901 | 494 | tmhh %r8,0x0001 # test problem state bit |
d0fc4107 MS |
495 | jnz 2f # -> fault in user space |
496 | #if IS_ENABLED(CONFIG_KVM) | |
497 | # cleanup critical section for sie64a | |
498 | lgr %r14,%r9 | |
499 | slg %r14,BASED(.Lsie_critical_start) | |
500 | clg %r14,BASED(.Lsie_critical_length) | |
501 | jhe 0f | |
502 | brasl %r14,.Lcleanup_sie | |
503 | #endif | |
504 | 0: tmhh %r8,0x4000 # PER bit set in old PSW ? | |
505 | jnz 1f # -> enabled, can't be a double fault | |
c5328901 | 506 | tm __LC_PGM_ILC+3,0x80 # check for per exception |
86ed42f4 | 507 | jnz .Lpgm_svcper # -> single stepped svc |
d0fc4107 | 508 | 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC |
dc7ee00d | 509 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
d0fc4107 | 510 | j 3f |
a359bb11 MS |
511 | 2: LAST_BREAK %r14 |
512 | UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER | |
c5328901 | 513 | lg %r15,__LC_KERNEL_STACK |
d5c352cd | 514 | lgr %r14,%r12 |
3827ec3d | 515 | aghi %r14,__TASK_thread # pointer to thread_struct |
d35339a4 MS |
516 | lghi %r13,__LC_PGM_TDB |
517 | tm __LC_PGM_ILC+2,0x02 # check for transaction abort | |
d0fc4107 | 518 | jz 3f |
d35339a4 | 519 | mvc __THREAD_trap_tdb(256,%r14),0(%r13) |
d0fc4107 | 520 | 3: la %r11,STACK_FRAME_OVERHEAD(%r15) |
c5328901 MS |
521 | stmg %r0,%r7,__PT_R0(%r11) |
522 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
523 | stmg %r8,%r9,__PT_PSW(%r11) | |
aa33c8cb MS |
524 | mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC |
525 | mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE | |
d3a73acb | 526 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
c5328901 MS |
527 | stg %r10,__PT_ARGS(%r11) |
528 | tm __LC_PGM_ILC+3,0x80 # check for per exception | |
d0fc4107 | 529 | jz 4f |
c5328901 | 530 | tmhh %r8,0x0001 # kernel per event ? |
86ed42f4 | 531 | jz .Lpgm_kprobe |
d3a73acb | 532 | oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP |
d35339a4 | 533 | mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS |
21ee7ffd JF |
534 | mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE |
535 | mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID | |
d0fc4107 | 536 | 4: REENABLE_IRQS |
c5328901 | 537 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
f5cdac27 | 538 | larl %r1,pgm_check_table |
aa33c8cb MS |
539 | llgh %r10,__PT_INT_CODE+2(%r11) |
540 | nill %r10,0x007f | |
b01a37a7 | 541 | sll %r10,2 |
a359bb11 | 542 | je .Lpgm_return |
b01a37a7 | 543 | lgf %r1,0(%r10,%r1) # load address of handler routine |
c5328901 | 544 | lgr %r2,%r11 # pass pointer to pt_regs |
f5cdac27 | 545 | basr %r14,%r1 # branch to interrupt-handler |
a359bb11 MS |
546 | .Lpgm_return: |
547 | LOCKDEP_SYS_EXIT | |
548 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
549 | jno .Lsysc_restore | |
550 | j .Lsysc_tif | |
1da177e4 LT |
551 | |
552 | # | |
c5328901 | 553 | # PER event in supervisor state, must be kprobes |
1da177e4 | 554 | # |
86ed42f4 | 555 | .Lpgm_kprobe: |
c5328901 MS |
556 | REENABLE_IRQS |
557 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | |
558 | lgr %r2,%r11 # pass pointer to pt_regs | |
559 | brasl %r14,do_per_trap | |
a359bb11 | 560 | j .Lpgm_return |
1da177e4 | 561 | |
4ba069b8 | 562 | # |
c5328901 | 563 | # single stepped system call |
4ba069b8 | 564 | # |
86ed42f4 | 565 | .Lpgm_svcper: |
c5328901 | 566 | mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW |
86ed42f4 | 567 | larl %r14,.Lsysc_per |
c5328901 | 568 | stg %r14,__LC_RETURN_PSW+8 |
d3a73acb | 569 | lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP |
86ed42f4 | 570 | lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs |
4ba069b8 | 571 | |
1da177e4 LT |
572 | /* |
573 | * IO interrupt handler routine | |
574 | */ | |
144d634a | 575 | ENTRY(io_int_handler) |
473e66ba | 576 | STCK __LC_INT_CLOCK |
9cfb9b3c | 577 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 MS |
578 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
579 | lg %r10,__LC_LAST_BREAK | |
d5c352cd | 580 | lg %r12,__LC_CURRENT |
9977e886 | 581 | larl %r13,cleanup_critical |
c5328901 | 582 | lmg %r8,%r9,__LC_IO_OLD_PSW |
2acb94f4 | 583 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
584 | stmg %r0,%r7,__PT_R0(%r11) |
585 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
586 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c | 587 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
d3a73acb | 588 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
589 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
590 | jo .Lio_restore | |
1f194a4c | 591 | TRACE_IRQS_OFF |
c5328901 | 592 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
86ed42f4 | 593 | .Lio_loop: |
c5328901 | 594 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
595 | lghi %r3,IO_INTERRUPT |
596 | tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? | |
86ed42f4 | 597 | jz .Lio_call |
1f44a225 | 598 | lghi %r3,THIN_INTERRUPT |
86ed42f4 | 599 | .Lio_call: |
c5328901 | 600 | brasl %r14,do_IRQ |
83abeffb | 601 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR |
86ed42f4 | 602 | jz .Lio_return |
48f6b00c | 603 | tpi 0 |
86ed42f4 | 604 | jz .Lio_return |
48f6b00c | 605 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
86ed42f4 MS |
606 | j .Lio_loop |
607 | .Lio_return: | |
6a2df3a8 MS |
608 | LOCKDEP_SYS_EXIT |
609 | TRACE_IRQS_ON | |
86ed42f4 | 610 | .Lio_tif: |
83abeffb | 611 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 612 | jnz .Lio_work # there is work to do (signals etc.) |
83abeffb | 613 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
614 | jnz .Lio_work |
615 | .Lio_restore: | |
c5328901 MS |
616 | lg %r14,__LC_VDSO_PER_CPU |
617 | lmg %r0,%r10,__PT_R0(%r11) | |
618 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
c5328901 MS |
619 | stpt __LC_EXIT_TIMER |
620 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
621 | lmg %r11,%r15,__PT_R11(%r11) | |
622 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 623 | .Lio_done: |
1da177e4 | 624 | |
2688905e | 625 | # |
43d399d2 | 626 | # There is work todo, find out in which context we have been interrupted: |
d3a73acb | 627 | # 1) if we return to user space we can do all _TIF_WORK work |
43d399d2 MS |
628 | # 2) if we return to kernel code and kvm is enabled check if we need to |
629 | # modify the psw to leave SIE | |
630 | # 3) if we return to kernel code and preemptive scheduling is enabled check | |
631 | # the preemption counter and if it is zero call preempt_schedule_irq | |
632 | # Before any work can be done, a switch to the kernel stack is required. | |
2688905e | 633 | # |
86ed42f4 | 634 | .Lio_work: |
c5328901 | 635 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 636 | jo .Lio_work_user # yes -> do resched & signal |
43d399d2 | 637 | #ifdef CONFIG_PREEMPT |
2688905e | 638 | # check for preemptive scheduling |
c360192b | 639 | icm %r0,15,__LC_PREEMPT_COUNT |
86ed42f4 | 640 | jnz .Lio_restore # preemption is disabled |
83abeffb | 641 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 642 | jno .Lio_restore |
1da177e4 | 643 | # switch to kernel stack |
c5328901 MS |
644 | lg %r1,__PT_R15(%r11) |
645 | aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) | |
646 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) | |
647 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
648 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 649 | lgr %r15,%r1 |
86ed42f4 | 650 | # TRACE_IRQS_ON already done at .Lio_return, call |
6a2df3a8 MS |
651 | # TRACE_IRQS_OFF to keep things symmetrical |
652 | TRACE_IRQS_OFF | |
653 | brasl %r14,preempt_schedule_irq | |
86ed42f4 | 654 | j .Lio_return |
6a2df3a8 | 655 | #else |
86ed42f4 | 656 | j .Lio_restore |
6a2df3a8 | 657 | #endif |
1da177e4 | 658 | |
43d399d2 MS |
659 | # |
660 | # Need to do work before returning to userspace, switch to kernel stack | |
661 | # | |
86ed42f4 | 662 | .Lio_work_user: |
1da177e4 | 663 | lg %r1,__LC_KERNEL_STACK |
c5328901 MS |
664 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
665 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
666 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 667 | lgr %r15,%r1 |
43d399d2 | 668 | |
1da177e4 LT |
669 | # |
670 | # One of the work bits is on. Find out which one. | |
1da177e4 | 671 | # |
86ed42f4 | 672 | .Lio_work_tif: |
83abeffb | 673 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 674 | jo .Lio_mcck_pending |
83abeffb | 675 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 676 | jo .Lio_reschedule |
83abeffb | 677 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 678 | jo .Lio_sigpending |
83abeffb | 679 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 680 | jo .Lio_notify_resume |
83abeffb | 681 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 682 | jo .Lio_vxrs |
83abeffb | 683 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE |
86ed42f4 MS |
684 | jo .Lio_uaccess |
685 | j .Lio_return # beware of critical section cleanup | |
0eaeafa1 | 686 | |
77fa2245 | 687 | # |
d3a73acb | 688 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 689 | # |
86ed42f4 MS |
690 | .Lio_mcck_pending: |
691 | # TRACE_IRQS_ON already done at .Lio_return | |
b771aeac | 692 | brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler |
6a2df3a8 | 693 | TRACE_IRQS_OFF |
86ed42f4 | 694 | j .Lio_return |
77fa2245 | 695 | |
457f2180 | 696 | # |
d3a73acb | 697 | # _CIF_ASCE is set, load user space asce |
457f2180 | 698 | # |
86ed42f4 | 699 | .Lio_uaccess: |
d3a73acb | 700 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE |
457f2180 | 701 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
86ed42f4 | 702 | j .Lio_return |
457f2180 | 703 | |
9977e886 HB |
704 | # |
705 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
706 | # | |
707 | .Lio_vxrs: | |
708 | larl %r14,.Lio_return | |
709 | jg load_fpu_regs | |
710 | ||
1da177e4 LT |
711 | # |
712 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 713 | # |
86ed42f4 MS |
714 | .Lio_reschedule: |
715 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 | 716 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
25d83cbf | 717 | brasl %r14,schedule # call scheduler |
c5328901 | 718 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts |
411788ea | 719 | TRACE_IRQS_OFF |
86ed42f4 | 720 | j .Lio_return |
1da177e4 LT |
721 | |
722 | # | |
02a029b3 | 723 | # _TIF_SIGPENDING or is set, call do_signal |
1da177e4 | 724 | # |
86ed42f4 MS |
725 | .Lio_sigpending: |
726 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
727 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
728 | lgr %r2,%r11 # pass pointer to pt_regs | |
729 | brasl %r14,do_signal | |
730 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
411788ea | 731 | TRACE_IRQS_OFF |
86ed42f4 | 732 | j .Lio_return |
1da177e4 | 733 | |
753c4dd6 MS |
734 | # |
735 | # _TIF_NOTIFY_RESUME or is set, call do_notify_resume | |
736 | # | |
86ed42f4 MS |
737 | .Lio_notify_resume: |
738 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
739 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
740 | lgr %r2,%r11 # pass pointer to pt_regs | |
741 | brasl %r14,do_notify_resume | |
742 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
753c4dd6 | 743 | TRACE_IRQS_OFF |
86ed42f4 | 744 | j .Lio_return |
753c4dd6 | 745 | |
1da177e4 LT |
746 | /* |
747 | * External interrupt handler routine | |
748 | */ | |
144d634a | 749 | ENTRY(ext_int_handler) |
473e66ba | 750 | STCK __LC_INT_CLOCK |
9cfb9b3c | 751 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 MS |
752 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
753 | lg %r10,__LC_LAST_BREAK | |
d5c352cd | 754 | lg %r12,__LC_CURRENT |
9977e886 | 755 | larl %r13,cleanup_critical |
c5328901 | 756 | lmg %r8,%r9,__LC_EXT_OLD_PSW |
2acb94f4 | 757 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
758 | stmg %r0,%r7,__PT_R0(%r11) |
759 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
760 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c MS |
761 | lghi %r1,__LC_EXT_PARAMS2 |
762 | mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR | |
763 | mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS | |
764 | mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) | |
d3a73acb | 765 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
766 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
767 | jo .Lio_restore | |
1f194a4c | 768 | TRACE_IRQS_OFF |
0de9db37 | 769 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
c5328901 | 770 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
771 | lghi %r3,EXT_INTERRUPT |
772 | brasl %r14,do_IRQ | |
86ed42f4 | 773 | j .Lio_return |
1da177e4 | 774 | |
4c1051e3 | 775 | /* |
86ed42f4 | 776 | * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. |
4c1051e3 MS |
777 | */ |
778 | ENTRY(psw_idle) | |
27f6b416 | 779 | stg %r3,__SF_EMPTY(%r15) |
86ed42f4 | 780 | larl %r1,.Lpsw_idle_lpsw+4 |
4c1051e3 | 781 | stg %r1,__SF_EMPTY+8(%r15) |
72d38b19 MS |
782 | #ifdef CONFIG_SMP |
783 | larl %r1,smp_cpu_mtid | |
784 | llgf %r1,0(%r1) | |
785 | ltgr %r1,%r1 | |
786 | jz .Lpsw_idle_stcctm | |
787 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) | |
788 | .Lpsw_idle_stcctm: | |
789 | #endif | |
419123f9 | 790 | oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT |
27f6b416 MS |
791 | STCK __CLOCK_IDLE_ENTER(%r2) |
792 | stpt __TIMER_IDLE_ENTER(%r2) | |
86ed42f4 | 793 | .Lpsw_idle_lpsw: |
4c1051e3 MS |
794 | lpswe __SF_EMPTY(%r15) |
795 | br %r14 | |
86ed42f4 | 796 | .Lpsw_idle_end: |
4c1051e3 | 797 | |
b5510d9b HB |
798 | /* |
799 | * Store floating-point controls and floating-point or vector register | |
800 | * depending whether the vector facility is available. A critical section | |
801 | * cleanup assures that the registers are stored even if interrupted for | |
802 | * some other work. The CIF_FPU flag is set to trigger a lazy restore | |
803 | * of the register contents at return from io or a system call. | |
9977e886 HB |
804 | */ |
805 | ENTRY(save_fpu_regs) | |
d0164ee2 HB |
806 | lg %r2,__LC_CURRENT |
807 | aghi %r2,__TASK_thread | |
83abeffb | 808 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 809 | bor %r14 |
d0164ee2 | 810 | stfpc __THREAD_FPU_fpc(%r2) |
d0164ee2 | 811 | lg %r3,__THREAD_FPU_regs(%r2) |
83abeffb | 812 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
9977e886 | 813 | jz .Lsave_fpu_regs_fp # no -> store FP regs |
9977e886 | 814 | VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) |
9977e886 HB |
815 | VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) |
816 | j .Lsave_fpu_regs_done # -> set CIF_FPU flag | |
817 | .Lsave_fpu_regs_fp: | |
818 | std 0,0(%r3) | |
819 | std 1,8(%r3) | |
820 | std 2,16(%r3) | |
821 | std 3,24(%r3) | |
822 | std 4,32(%r3) | |
823 | std 5,40(%r3) | |
824 | std 6,48(%r3) | |
825 | std 7,56(%r3) | |
826 | std 8,64(%r3) | |
827 | std 9,72(%r3) | |
828 | std 10,80(%r3) | |
829 | std 11,88(%r3) | |
830 | std 12,96(%r3) | |
831 | std 13,104(%r3) | |
832 | std 14,112(%r3) | |
833 | std 15,120(%r3) | |
834 | .Lsave_fpu_regs_done: | |
835 | oi __LC_CPU_FLAGS+7,_CIF_FPU | |
836 | br %r14 | |
837 | .Lsave_fpu_regs_end: | |
711f5df7 AV |
838 | #if IS_ENABLED(CONFIG_KVM) |
839 | EXPORT_SYMBOL(save_fpu_regs) | |
840 | #endif | |
9977e886 | 841 | |
b5510d9b HB |
842 | /* |
843 | * Load floating-point controls and floating-point or vector registers. | |
844 | * A critical section cleanup assures that the register contents are | |
845 | * loaded even if interrupted for some other work. | |
9977e886 HB |
846 | * |
847 | * There are special calling conventions to fit into sysc and io return work: | |
9977e886 HB |
848 | * %r15: <kernel stack> |
849 | * The function requires: | |
b5510d9b | 850 | * %r4 |
9977e886 HB |
851 | */ |
852 | load_fpu_regs: | |
d0164ee2 HB |
853 | lg %r4,__LC_CURRENT |
854 | aghi %r4,__TASK_thread | |
83abeffb | 855 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 856 | bnor %r14 |
d0164ee2 | 857 | lfpc __THREAD_FPU_fpc(%r4) |
83abeffb | 858 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
d0164ee2 | 859 | lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area |
b5510d9b | 860 | jz .Lload_fpu_regs_fp # -> no VX, load FP regs |
9977e886 | 861 | VLM %v0,%v15,0,%r4 |
9977e886 HB |
862 | VLM %v16,%v31,256,%r4 |
863 | j .Lload_fpu_regs_done | |
9977e886 HB |
864 | .Lload_fpu_regs_fp: |
865 | ld 0,0(%r4) | |
866 | ld 1,8(%r4) | |
867 | ld 2,16(%r4) | |
868 | ld 3,24(%r4) | |
869 | ld 4,32(%r4) | |
870 | ld 5,40(%r4) | |
871 | ld 6,48(%r4) | |
872 | ld 7,56(%r4) | |
873 | ld 8,64(%r4) | |
874 | ld 9,72(%r4) | |
875 | ld 10,80(%r4) | |
876 | ld 11,88(%r4) | |
877 | ld 12,96(%r4) | |
878 | ld 13,104(%r4) | |
879 | ld 14,112(%r4) | |
880 | ld 15,120(%r4) | |
881 | .Lload_fpu_regs_done: | |
882 | ni __LC_CPU_FLAGS+7,255-_CIF_FPU | |
883 | br %r14 | |
884 | .Lload_fpu_regs_end: | |
885 | ||
86ed42f4 | 886 | .L__critical_end: |
ae6aa2ea | 887 | |
1da177e4 LT |
888 | /* |
889 | * Machine check handler routines | |
890 | */ | |
144d634a | 891 | ENTRY(mcck_int_handler) |
473e66ba | 892 | STCK __LC_MCCK_CLOCK |
77fa2245 HC |
893 | la %r1,4095 # revalidate r1 |
894 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | |
25d83cbf | 895 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs |
c5328901 | 896 | lg %r10,__LC_LAST_BREAK |
d5c352cd | 897 | lg %r12,__LC_CURRENT |
9977e886 | 898 | larl %r13,cleanup_critical |
c5328901 | 899 | lmg %r8,%r9,__LC_MCK_OLD_PSW |
83abeffb | 900 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE |
86ed42f4 | 901 | jo .Lmcck_panic # yes -> rest of mcck code invalid |
c5328901 MS |
902 | lghi %r14,__LC_CPU_TIMER_SAVE_AREA |
903 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) | |
83abeffb | 904 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID |
c5328901 | 905 | jo 3f |
63b12246 MS |
906 | la %r14,__LC_SYNC_ENTER_TIMER |
907 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
908 | jl 0f | |
909 | la %r14,__LC_ASYNC_ENTER_TIMER | |
910 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
c5328901 | 911 | jl 1f |
63b12246 | 912 | la %r14,__LC_EXIT_TIMER |
c5328901 MS |
913 | 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER |
914 | jl 2f | |
63b12246 | 915 | la %r14,__LC_LAST_UPDATE_TIMER |
c5328901 | 916 | 2: spt 0(%r14) |
6377981f | 917 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) |
83abeffb | 918 | 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID) |
86ed42f4 | 919 | jno .Lmcck_panic # no -> skip cleanup critical |
2acb94f4 | 920 | SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER |
86ed42f4 | 921 | .Lmcck_skip: |
6551fbdf MS |
922 | lghi %r14,__LC_GPREGS_SAVE_AREA+64 |
923 | stmg %r0,%r7,__PT_R0(%r11) | |
924 | mvc __PT_R8(64,%r11),0(%r14) | |
c5328901 | 925 | stmg %r8,%r9,__PT_PSW(%r11) |
d3a73acb | 926 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
c5328901 MS |
927 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
928 | lgr %r2,%r11 # pass pointer to pt_regs | |
77fa2245 | 929 | brasl %r14,s390_do_machine_check |
c5328901 | 930 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 931 | jno .Lmcck_return |
77fa2245 | 932 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack |
c5328901 MS |
933 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
934 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
935 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
77fa2245 | 936 | lgr %r15,%r1 |
c5328901 | 937 | ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off |
83abeffb | 938 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 939 | jno .Lmcck_return |
1f194a4c | 940 | TRACE_IRQS_OFF |
77fa2245 | 941 | brasl %r14,s390_handle_mcck |
1f194a4c | 942 | TRACE_IRQS_ON |
86ed42f4 | 943 | .Lmcck_return: |
c5328901 MS |
944 | lg %r14,__LC_VDSO_PER_CPU |
945 | lmg %r0,%r10,__PT_R0(%r11) | |
946 | mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW | |
63b12246 MS |
947 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? |
948 | jno 0f | |
949 | stpt __LC_EXIT_TIMER | |
c5328901 MS |
950 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER |
951 | 0: lmg %r11,%r15,__PT_R11(%r11) | |
952 | lpswe __LC_RETURN_MCCK_PSW | |
953 | ||
86ed42f4 | 954 | .Lmcck_panic: |
c5328901 | 955 | lg %r15,__LC_PANIC_STACK |
ce4dda3f | 956 | la %r11,STACK_FRAME_OVERHEAD(%r15) |
86ed42f4 | 957 | j .Lmcck_skip |
1da177e4 | 958 | |
7dd6b334 MH |
959 | # |
960 | # PSW restart interrupt handler | |
961 | # | |
8b646bd7 | 962 | ENTRY(restart_int_handler) |
e22cf8ca CB |
963 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
964 | jz 0f | |
965 | .insn s,0xb2800000,__LC_LPP | |
966 | 0: stg %r15,__LC_SAVE_AREA_RESTART | |
8b646bd7 | 967 | lg %r15,__LC_RESTART_STACK |
c5328901 | 968 | aghi %r15,-__PT_SIZE # create pt_regs on stack |
8b646bd7 | 969 | xc 0(__PT_SIZE,%r15),0(%r15) |
c5328901 MS |
970 | stmg %r0,%r14,__PT_R0(%r15) |
971 | mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART | |
972 | mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw | |
8b646bd7 MS |
973 | aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack |
974 | xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) | |
fbe76568 HC |
975 | lg %r1,__LC_RESTART_FN # load fn, parm & source cpu |
976 | lg %r2,__LC_RESTART_DATA | |
977 | lg %r3,__LC_RESTART_SOURCE | |
8b646bd7 MS |
978 | ltgr %r3,%r3 # test source cpu address |
979 | jm 1f # negative -> skip source stop | |
eb546195 | 980 | 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu |
8b646bd7 MS |
981 | brc 10,0b # wait for status stored |
982 | 1: basr %r14,%r1 # call function | |
983 | stap __SF_EMPTY(%r15) # store cpu address | |
984 | llgh %r3,__SF_EMPTY(%r15) | |
eb546195 | 985 | 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu |
8b646bd7 MS |
986 | brc 2,2b |
987 | 3: j 3b | |
7dd6b334 | 988 | |
860dba45 MS |
989 | .section .kprobes.text, "ax" |
990 | ||
1da177e4 LT |
991 | #ifdef CONFIG_CHECK_STACK |
992 | /* | |
993 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
994 | * No need to properly save the registers, we are going to panic anyway. | |
995 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
996 | */ | |
997 | stack_overflow: | |
dc7ee00d MS |
998 | lg %r15,__LC_PANIC_STACK # change to panic stack |
999 | la %r11,STACK_FRAME_OVERHEAD(%r15) | |
c5328901 MS |
1000 | stmg %r0,%r7,__PT_R0(%r11) |
1001 | stmg %r8,%r9,__PT_PSW(%r11) | |
1002 | mvc __PT_R8(64,%r11),0(%r14) | |
1003 | stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 | |
c5328901 MS |
1004 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
1005 | lgr %r2,%r11 # pass pointer to pt_regs | |
1da177e4 LT |
1006 | jg kernel_stack_overflow |
1007 | #endif | |
1008 | ||
1da177e4 | 1009 | cleanup_critical: |
d0fc4107 MS |
1010 | #if IS_ENABLED(CONFIG_KVM) |
1011 | clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap | |
1012 | jl 0f | |
1013 | clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done | |
1014 | jl .Lcleanup_sie | |
1015 | #endif | |
86ed42f4 | 1016 | clg %r9,BASED(.Lcleanup_table) # system_call |
1da177e4 | 1017 | jl 0f |
86ed42f4 MS |
1018 | clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc |
1019 | jl .Lcleanup_system_call | |
1020 | clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif | |
1da177e4 | 1021 | jl 0f |
86ed42f4 MS |
1022 | clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore |
1023 | jl .Lcleanup_sysc_tif | |
1024 | clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done | |
1025 | jl .Lcleanup_sysc_restore | |
1026 | clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif | |
63b12246 | 1027 | jl 0f |
86ed42f4 MS |
1028 | clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore |
1029 | jl .Lcleanup_io_tif | |
1030 | clg %r9,BASED(.Lcleanup_table+56) # .Lio_done | |
1031 | jl .Lcleanup_io_restore | |
1032 | clg %r9,BASED(.Lcleanup_table+64) # psw_idle | |
4c1051e3 | 1033 | jl 0f |
86ed42f4 MS |
1034 | clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end |
1035 | jl .Lcleanup_idle | |
9977e886 HB |
1036 | clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs |
1037 | jl 0f | |
1038 | clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end | |
1039 | jl .Lcleanup_save_fpu_regs | |
1040 | clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs | |
1041 | jl 0f | |
1042 | clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end | |
1043 | jl .Lcleanup_load_fpu_regs | |
c5328901 MS |
1044 | 0: br %r14 |
1045 | ||
d0fc4107 MS |
1046 | .align 8 |
1047 | .Lcleanup_table: | |
1048 | .quad system_call | |
1049 | .quad .Lsysc_do_svc | |
1050 | .quad .Lsysc_tif | |
1051 | .quad .Lsysc_restore | |
1052 | .quad .Lsysc_done | |
1053 | .quad .Lio_tif | |
1054 | .quad .Lio_restore | |
1055 | .quad .Lio_done | |
1056 | .quad psw_idle | |
1057 | .quad .Lpsw_idle_end | |
1058 | .quad save_fpu_regs | |
1059 | .quad .Lsave_fpu_regs_end | |
1060 | .quad load_fpu_regs | |
1061 | .quad .Lload_fpu_regs_end | |
d0fc4107 MS |
1062 | |
1063 | #if IS_ENABLED(CONFIG_KVM) | |
1064 | .Lcleanup_table_sie: | |
1065 | .quad .Lsie_gmap | |
1066 | .quad .Lsie_done | |
1067 | ||
1068 | .Lcleanup_sie: | |
1069 | lg %r9,__SF_EMPTY(%r15) # get control block pointer | |
e22cf8ca | 1070 | ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE |
d0fc4107 MS |
1071 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
1072 | larl %r9,sie_exit # skip forward to sie_exit | |
1073 | br %r14 | |
1074 | #endif | |
1da177e4 | 1075 | |
86ed42f4 | 1076 | .Lcleanup_system_call: |
c5328901 | 1077 | # check if stpt has been executed |
86ed42f4 | 1078 | clg %r9,BASED(.Lcleanup_system_call_insn) |
1da177e4 LT |
1079 | jh 0f |
1080 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
c5328901 | 1081 | cghi %r11,__LC_SAVE_AREA_ASYNC |
6377981f | 1082 | je 0f |
c5328901 MS |
1083 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER |
1084 | 0: # check if stmg has been executed | |
86ed42f4 | 1085 | clg %r9,BASED(.Lcleanup_system_call_insn+8) |
1da177e4 | 1086 | jh 0f |
c5328901 MS |
1087 | mvc __LC_SAVE_AREA_SYNC(64),0(%r11) |
1088 | 0: # check if base register setup + TIF bit load has been done | |
86ed42f4 | 1089 | clg %r9,BASED(.Lcleanup_system_call_insn+16) |
c5328901 MS |
1090 | jhe 0f |
1091 | # set up saved registers r10 and r12 | |
1092 | stg %r10,16(%r11) # r10 last break | |
ef280c85 | 1093 | stg %r12,32(%r11) # r12 task struct pointer |
c5328901 | 1094 | 0: # check if the user time update has been done |
86ed42f4 | 1095 | clg %r9,BASED(.Lcleanup_system_call_insn+24) |
c5328901 MS |
1096 | jh 0f |
1097 | lg %r15,__LC_EXIT_TIMER | |
1098 | slg %r15,__LC_SYNC_ENTER_TIMER | |
1099 | alg %r15,__LC_USER_TIMER | |
1100 | stg %r15,__LC_USER_TIMER | |
1101 | 0: # check if the system time update has been done | |
86ed42f4 | 1102 | clg %r9,BASED(.Lcleanup_system_call_insn+32) |
c5328901 MS |
1103 | jh 0f |
1104 | lg %r15,__LC_LAST_UPDATE_TIMER | |
1105 | slg %r15,__LC_EXIT_TIMER | |
1106 | alg %r15,__LC_SYSTEM_TIMER | |
1107 | stg %r15,__LC_SYSTEM_TIMER | |
1108 | 0: # update accounting time stamp | |
1da177e4 | 1109 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER |
c5328901 MS |
1110 | # do LAST_BREAK |
1111 | lg %r9,16(%r11) | |
1112 | srag %r9,%r9,23 | |
86f2552b | 1113 | jz 0f |
ef280c85 MS |
1114 | lgr %r9,%r12 |
1115 | aghi %r9,__TASK_thread | |
1116 | mvc __THREAD_last_break(8,%r9),16(%r11) | |
c5328901 MS |
1117 | 0: # set up saved register r11 |
1118 | lg %r15,__LC_KERNEL_STACK | |
dc7ee00d MS |
1119 | la %r9,STACK_FRAME_OVERHEAD(%r15) |
1120 | stg %r9,24(%r11) # r11 pt_regs pointer | |
c5328901 | 1121 | # fill pt_regs |
dc7ee00d MS |
1122 | mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC |
1123 | stmg %r0,%r7,__PT_R0(%r9) | |
1124 | mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW | |
1125 | mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC | |
d3a73acb MS |
1126 | xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) |
1127 | mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL | |
c5328901 | 1128 | # setup saved register r15 |
c5328901 MS |
1129 | stg %r15,56(%r11) # r15 stack pointer |
1130 | # set new psw address and exit | |
86ed42f4 | 1131 | larl %r9,.Lsysc_do_svc |
1da177e4 | 1132 | br %r14 |
86ed42f4 | 1133 | .Lcleanup_system_call_insn: |
25d83cbf | 1134 | .quad system_call |
86ed42f4 MS |
1135 | .quad .Lsysc_stmg |
1136 | .quad .Lsysc_per | |
a359bb11 | 1137 | .quad .Lsysc_vtime+36 |
86ed42f4 | 1138 | .quad .Lsysc_vtime+42 |
1da177e4 | 1139 | |
86ed42f4 MS |
1140 | .Lcleanup_sysc_tif: |
1141 | larl %r9,.Lsysc_tif | |
1da177e4 LT |
1142 | br %r14 |
1143 | ||
86ed42f4 MS |
1144 | .Lcleanup_sysc_restore: |
1145 | clg %r9,BASED(.Lcleanup_sysc_restore_insn) | |
6377981f | 1146 | je 0f |
c5328901 MS |
1147 | lg %r9,24(%r11) # get saved pointer to pt_regs |
1148 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
1149 | mvc 0(64,%r11),__PT_R8(%r9) | |
1150 | lmg %r0,%r7,__PT_R0(%r9) | |
1151 | 0: lmg %r8,%r9,__LC_RETURN_PSW | |
1da177e4 | 1152 | br %r14 |
86ed42f4 MS |
1153 | .Lcleanup_sysc_restore_insn: |
1154 | .quad .Lsysc_done - 4 | |
1da177e4 | 1155 | |
86ed42f4 MS |
1156 | .Lcleanup_io_tif: |
1157 | larl %r9,.Lio_tif | |
176b1803 MS |
1158 | br %r14 |
1159 | ||
86ed42f4 MS |
1160 | .Lcleanup_io_restore: |
1161 | clg %r9,BASED(.Lcleanup_io_restore_insn) | |
c5328901 MS |
1162 | je 0f |
1163 | lg %r9,24(%r11) # get saved r11 pointer to pt_regs | |
1164 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
c5328901 MS |
1165 | mvc 0(64,%r11),__PT_R8(%r9) |
1166 | lmg %r0,%r7,__PT_R0(%r9) | |
1167 | 0: lmg %r8,%r9,__LC_RETURN_PSW | |
ae6aa2ea | 1168 | br %r14 |
86ed42f4 MS |
1169 | .Lcleanup_io_restore_insn: |
1170 | .quad .Lio_done - 4 | |
ae6aa2ea | 1171 | |
86ed42f4 | 1172 | .Lcleanup_idle: |
419123f9 | 1173 | ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT |
4c1051e3 | 1174 | # copy interrupt clock & cpu timer |
27f6b416 MS |
1175 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK |
1176 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER | |
4c1051e3 MS |
1177 | cghi %r11,__LC_SAVE_AREA_ASYNC |
1178 | je 0f | |
27f6b416 MS |
1179 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK |
1180 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER | |
4c1051e3 | 1181 | 0: # check if stck & stpt have been executed |
86ed42f4 | 1182 | clg %r9,BASED(.Lcleanup_idle_insn) |
4c1051e3 | 1183 | jhe 1f |
27f6b416 MS |
1184 | mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) |
1185 | mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) | |
72d38b19 MS |
1186 | 1: # calculate idle cycles |
1187 | #ifdef CONFIG_SMP | |
1188 | clg %r9,BASED(.Lcleanup_idle_insn) | |
1189 | jl 3f | |
1190 | larl %r1,smp_cpu_mtid | |
1191 | llgf %r1,0(%r1) | |
1192 | ltgr %r1,%r1 | |
1193 | jz 3f | |
1194 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) | |
1195 | larl %r3,mt_cycles | |
1196 | ag %r3,__LC_PERCPU_OFFSET | |
1197 | la %r4,__SF_EMPTY+16(%r15) | |
1198 | 2: lg %r0,0(%r3) | |
1199 | slg %r0,0(%r4) | |
1200 | alg %r0,64(%r4) | |
1201 | stg %r0,0(%r3) | |
1202 | la %r3,8(%r3) | |
1203 | la %r4,8(%r4) | |
1204 | brct %r1,2b | |
1205 | #endif | |
1206 | 3: # account system time going idle | |
4c1051e3 | 1207 | lg %r9,__LC_STEAL_TIMER |
27f6b416 | 1208 | alg %r9,__CLOCK_IDLE_ENTER(%r2) |
4c1051e3 MS |
1209 | slg %r9,__LC_LAST_UPDATE_CLOCK |
1210 | stg %r9,__LC_STEAL_TIMER | |
27f6b416 | 1211 | mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) |
4c1051e3 MS |
1212 | lg %r9,__LC_SYSTEM_TIMER |
1213 | alg %r9,__LC_LAST_UPDATE_TIMER | |
27f6b416 | 1214 | slg %r9,__TIMER_IDLE_ENTER(%r2) |
4c1051e3 | 1215 | stg %r9,__LC_SYSTEM_TIMER |
27f6b416 | 1216 | mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) |
4c1051e3 | 1217 | # prepare return psw |
0587d409 | 1218 | nihh %r8,0xfcfd # clear irq & wait state bits |
4c1051e3 MS |
1219 | lg %r9,48(%r11) # return from psw_idle |
1220 | br %r14 | |
86ed42f4 MS |
1221 | .Lcleanup_idle_insn: |
1222 | .quad .Lpsw_idle_lpsw | |
4c1051e3 | 1223 | |
9977e886 | 1224 | .Lcleanup_save_fpu_regs: |
e370e476 | 1225 | larl %r9,save_fpu_regs |
9977e886 | 1226 | br %r14 |
9977e886 HB |
1227 | |
1228 | .Lcleanup_load_fpu_regs: | |
e370e476 | 1229 | larl %r9,load_fpu_regs |
9977e886 | 1230 | br %r14 |
9977e886 | 1231 | |
1da177e4 LT |
1232 | /* |
1233 | * Integer constants | |
1234 | */ | |
c5328901 | 1235 | .align 8 |
1da177e4 | 1236 | .Lcritical_start: |
86ed42f4 | 1237 | .quad .L__critical_start |
c5328901 | 1238 | .Lcritical_length: |
86ed42f4 | 1239 | .quad .L__critical_end - .L__critical_start |
61aa4884 | 1240 | #if IS_ENABLED(CONFIG_KVM) |
d0fc4107 | 1241 | .Lsie_critical_start: |
86ed42f4 | 1242 | .quad .Lsie_gmap |
7c470539 | 1243 | .Lsie_critical_length: |
86ed42f4 | 1244 | .quad .Lsie_done - .Lsie_gmap |
603d1a50 MS |
1245 | #endif |
1246 | ||
a876cb3f HC |
1247 | .section .rodata, "a" |
1248 | #define SYSCALL(esame,emu) .long esame | |
9bf1226b | 1249 | .globl sys_call_table |
1da177e4 LT |
1250 | sys_call_table: |
1251 | #include "syscalls.S" | |
1252 | #undef SYSCALL | |
1253 | ||
347a8dc3 | 1254 | #ifdef CONFIG_COMPAT |
1da177e4 | 1255 | |
a876cb3f | 1256 | #define SYSCALL(esame,emu) .long emu |
61649881 | 1257 | .globl sys_call_table_emu |
1da177e4 LT |
1258 | sys_call_table_emu: |
1259 | #include "syscalls.S" | |
1260 | #undef SYSCALL | |
1261 | #endif |