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Commit | Line | Data |
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1da177e4 | 1 | /* |
54dfe5dd | 2 | * arch/s390/kernel/entry64.S |
1da177e4 LT |
3 | * S390 low-level entry points. |
4 | * | |
54dfe5dd | 5 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
12 | #include <linux/sys.h> | |
13 | #include <linux/linkage.h> | |
2bc89b5e | 14 | #include <linux/init.h> |
1da177e4 LT |
15 | #include <asm/cache.h> |
16 | #include <asm/lowcore.h> | |
17 | #include <asm/errno.h> | |
18 | #include <asm/ptrace.h> | |
19 | #include <asm/thread_info.h> | |
0013a854 | 20 | #include <asm/asm-offsets.h> |
1da177e4 LT |
21 | #include <asm/unistd.h> |
22 | #include <asm/page.h> | |
23 | ||
24 | /* | |
25 | * Stack layout for the system_call stack entry. | |
26 | * The first few entries are identical to the user_regs_struct. | |
27 | */ | |
25d83cbf HC |
28 | SP_PTREGS = STACK_FRAME_OVERHEAD |
29 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
30 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
31 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
32 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
33 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
34 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
35 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
36 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
37 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
38 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
39 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64 | |
40 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72 | |
41 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80 | |
42 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88 | |
43 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96 | |
44 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104 | |
45 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112 | |
46 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120 | |
47 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
48 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
59da2139 | 49 | SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR |
25d83cbf | 50 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE |
1da177e4 LT |
51 | |
52 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
53 | STACK_SIZE = 1 << STACK_SHIFT | |
54 | ||
753c4dd6 | 55 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 56 | _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) |
753c4dd6 | 57 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 58 | _TIF_MCCK_PENDING) |
1da177e4 LT |
59 | |
60 | #define BASED(name) name-system_call(%r13) | |
61 | ||
1f194a4c HC |
62 | #ifdef CONFIG_TRACE_IRQFLAGS |
63 | .macro TRACE_IRQS_ON | |
50bec4ce HC |
64 | basr %r2,%r0 |
65 | brasl %r14,trace_hardirqs_on_caller | |
1f194a4c HC |
66 | .endm |
67 | ||
68 | .macro TRACE_IRQS_OFF | |
50bec4ce HC |
69 | basr %r2,%r0 |
70 | brasl %r14,trace_hardirqs_off_caller | |
1f194a4c | 71 | .endm |
523b44cf | 72 | |
411788ea | 73 | .macro TRACE_IRQS_CHECK |
50bec4ce | 74 | basr %r2,%r0 |
411788ea HC |
75 | tm SP_PSW(%r15),0x03 # irqs enabled? |
76 | jz 0f | |
50bec4ce | 77 | brasl %r14,trace_hardirqs_on_caller |
411788ea | 78 | j 1f |
50bec4ce | 79 | 0: brasl %r14,trace_hardirqs_off_caller |
411788ea | 80 | 1: |
523b44cf | 81 | .endm |
1f194a4c HC |
82 | #else |
83 | #define TRACE_IRQS_ON | |
84 | #define TRACE_IRQS_OFF | |
411788ea HC |
85 | #define TRACE_IRQS_CHECK |
86 | #endif | |
87 | ||
88 | #ifdef CONFIG_LOCKDEP | |
89 | .macro LOCKDEP_SYS_EXIT | |
90 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
91 | jz 0f | |
92 | brasl %r14,lockdep_sys_exit | |
93 | 0: | |
94 | .endm | |
95 | #else | |
523b44cf | 96 | #define LOCKDEP_SYS_EXIT |
1f194a4c HC |
97 | #endif |
98 | ||
25d83cbf | 99 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum |
1da177e4 LT |
100 | lg %r10,\lc_from |
101 | slg %r10,\lc_to | |
102 | alg %r10,\lc_sum | |
103 | stg %r10,\lc_sum | |
104 | .endm | |
1da177e4 LT |
105 | |
106 | /* | |
107 | * Register usage in interrupt handlers: | |
108 | * R9 - pointer to current task structure | |
109 | * R13 - pointer to literal pool | |
110 | * R14 - return register for function calls | |
111 | * R15 - kernel stack pointer | |
112 | */ | |
113 | ||
25d83cbf | 114 | .macro SAVE_ALL_BASE savearea |
1da177e4 LT |
115 | stmg %r12,%r15,\savearea |
116 | larl %r13,system_call | |
117 | .endm | |
118 | ||
987ad70a MS |
119 | .macro SAVE_ALL_SVC psworg,savearea |
120 | la %r12,\psworg | |
121 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
122 | .endm | |
123 | ||
63b12246 | 124 | .macro SAVE_ALL_SYNC psworg,savearea |
1da177e4 | 125 | la %r12,\psworg |
1da177e4 LT |
126 | tm \psworg+1,0x01 # test problem state bit |
127 | jz 2f # skip stack setup save | |
128 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
63b12246 MS |
129 | #ifdef CONFIG_CHECK_STACK |
130 | j 3f | |
131 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
132 | jz stack_overflow | |
133 | 3: | |
134 | #endif | |
135 | 2: | |
136 | .endm | |
137 | ||
138 | .macro SAVE_ALL_ASYNC psworg,savearea | |
139 | la %r12,\psworg | |
1da177e4 LT |
140 | tm \psworg+1,0x01 # test problem state bit |
141 | jnz 1f # from user -> load kernel stack | |
142 | clc \psworg+8(8),BASED(.Lcritical_end) | |
143 | jhe 0f | |
144 | clc \psworg+8(8),BASED(.Lcritical_start) | |
145 | jl 0f | |
146 | brasl %r14,cleanup_critical | |
6add9f7f | 147 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
148 | jnz 1f |
149 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ? | |
150 | slgr %r14,%r15 | |
151 | srag %r14,%r14,STACK_SHIFT | |
152 | jz 2f | |
153 | 1: lg %r15,__LC_ASYNC_STACK # load async stack | |
1da177e4 LT |
154 | #ifdef CONFIG_CHECK_STACK |
155 | j 3f | |
156 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
157 | jz stack_overflow | |
158 | 3: | |
159 | #endif | |
77fa2245 HC |
160 | 2: |
161 | .endm | |
162 | ||
163 | .macro CREATE_STACK_FRAME psworg,savearea | |
25d83cbf HC |
164 | aghi %r15,-SP_SIZE # make room for registers & psw |
165 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack | |
1da177e4 | 166 | stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 |
59da2139 | 167 | icm %r12,3,__LC_SVC_ILC |
1da177e4 | 168 | stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack |
59da2139 | 169 | st %r12,SP_SVCNR(%r15) |
1da177e4 LT |
170 | mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack |
171 | la %r12,0 | |
172 | stg %r12,__SF_BACKCHAIN(%r15) | |
25d83cbf | 173 | .endm |
1da177e4 | 174 | |
ae6aa2ea MS |
175 | .macro RESTORE_ALL psworg,sync |
176 | mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore | |
1da177e4 | 177 | .if !\sync |
ae6aa2ea | 178 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 | 179 | .endif |
c742b31c MS |
180 | lg %r14,__LC_VDSO_PER_CPU |
181 | lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user | |
c185b783 | 182 | stpt __LC_EXIT_TIMER |
c742b31c MS |
183 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER |
184 | lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user | |
ae6aa2ea | 185 | lpswe \psworg # back to caller |
1da177e4 LT |
186 | .endm |
187 | ||
188 | /* | |
189 | * Scheduler resume function, called by switch_to | |
190 | * gpr2 = (task_struct *) prev | |
191 | * gpr3 = (task_struct *) next | |
192 | * Returns: | |
193 | * gpr2 = prev | |
194 | */ | |
25d83cbf | 195 | .globl __switch_to |
1da177e4 LT |
196 | __switch_to: |
197 | tm __THREAD_per+4(%r3),0xe8 # is the new process using per ? | |
198 | jz __switch_to_noper # if not we're fine | |
25d83cbf HC |
199 | stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff |
200 | clc __THREAD_per(24,%r3),__SF_EMPTY(%r15) | |
201 | je __switch_to_noper # we got away without bashing TLB's | |
202 | lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
1da177e4 | 203 | __switch_to_noper: |
25d83cbf | 204 | lg %r4,__THREAD_info(%r2) # get thread_info of prev |
77fa2245 HC |
205 | tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending? |
206 | jz __switch_to_no_mcck | |
207 | ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
208 | lg %r4,__THREAD_info(%r3) # get thread_info of next | |
209 | oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next | |
210 | __switch_to_no_mcck: | |
25d83cbf | 211 | stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
1da177e4 LT |
212 | stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp |
213 | lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
25d83cbf | 214 | lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task |
1da177e4 LT |
215 | stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct |
216 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
25d83cbf | 217 | lg %r3,__THREAD_info(%r3) # load thread_info from task struct |
1da177e4 LT |
218 | stg %r3,__LC_THREAD_INFO |
219 | aghi %r3,STACK_SIZE | |
220 | stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
221 | br %r14 | |
222 | ||
223 | __critical_start: | |
224 | /* | |
225 | * SVC interrupt handler routine. System calls are synchronous events and | |
226 | * are executed with interrupts enabled. | |
227 | */ | |
228 | ||
25d83cbf | 229 | .globl system_call |
1da177e4 | 230 | system_call: |
c185b783 | 231 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 LT |
232 | sysc_saveall: |
233 | SAVE_ALL_BASE __LC_SAVE_AREA | |
987ad70a | 234 | SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
25d83cbf HC |
235 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
236 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore | |
1da177e4 | 237 | sysc_vtime: |
1da177e4 LT |
238 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
239 | sysc_stime: | |
240 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
241 | sysc_update: | |
242 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
243 | sysc_do_svc: |
244 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
59da2139 | 245 | ltgr %r7,%r7 # test for svc 0 |
1da177e4 LT |
246 | jnz sysc_nr_ok |
247 | # svc 0: system call number in %r1 | |
248 | cl %r1,BASED(.Lnr_syscalls) | |
249 | jnl sysc_nr_ok | |
25d83cbf | 250 | lgfr %r7,%r1 # clear high word in r1 |
1da177e4 LT |
251 | sysc_nr_ok: |
252 | mvc SP_ARGS(8,%r15),SP_R7(%r15) | |
253 | sysc_do_restart: | |
59da2139 MS |
254 | sth %r7,SP_SVCNR(%r15) |
255 | sllg %r7,%r7,2 # svc number * 4 | |
25d83cbf | 256 | larl %r10,sys_call_table |
347a8dc3 | 257 | #ifdef CONFIG_COMPAT |
c563077e HC |
258 | tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ? |
259 | jno sysc_noemu | |
25d83cbf | 260 | larl %r10,sys_call_table_emu # use 31 bit emulation system calls |
1da177e4 LT |
261 | sysc_noemu: |
262 | #endif | |
263 | tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
25d83cbf HC |
264 | lgf %r8,0(%r7,%r10) # load address of system call routine |
265 | jnz sysc_tracesys | |
266 | basr %r14,%r8 # call sys_xxxx | |
267 | stg %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
1da177e4 LT |
268 | |
269 | sysc_return: | |
1da177e4 | 270 | tm __TI_flags+7(%r9),_TIF_WORK_SVC |
25d83cbf | 271 | jnz sysc_work # there is work to do (signals etc.) |
411788ea HC |
272 | sysc_restore: |
273 | #ifdef CONFIG_TRACE_IRQFLAGS | |
274 | larl %r1,sysc_restore_trace_psw | |
275 | lpswe 0(%r1) | |
276 | sysc_restore_trace: | |
277 | TRACE_IRQS_CHECK | |
523b44cf | 278 | LOCKDEP_SYS_EXIT |
411788ea | 279 | #endif |
1da177e4 | 280 | sysc_leave: |
25d83cbf | 281 | RESTORE_ALL __LC_RETURN_PSW,1 |
411788ea HC |
282 | sysc_done: |
283 | ||
284 | #ifdef CONFIG_TRACE_IRQFLAGS | |
285 | .align 8 | |
286 | .globl sysc_restore_trace_psw | |
287 | sysc_restore_trace_psw: | |
288 | .quad 0, sysc_restore_trace | |
289 | #endif | |
1da177e4 LT |
290 | |
291 | # | |
292 | # recheck if there is more work to do | |
293 | # | |
294 | sysc_work_loop: | |
295 | tm __TI_flags+7(%r9),_TIF_WORK_SVC | |
411788ea | 296 | jz sysc_restore # there is no work to do |
1da177e4 LT |
297 | # |
298 | # One of the work bits is on. Find out which one. | |
299 | # | |
300 | sysc_work: | |
2688905e MS |
301 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
302 | jno sysc_restore | |
77fa2245 HC |
303 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING |
304 | jo sysc_mcck_pending | |
1da177e4 LT |
305 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED |
306 | jo sysc_reschedule | |
02a029b3 | 307 | tm __TI_flags+7(%r9),_TIF_SIGPENDING |
54dfe5dd | 308 | jnz sysc_sigpending |
753c4dd6 MS |
309 | tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME |
310 | jnz sysc_notify_resume | |
1da177e4 LT |
311 | tm __TI_flags+7(%r9),_TIF_RESTART_SVC |
312 | jo sysc_restart | |
313 | tm __TI_flags+7(%r9),_TIF_SINGLE_STEP | |
314 | jo sysc_singlestep | |
411788ea HC |
315 | j sysc_restore |
316 | sysc_work_done: | |
1da177e4 LT |
317 | |
318 | # | |
319 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
320 | # |
321 | sysc_reschedule: | |
322 | larl %r14,sysc_work_loop | |
323 | jg schedule # return point is sysc_return | |
1da177e4 | 324 | |
77fa2245 HC |
325 | # |
326 | # _TIF_MCCK_PENDING is set, call handler | |
327 | # | |
328 | sysc_mcck_pending: | |
329 | larl %r14,sysc_work_loop | |
25d83cbf | 330 | jg s390_handle_mcck # TIF bit will be cleared by handler |
77fa2245 | 331 | |
1da177e4 | 332 | # |
02a029b3 | 333 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 334 | # |
25d83cbf | 335 | sysc_sigpending: |
1da177e4 | 336 | ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
25d83cbf HC |
337 | la %r2,SP_PTREGS(%r15) # load pt_regs |
338 | brasl %r14,do_signal # call do_signal | |
1da177e4 LT |
339 | tm __TI_flags+7(%r9),_TIF_RESTART_SVC |
340 | jo sysc_restart | |
341 | tm __TI_flags+7(%r9),_TIF_SINGLE_STEP | |
342 | jo sysc_singlestep | |
e1c3ad96 | 343 | j sysc_work_loop |
1da177e4 | 344 | |
753c4dd6 MS |
345 | # |
346 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
347 | # | |
348 | sysc_notify_resume: | |
349 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
350 | larl %r14,sysc_work_loop | |
351 | jg do_notify_resume # call do_notify_resume | |
352 | ||
1da177e4 LT |
353 | # |
354 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
355 | # | |
356 | sysc_restart: | |
357 | ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC | |
25d83cbf | 358 | lg %r7,SP_R2(%r15) # load new svc number |
1da177e4 | 359 | mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument |
25d83cbf HC |
360 | lmg %r2,%r6,SP_R2(%r15) # load svc arguments |
361 | j sysc_do_restart # restart svc | |
1da177e4 LT |
362 | |
363 | # | |
364 | # _TIF_SINGLE_STEP is set, call do_single_step | |
365 | # | |
366 | sysc_singlestep: | |
59da2139 MS |
367 | ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
368 | xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number | |
1da177e4 LT |
369 | la %r2,SP_PTREGS(%r15) # address of register-save area |
370 | larl %r14,sysc_return # load adr. of system return | |
371 | jg do_single_step # branch to do_sigtrap | |
372 | ||
1da177e4 | 373 | # |
753c4dd6 MS |
374 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
375 | # and after the system call | |
1da177e4 LT |
376 | # |
377 | sysc_tracesys: | |
25d83cbf | 378 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 LT |
379 | la %r3,0 |
380 | srl %r7,2 | |
25d83cbf | 381 | stg %r7,SP_R2(%r15) |
753c4dd6 | 382 | brasl %r14,do_syscall_trace_enter |
1da177e4 | 383 | lghi %r0,NR_syscalls |
753c4dd6 | 384 | clgr %r0,%r2 |
1da177e4 | 385 | jnh sysc_tracenogo |
59da2139 | 386 | sllg %r7,%r2,2 # svc number *4 |
1da177e4 LT |
387 | lgf %r8,0(%r7,%r10) |
388 | sysc_tracego: | |
25d83cbf HC |
389 | lmg %r3,%r6,SP_R3(%r15) |
390 | lg %r2,SP_ORIG_R2(%r15) | |
391 | basr %r14,%r8 # call sys_xxx | |
392 | stg %r2,SP_R2(%r15) # store return value | |
1da177e4 LT |
393 | sysc_tracenogo: |
394 | tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
25d83cbf HC |
395 | jz sysc_return |
396 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
25d83cbf | 397 | larl %r14,sysc_return # return point is sysc_return |
753c4dd6 | 398 | jg do_syscall_trace_exit |
1da177e4 LT |
399 | |
400 | # | |
401 | # a new process exits the kernel with ret_from_fork | |
402 | # | |
25d83cbf | 403 | .globl ret_from_fork |
1da177e4 LT |
404 | ret_from_fork: |
405 | lg %r13,__LC_SVC_NEW_PSW+8 | |
406 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
407 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? | |
408 | jo 0f | |
409 | stg %r15,SP_R15(%r15) # store stack pointer for new kthread | |
25d83cbf | 410 | 0: brasl %r14,schedule_tail |
1f194a4c | 411 | TRACE_IRQS_ON |
25d83cbf | 412 | stosm 24(%r15),0x03 # reenable interrupts |
8f2961c3 | 413 | j sysc_tracenogo |
1da177e4 LT |
414 | |
415 | # | |
03ff9a23 MS |
416 | # kernel_execve function needs to deal with pt_regs that is not |
417 | # at the usual place | |
1da177e4 | 418 | # |
03ff9a23 MS |
419 | .globl kernel_execve |
420 | kernel_execve: | |
421 | stmg %r12,%r15,96(%r15) | |
422 | lgr %r14,%r15 | |
423 | aghi %r15,-SP_SIZE | |
424 | stg %r14,__SF_BACKCHAIN(%r15) | |
425 | la %r12,SP_PTREGS(%r15) | |
426 | xc 0(__PT_SIZE,%r12),0(%r12) | |
427 | lgr %r5,%r12 | |
428 | brasl %r14,do_execve | |
429 | ltgfr %r2,%r2 | |
430 | je 0f | |
431 | aghi %r15,SP_SIZE | |
432 | lmg %r12,%r15,96(%r15) | |
433 | br %r14 | |
434 | # execve succeeded. | |
435 | 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts | |
436 | lg %r15,__LC_KERNEL_STACK # load ksp | |
437 | aghi %r15,-SP_SIZE # make room for registers & psw | |
438 | lg %r13,__LC_SVC_NEW_PSW+8 | |
439 | lg %r9,__LC_THREAD_INFO | |
440 | mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs | |
441 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | |
442 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
443 | brasl %r14,execve_tail | |
444 | j sysc_return | |
1da177e4 LT |
445 | |
446 | /* | |
447 | * Program check handler routine | |
448 | */ | |
449 | ||
25d83cbf | 450 | .globl pgm_check_handler |
1da177e4 LT |
451 | pgm_check_handler: |
452 | /* | |
453 | * First we need to check for a special case: | |
454 | * Single stepping an instruction that disables the PER event mask will | |
455 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
456 | * For a single stepped SVC the program check handler gets control after | |
457 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
458 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
459 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
460 | * if we have to load the kernel stack register. | |
461 | * For every other possible cause for PER event without the PER mask set | |
462 | * we just ignore the PER event (FIXME: is there anything we have to do | |
463 | * for LPSW?). | |
464 | */ | |
c185b783 | 465 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 | 466 | SAVE_ALL_BASE __LC_SAVE_AREA |
25d83cbf HC |
467 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
468 | jnz pgm_per # got per exception -> special case | |
63b12246 | 469 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 470 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
471 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
472 | jz pgm_no_vtime | |
473 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
474 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
475 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
476 | pgm_no_vtime: | |
1da177e4 | 477 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
9e74a6b8 | 478 | mvc SP_ARGS(8,%r15),__LC_LAST_BREAK |
411788ea | 479 | TRACE_IRQS_OFF |
25d83cbf | 480 | lgf %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 LT |
481 | lghi %r8,0x7f |
482 | ngr %r8,%r3 | |
483 | pgm_do_call: | |
25d83cbf HC |
484 | sll %r8,3 |
485 | larl %r1,pgm_check_table | |
486 | lg %r1,0(%r8,%r1) # load address of handler routine | |
487 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
1da177e4 | 488 | larl %r14,sysc_return |
25d83cbf | 489 | br %r1 # branch to interrupt-handler |
1da177e4 LT |
490 | |
491 | # | |
492 | # handle per exception | |
493 | # | |
494 | pgm_per: | |
25d83cbf HC |
495 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on |
496 | jnz pgm_per_std # ok, normal per event from user space | |
1da177e4 | 497 | # ok its one of the special cases, now we need to find out which one |
25d83cbf HC |
498 | clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW |
499 | je pgm_svcper | |
1da177e4 LT |
500 | # no interesting special case, ignore PER event |
501 | lmg %r12,%r15,__LC_SAVE_AREA | |
25d83cbf | 502 | lpswe __LC_PGM_OLD_PSW |
1da177e4 LT |
503 | |
504 | # | |
505 | # Normal per exception | |
506 | # | |
507 | pgm_per_std: | |
63b12246 | 508 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 509 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
510 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
511 | jz pgm_no_vtime2 | |
512 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
513 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
514 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
515 | pgm_no_vtime2: | |
1da177e4 | 516 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
411788ea | 517 | TRACE_IRQS_OFF |
1da177e4 | 518 | lg %r1,__TI_task(%r9) |
4ba069b8 MG |
519 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
520 | jz kernel_per | |
1da177e4 LT |
521 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID |
522 | mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS | |
523 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
524 | oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
25d83cbf | 525 | lgf %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 | 526 | lghi %r8,0x7f |
25d83cbf | 527 | ngr %r8,%r3 # clear per-event-bit and ilc |
1da177e4 LT |
528 | je sysc_return |
529 | j pgm_do_call | |
530 | ||
531 | # | |
532 | # it was a single stepped SVC that is causing all the trouble | |
533 | # | |
534 | pgm_svcper: | |
63b12246 | 535 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 536 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
537 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
538 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
539 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
25d83cbf | 540 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore |
1da177e4 LT |
541 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
542 | lg %r1,__TI_task(%r9) | |
543 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
544 | mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS | |
545 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
546 | oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
1f194a4c | 547 | TRACE_IRQS_ON |
1da177e4 LT |
548 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
549 | j sysc_do_svc | |
550 | ||
4ba069b8 MG |
551 | # |
552 | # per was called from kernel, must be kprobes | |
553 | # | |
554 | kernel_per: | |
59da2139 | 555 | xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number |
4ba069b8 | 556 | la %r2,SP_PTREGS(%r15) # address of register-save area |
411788ea | 557 | larl %r14,sysc_restore # load adr. of system ret, no work |
4ba069b8 MG |
558 | jg do_single_step # branch to do_single_step |
559 | ||
1da177e4 LT |
560 | /* |
561 | * IO interrupt handler routine | |
562 | */ | |
25d83cbf | 563 | .globl io_int_handler |
1da177e4 | 564 | io_int_handler: |
1da177e4 | 565 | stck __LC_INT_CLOCK |
9cfb9b3c | 566 | stpt __LC_ASYNC_ENTER_TIMER |
1da177e4 | 567 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
63b12246 | 568 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
77fa2245 | 569 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
1da177e4 LT |
570 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
571 | jz io_no_vtime | |
572 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
573 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
574 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
575 | io_no_vtime: | |
1da177e4 | 576 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
1f194a4c | 577 | TRACE_IRQS_OFF |
25d83cbf HC |
578 | la %r2,SP_PTREGS(%r15) # address of register-save area |
579 | brasl %r14,do_IRQ # call standard irq handler | |
1da177e4 | 580 | io_return: |
1da177e4 | 581 | tm __TI_flags+7(%r9),_TIF_WORK_INT |
25d83cbf | 582 | jnz io_work # there is work to do (signals etc.) |
411788ea HC |
583 | io_restore: |
584 | #ifdef CONFIG_TRACE_IRQFLAGS | |
585 | larl %r1,io_restore_trace_psw | |
586 | lpswe 0(%r1) | |
587 | io_restore_trace: | |
588 | TRACE_IRQS_CHECK | |
523b44cf | 589 | LOCKDEP_SYS_EXIT |
411788ea | 590 | #endif |
1da177e4 | 591 | io_leave: |
25d83cbf | 592 | RESTORE_ALL __LC_RETURN_PSW,0 |
ae6aa2ea | 593 | io_done: |
1da177e4 | 594 | |
411788ea HC |
595 | #ifdef CONFIG_TRACE_IRQFLAGS |
596 | .align 8 | |
597 | .globl io_restore_trace_psw | |
598 | io_restore_trace_psw: | |
599 | .quad 0, io_restore_trace | |
600 | #endif | |
601 | ||
2688905e | 602 | # |
0eaeafa1 CB |
603 | # There is work todo, we need to check if we return to userspace, then |
604 | # check, if we are in SIE, if yes leave it | |
2688905e MS |
605 | # |
606 | io_work: | |
607 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
608 | #ifndef CONFIG_PREEMPT | |
0eaeafa1 CB |
609 | #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) |
610 | jnz io_work_user # yes -> no need to check for SIE | |
611 | la %r1, BASED(sie_opcode) # we return to kernel here | |
612 | lg %r2, SP_PSW+8(%r15) | |
613 | clc 0(2,%r1), 0(%r2) # is current instruction = SIE? | |
614 | jne io_restore # no-> return to kernel | |
615 | lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE | |
616 | aghi %r1, 4 | |
617 | stg %r1, SP_PSW+8(%r15) | |
618 | j io_restore # return to kernel | |
619 | #else | |
2688905e | 620 | jno io_restore # no-> skip resched & signal |
0eaeafa1 | 621 | #endif |
2688905e MS |
622 | #else |
623 | jnz io_work_user # yes -> do resched & signal | |
0eaeafa1 CB |
624 | #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) |
625 | la %r1, BASED(sie_opcode) | |
626 | lg %r2, SP_PSW+8(%r15) | |
627 | clc 0(2,%r1), 0(%r2) # is current instruction = SIE? | |
628 | jne 0f # no -> leave PSW alone | |
629 | lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE | |
630 | aghi %r1, 4 | |
631 | stg %r1, SP_PSW+8(%r15) | |
632 | 0: | |
633 | #endif | |
2688905e | 634 | # check for preemptive scheduling |
25d83cbf | 635 | icm %r0,15,__TI_precount(%r9) |
2688905e | 636 | jnz io_restore # preemption is disabled |
1da177e4 LT |
637 | # switch to kernel stack |
638 | lg %r1,SP_R15(%r15) | |
639 | aghi %r1,-SP_SIZE | |
640 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 641 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
642 | lgr %r15,%r1 |
643 | io_resume_loop: | |
644 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED | |
411788ea | 645 | jno io_restore |
b8e7a54c HC |
646 | larl %r14,io_resume_loop |
647 | jg preempt_schedule_irq | |
1da177e4 LT |
648 | #endif |
649 | ||
2688905e | 650 | io_work_user: |
1da177e4 LT |
651 | lg %r1,__LC_KERNEL_STACK |
652 | aghi %r1,-SP_SIZE | |
653 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 654 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
655 | lgr %r15,%r1 |
656 | # | |
657 | # One of the work bits is on. Find out which one. | |
54dfe5dd HC |
658 | # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED |
659 | # and _TIF_MCCK_PENDING | |
1da177e4 LT |
660 | # |
661 | io_work_loop: | |
77fa2245 HC |
662 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING |
663 | jo io_mcck_pending | |
1da177e4 LT |
664 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED |
665 | jo io_reschedule | |
02a029b3 | 666 | tm __TI_flags+7(%r9),_TIF_SIGPENDING |
54dfe5dd | 667 | jnz io_sigpending |
753c4dd6 MS |
668 | tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME |
669 | jnz io_notify_resume | |
411788ea HC |
670 | j io_restore |
671 | io_work_done: | |
1da177e4 | 672 | |
0eaeafa1 CB |
673 | #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) |
674 | sie_opcode: | |
675 | .long 0xb2140000 | |
676 | #endif | |
677 | ||
77fa2245 HC |
678 | # |
679 | # _TIF_MCCK_PENDING is set, call handler | |
680 | # | |
681 | io_mcck_pending: | |
b771aeac | 682 | brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler |
b771aeac | 683 | j io_work_loop |
77fa2245 | 684 | |
1da177e4 LT |
685 | # |
686 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
687 | # |
688 | io_reschedule: | |
411788ea | 689 | TRACE_IRQS_ON |
25d83cbf HC |
690 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
691 | brasl %r14,schedule # call scheduler | |
692 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 693 | TRACE_IRQS_OFF |
1da177e4 | 694 | tm __TI_flags+7(%r9),_TIF_WORK_INT |
411788ea | 695 | jz io_restore # there is no work to do |
1da177e4 LT |
696 | j io_work_loop |
697 | ||
698 | # | |
02a029b3 | 699 | # _TIF_SIGPENDING or is set, call do_signal |
1da177e4 | 700 | # |
25d83cbf | 701 | io_sigpending: |
411788ea | 702 | TRACE_IRQS_ON |
25d83cbf HC |
703 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
704 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 | 705 | brasl %r14,do_signal # call do_signal |
25d83cbf | 706 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts |
411788ea | 707 | TRACE_IRQS_OFF |
e1c3ad96 | 708 | j io_work_loop |
1da177e4 | 709 | |
753c4dd6 MS |
710 | # |
711 | # _TIF_NOTIFY_RESUME or is set, call do_notify_resume | |
712 | # | |
713 | io_notify_resume: | |
714 | TRACE_IRQS_ON | |
715 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
716 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
717 | brasl %r14,do_notify_resume # call do_notify_resume | |
718 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
719 | TRACE_IRQS_OFF | |
720 | j io_work_loop | |
721 | ||
1da177e4 LT |
722 | /* |
723 | * External interrupt handler routine | |
724 | */ | |
25d83cbf | 725 | .globl ext_int_handler |
1da177e4 | 726 | ext_int_handler: |
1da177e4 | 727 | stck __LC_INT_CLOCK |
9cfb9b3c | 728 | stpt __LC_ASYNC_ENTER_TIMER |
1da177e4 | 729 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
63b12246 | 730 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
77fa2245 | 731 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
1da177e4 LT |
732 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
733 | jz ext_no_vtime | |
734 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
735 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
736 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
737 | ext_no_vtime: | |
1da177e4 | 738 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
1f194a4c | 739 | TRACE_IRQS_OFF |
25d83cbf HC |
740 | la %r2,SP_PTREGS(%r15) # address of register-save area |
741 | llgh %r3,__LC_EXT_INT_CODE # get interruption code | |
742 | brasl %r14,do_extint | |
1da177e4 LT |
743 | j io_return |
744 | ||
ae6aa2ea MS |
745 | __critical_end: |
746 | ||
1da177e4 LT |
747 | /* |
748 | * Machine check handler routines | |
749 | */ | |
25d83cbf | 750 | .globl mcck_int_handler |
1da177e4 | 751 | mcck_int_handler: |
9cfb9b3c | 752 | stck __LC_INT_CLOCK |
77fa2245 HC |
753 | la %r1,4095 # revalidate r1 |
754 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | |
25d83cbf | 755 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs |
1da177e4 | 756 | SAVE_ALL_BASE __LC_SAVE_AREA+64 |
77fa2245 | 757 | la %r12,__LC_MCK_OLD_PSW |
25d83cbf | 758 | tm __LC_MCCK_CODE,0x80 # system damage? |
77fa2245 | 759 | jo mcck_int_main # yes -> rest of mcck code invalid |
63b12246 MS |
760 | la %r14,4095 |
761 | mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER | |
762 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14) | |
763 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | |
764 | jo 1f | |
765 | la %r14,__LC_SYNC_ENTER_TIMER | |
766 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
767 | jl 0f | |
768 | la %r14,__LC_ASYNC_ENTER_TIMER | |
769 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
770 | jl 0f | |
771 | la %r14,__LC_EXIT_TIMER | |
772 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
773 | jl 0f | |
774 | la %r14,__LC_LAST_UPDATE_TIMER | |
775 | 0: spt 0(%r14) | |
776 | mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) | |
c185b783 | 777 | 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 | 778 | jno mcck_int_main # no -> skip cleanup critical |
25d83cbf | 779 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit |
77fa2245 HC |
780 | jnz mcck_int_main # from user -> load kernel stack |
781 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end) | |
782 | jhe mcck_int_main | |
25d83cbf | 783 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start) |
77fa2245 | 784 | jl mcck_int_main |
25d83cbf | 785 | brasl %r14,cleanup_critical |
77fa2245 | 786 | mcck_int_main: |
25d83cbf | 787 | lg %r14,__LC_PANIC_STACK # are we already on the panic stack? |
77fa2245 HC |
788 | slgr %r14,%r15 |
789 | srag %r14,%r14,PAGE_SHIFT | |
790 | jz 0f | |
25d83cbf | 791 | lg %r15,__LC_PANIC_STACK # load panic stack |
77fa2245 | 792 | 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64 |
ae6aa2ea MS |
793 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
794 | jno mcck_no_vtime # no -> no timer update | |
63b12246 | 795 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea MS |
796 | jz mcck_no_vtime |
797 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
798 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
799 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
800 | mcck_no_vtime: | |
77fa2245 HC |
801 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
802 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
803 | brasl %r14,s390_do_machine_check | |
25d83cbf | 804 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
77fa2245 HC |
805 | jno mcck_return |
806 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack | |
807 | aghi %r1,-SP_SIZE | |
808 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
809 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
810 | lgr %r15,%r1 | |
811 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
812 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING | |
813 | jno mcck_return | |
1f194a4c | 814 | TRACE_IRQS_OFF |
77fa2245 | 815 | brasl %r14,s390_handle_mcck |
1f194a4c | 816 | TRACE_IRQS_ON |
1da177e4 | 817 | mcck_return: |
63b12246 MS |
818 | mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW |
819 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
820 | lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
63b12246 MS |
821 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104 |
822 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? | |
823 | jno 0f | |
824 | stpt __LC_EXIT_TIMER | |
c185b783 | 825 | 0: lpswe __LC_RETURN_MCCK_PSW # back to caller |
1da177e4 | 826 | |
1da177e4 LT |
827 | /* |
828 | * Restart interruption handler, kick starter for additional CPUs | |
829 | */ | |
84b36a8e | 830 | #ifdef CONFIG_SMP |
2bc89b5e | 831 | __CPUINIT |
25d83cbf | 832 | .globl restart_int_handler |
1da177e4 | 833 | restart_int_handler: |
5b409ed1 MS |
834 | basr %r1,0 |
835 | restart_base: | |
836 | spt restart_vtime-restart_base(%r1) | |
837 | stck __LC_LAST_UPDATE_CLOCK | |
838 | mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1) | |
839 | mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1) | |
25d83cbf HC |
840 | lg %r15,__LC_SAVE_AREA+120 # load ksp |
841 | lghi %r10,__LC_CREGS_SAVE_AREA | |
842 | lctlg %c0,%c15,0(%r10) # get new ctl regs | |
843 | lghi %r10,__LC_AREGS_SAVE_AREA | |
844 | lam %a0,%a15,0(%r10) | |
845 | lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
5b409ed1 MS |
846 | lg %r1,__LC_THREAD_INFO |
847 | mvc __LC_USER_TIMER(8),__TI_user_timer(%r1) | |
848 | mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1) | |
849 | xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER | |
25d83cbf HC |
850 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on |
851 | jg start_secondary | |
5b409ed1 MS |
852 | .align 8 |
853 | restart_vtime: | |
854 | .long 0x7fffffff,0xffffffff | |
84b36a8e | 855 | .previous |
1da177e4 LT |
856 | #else |
857 | /* | |
858 | * If we do not run with SMP enabled, let the new CPU crash ... | |
859 | */ | |
25d83cbf | 860 | .globl restart_int_handler |
1da177e4 | 861 | restart_int_handler: |
25d83cbf | 862 | basr %r1,0 |
1da177e4 | 863 | restart_base: |
25d83cbf HC |
864 | lpswe restart_crash-restart_base(%r1) |
865 | .align 8 | |
1da177e4 | 866 | restart_crash: |
25d83cbf | 867 | .long 0x000a0000,0x00000000,0x00000000,0x00000000 |
1da177e4 LT |
868 | restart_go: |
869 | #endif | |
870 | ||
871 | #ifdef CONFIG_CHECK_STACK | |
872 | /* | |
873 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
874 | * No need to properly save the registers, we are going to panic anyway. | |
875 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
876 | */ | |
877 | stack_overflow: | |
878 | lg %r15,__LC_PANIC_STACK # change to panic stack | |
9514e231 | 879 | aghi %r15,-SP_SIZE |
1da177e4 LT |
880 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack |
881 | stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
882 | la %r1,__LC_SAVE_AREA | |
883 | chi %r12,__LC_SVC_OLD_PSW | |
884 | je 0f | |
885 | chi %r12,__LC_PGM_OLD_PSW | |
886 | je 0f | |
9514e231 | 887 | la %r1,__LC_SAVE_AREA+32 |
25d83cbf | 888 | 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack |
9e74a6b8 | 889 | mvc SP_ARGS(8,%r15),__LC_LAST_BREAK |
25d83cbf HC |
890 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain |
891 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
892 | jg kernel_stack_overflow |
893 | #endif | |
894 | ||
895 | cleanup_table_system_call: | |
896 | .quad system_call, sysc_do_svc | |
897 | cleanup_table_sysc_return: | |
898 | .quad sysc_return, sysc_leave | |
899 | cleanup_table_sysc_leave: | |
411788ea | 900 | .quad sysc_leave, sysc_done |
1da177e4 | 901 | cleanup_table_sysc_work_loop: |
411788ea | 902 | .quad sysc_work_loop, sysc_work_done |
63b12246 MS |
903 | cleanup_table_io_return: |
904 | .quad io_return, io_leave | |
ae6aa2ea MS |
905 | cleanup_table_io_leave: |
906 | .quad io_leave, io_done | |
907 | cleanup_table_io_work_loop: | |
411788ea | 908 | .quad io_work_loop, io_work_done |
1da177e4 LT |
909 | |
910 | cleanup_critical: | |
911 | clc 8(8,%r12),BASED(cleanup_table_system_call) | |
912 | jl 0f | |
913 | clc 8(8,%r12),BASED(cleanup_table_system_call+8) | |
914 | jl cleanup_system_call | |
915 | 0: | |
916 | clc 8(8,%r12),BASED(cleanup_table_sysc_return) | |
917 | jl 0f | |
918 | clc 8(8,%r12),BASED(cleanup_table_sysc_return+8) | |
919 | jl cleanup_sysc_return | |
920 | 0: | |
921 | clc 8(8,%r12),BASED(cleanup_table_sysc_leave) | |
922 | jl 0f | |
923 | clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8) | |
924 | jl cleanup_sysc_leave | |
925 | 0: | |
926 | clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop) | |
927 | jl 0f | |
928 | clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8) | |
77fa2245 | 929 | jl cleanup_sysc_return |
63b12246 MS |
930 | 0: |
931 | clc 8(8,%r12),BASED(cleanup_table_io_return) | |
932 | jl 0f | |
933 | clc 8(8,%r12),BASED(cleanup_table_io_return+8) | |
934 | jl cleanup_io_return | |
ae6aa2ea MS |
935 | 0: |
936 | clc 8(8,%r12),BASED(cleanup_table_io_leave) | |
937 | jl 0f | |
938 | clc 8(8,%r12),BASED(cleanup_table_io_leave+8) | |
939 | jl cleanup_io_leave | |
940 | 0: | |
941 | clc 8(8,%r12),BASED(cleanup_table_io_work_loop) | |
942 | jl 0f | |
943 | clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8) | |
944 | jl cleanup_io_return | |
1da177e4 LT |
945 | 0: |
946 | br %r14 | |
947 | ||
948 | cleanup_system_call: | |
949 | mvc __LC_RETURN_PSW(16),0(%r12) | |
ae6aa2ea MS |
950 | cghi %r12,__LC_MCK_OLD_PSW |
951 | je 0f | |
952 | la %r12,__LC_SAVE_AREA+32 | |
953 | j 1f | |
954 | 0: la %r12,__LC_SAVE_AREA+64 | |
955 | 1: | |
1da177e4 LT |
956 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) |
957 | jh 0f | |
958 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
959 | 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16) | |
960 | jhe cleanup_vtime | |
1da177e4 LT |
961 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn) |
962 | jh 0f | |
ae6aa2ea MS |
963 | mvc __LC_SAVE_AREA(32),0(%r12) |
964 | 0: stg %r13,8(%r12) | |
965 | stg %r12,__LC_SAVE_AREA+96 # argh | |
63b12246 | 966 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 967 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
ae6aa2ea MS |
968 | lg %r12,__LC_SAVE_AREA+96 # argh |
969 | stg %r15,24(%r12) | |
1da177e4 | 970 | llgh %r7,__LC_SVC_INT_CODE |
1da177e4 LT |
971 | cleanup_vtime: |
972 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24) | |
973 | jhe cleanup_stime | |
1da177e4 LT |
974 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
975 | cleanup_stime: | |
976 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32) | |
977 | jh cleanup_update | |
978 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
979 | cleanup_update: | |
980 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
981 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8) |
982 | la %r12,__LC_RETURN_PSW | |
983 | br %r14 | |
984 | cleanup_system_call_insn: | |
985 | .quad sysc_saveall | |
25d83cbf HC |
986 | .quad system_call |
987 | .quad sysc_vtime | |
988 | .quad sysc_stime | |
989 | .quad sysc_update | |
1da177e4 LT |
990 | |
991 | cleanup_sysc_return: | |
992 | mvc __LC_RETURN_PSW(8),0(%r12) | |
993 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return) | |
994 | la %r12,__LC_RETURN_PSW | |
995 | br %r14 | |
996 | ||
997 | cleanup_sysc_leave: | |
998 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn) | |
c742b31c | 999 | je 3f |
1da177e4 | 1000 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8) |
c742b31c MS |
1001 | jhe 0f |
1002 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
1003 | 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | |
ae6aa2ea | 1004 | cghi %r12,__LC_MCK_OLD_PSW |
c742b31c | 1005 | jne 1f |
ae6aa2ea | 1006 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) |
c742b31c MS |
1007 | j 2f |
1008 | 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) | |
1009 | 2: lmg %r0,%r11,SP_R0(%r15) | |
1da177e4 | 1010 | lg %r15,SP_R15(%r15) |
c742b31c | 1011 | 3: la %r12,__LC_RETURN_PSW |
1da177e4 LT |
1012 | br %r14 |
1013 | cleanup_sysc_leave_insn: | |
411788ea | 1014 | .quad sysc_done - 4 |
c742b31c | 1015 | .quad sysc_done - 16 |
1da177e4 | 1016 | |
ae6aa2ea MS |
1017 | cleanup_io_return: |
1018 | mvc __LC_RETURN_PSW(8),0(%r12) | |
1019 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop) | |
1020 | la %r12,__LC_RETURN_PSW | |
1021 | br %r14 | |
1022 | ||
1023 | cleanup_io_leave: | |
1024 | clc 8(8,%r12),BASED(cleanup_io_leave_insn) | |
c742b31c | 1025 | je 3f |
ae6aa2ea | 1026 | clc 8(8,%r12),BASED(cleanup_io_leave_insn+8) |
c742b31c MS |
1027 | jhe 0f |
1028 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
1029 | 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | |
ae6aa2ea | 1030 | cghi %r12,__LC_MCK_OLD_PSW |
c742b31c | 1031 | jne 1f |
ae6aa2ea | 1032 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) |
c742b31c MS |
1033 | j 2f |
1034 | 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) | |
1035 | 2: lmg %r0,%r11,SP_R0(%r15) | |
ae6aa2ea | 1036 | lg %r15,SP_R15(%r15) |
c742b31c | 1037 | 3: la %r12,__LC_RETURN_PSW |
ae6aa2ea MS |
1038 | br %r14 |
1039 | cleanup_io_leave_insn: | |
411788ea | 1040 | .quad io_done - 4 |
c742b31c | 1041 | .quad io_done - 16 |
ae6aa2ea | 1042 | |
1da177e4 LT |
1043 | /* |
1044 | * Integer constants | |
1045 | */ | |
25d83cbf | 1046 | .align 4 |
1da177e4 | 1047 | .Lconst: |
25d83cbf HC |
1048 | .Lnr_syscalls: .long NR_syscalls |
1049 | .L0x0130: .short 0x130 | |
1050 | .L0x0140: .short 0x140 | |
1051 | .L0x0150: .short 0x150 | |
1052 | .L0x0160: .short 0x160 | |
1053 | .L0x0170: .short 0x170 | |
1da177e4 | 1054 | .Lcritical_start: |
25d83cbf | 1055 | .quad __critical_start |
1da177e4 | 1056 | .Lcritical_end: |
25d83cbf | 1057 | .quad __critical_end |
1da177e4 | 1058 | |
25d83cbf | 1059 | .section .rodata, "a" |
1da177e4 | 1060 | #define SYSCALL(esa,esame,emu) .long esame |
1da177e4 LT |
1061 | sys_call_table: |
1062 | #include "syscalls.S" | |
1063 | #undef SYSCALL | |
1064 | ||
347a8dc3 | 1065 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
1066 | |
1067 | #define SYSCALL(esa,esame,emu) .long emu | |
1da177e4 LT |
1068 | sys_call_table_emu: |
1069 | #include "syscalls.S" | |
1070 | #undef SYSCALL | |
1071 | #endif |