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1da177e4
LT		 1/*
2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
4 *
5 * S390 version
6 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
7 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Hartmut Penner (hp@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
77fa2245 10 * Heiko Carstens <heiko.carstens@de.ibm.com>
1da177e4
LT		 11 */
12
13#include <linux/sys.h>
14#include <linux/linkage.h>
15#include <linux/config.h>
16#include <asm/cache.h>
17#include <asm/lowcore.h>
18#include <asm/errno.h>
19#include <asm/ptrace.h>
20#include <asm/thread_info.h>
21#include <asm/offsets.h>
22#include <asm/unistd.h>
23#include <asm/page.h>
24
25/*
26 * Stack layout for the system_call stack entry.
27 * The first few entries are identical to the user_regs_struct.
28 */
29SP_PTREGS = STACK_FRAME_OVERHEAD
30SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
31SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
32SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
33SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
34SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
36SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
37SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
38SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
39SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
40SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
41SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
42SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
43SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
44SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
45SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
46SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
47SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
48SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
49SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
50SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
51SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52
53STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
54STACK_SIZE = 1 << STACK_SHIFT
55
77fa2245 56_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING | \
1da177e4 57 _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
77fa2245 58_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)
1da177e4
LT		 59
60#define BASED(name) name-system_call(%r13)
61
62 .macro STORE_TIMER lc_offset
63#ifdef CONFIG_VIRT_CPU_ACCOUNTING
64 stpt \lc_offset
65#endif
66 .endm
67
68#ifdef CONFIG_VIRT_CPU_ACCOUNTING
69 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
70 lg %r10,\lc_from
71 slg %r10,\lc_to
72 alg %r10,\lc_sum
73 stg %r10,\lc_sum
74 .endm
75#endif
76
77/*
78 * Register usage in interrupt handlers:
79 * R9 - pointer to current task structure
80 * R13 - pointer to literal pool
81 * R14 - return register for function calls
82 * R15 - kernel stack pointer
83 */
84
85 .macro SAVE_ALL_BASE savearea
86 stmg %r12,%r15,\savearea
87 larl %r13,system_call
88 .endm
89
90 .macro SAVE_ALL psworg,savearea,sync
91 la %r12,\psworg
92 .if \sync
93 tm \psworg+1,0x01 # test problem state bit
94 jz 2f # skip stack setup save
95 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
96 .else
97 tm \psworg+1,0x01 # test problem state bit
98 jnz 1f # from user -> load kernel stack
99 clc \psworg+8(8),BASED(.Lcritical_end)
100 jhe 0f
101 clc \psworg+8(8),BASED(.Lcritical_start)
102 jl 0f
103 brasl %r14,cleanup_critical
104 tm 0(%r12),0x01 # retest problem state after cleanup
105 jnz 1f
1060: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
107 slgr %r14,%r15
108 srag %r14,%r14,STACK_SHIFT
109 jz 2f
1101: lg %r15,__LC_ASYNC_STACK # load async stack
111 .endif
112#ifdef CONFIG_CHECK_STACK
113 j 3f
1142: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
115 jz stack_overflow
1163:
117#endif
77fa2245
HC		 1182:
119 .endm
120
121 .macro CREATE_STACK_FRAME psworg,savearea
122 aghi %r15,-SP_SIZE # make room for registers & psw
1da177e4
LT		 123 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
124 la %r12,\psworg
125 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
126 icm %r12,12,__LC_SVC_ILC
127 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
128 st %r12,SP_ILC(%r15)
129 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
130 la %r12,0
131 stg %r12,__SF_BACKCHAIN(%r15)
132 .endm
133
134 .macro RESTORE_ALL sync
135 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) # move user PSW to lowcore
136 .if !\sync
137 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
138 .endif
139 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
140 STORE_TIMER __LC_EXIT_TIMER
141 lpswe __LC_RETURN_PSW # back to caller
142 .endm
143
144/*
145 * Scheduler resume function, called by switch_to
146 * gpr2 = (task_struct *) prev
147 * gpr3 = (task_struct *) next
148 * Returns:
149 * gpr2 = prev
150 */
151 .globl __switch_to
152__switch_to:
153 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
154 jz __switch_to_noper # if not we're fine
155 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
156 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
157 je __switch_to_noper # we got away without bashing TLB's
158 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
159__switch_to_noper:
77fa2245
HC		 160 lg %r4,__THREAD_info(%r2) # get thread_info of prev
161 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
162 jz __switch_to_no_mcck
163 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
164 lg %r4,__THREAD_info(%r3) # get thread_info of next
165 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
166__switch_to_no_mcck:
1da177e4
LT		 167 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
168 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
169 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
170 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
171 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
172 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
173 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
174 stg %r3,__LC_THREAD_INFO
175 aghi %r3,STACK_SIZE
176 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
177 br %r14
178
179__critical_start:
180/*
181 * SVC interrupt handler routine. System calls are synchronous events and
182 * are executed with interrupts enabled.
183 */
184
185 .globl system_call
186system_call:
187 STORE_TIMER __LC_SYNC_ENTER_TIMER
188sysc_saveall:
189 SAVE_ALL_BASE __LC_SAVE_AREA
190 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 191 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 192 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
193#ifdef CONFIG_VIRT_CPU_ACCOUNTING
194sysc_vtime:
195 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
196 jz sysc_do_svc
197 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
198sysc_stime:
199 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
200sysc_update:
201 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
202#endif
203sysc_do_svc:
204 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
205 slag %r7,%r7,2 # *4 and test for svc 0
206 jnz sysc_nr_ok
207 # svc 0: system call number in %r1
208 cl %r1,BASED(.Lnr_syscalls)
209 jnl sysc_nr_ok
210 lgfr %r7,%r1 # clear high word in r1
211 slag %r7,%r7,2 # svc 0: system call number in %r1
212sysc_nr_ok:
213 mvc SP_ARGS(8,%r15),SP_R7(%r15)
214sysc_do_restart:
215 larl %r10,sys_call_table
216#ifdef CONFIG_S390_SUPPORT
217 tm SP_PSW+3(%r15),0x01 # are we running in 31 bit mode ?
218 jo sysc_noemu
219 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
220sysc_noemu:
221#endif
222 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
223 lgf %r8,0(%r7,%r10) # load address of system call routine
224 jnz sysc_tracesys
225 basr %r14,%r8 # call sys_xxxx
226 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
227 # ATTENTION: check sys_execve_glue before
228 # changing anything here !!
229
230sysc_return:
231 tm SP_PSW+1(%r15),0x01 # returning to user ?
232 jno sysc_leave
233 tm __TI_flags+7(%r9),_TIF_WORK_SVC
234 jnz sysc_work # there is work to do (signals etc.)
235sysc_leave:
236 RESTORE_ALL 1
237
238#
239# recheck if there is more work to do
240#
241sysc_work_loop:
242 tm __TI_flags+7(%r9),_TIF_WORK_SVC
243 jz sysc_leave # there is no work to do
244#
245# One of the work bits is on. Find out which one.
246#
247sysc_work:
77fa2245
HC		 248 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
249 jo sysc_mcck_pending
1da177e4
LT		 250 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
251 jo sysc_reschedule
252 tm __TI_flags+7(%r9),_TIF_SIGPENDING
253 jo sysc_sigpending
254 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
255 jo sysc_restart
256 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
257 jo sysc_singlestep
258 j sysc_leave
259
260#
261# _TIF_NEED_RESCHED is set, call schedule
262#
263sysc_reschedule:
264 larl %r14,sysc_work_loop
265 jg schedule # return point is sysc_return
266
77fa2245
HC		 267#
268# _TIF_MCCK_PENDING is set, call handler
269#
270sysc_mcck_pending:
271 larl %r14,sysc_work_loop
272 jg s390_handle_mcck # TIF bit will be cleared by handler
273
1da177e4
LT		 274#
275# _TIF_SIGPENDING is set, call do_signal
276#
277sysc_sigpending:
278 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
279 la %r2,SP_PTREGS(%r15) # load pt_regs
280 sgr %r3,%r3 # clear *oldset
281 brasl %r14,do_signal # call do_signal
282 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
283 jo sysc_restart
284 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
285 jo sysc_singlestep
286 j sysc_leave # out of here, do NOT recheck
287
288#
289# _TIF_RESTART_SVC is set, set up registers and restart svc
290#
291sysc_restart:
292 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
293 lg %r7,SP_R2(%r15) # load new svc number
294 slag %r7,%r7,2 # *4
295 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
296 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
297 j sysc_do_restart # restart svc
298
299#
300# _TIF_SINGLE_STEP is set, call do_single_step
301#
302sysc_singlestep:
303 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
304 lhi %r0,__LC_PGM_OLD_PSW
305 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
306 la %r2,SP_PTREGS(%r15) # address of register-save area
307 larl %r14,sysc_return # load adr. of system return
308 jg do_single_step # branch to do_sigtrap
309
310
311__critical_end:
312
313#
314# call syscall_trace before and after system call
315# special linkage: %r12 contains the return address for trace_svc
316#
317sysc_tracesys:
318 la %r2,SP_PTREGS(%r15) # load pt_regs
319 la %r3,0
320 srl %r7,2
321 stg %r7,SP_R2(%r15)
322 brasl %r14,syscall_trace
323 lghi %r0,NR_syscalls
324 clg %r0,SP_R2(%r15)
325 jnh sysc_tracenogo
326 lg %r7,SP_R2(%r15) # strace might have changed the
327 sll %r7,2 # system call
328 lgf %r8,0(%r7,%r10)
329sysc_tracego:
330 lmg %r3,%r6,SP_R3(%r15)
331 lg %r2,SP_ORIG_R2(%r15)
332 basr %r14,%r8 # call sys_xxx
333 stg %r2,SP_R2(%r15) # store return value
334sysc_tracenogo:
335 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
336 jz sysc_return
337 la %r2,SP_PTREGS(%r15) # load pt_regs
338 la %r3,1
339 larl %r14,sysc_return # return point is sysc_return
340 jg syscall_trace
341
342#
343# a new process exits the kernel with ret_from_fork
344#
345 .globl ret_from_fork
346ret_from_fork:
347 lg %r13,__LC_SVC_NEW_PSW+8
348 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
349 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
350 jo 0f
351 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
3520: brasl %r14,schedule_tail
353 stosm 24(%r15),0x03 # reenable interrupts
354 j sysc_return
355
356#
357# clone, fork, vfork, exec and sigreturn need glue,
358# because they all expect pt_regs as parameter,
359# but are called with different parameter.
360# return-address is set up above
361#
362sys_clone_glue:
363 la %r2,SP_PTREGS(%r15) # load pt_regs
364 jg sys_clone # branch to sys_clone
365
366#ifdef CONFIG_S390_SUPPORT
367sys32_clone_glue:
368 la %r2,SP_PTREGS(%r15) # load pt_regs
369 jg sys32_clone # branch to sys32_clone
370#endif
371
372sys_fork_glue:
373 la %r2,SP_PTREGS(%r15) # load pt_regs
374 jg sys_fork # branch to sys_fork
375
376sys_vfork_glue:
377 la %r2,SP_PTREGS(%r15) # load pt_regs
378 jg sys_vfork # branch to sys_vfork
379
380sys_execve_glue:
381 la %r2,SP_PTREGS(%r15) # load pt_regs
382 lgr %r12,%r14 # save return address
383 brasl %r14,sys_execve # call sys_execve
384 ltgr %r2,%r2 # check if execve failed
385 bnz 0(%r12) # it did fail -> store result in gpr2
386 b 6(%r12) # SKIP STG 2,SP_R2(15) in
387 # system_call/sysc_tracesys
388#ifdef CONFIG_S390_SUPPORT
389sys32_execve_glue:
390 la %r2,SP_PTREGS(%r15) # load pt_regs
391 lgr %r12,%r14 # save return address
392 brasl %r14,sys32_execve # call sys32_execve
393 ltgr %r2,%r2 # check if execve failed
394 bnz 0(%r12) # it did fail -> store result in gpr2
395 b 6(%r12) # SKIP STG 2,SP_R2(15) in
396 # system_call/sysc_tracesys
397#endif
398
399sys_sigreturn_glue:
400 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
401 jg sys_sigreturn # branch to sys_sigreturn
402
403#ifdef CONFIG_S390_SUPPORT
404sys32_sigreturn_glue:
405 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
406 jg sys32_sigreturn # branch to sys32_sigreturn
407#endif
408
409sys_rt_sigreturn_glue:
410 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
411 jg sys_rt_sigreturn # branch to sys_sigreturn
412
413#ifdef CONFIG_S390_SUPPORT
414sys32_rt_sigreturn_glue:
415 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
416 jg sys32_rt_sigreturn # branch to sys32_sigreturn
417#endif
418
419#
420# sigsuspend and rt_sigsuspend need pt_regs as an additional
421# parameter and they have to skip the store of %r2 into the
422# user register %r2 because the return value was set in
423# sigsuspend and rt_sigsuspend already and must not be overwritten!
424#
425
426sys_sigsuspend_glue:
427 lgr %r5,%r4 # move mask back
428 lgr %r4,%r3 # move history1 parameter
429 lgr %r3,%r2 # move history0 parameter
430 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
431 la %r14,6(%r14) # skip store of return value
432 jg sys_sigsuspend # branch to sys_sigsuspend
433
434#ifdef CONFIG_S390_SUPPORT
435sys32_sigsuspend_glue:
436 llgfr %r4,%r4 # unsigned long
437 lgr %r5,%r4 # move mask back
438 lgfr %r3,%r3 # int
439 lgr %r4,%r3 # move history1 parameter
440 lgfr %r2,%r2 # int
441 lgr %r3,%r2 # move history0 parameter
442 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
443 la %r14,6(%r14) # skip store of return value
444 jg sys32_sigsuspend # branch to sys32_sigsuspend
445#endif
446
447sys_rt_sigsuspend_glue:
448 lgr %r4,%r3 # move sigsetsize parameter
449 lgr %r3,%r2 # move unewset parameter
450 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
451 la %r14,6(%r14) # skip store of return value
452 jg sys_rt_sigsuspend # branch to sys_rt_sigsuspend
453
454#ifdef CONFIG_S390_SUPPORT
455sys32_rt_sigsuspend_glue:
456 llgfr %r3,%r3 # size_t
457 lgr %r4,%r3 # move sigsetsize parameter
458 llgtr %r2,%r2 # sigset_emu31_t *
459 lgr %r3,%r2 # move unewset parameter
460 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
461 la %r14,6(%r14) # skip store of return value
462 jg sys32_rt_sigsuspend # branch to sys32_rt_sigsuspend
463#endif
464
465sys_sigaltstack_glue:
466 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
467 jg sys_sigaltstack # branch to sys_sigreturn
468
469#ifdef CONFIG_S390_SUPPORT
470sys32_sigaltstack_glue:
471 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
472 jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
473#endif
474
475/*
476 * Program check handler routine
477 */
478
479 .globl pgm_check_handler
480pgm_check_handler:
481/*
482 * First we need to check for a special case:
483 * Single stepping an instruction that disables the PER event mask will
484 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
485 * For a single stepped SVC the program check handler gets control after
486 * the SVC new PSW has been loaded. But we want to execute the SVC first and
487 * then handle the PER event. Therefore we update the SVC old PSW to point
488 * to the pgm_check_handler and branch to the SVC handler after we checked
489 * if we have to load the kernel stack register.
490 * For every other possible cause for PER event without the PER mask set
491 * we just ignore the PER event (FIXME: is there anything we have to do
492 * for LPSW?).
493 */
494 STORE_TIMER __LC_SYNC_ENTER_TIMER
495 SAVE_ALL_BASE __LC_SAVE_AREA
496 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
497 jnz pgm_per # got per exception -> special case
498 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 499 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 500#ifdef CONFIG_VIRT_CPU_ACCOUNTING
501 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
502 jz pgm_no_vtime
503 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
504 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
505 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
506pgm_no_vtime:
507#endif
508 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
509 lgf %r3,__LC_PGM_ILC # load program interruption code
510 lghi %r8,0x7f
511 ngr %r8,%r3
512pgm_do_call:
513 sll %r8,3
514 larl %r1,pgm_check_table
515 lg %r1,0(%r8,%r1) # load address of handler routine
516 la %r2,SP_PTREGS(%r15) # address of register-save area
517 larl %r14,sysc_return
518 br %r1 # branch to interrupt-handler
519
520#
521# handle per exception
522#
523pgm_per:
524 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
525 jnz pgm_per_std # ok, normal per event from user space
526# ok its one of the special cases, now we need to find out which one
527 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
528 je pgm_svcper
529# no interesting special case, ignore PER event
530 lmg %r12,%r15,__LC_SAVE_AREA
531 lpswe __LC_PGM_OLD_PSW
532
533#
534# Normal per exception
535#
536pgm_per_std:
537 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 538 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 539#ifdef CONFIG_VIRT_CPU_ACCOUNTING
540 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
541 jz pgm_no_vtime2
542 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
543 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
544 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
545pgm_no_vtime2:
546#endif
547 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
548 lg %r1,__TI_task(%r9)
549 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
550 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
551 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
552 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
553 lgf %r3,__LC_PGM_ILC # load program interruption code
554 lghi %r8,0x7f
555 ngr %r8,%r3 # clear per-event-bit and ilc
556 je sysc_return
557 j pgm_do_call
558
559#
560# it was a single stepped SVC that is causing all the trouble
561#
562pgm_svcper:
563 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 564 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 565#ifdef CONFIG_VIRT_CPU_ACCOUNTING
566 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
567 jz pgm_no_vtime3
568 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
569 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
570 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
571pgm_no_vtime3:
572#endif
573 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
574 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
575 lg %r1,__TI_task(%r9)
576 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
577 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
578 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
579 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
580 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
581 j sysc_do_svc
582
583/*
584 * IO interrupt handler routine
585 */
586 .globl io_int_handler
587io_int_handler:
588 STORE_TIMER __LC_ASYNC_ENTER_TIMER
589 stck __LC_INT_CLOCK
590 SAVE_ALL_BASE __LC_SAVE_AREA+32
591 SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+32,0
77fa2245 592 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 593#ifdef CONFIG_VIRT_CPU_ACCOUNTING
594 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
595 jz io_no_vtime
596 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
597 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
598 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
599io_no_vtime:
600#endif
601 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
602 la %r2,SP_PTREGS(%r15) # address of register-save area
603 brasl %r14,do_IRQ # call standard irq handler
604
605io_return:
606 tm SP_PSW+1(%r15),0x01 # returning to user ?
607#ifdef CONFIG_PREEMPT
608 jno io_preempt # no -> check for preemptive scheduling
609#else
610 jno io_leave # no-> skip resched & signal
611#endif
612 tm __TI_flags+7(%r9),_TIF_WORK_INT
613 jnz io_work # there is work to do (signals etc.)
614io_leave:
615 RESTORE_ALL 0
616
617#ifdef CONFIG_PREEMPT
618io_preempt:
619 icm %r0,15,__TI_precount(%r9)
620 jnz io_leave
621 # switch to kernel stack
622 lg %r1,SP_R15(%r15)
623 aghi %r1,-SP_SIZE
624 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
625 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
626 lgr %r15,%r1
627io_resume_loop:
628 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
629 jno io_leave
630 larl %r1,.Lc_pactive
631 mvc __TI_precount(4,%r9),0(%r1)
632 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
633 brasl %r14,schedule # call schedule
634 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
635 xc __TI_precount(4,%r9),__TI_precount(%r9)
636 j io_resume_loop
637#endif
638
639#
640# switch to kernel stack, then check TIF bits
641#
642io_work:
643 lg %r1,__LC_KERNEL_STACK
644 aghi %r1,-SP_SIZE
645 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
646 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
647 lgr %r15,%r1
648#
649# One of the work bits is on. Find out which one.
77fa2245 650# Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED and _TIF_MCCK_PENDING
1da177e4
LT		 651#
652io_work_loop:
77fa2245
HC		 653 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
654 jo io_mcck_pending
1da177e4
LT		 655 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
656 jo io_reschedule
657 tm __TI_flags+7(%r9),_TIF_SIGPENDING
658 jo io_sigpending
659 j io_leave
660
77fa2245
HC		 661#
662# _TIF_MCCK_PENDING is set, call handler
663#
664io_mcck_pending:
665 larl %r14,io_work_loop
666 jg s390_handle_mcck # TIF bit will be cleared by handler
667
1da177e4
LT		 668#
669# _TIF_NEED_RESCHED is set, call schedule
670#
671io_reschedule:
672 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
673 brasl %r14,schedule # call scheduler
674 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
675 tm __TI_flags+7(%r9),_TIF_WORK_INT
676 jz io_leave # there is no work to do
677 j io_work_loop
678
679#
680# _TIF_SIGPENDING is set, call do_signal
681#
682io_sigpending:
683 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
684 la %r2,SP_PTREGS(%r15) # load pt_regs
685 slgr %r3,%r3 # clear *oldset
686 brasl %r14,do_signal # call do_signal
687 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
688 j sysc_leave # out of here, do NOT recheck
689
690/*
691 * External interrupt handler routine
692 */
693 .globl ext_int_handler
694ext_int_handler:
695 STORE_TIMER __LC_ASYNC_ENTER_TIMER
696 stck __LC_INT_CLOCK
697 SAVE_ALL_BASE __LC_SAVE_AREA+32
698 SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32,0
77fa2245 699 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 700#ifdef CONFIG_VIRT_CPU_ACCOUNTING
701 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
702 jz ext_no_vtime
703 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
704 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
705 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
706ext_no_vtime:
707#endif
708 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
709 la %r2,SP_PTREGS(%r15) # address of register-save area
710 llgh %r3,__LC_EXT_INT_CODE # get interruption code
711 brasl %r14,do_extint
712 j io_return
713
714/*
715 * Machine check handler routines
716 */
717 .globl mcck_int_handler
718mcck_int_handler:
77fa2245
HC		 719 la %r1,4095 # revalidate r1
720 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
721 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
1da177e4 722 SAVE_ALL_BASE __LC_SAVE_AREA+64
77fa2245
HC		 723 la %r12,__LC_MCK_OLD_PSW
724 tm __LC_MCCK_CODE,0x80 # system damage?
725 jo mcck_int_main # yes -> rest of mcck code invalid
726 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
727 jo 0f
728 spt __LC_LAST_UPDATE_TIMER
1da177e4 729#ifdef CONFIG_VIRT_CPU_ACCOUNTING
8ffa7405
HC		 730 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
731 mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
732 mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER
77fa2245
HC		 7330: tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
734 jno mcck_no_vtime # no -> no timer update
735 tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ?
1da177e4
LT		 736 jz mcck_no_vtime
737 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
738 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
739 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
740mcck_no_vtime:
741#endif
77fa2245
HC		 7420:
743 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
744 jno mcck_int_main # no -> skip cleanup critical
745 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
746 jnz mcck_int_main # from user -> load kernel stack
747 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
748 jhe mcck_int_main
749 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
750 jl mcck_int_main
751 brasl %r14,cleanup_critical
752mcck_int_main:
753 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
754 slgr %r14,%r15
755 srag %r14,%r14,PAGE_SHIFT
756 jz 0f
757 lg %r15,__LC_PANIC_STACK # load panic stack
7580: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
759 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
760 la %r2,SP_PTREGS(%r15) # load pt_regs
761 brasl %r14,s390_do_machine_check
762 tm SP_PSW+1(%r15),0x01 # returning to user ?
763 jno mcck_return
764 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
765 aghi %r1,-SP_SIZE
766 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
767 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
768 lgr %r15,%r1
769 stosm __SF_EMPTY(%r15),0x04 # turn dat on
770 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
771 jno mcck_return
772 brasl %r14,s390_handle_mcck
1da177e4
LT		 773mcck_return:
774 RESTORE_ALL 0
775
776#ifdef CONFIG_SMP
777/*
778 * Restart interruption handler, kick starter for additional CPUs
779 */
780 .globl restart_int_handler
781restart_int_handler:
782 lg %r15,__LC_SAVE_AREA+120 # load ksp
783 lghi %r10,__LC_CREGS_SAVE_AREA
784 lctlg %c0,%c15,0(%r10) # get new ctl regs
785 lghi %r10,__LC_AREGS_SAVE_AREA
786 lam %a0,%a15,0(%r10)
787 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
788 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
789 jg start_secondary
790#else
791/*
792 * If we do not run with SMP enabled, let the new CPU crash ...
793 */
794 .globl restart_int_handler
795restart_int_handler:
796 basr %r1,0
797restart_base:
798 lpswe restart_crash-restart_base(%r1)
799 .align 8
800restart_crash:
801 .long 0x000a0000,0x00000000,0x00000000,0x00000000
802restart_go:
803#endif
804
805#ifdef CONFIG_CHECK_STACK
806/*
807 * The synchronous or the asynchronous stack overflowed. We are dead.
808 * No need to properly save the registers, we are going to panic anyway.
809 * Setup a pt_regs so that show_trace can provide a good call trace.
810 */
811stack_overflow:
812 lg %r15,__LC_PANIC_STACK # change to panic stack
813 aghi %r1,-SP_SIZE
814 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
815 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
816 la %r1,__LC_SAVE_AREA
817 chi %r12,__LC_SVC_OLD_PSW
818 je 0f
819 chi %r12,__LC_PGM_OLD_PSW
820 je 0f
821 la %r1,__LC_SAVE_AREA+16
8220: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
823 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
824 la %r2,SP_PTREGS(%r15) # load pt_regs
825 jg kernel_stack_overflow
826#endif
827
828cleanup_table_system_call:
829 .quad system_call, sysc_do_svc
830cleanup_table_sysc_return:
831 .quad sysc_return, sysc_leave
832cleanup_table_sysc_leave:
833 .quad sysc_leave, sysc_work_loop
834cleanup_table_sysc_work_loop:
835 .quad sysc_work_loop, sysc_reschedule
836
837cleanup_critical:
838 clc 8(8,%r12),BASED(cleanup_table_system_call)
839 jl 0f
840 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
841 jl cleanup_system_call
8420:
843 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
844 jl 0f
845 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
846 jl cleanup_sysc_return
8470:
848 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
849 jl 0f
850 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
851 jl cleanup_sysc_leave
8520:
853 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
854 jl 0f
855 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
77fa2245 856 jl cleanup_sysc_return
1da177e4
LT		 8570:
858 br %r14
859
860cleanup_system_call:
861 mvc __LC_RETURN_PSW(16),0(%r12)
862#ifdef CONFIG_VIRT_CPU_ACCOUNTING
863 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
864 jh 0f
865 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
8660: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
867 jhe cleanup_vtime
868#endif
869 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
870 jh 0f
871 mvc __LC_SAVE_AREA(32),__LC_SAVE_AREA+32
8720: stg %r13,__LC_SAVE_AREA+40
873 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 874 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 875 stg %r15,__LC_SAVE_AREA+56
876 llgh %r7,__LC_SVC_INT_CODE
877#ifdef CONFIG_VIRT_CPU_ACCOUNTING
878cleanup_vtime:
879 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
880 jhe cleanup_stime
881 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
882 jz cleanup_novtime
883 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
884cleanup_stime:
885 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
886 jh cleanup_update
887 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
888cleanup_update:
889 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
890cleanup_novtime:
891#endif
892 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
893 la %r12,__LC_RETURN_PSW
894 br %r14
895cleanup_system_call_insn:
896 .quad sysc_saveall
897#ifdef CONFIG_VIRT_CPU_ACCOUNTING
898 .quad system_call
899 .quad sysc_vtime
900 .quad sysc_stime
901 .quad sysc_update
902#endif
903
904cleanup_sysc_return:
905 mvc __LC_RETURN_PSW(8),0(%r12)
906 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
907 la %r12,__LC_RETURN_PSW
908 br %r14
909
910cleanup_sysc_leave:
911 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
912 je 0f
913#ifdef CONFIG_VIRT_CPU_ACCOUNTING
914 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
915 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
916 je 0f
917#endif
918 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
919 mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
920 lmg %r0,%r11,SP_R0(%r15)
921 lg %r15,SP_R15(%r15)
9220: la %r12,__LC_RETURN_PSW
923 br %r14
924cleanup_sysc_leave_insn:
925#ifdef CONFIG_VIRT_CPU_ACCOUNTING
926 .quad sysc_leave + 16
927#endif
928 .quad sysc_leave + 12
929
930/*
931 * Integer constants
932 */
933 .align 4
934.Lconst:
935.Lc_pactive: .long PREEMPT_ACTIVE
936.Lnr_syscalls: .long NR_syscalls
937.L0x0130: .short 0x130
938.L0x0140: .short 0x140
939.L0x0150: .short 0x150
940.L0x0160: .short 0x160
941.L0x0170: .short 0x170
942.Lcritical_start:
943 .quad __critical_start
944.Lcritical_end:
945 .quad __critical_end
946
947#define SYSCALL(esa,esame,emu) .long esame
948 .globl sys_call_table
949sys_call_table:
950#include "syscalls.S"
951#undef SYSCALL
952
953#ifdef CONFIG_S390_SUPPORT
954
955#define SYSCALL(esa,esame,emu) .long emu
956 .globl sys_call_table_emu
957sys_call_table_emu:
958#include "syscalls.S"
959#undef SYSCALL
960#endif
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