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[S390] zcrypt secure key cryptography extension.
[mirror_ubuntu-bionic-kernel.git] / arch / s390 / kernel / entry64.S
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1da177e4 1/*
54dfe5dd 2 * arch/s390/kernel/entry64.S
1da177e4
LT		 3 * S390 low-level entry points.
4 *
54dfe5dd 5 * Copyright (C) IBM Corp. 1999,2006
1da177e4
LT		 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
77fa2245 9 * Heiko Carstens <heiko.carstens@de.ibm.com>
1da177e4
LT		 10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
1da177e4
LT		 14#include <asm/cache.h>
15#include <asm/lowcore.h>
16#include <asm/errno.h>
17#include <asm/ptrace.h>
18#include <asm/thread_info.h>
0013a854 19#include <asm/asm-offsets.h>
1da177e4
LT		 20#include <asm/unistd.h>
21#include <asm/page.h>
22
23/*
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
26 */
27SP_PTREGS = STACK_FRAME_OVERHEAD
28SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
32SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
33SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
34SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
35SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
36SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
37SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
38SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
39SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
40SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
41SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
42SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
43SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
44SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
45SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
46SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
49SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
50
51STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
52STACK_SIZE = 1 << STACK_SHIFT
53
54dfe5dd
HC		 54_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
55 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
56_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
57 _TIF_MCCK_PENDING)
1da177e4
LT		 58
59#define BASED(name) name-system_call(%r13)
60
1f194a4c
HC		 61#ifdef CONFIG_TRACE_IRQFLAGS
62 .macro TRACE_IRQS_ON
63 brasl %r14,trace_hardirqs_on
64 .endm
65
66 .macro TRACE_IRQS_OFF
67 brasl %r14,trace_hardirqs_off
68 .endm
69#else
70#define TRACE_IRQS_ON
71#define TRACE_IRQS_OFF
72#endif
73
1da177e4
LT		 74 .macro STORE_TIMER lc_offset
75#ifdef CONFIG_VIRT_CPU_ACCOUNTING
76 stpt \lc_offset
77#endif
78 .endm
79
80#ifdef CONFIG_VIRT_CPU_ACCOUNTING
81 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
82 lg %r10,\lc_from
83 slg %r10,\lc_to
84 alg %r10,\lc_sum
85 stg %r10,\lc_sum
86 .endm
87#endif
88
89/*
90 * Register usage in interrupt handlers:
91 * R9 - pointer to current task structure
92 * R13 - pointer to literal pool
93 * R14 - return register for function calls
94 * R15 - kernel stack pointer
95 */
96
97 .macro SAVE_ALL_BASE savearea
98 stmg %r12,%r15,\savearea
99 larl %r13,system_call
100 .endm
101
63b12246 102 .macro SAVE_ALL_SYNC psworg,savearea
1da177e4 103 la %r12,\psworg
1da177e4
LT		 104 tm \psworg+1,0x01 # test problem state bit
105 jz 2f # skip stack setup save
106 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
63b12246
MS		 107#ifdef CONFIG_CHECK_STACK
108 j 3f
1092: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
110 jz stack_overflow
1113:
112#endif
1132:
114 .endm
115
116 .macro SAVE_ALL_ASYNC psworg,savearea
117 la %r12,\psworg
1da177e4
LT		 118 tm \psworg+1,0x01 # test problem state bit
119 jnz 1f # from user -> load kernel stack
120 clc \psworg+8(8),BASED(.Lcritical_end)
121 jhe 0f
122 clc \psworg+8(8),BASED(.Lcritical_start)
123 jl 0f
124 brasl %r14,cleanup_critical
6add9f7f 125 tm 1(%r12),0x01 # retest problem state after cleanup
1da177e4
LT		 126 jnz 1f
1270: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
128 slgr %r14,%r15
129 srag %r14,%r14,STACK_SHIFT
130 jz 2f
1311: lg %r15,__LC_ASYNC_STACK # load async stack
1da177e4
LT		 132#ifdef CONFIG_CHECK_STACK
133 j 3f
1342: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
135 jz stack_overflow
1363:
137#endif
77fa2245
HC		 1382:
139 .endm
140
141 .macro CREATE_STACK_FRAME psworg,savearea
142 aghi %r15,-SP_SIZE # make room for registers & psw
1da177e4
LT		 143 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
144 la %r12,\psworg
145 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
146 icm %r12,12,__LC_SVC_ILC
147 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
148 st %r12,SP_ILC(%r15)
149 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
150 la %r12,0
151 stg %r12,__SF_BACKCHAIN(%r15)
152 .endm
153
ae6aa2ea
MS		 154 .macro RESTORE_ALL psworg,sync
155 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
1da177e4 156 .if !\sync
ae6aa2ea 157 ni \psworg+1,0xfd # clear wait state bit
1da177e4
LT		 158 .endif
159 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
160 STORE_TIMER __LC_EXIT_TIMER
ae6aa2ea 161 lpswe \psworg # back to caller
1da177e4
LT		 162 .endm
163
164/*
165 * Scheduler resume function, called by switch_to
166 * gpr2 = (task_struct *) prev
167 * gpr3 = (task_struct *) next
168 * Returns:
169 * gpr2 = prev
170 */
171 .globl __switch_to
172__switch_to:
173 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
174 jz __switch_to_noper # if not we're fine
175 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
176 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
177 je __switch_to_noper # we got away without bashing TLB's
178 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
179__switch_to_noper:
77fa2245
HC		 180 lg %r4,__THREAD_info(%r2) # get thread_info of prev
181 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
182 jz __switch_to_no_mcck
183 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
184 lg %r4,__THREAD_info(%r3) # get thread_info of next
185 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
186__switch_to_no_mcck:
1da177e4
LT		 187 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
188 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
189 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
190 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
191 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
192 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
193 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
194 stg %r3,__LC_THREAD_INFO
195 aghi %r3,STACK_SIZE
196 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
197 br %r14
198
199__critical_start:
200/*
201 * SVC interrupt handler routine. System calls are synchronous events and
202 * are executed with interrupts enabled.
203 */
204
205 .globl system_call
206system_call:
207 STORE_TIMER __LC_SYNC_ENTER_TIMER
208sysc_saveall:
209 SAVE_ALL_BASE __LC_SAVE_AREA
63b12246 210 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 211 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 212 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
213#ifdef CONFIG_VIRT_CPU_ACCOUNTING
214sysc_vtime:
215 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
216 jz sysc_do_svc
217 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
218sysc_stime:
219 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
220sysc_update:
221 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
222#endif
223sysc_do_svc:
224 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
225 slag %r7,%r7,2 # *4 and test for svc 0
226 jnz sysc_nr_ok
227 # svc 0: system call number in %r1
228 cl %r1,BASED(.Lnr_syscalls)
229 jnl sysc_nr_ok
230 lgfr %r7,%r1 # clear high word in r1
231 slag %r7,%r7,2 # svc 0: system call number in %r1
232sysc_nr_ok:
233 mvc SP_ARGS(8,%r15),SP_R7(%r15)
234sysc_do_restart:
235 larl %r10,sys_call_table
347a8dc3 236#ifdef CONFIG_COMPAT
c563077e
HC		 237 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
238 jno sysc_noemu
1da177e4
LT		 239 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
240sysc_noemu:
241#endif
242 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
243 lgf %r8,0(%r7,%r10) # load address of system call routine
244 jnz sysc_tracesys
245 basr %r14,%r8 # call sys_xxxx
246 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
247 # ATTENTION: check sys_execve_glue before
248 # changing anything here !!
249
250sysc_return:
251 tm SP_PSW+1(%r15),0x01 # returning to user ?
252 jno sysc_leave
253 tm __TI_flags+7(%r9),_TIF_WORK_SVC
254 jnz sysc_work # there is work to do (signals etc.)
255sysc_leave:
ae6aa2ea 256 RESTORE_ALL __LC_RETURN_PSW,1
1da177e4
LT		 257
258#
259# recheck if there is more work to do
260#
261sysc_work_loop:
262 tm __TI_flags+7(%r9),_TIF_WORK_SVC
263 jz sysc_leave # there is no work to do
264#
265# One of the work bits is on. Find out which one.
266#
267sysc_work:
77fa2245
HC		 268 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
269 jo sysc_mcck_pending
1da177e4
LT		 270 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
271 jo sysc_reschedule
54dfe5dd
HC		 272 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
273 jnz sysc_sigpending
1da177e4
LT		 274 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
275 jo sysc_restart
276 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
277 jo sysc_singlestep
278 j sysc_leave
279
280#
281# _TIF_NEED_RESCHED is set, call schedule
282#
283sysc_reschedule:
284 larl %r14,sysc_work_loop
285 jg schedule # return point is sysc_return
286
77fa2245
HC		 287#
288# _TIF_MCCK_PENDING is set, call handler
289#
290sysc_mcck_pending:
291 larl %r14,sysc_work_loop
292 jg s390_handle_mcck # TIF bit will be cleared by handler
293
1da177e4 294#
54dfe5dd 295# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
1da177e4
LT		 296#
297sysc_sigpending:
298 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
299 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 300 brasl %r14,do_signal # call do_signal
301 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
302 jo sysc_restart
303 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
304 jo sysc_singlestep
e1c3ad96 305 j sysc_work_loop
1da177e4
LT		 306
307#
308# _TIF_RESTART_SVC is set, set up registers and restart svc
309#
310sysc_restart:
311 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
312 lg %r7,SP_R2(%r15) # load new svc number
313 slag %r7,%r7,2 # *4
314 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
315 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
316 j sysc_do_restart # restart svc
317
318#
319# _TIF_SINGLE_STEP is set, call do_single_step
320#
321sysc_singlestep:
322 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
323 lhi %r0,__LC_PGM_OLD_PSW
324 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
325 la %r2,SP_PTREGS(%r15) # address of register-save area
326 larl %r14,sysc_return # load adr. of system return
327 jg do_single_step # branch to do_sigtrap
328
329
1da177e4
LT		 330#
331# call syscall_trace before and after system call
332# special linkage: %r12 contains the return address for trace_svc
333#
334sysc_tracesys:
335 la %r2,SP_PTREGS(%r15) # load pt_regs
336 la %r3,0
337 srl %r7,2
338 stg %r7,SP_R2(%r15)
339 brasl %r14,syscall_trace
340 lghi %r0,NR_syscalls
341 clg %r0,SP_R2(%r15)
342 jnh sysc_tracenogo
343 lg %r7,SP_R2(%r15) # strace might have changed the
344 sll %r7,2 # system call
345 lgf %r8,0(%r7,%r10)
346sysc_tracego:
347 lmg %r3,%r6,SP_R3(%r15)
348 lg %r2,SP_ORIG_R2(%r15)
349 basr %r14,%r8 # call sys_xxx
350 stg %r2,SP_R2(%r15) # store return value
351sysc_tracenogo:
352 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
353 jz sysc_return
354 la %r2,SP_PTREGS(%r15) # load pt_regs
355 la %r3,1
356 larl %r14,sysc_return # return point is sysc_return
357 jg syscall_trace
358
359#
360# a new process exits the kernel with ret_from_fork
361#
362 .globl ret_from_fork
363ret_from_fork:
364 lg %r13,__LC_SVC_NEW_PSW+8
365 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
366 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
367 jo 0f
368 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
3690: brasl %r14,schedule_tail
1f194a4c 370 TRACE_IRQS_ON
1da177e4
LT		 371 stosm 24(%r15),0x03 # reenable interrupts
372 j sysc_return
373
374#
375# clone, fork, vfork, exec and sigreturn need glue,
376# because they all expect pt_regs as parameter,
377# but are called with different parameter.
378# return-address is set up above
379#
380sys_clone_glue:
381 la %r2,SP_PTREGS(%r15) # load pt_regs
382 jg sys_clone # branch to sys_clone
383
347a8dc3 384#ifdef CONFIG_COMPAT
1da177e4
LT		 385sys32_clone_glue:
386 la %r2,SP_PTREGS(%r15) # load pt_regs
387 jg sys32_clone # branch to sys32_clone
388#endif
389
390sys_fork_glue:
391 la %r2,SP_PTREGS(%r15) # load pt_regs
392 jg sys_fork # branch to sys_fork
393
394sys_vfork_glue:
395 la %r2,SP_PTREGS(%r15) # load pt_regs
396 jg sys_vfork # branch to sys_vfork
397
398sys_execve_glue:
399 la %r2,SP_PTREGS(%r15) # load pt_regs
400 lgr %r12,%r14 # save return address
401 brasl %r14,sys_execve # call sys_execve
402 ltgr %r2,%r2 # check if execve failed
403 bnz 0(%r12) # it did fail -> store result in gpr2
404 b 6(%r12) # SKIP STG 2,SP_R2(15) in
405 # system_call/sysc_tracesys
347a8dc3 406#ifdef CONFIG_COMPAT
1da177e4
LT		 407sys32_execve_glue:
408 la %r2,SP_PTREGS(%r15) # load pt_regs
409 lgr %r12,%r14 # save return address
410 brasl %r14,sys32_execve # call sys32_execve
411 ltgr %r2,%r2 # check if execve failed
412 bnz 0(%r12) # it did fail -> store result in gpr2
413 b 6(%r12) # SKIP STG 2,SP_R2(15) in
414 # system_call/sysc_tracesys
415#endif
416
417sys_sigreturn_glue:
418 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
419 jg sys_sigreturn # branch to sys_sigreturn
420
347a8dc3 421#ifdef CONFIG_COMPAT
1da177e4
LT		 422sys32_sigreturn_glue:
423 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
424 jg sys32_sigreturn # branch to sys32_sigreturn
425#endif
426
427sys_rt_sigreturn_glue:
428 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
429 jg sys_rt_sigreturn # branch to sys_sigreturn
430
347a8dc3 431#ifdef CONFIG_COMPAT
1da177e4
LT		 432sys32_rt_sigreturn_glue:
433 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
434 jg sys32_rt_sigreturn # branch to sys32_sigreturn
435#endif
436
1da177e4
LT		 437sys_sigaltstack_glue:
438 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
439 jg sys_sigaltstack # branch to sys_sigreturn
440
347a8dc3 441#ifdef CONFIG_COMPAT
1da177e4
LT		 442sys32_sigaltstack_glue:
443 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
444 jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
445#endif
446
447/*
448 * Program check handler routine
449 */
450
451 .globl pgm_check_handler
452pgm_check_handler:
453/*
454 * First we need to check for a special case:
455 * Single stepping an instruction that disables the PER event mask will
456 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
457 * For a single stepped SVC the program check handler gets control after
458 * the SVC new PSW has been loaded. But we want to execute the SVC first and
459 * then handle the PER event. Therefore we update the SVC old PSW to point
460 * to the pgm_check_handler and branch to the SVC handler after we checked
461 * if we have to load the kernel stack register.
462 * For every other possible cause for PER event without the PER mask set
463 * we just ignore the PER event (FIXME: is there anything we have to do
464 * for LPSW?).
465 */
466 STORE_TIMER __LC_SYNC_ENTER_TIMER
467 SAVE_ALL_BASE __LC_SAVE_AREA
468 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
469 jnz pgm_per # got per exception -> special case
63b12246 470 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 471 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 472#ifdef CONFIG_VIRT_CPU_ACCOUNTING
473 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
474 jz pgm_no_vtime
475 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
476 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
477 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
478pgm_no_vtime:
479#endif
480 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
481 lgf %r3,__LC_PGM_ILC # load program interruption code
482 lghi %r8,0x7f
483 ngr %r8,%r3
484pgm_do_call:
485 sll %r8,3
486 larl %r1,pgm_check_table
487 lg %r1,0(%r8,%r1) # load address of handler routine
488 la %r2,SP_PTREGS(%r15) # address of register-save area
489 larl %r14,sysc_return
490 br %r1 # branch to interrupt-handler
491
492#
493# handle per exception
494#
495pgm_per:
496 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
497 jnz pgm_per_std # ok, normal per event from user space
498# ok its one of the special cases, now we need to find out which one
499 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
500 je pgm_svcper
501# no interesting special case, ignore PER event
502 lmg %r12,%r15,__LC_SAVE_AREA
503 lpswe __LC_PGM_OLD_PSW
504
505#
506# Normal per exception
507#
508pgm_per_std:
63b12246 509 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 510 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 511#ifdef CONFIG_VIRT_CPU_ACCOUNTING
512 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
513 jz pgm_no_vtime2
514 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
515 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
516 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
517pgm_no_vtime2:
518#endif
519 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
520 lg %r1,__TI_task(%r9)
521 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
522 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
523 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
524 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
525 lgf %r3,__LC_PGM_ILC # load program interruption code
526 lghi %r8,0x7f
527 ngr %r8,%r3 # clear per-event-bit and ilc
528 je sysc_return
529 j pgm_do_call
530
531#
532# it was a single stepped SVC that is causing all the trouble
533#
534pgm_svcper:
63b12246 535 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 536 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 537#ifdef CONFIG_VIRT_CPU_ACCOUNTING
538 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
539 jz pgm_no_vtime3
540 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
541 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
542 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
543pgm_no_vtime3:
544#endif
545 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
546 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
547 lg %r1,__TI_task(%r9)
548 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
549 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
550 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
551 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
1f194a4c 552 TRACE_IRQS_ON
1da177e4
LT		 553 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
554 j sysc_do_svc
555
556/*
557 * IO interrupt handler routine
558 */
559 .globl io_int_handler
560io_int_handler:
561 STORE_TIMER __LC_ASYNC_ENTER_TIMER
562 stck __LC_INT_CLOCK
563 SAVE_ALL_BASE __LC_SAVE_AREA+32
63b12246 564 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
77fa2245 565 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 566#ifdef CONFIG_VIRT_CPU_ACCOUNTING
567 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
568 jz io_no_vtime
569 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
570 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
571 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
572io_no_vtime:
573#endif
574 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
1f194a4c 575 TRACE_IRQS_OFF
1da177e4
LT		 576 la %r2,SP_PTREGS(%r15) # address of register-save area
577 brasl %r14,do_IRQ # call standard irq handler
1f194a4c 578 TRACE_IRQS_ON
1da177e4
LT		 579
580io_return:
581 tm SP_PSW+1(%r15),0x01 # returning to user ?
582#ifdef CONFIG_PREEMPT
583 jno io_preempt # no -> check for preemptive scheduling
584#else
585 jno io_leave # no-> skip resched & signal
586#endif
587 tm __TI_flags+7(%r9),_TIF_WORK_INT
588 jnz io_work # there is work to do (signals etc.)
589io_leave:
ae6aa2ea
MS		 590 RESTORE_ALL __LC_RETURN_PSW,0
591io_done:
1da177e4
LT		 592
593#ifdef CONFIG_PREEMPT
594io_preempt:
595 icm %r0,15,__TI_precount(%r9)
596 jnz io_leave
597 # switch to kernel stack
598 lg %r1,SP_R15(%r15)
599 aghi %r1,-SP_SIZE
600 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
601 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
602 lgr %r15,%r1
603io_resume_loop:
604 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
605 jno io_leave
606 larl %r1,.Lc_pactive
607 mvc __TI_precount(4,%r9),0(%r1)
608 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
609 brasl %r14,schedule # call schedule
610 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
611 xc __TI_precount(4,%r9),__TI_precount(%r9)
612 j io_resume_loop
613#endif
614
615#
616# switch to kernel stack, then check TIF bits
617#
618io_work:
619 lg %r1,__LC_KERNEL_STACK
620 aghi %r1,-SP_SIZE
621 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
622 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
623 lgr %r15,%r1
624#
625# One of the work bits is on. Find out which one.
54dfe5dd
HC		 626# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
627# and _TIF_MCCK_PENDING
1da177e4
LT		 628#
629io_work_loop:
77fa2245
HC		 630 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
631 jo io_mcck_pending
1da177e4
LT		 632 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
633 jo io_reschedule
54dfe5dd
HC		 634 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
635 jnz io_sigpending
1da177e4
LT		 636 j io_leave
637
77fa2245
HC		 638#
639# _TIF_MCCK_PENDING is set, call handler
640#
641io_mcck_pending:
642 larl %r14,io_work_loop
643 jg s390_handle_mcck # TIF bit will be cleared by handler
644
1da177e4
LT		 645#
646# _TIF_NEED_RESCHED is set, call schedule
647#
648io_reschedule:
649 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
650 brasl %r14,schedule # call scheduler
651 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
652 tm __TI_flags+7(%r9),_TIF_WORK_INT
653 jz io_leave # there is no work to do
654 j io_work_loop
655
656#
54dfe5dd 657# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
1da177e4
LT		 658#
659io_sigpending:
660 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
661 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 662 brasl %r14,do_signal # call do_signal
663 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
e1c3ad96 664 j io_work_loop
1da177e4
LT		 665
666/*
667 * External interrupt handler routine
668 */
669 .globl ext_int_handler
670ext_int_handler:
671 STORE_TIMER __LC_ASYNC_ENTER_TIMER
672 stck __LC_INT_CLOCK
673 SAVE_ALL_BASE __LC_SAVE_AREA+32
63b12246 674 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
77fa2245 675 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 676#ifdef CONFIG_VIRT_CPU_ACCOUNTING
677 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
678 jz ext_no_vtime
679 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
680 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
681 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
682ext_no_vtime:
683#endif
684 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
1f194a4c 685 TRACE_IRQS_OFF
1da177e4
LT		 686 la %r2,SP_PTREGS(%r15) # address of register-save area
687 llgh %r3,__LC_EXT_INT_CODE # get interruption code
688 brasl %r14,do_extint
1f194a4c 689 TRACE_IRQS_ON
1da177e4
LT		 690 j io_return
691
ae6aa2ea
MS		 692__critical_end:
693
1da177e4
LT		 694/*
695 * Machine check handler routines
696 */
697 .globl mcck_int_handler
698mcck_int_handler:
77fa2245
HC		 699 la %r1,4095 # revalidate r1
700 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
701 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
1da177e4 702 SAVE_ALL_BASE __LC_SAVE_AREA+64
77fa2245
HC		 703 la %r12,__LC_MCK_OLD_PSW
704 tm __LC_MCCK_CODE,0x80 # system damage?
705 jo mcck_int_main # yes -> rest of mcck code invalid
1da177e4 706#ifdef CONFIG_VIRT_CPU_ACCOUNTING
63b12246
MS		 707 la %r14,4095
708 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
709 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
710 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
711 jo 1f
712 la %r14,__LC_SYNC_ENTER_TIMER
713 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
714 jl 0f
715 la %r14,__LC_ASYNC_ENTER_TIMER
7160: clc 0(8,%r14),__LC_EXIT_TIMER
717 jl 0f
718 la %r14,__LC_EXIT_TIMER
7190: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
720 jl 0f
721 la %r14,__LC_LAST_UPDATE_TIMER
7220: spt 0(%r14)
723 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
7241:
1da177e4 725#endif
63b12246 726 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
77fa2245
HC		 727 jno mcck_int_main # no -> skip cleanup critical
728 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
729 jnz mcck_int_main # from user -> load kernel stack
730 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
731 jhe mcck_int_main
732 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
733 jl mcck_int_main
734 brasl %r14,cleanup_critical
735mcck_int_main:
736 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
737 slgr %r14,%r15
738 srag %r14,%r14,PAGE_SHIFT
739 jz 0f
740 lg %r15,__LC_PANIC_STACK # load panic stack
7410: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
ae6aa2ea
MS		 742#ifdef CONFIG_VIRT_CPU_ACCOUNTING
743 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
744 jno mcck_no_vtime # no -> no timer update
63b12246 745 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
ae6aa2ea
MS		 746 jz mcck_no_vtime
747 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
748 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
749 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
750mcck_no_vtime:
751#endif
77fa2245
HC		 752 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
753 la %r2,SP_PTREGS(%r15) # load pt_regs
754 brasl %r14,s390_do_machine_check
755 tm SP_PSW+1(%r15),0x01 # returning to user ?
756 jno mcck_return
757 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
758 aghi %r1,-SP_SIZE
759 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
760 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
761 lgr %r15,%r1
762 stosm __SF_EMPTY(%r15),0x04 # turn dat on
763 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
764 jno mcck_return
1f194a4c 765 TRACE_IRQS_OFF
77fa2245 766 brasl %r14,s390_handle_mcck
1f194a4c 767 TRACE_IRQS_ON
1da177e4 768mcck_return:
63b12246
MS		 769 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
770 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
771 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
772#ifdef CONFIG_VIRT_CPU_ACCOUNTING
773 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
774 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
775 jno 0f
776 stpt __LC_EXIT_TIMER
7770:
778#endif
779 lpswe __LC_RETURN_MCCK_PSW # back to caller
1da177e4
LT		 780
781#ifdef CONFIG_SMP
782/*
783 * Restart interruption handler, kick starter for additional CPUs
784 */
785 .globl restart_int_handler
786restart_int_handler:
787 lg %r15,__LC_SAVE_AREA+120 # load ksp
788 lghi %r10,__LC_CREGS_SAVE_AREA
789 lctlg %c0,%c15,0(%r10) # get new ctl regs
790 lghi %r10,__LC_AREGS_SAVE_AREA
791 lam %a0,%a15,0(%r10)
792 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
793 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
794 jg start_secondary
795#else
796/*
797 * If we do not run with SMP enabled, let the new CPU crash ...
798 */
799 .globl restart_int_handler
800restart_int_handler:
801 basr %r1,0
802restart_base:
803 lpswe restart_crash-restart_base(%r1)
804 .align 8
805restart_crash:
806 .long 0x000a0000,0x00000000,0x00000000,0x00000000
807restart_go:
808#endif
809
810#ifdef CONFIG_CHECK_STACK
811/*
812 * The synchronous or the asynchronous stack overflowed. We are dead.
813 * No need to properly save the registers, we are going to panic anyway.
814 * Setup a pt_regs so that show_trace can provide a good call trace.
815 */
816stack_overflow:
817 lg %r15,__LC_PANIC_STACK # change to panic stack
818 aghi %r1,-SP_SIZE
819 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
820 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
821 la %r1,__LC_SAVE_AREA
822 chi %r12,__LC_SVC_OLD_PSW
823 je 0f
824 chi %r12,__LC_PGM_OLD_PSW
825 je 0f
826 la %r1,__LC_SAVE_AREA+16
8270: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
828 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
829 la %r2,SP_PTREGS(%r15) # load pt_regs
830 jg kernel_stack_overflow
831#endif
832
833cleanup_table_system_call:
834 .quad system_call, sysc_do_svc
835cleanup_table_sysc_return:
836 .quad sysc_return, sysc_leave
837cleanup_table_sysc_leave:
838 .quad sysc_leave, sysc_work_loop
839cleanup_table_sysc_work_loop:
840 .quad sysc_work_loop, sysc_reschedule
63b12246
MS		 841cleanup_table_io_return:
842 .quad io_return, io_leave
ae6aa2ea
MS		 843cleanup_table_io_leave:
844 .quad io_leave, io_done
845cleanup_table_io_work_loop:
846 .quad io_work_loop, io_mcck_pending
1da177e4
LT		 847
848cleanup_critical:
849 clc 8(8,%r12),BASED(cleanup_table_system_call)
850 jl 0f
851 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
852 jl cleanup_system_call
8530:
854 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
855 jl 0f
856 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
857 jl cleanup_sysc_return
8580:
859 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
860 jl 0f
861 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
862 jl cleanup_sysc_leave
8630:
864 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
865 jl 0f
866 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
77fa2245 867 jl cleanup_sysc_return
63b12246
MS		 8680:
869 clc 8(8,%r12),BASED(cleanup_table_io_return)
870 jl 0f
871 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
872 jl cleanup_io_return
ae6aa2ea
MS		 8730:
874 clc 8(8,%r12),BASED(cleanup_table_io_leave)
875 jl 0f
876 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
877 jl cleanup_io_leave
8780:
879 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
880 jl 0f
881 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
882 jl cleanup_io_return
1da177e4
LT		 8830:
884 br %r14
885
886cleanup_system_call:
887 mvc __LC_RETURN_PSW(16),0(%r12)
ae6aa2ea
MS		 888 cghi %r12,__LC_MCK_OLD_PSW
889 je 0f
890 la %r12,__LC_SAVE_AREA+32
891 j 1f
8920: la %r12,__LC_SAVE_AREA+64
8931:
1da177e4
LT		 894#ifdef CONFIG_VIRT_CPU_ACCOUNTING
895 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
896 jh 0f
897 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
8980: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
899 jhe cleanup_vtime
900#endif
901 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
902 jh 0f
ae6aa2ea
MS		 903 mvc __LC_SAVE_AREA(32),0(%r12)
9040: stg %r13,8(%r12)
905 stg %r12,__LC_SAVE_AREA+96 # argh
63b12246 906 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 907 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
ae6aa2ea
MS		 908 lg %r12,__LC_SAVE_AREA+96 # argh
909 stg %r15,24(%r12)
1da177e4
LT		 910 llgh %r7,__LC_SVC_INT_CODE
911#ifdef CONFIG_VIRT_CPU_ACCOUNTING
912cleanup_vtime:
913 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
914 jhe cleanup_stime
915 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
916 jz cleanup_novtime
917 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
918cleanup_stime:
919 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
920 jh cleanup_update
921 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
922cleanup_update:
923 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
924cleanup_novtime:
925#endif
926 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
927 la %r12,__LC_RETURN_PSW
928 br %r14
929cleanup_system_call_insn:
930 .quad sysc_saveall
931#ifdef CONFIG_VIRT_CPU_ACCOUNTING
932 .quad system_call
933 .quad sysc_vtime
934 .quad sysc_stime
935 .quad sysc_update
936#endif
937
938cleanup_sysc_return:
939 mvc __LC_RETURN_PSW(8),0(%r12)
940 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
941 la %r12,__LC_RETURN_PSW
942 br %r14
943
944cleanup_sysc_leave:
945 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
ae6aa2ea 946 je 2f
1da177e4
LT		 947#ifdef CONFIG_VIRT_CPU_ACCOUNTING
948 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
949 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
ae6aa2ea 950 je 2f
1da177e4
LT		 951#endif
952 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
ae6aa2ea
MS		 953 cghi %r12,__LC_MCK_OLD_PSW
954 jne 0f
955 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
956 j 1f
9570: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9581: lmg %r0,%r11,SP_R0(%r15)
1da177e4 959 lg %r15,SP_R15(%r15)
ae6aa2ea 9602: la %r12,__LC_RETURN_PSW
1da177e4
LT		 961 br %r14
962cleanup_sysc_leave_insn:
963#ifdef CONFIG_VIRT_CPU_ACCOUNTING
964 .quad sysc_leave + 16
965#endif
966 .quad sysc_leave + 12
967
ae6aa2ea
MS		 968cleanup_io_return:
969 mvc __LC_RETURN_PSW(8),0(%r12)
970 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
971 la %r12,__LC_RETURN_PSW
972 br %r14
973
974cleanup_io_leave:
975 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
976 je 2f
977#ifdef CONFIG_VIRT_CPU_ACCOUNTING
978 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
979 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
980 je 2f
981#endif
982 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
983 cghi %r12,__LC_MCK_OLD_PSW
984 jne 0f
985 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
986 j 1f
9870: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9881: lmg %r0,%r11,SP_R0(%r15)
989 lg %r15,SP_R15(%r15)
9902: la %r12,__LC_RETURN_PSW
991 br %r14
992cleanup_io_leave_insn:
993#ifdef CONFIG_VIRT_CPU_ACCOUNTING
994 .quad io_leave + 20
995#endif
996 .quad io_leave + 16
997
1da177e4
LT		 998/*
999 * Integer constants
1000 */
1001 .align 4
1002.Lconst:
1003.Lc_pactive: .long PREEMPT_ACTIVE
1004.Lnr_syscalls: .long NR_syscalls
1005.L0x0130: .short 0x130
1006.L0x0140: .short 0x140
1007.L0x0150: .short 0x150
1008.L0x0160: .short 0x160
1009.L0x0170: .short 0x170
1010.Lcritical_start:
1011 .quad __critical_start
1012.Lcritical_end:
1013 .quad __critical_end
1014
d882b172 1015 .section .rodata, "a"
1da177e4 1016#define SYSCALL(esa,esame,emu) .long esame
1da177e4
LT		 1017sys_call_table:
1018#include "syscalls.S"
1019#undef SYSCALL
1020
347a8dc3 1021#ifdef CONFIG_COMPAT
1da177e4
LT		 1022
1023#define SYSCALL(esa,esame,emu) .long emu
1da177e4
LT		 1024sys_call_table_emu:
1025#include "syscalls.S"
1026#undef SYSCALL
1027#endif
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