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[PATCH] s390: fix invalid return code in sclp_cpi
[mirror_ubuntu-zesty-kernel.git] / arch / s390 / kernel / entry64.S
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1da177e4
LT		 1/*
2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
4 *
5 * S390 version
6 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
7 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Hartmut Penner (hp@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
77fa2245 10 * Heiko Carstens <heiko.carstens@de.ibm.com>
1da177e4
LT		 11 */
12
13#include <linux/sys.h>
14#include <linux/linkage.h>
15#include <linux/config.h>
16#include <asm/cache.h>
17#include <asm/lowcore.h>
18#include <asm/errno.h>
19#include <asm/ptrace.h>
20#include <asm/thread_info.h>
0013a854 21#include <asm/asm-offsets.h>
1da177e4
LT		 22#include <asm/unistd.h>
23#include <asm/page.h>
24
25/*
26 * Stack layout for the system_call stack entry.
27 * The first few entries are identical to the user_regs_struct.
28 */
29SP_PTREGS = STACK_FRAME_OVERHEAD
30SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
31SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
32SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
33SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
34SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
36SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
37SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
38SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
39SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
40SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
41SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
42SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
43SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
44SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
45SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
46SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
47SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
48SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
49SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
50SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
51SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52
53STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
54STACK_SIZE = 1 << STACK_SHIFT
55
77fa2245 56_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING | \
1da177e4 57 _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
77fa2245 58_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)
1da177e4
LT		 59
60#define BASED(name) name-system_call(%r13)
61
62 .macro STORE_TIMER lc_offset
63#ifdef CONFIG_VIRT_CPU_ACCOUNTING
64 stpt \lc_offset
65#endif
66 .endm
67
68#ifdef CONFIG_VIRT_CPU_ACCOUNTING
69 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
70 lg %r10,\lc_from
71 slg %r10,\lc_to
72 alg %r10,\lc_sum
73 stg %r10,\lc_sum
74 .endm
75#endif
76
77/*
78 * Register usage in interrupt handlers:
79 * R9 - pointer to current task structure
80 * R13 - pointer to literal pool
81 * R14 - return register for function calls
82 * R15 - kernel stack pointer
83 */
84
85 .macro SAVE_ALL_BASE savearea
86 stmg %r12,%r15,\savearea
87 larl %r13,system_call
88 .endm
89
90 .macro SAVE_ALL psworg,savearea,sync
91 la %r12,\psworg
92 .if \sync
93 tm \psworg+1,0x01 # test problem state bit
94 jz 2f # skip stack setup save
95 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
96 .else
97 tm \psworg+1,0x01 # test problem state bit
98 jnz 1f # from user -> load kernel stack
99 clc \psworg+8(8),BASED(.Lcritical_end)
100 jhe 0f
101 clc \psworg+8(8),BASED(.Lcritical_start)
102 jl 0f
103 brasl %r14,cleanup_critical
6add9f7f 104 tm 1(%r12),0x01 # retest problem state after cleanup
1da177e4
LT		 105 jnz 1f
1060: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
107 slgr %r14,%r15
108 srag %r14,%r14,STACK_SHIFT
109 jz 2f
1101: lg %r15,__LC_ASYNC_STACK # load async stack
111 .endif
112#ifdef CONFIG_CHECK_STACK
113 j 3f
1142: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
115 jz stack_overflow
1163:
117#endif
77fa2245
HC		 1182:
119 .endm
120
121 .macro CREATE_STACK_FRAME psworg,savearea
122 aghi %r15,-SP_SIZE # make room for registers & psw
1da177e4
LT		 123 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
124 la %r12,\psworg
125 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
126 icm %r12,12,__LC_SVC_ILC
127 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
128 st %r12,SP_ILC(%r15)
129 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
130 la %r12,0
131 stg %r12,__SF_BACKCHAIN(%r15)
132 .endm
133
ae6aa2ea
MS		 134 .macro RESTORE_ALL psworg,sync
135 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
1da177e4 136 .if !\sync
ae6aa2ea 137 ni \psworg+1,0xfd # clear wait state bit
1da177e4
LT		 138 .endif
139 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
140 STORE_TIMER __LC_EXIT_TIMER
ae6aa2ea 141 lpswe \psworg # back to caller
1da177e4
LT		 142 .endm
143
144/*
145 * Scheduler resume function, called by switch_to
146 * gpr2 = (task_struct *) prev
147 * gpr3 = (task_struct *) next
148 * Returns:
149 * gpr2 = prev
150 */
151 .globl __switch_to
152__switch_to:
153 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
154 jz __switch_to_noper # if not we're fine
155 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
156 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
157 je __switch_to_noper # we got away without bashing TLB's
158 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
159__switch_to_noper:
77fa2245
HC		 160 lg %r4,__THREAD_info(%r2) # get thread_info of prev
161 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
162 jz __switch_to_no_mcck
163 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
164 lg %r4,__THREAD_info(%r3) # get thread_info of next
165 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
166__switch_to_no_mcck:
1da177e4
LT		 167 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
168 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
169 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
170 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
171 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
172 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
173 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
174 stg %r3,__LC_THREAD_INFO
175 aghi %r3,STACK_SIZE
176 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
177 br %r14
178
179__critical_start:
180/*
181 * SVC interrupt handler routine. System calls are synchronous events and
182 * are executed with interrupts enabled.
183 */
184
185 .globl system_call
186system_call:
187 STORE_TIMER __LC_SYNC_ENTER_TIMER
188sysc_saveall:
189 SAVE_ALL_BASE __LC_SAVE_AREA
190 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 191 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 192 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
193#ifdef CONFIG_VIRT_CPU_ACCOUNTING
194sysc_vtime:
195 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
196 jz sysc_do_svc
197 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
198sysc_stime:
199 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
200sysc_update:
201 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
202#endif
203sysc_do_svc:
204 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
205 slag %r7,%r7,2 # *4 and test for svc 0
206 jnz sysc_nr_ok
207 # svc 0: system call number in %r1
208 cl %r1,BASED(.Lnr_syscalls)
209 jnl sysc_nr_ok
210 lgfr %r7,%r1 # clear high word in r1
211 slag %r7,%r7,2 # svc 0: system call number in %r1
212sysc_nr_ok:
213 mvc SP_ARGS(8,%r15),SP_R7(%r15)
214sysc_do_restart:
215 larl %r10,sys_call_table
216#ifdef CONFIG_S390_SUPPORT
c563077e
HC		 217 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
218 jno sysc_noemu
1da177e4
LT		 219 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
220sysc_noemu:
221#endif
222 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
223 lgf %r8,0(%r7,%r10) # load address of system call routine
224 jnz sysc_tracesys
225 basr %r14,%r8 # call sys_xxxx
226 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
227 # ATTENTION: check sys_execve_glue before
228 # changing anything here !!
229
230sysc_return:
231 tm SP_PSW+1(%r15),0x01 # returning to user ?
232 jno sysc_leave
233 tm __TI_flags+7(%r9),_TIF_WORK_SVC
234 jnz sysc_work # there is work to do (signals etc.)
235sysc_leave:
ae6aa2ea 236 RESTORE_ALL __LC_RETURN_PSW,1
1da177e4
LT		 237
238#
239# recheck if there is more work to do
240#
241sysc_work_loop:
242 tm __TI_flags+7(%r9),_TIF_WORK_SVC
243 jz sysc_leave # there is no work to do
244#
245# One of the work bits is on. Find out which one.
246#
247sysc_work:
77fa2245
HC		 248 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
249 jo sysc_mcck_pending
1da177e4
LT		 250 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
251 jo sysc_reschedule
252 tm __TI_flags+7(%r9),_TIF_SIGPENDING
253 jo sysc_sigpending
254 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
255 jo sysc_restart
256 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
257 jo sysc_singlestep
258 j sysc_leave
259
260#
261# _TIF_NEED_RESCHED is set, call schedule
262#
263sysc_reschedule:
264 larl %r14,sysc_work_loop
265 jg schedule # return point is sysc_return
266
77fa2245
HC		 267#
268# _TIF_MCCK_PENDING is set, call handler
269#
270sysc_mcck_pending:
271 larl %r14,sysc_work_loop
272 jg s390_handle_mcck # TIF bit will be cleared by handler
273
1da177e4
LT		 274#
275# _TIF_SIGPENDING is set, call do_signal
276#
277sysc_sigpending:
278 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
279 la %r2,SP_PTREGS(%r15) # load pt_regs
280 sgr %r3,%r3 # clear *oldset
281 brasl %r14,do_signal # call do_signal
282 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
283 jo sysc_restart
284 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
285 jo sysc_singlestep
e1c3ad96 286 j sysc_work_loop
1da177e4
LT		 287
288#
289# _TIF_RESTART_SVC is set, set up registers and restart svc
290#
291sysc_restart:
292 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
293 lg %r7,SP_R2(%r15) # load new svc number
294 slag %r7,%r7,2 # *4
295 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
296 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
297 j sysc_do_restart # restart svc
298
299#
300# _TIF_SINGLE_STEP is set, call do_single_step
301#
302sysc_singlestep:
303 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
304 lhi %r0,__LC_PGM_OLD_PSW
305 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
306 la %r2,SP_PTREGS(%r15) # address of register-save area
307 larl %r14,sysc_return # load adr. of system return
308 jg do_single_step # branch to do_sigtrap
309
310
1da177e4
LT		 311#
312# call syscall_trace before and after system call
313# special linkage: %r12 contains the return address for trace_svc
314#
315sysc_tracesys:
316 la %r2,SP_PTREGS(%r15) # load pt_regs
317 la %r3,0
318 srl %r7,2
319 stg %r7,SP_R2(%r15)
320 brasl %r14,syscall_trace
321 lghi %r0,NR_syscalls
322 clg %r0,SP_R2(%r15)
323 jnh sysc_tracenogo
324 lg %r7,SP_R2(%r15) # strace might have changed the
325 sll %r7,2 # system call
326 lgf %r8,0(%r7,%r10)
327sysc_tracego:
328 lmg %r3,%r6,SP_R3(%r15)
329 lg %r2,SP_ORIG_R2(%r15)
330 basr %r14,%r8 # call sys_xxx
331 stg %r2,SP_R2(%r15) # store return value
332sysc_tracenogo:
333 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
334 jz sysc_return
335 la %r2,SP_PTREGS(%r15) # load pt_regs
336 la %r3,1
337 larl %r14,sysc_return # return point is sysc_return
338 jg syscall_trace
339
340#
341# a new process exits the kernel with ret_from_fork
342#
343 .globl ret_from_fork
344ret_from_fork:
345 lg %r13,__LC_SVC_NEW_PSW+8
346 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
347 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
348 jo 0f
349 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
3500: brasl %r14,schedule_tail
351 stosm 24(%r15),0x03 # reenable interrupts
352 j sysc_return
353
354#
355# clone, fork, vfork, exec and sigreturn need glue,
356# because they all expect pt_regs as parameter,
357# but are called with different parameter.
358# return-address is set up above
359#
360sys_clone_glue:
361 la %r2,SP_PTREGS(%r15) # load pt_regs
362 jg sys_clone # branch to sys_clone
363
364#ifdef CONFIG_S390_SUPPORT
365sys32_clone_glue:
366 la %r2,SP_PTREGS(%r15) # load pt_regs
367 jg sys32_clone # branch to sys32_clone
368#endif
369
370sys_fork_glue:
371 la %r2,SP_PTREGS(%r15) # load pt_regs
372 jg sys_fork # branch to sys_fork
373
374sys_vfork_glue:
375 la %r2,SP_PTREGS(%r15) # load pt_regs
376 jg sys_vfork # branch to sys_vfork
377
378sys_execve_glue:
379 la %r2,SP_PTREGS(%r15) # load pt_regs
380 lgr %r12,%r14 # save return address
381 brasl %r14,sys_execve # call sys_execve
382 ltgr %r2,%r2 # check if execve failed
383 bnz 0(%r12) # it did fail -> store result in gpr2
384 b 6(%r12) # SKIP STG 2,SP_R2(15) in
385 # system_call/sysc_tracesys
386#ifdef CONFIG_S390_SUPPORT
387sys32_execve_glue:
388 la %r2,SP_PTREGS(%r15) # load pt_regs
389 lgr %r12,%r14 # save return address
390 brasl %r14,sys32_execve # call sys32_execve
391 ltgr %r2,%r2 # check if execve failed
392 bnz 0(%r12) # it did fail -> store result in gpr2
393 b 6(%r12) # SKIP STG 2,SP_R2(15) in
394 # system_call/sysc_tracesys
395#endif
396
397sys_sigreturn_glue:
398 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
399 jg sys_sigreturn # branch to sys_sigreturn
400
401#ifdef CONFIG_S390_SUPPORT
402sys32_sigreturn_glue:
403 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
404 jg sys32_sigreturn # branch to sys32_sigreturn
405#endif
406
407sys_rt_sigreturn_glue:
408 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
409 jg sys_rt_sigreturn # branch to sys_sigreturn
410
411#ifdef CONFIG_S390_SUPPORT
412sys32_rt_sigreturn_glue:
413 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
414 jg sys32_rt_sigreturn # branch to sys32_sigreturn
415#endif
416
417#
418# sigsuspend and rt_sigsuspend need pt_regs as an additional
419# parameter and they have to skip the store of %r2 into the
420# user register %r2 because the return value was set in
421# sigsuspend and rt_sigsuspend already and must not be overwritten!
422#
423
424sys_sigsuspend_glue:
425 lgr %r5,%r4 # move mask back
426 lgr %r4,%r3 # move history1 parameter
427 lgr %r3,%r2 # move history0 parameter
428 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
429 la %r14,6(%r14) # skip store of return value
430 jg sys_sigsuspend # branch to sys_sigsuspend
431
432#ifdef CONFIG_S390_SUPPORT
433sys32_sigsuspend_glue:
434 llgfr %r4,%r4 # unsigned long
435 lgr %r5,%r4 # move mask back
436 lgfr %r3,%r3 # int
437 lgr %r4,%r3 # move history1 parameter
438 lgfr %r2,%r2 # int
439 lgr %r3,%r2 # move history0 parameter
440 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
441 la %r14,6(%r14) # skip store of return value
442 jg sys32_sigsuspend # branch to sys32_sigsuspend
443#endif
444
445sys_rt_sigsuspend_glue:
446 lgr %r4,%r3 # move sigsetsize parameter
447 lgr %r3,%r2 # move unewset parameter
448 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
449 la %r14,6(%r14) # skip store of return value
450 jg sys_rt_sigsuspend # branch to sys_rt_sigsuspend
451
452#ifdef CONFIG_S390_SUPPORT
453sys32_rt_sigsuspend_glue:
454 llgfr %r3,%r3 # size_t
455 lgr %r4,%r3 # move sigsetsize parameter
456 llgtr %r2,%r2 # sigset_emu31_t *
457 lgr %r3,%r2 # move unewset parameter
458 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
459 la %r14,6(%r14) # skip store of return value
460 jg sys32_rt_sigsuspend # branch to sys32_rt_sigsuspend
461#endif
462
463sys_sigaltstack_glue:
464 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
465 jg sys_sigaltstack # branch to sys_sigreturn
466
467#ifdef CONFIG_S390_SUPPORT
468sys32_sigaltstack_glue:
469 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
470 jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
471#endif
472
473/*
474 * Program check handler routine
475 */
476
477 .globl pgm_check_handler
478pgm_check_handler:
479/*
480 * First we need to check for a special case:
481 * Single stepping an instruction that disables the PER event mask will
482 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
483 * For a single stepped SVC the program check handler gets control after
484 * the SVC new PSW has been loaded. But we want to execute the SVC first and
485 * then handle the PER event. Therefore we update the SVC old PSW to point
486 * to the pgm_check_handler and branch to the SVC handler after we checked
487 * if we have to load the kernel stack register.
488 * For every other possible cause for PER event without the PER mask set
489 * we just ignore the PER event (FIXME: is there anything we have to do
490 * for LPSW?).
491 */
492 STORE_TIMER __LC_SYNC_ENTER_TIMER
493 SAVE_ALL_BASE __LC_SAVE_AREA
494 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
495 jnz pgm_per # got per exception -> special case
496 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 497 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 498#ifdef CONFIG_VIRT_CPU_ACCOUNTING
499 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
500 jz pgm_no_vtime
501 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
502 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
503 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
504pgm_no_vtime:
505#endif
506 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
507 lgf %r3,__LC_PGM_ILC # load program interruption code
508 lghi %r8,0x7f
509 ngr %r8,%r3
510pgm_do_call:
511 sll %r8,3
512 larl %r1,pgm_check_table
513 lg %r1,0(%r8,%r1) # load address of handler routine
514 la %r2,SP_PTREGS(%r15) # address of register-save area
515 larl %r14,sysc_return
516 br %r1 # branch to interrupt-handler
517
518#
519# handle per exception
520#
521pgm_per:
522 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
523 jnz pgm_per_std # ok, normal per event from user space
524# ok its one of the special cases, now we need to find out which one
525 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
526 je pgm_svcper
527# no interesting special case, ignore PER event
528 lmg %r12,%r15,__LC_SAVE_AREA
529 lpswe __LC_PGM_OLD_PSW
530
531#
532# Normal per exception
533#
534pgm_per_std:
535 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 536 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 537#ifdef CONFIG_VIRT_CPU_ACCOUNTING
538 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
539 jz pgm_no_vtime2
540 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
541 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
542 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
543pgm_no_vtime2:
544#endif
545 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
546 lg %r1,__TI_task(%r9)
547 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
548 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
549 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
550 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
551 lgf %r3,__LC_PGM_ILC # load program interruption code
552 lghi %r8,0x7f
553 ngr %r8,%r3 # clear per-event-bit and ilc
554 je sysc_return
555 j pgm_do_call
556
557#
558# it was a single stepped SVC that is causing all the trouble
559#
560pgm_svcper:
561 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 562 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 563#ifdef CONFIG_VIRT_CPU_ACCOUNTING
564 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
565 jz pgm_no_vtime3
566 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
567 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
568 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
569pgm_no_vtime3:
570#endif
571 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
572 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
573 lg %r1,__TI_task(%r9)
574 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
575 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
576 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
577 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
578 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
579 j sysc_do_svc
580
581/*
582 * IO interrupt handler routine
583 */
584 .globl io_int_handler
585io_int_handler:
586 STORE_TIMER __LC_ASYNC_ENTER_TIMER
587 stck __LC_INT_CLOCK
588 SAVE_ALL_BASE __LC_SAVE_AREA+32
589 SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+32,0
77fa2245 590 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 591#ifdef CONFIG_VIRT_CPU_ACCOUNTING
592 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
593 jz io_no_vtime
594 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
595 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
596 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
597io_no_vtime:
598#endif
599 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
600 la %r2,SP_PTREGS(%r15) # address of register-save area
601 brasl %r14,do_IRQ # call standard irq handler
602
603io_return:
604 tm SP_PSW+1(%r15),0x01 # returning to user ?
605#ifdef CONFIG_PREEMPT
606 jno io_preempt # no -> check for preemptive scheduling
607#else
608 jno io_leave # no-> skip resched & signal
609#endif
610 tm __TI_flags+7(%r9),_TIF_WORK_INT
611 jnz io_work # there is work to do (signals etc.)
612io_leave:
ae6aa2ea
MS		 613 RESTORE_ALL __LC_RETURN_PSW,0
614io_done:
1da177e4
LT		 615
616#ifdef CONFIG_PREEMPT
617io_preempt:
618 icm %r0,15,__TI_precount(%r9)
619 jnz io_leave
620 # switch to kernel stack
621 lg %r1,SP_R15(%r15)
622 aghi %r1,-SP_SIZE
623 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
624 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
625 lgr %r15,%r1
626io_resume_loop:
627 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
628 jno io_leave
629 larl %r1,.Lc_pactive
630 mvc __TI_precount(4,%r9),0(%r1)
631 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
632 brasl %r14,schedule # call schedule
633 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
634 xc __TI_precount(4,%r9),__TI_precount(%r9)
635 j io_resume_loop
636#endif
637
638#
639# switch to kernel stack, then check TIF bits
640#
641io_work:
642 lg %r1,__LC_KERNEL_STACK
643 aghi %r1,-SP_SIZE
644 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
645 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
646 lgr %r15,%r1
647#
648# One of the work bits is on. Find out which one.
77fa2245 649# Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED and _TIF_MCCK_PENDING
1da177e4
LT		 650#
651io_work_loop:
77fa2245
HC		 652 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
653 jo io_mcck_pending
1da177e4
LT		 654 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
655 jo io_reschedule
656 tm __TI_flags+7(%r9),_TIF_SIGPENDING
657 jo io_sigpending
658 j io_leave
659
77fa2245
HC		 660#
661# _TIF_MCCK_PENDING is set, call handler
662#
663io_mcck_pending:
664 larl %r14,io_work_loop
665 jg s390_handle_mcck # TIF bit will be cleared by handler
666
1da177e4
LT		 667#
668# _TIF_NEED_RESCHED is set, call schedule
669#
670io_reschedule:
671 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
672 brasl %r14,schedule # call scheduler
673 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
674 tm __TI_flags+7(%r9),_TIF_WORK_INT
675 jz io_leave # there is no work to do
676 j io_work_loop
677
678#
679# _TIF_SIGPENDING is set, call do_signal
680#
681io_sigpending:
682 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
683 la %r2,SP_PTREGS(%r15) # load pt_regs
684 slgr %r3,%r3 # clear *oldset
685 brasl %r14,do_signal # call do_signal
686 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
e1c3ad96 687 j io_work_loop
1da177e4
LT		 688
689/*
690 * External interrupt handler routine
691 */
692 .globl ext_int_handler
693ext_int_handler:
694 STORE_TIMER __LC_ASYNC_ENTER_TIMER
695 stck __LC_INT_CLOCK
696 SAVE_ALL_BASE __LC_SAVE_AREA+32
697 SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32,0
77fa2245 698 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 699#ifdef CONFIG_VIRT_CPU_ACCOUNTING
700 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
701 jz ext_no_vtime
702 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
703 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
704 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
705ext_no_vtime:
706#endif
707 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
708 la %r2,SP_PTREGS(%r15) # address of register-save area
709 llgh %r3,__LC_EXT_INT_CODE # get interruption code
710 brasl %r14,do_extint
711 j io_return
712
ae6aa2ea
MS		 713__critical_end:
714
1da177e4
LT		 715/*
716 * Machine check handler routines
717 */
718 .globl mcck_int_handler
719mcck_int_handler:
77fa2245
HC		 720 la %r1,4095 # revalidate r1
721 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
ae6aa2ea 722 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r1)
77fa2245 723 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
1da177e4 724 SAVE_ALL_BASE __LC_SAVE_AREA+64
77fa2245
HC		 725 la %r12,__LC_MCK_OLD_PSW
726 tm __LC_MCCK_CODE,0x80 # system damage?
727 jo mcck_int_main # yes -> rest of mcck code invalid
728 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
729 jo 0f
730 spt __LC_LAST_UPDATE_TIMER
1da177e4 731#ifdef CONFIG_VIRT_CPU_ACCOUNTING
8ffa7405
HC		 732 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
733 mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
734 mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER
1da177e4 735#endif
ae6aa2ea 7360: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
77fa2245
HC		 737 jno mcck_int_main # no -> skip cleanup critical
738 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
739 jnz mcck_int_main # from user -> load kernel stack
740 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
741 jhe mcck_int_main
742 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
743 jl mcck_int_main
744 brasl %r14,cleanup_critical
745mcck_int_main:
746 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
747 slgr %r14,%r15
748 srag %r14,%r14,PAGE_SHIFT
749 jz 0f
750 lg %r15,__LC_PANIC_STACK # load panic stack
7510: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
ae6aa2ea
MS		 752#ifdef CONFIG_VIRT_CPU_ACCOUNTING
753 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
754 jno mcck_no_vtime # no -> no timer update
755 tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ?
756 jz mcck_no_vtime
757 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
758 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
759 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
760mcck_no_vtime:
761#endif
77fa2245
HC		 762 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
763 la %r2,SP_PTREGS(%r15) # load pt_regs
764 brasl %r14,s390_do_machine_check
765 tm SP_PSW+1(%r15),0x01 # returning to user ?
766 jno mcck_return
767 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
768 aghi %r1,-SP_SIZE
769 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
770 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
771 lgr %r15,%r1
772 stosm __SF_EMPTY(%r15),0x04 # turn dat on
773 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
774 jno mcck_return
775 brasl %r14,s390_handle_mcck
1da177e4 776mcck_return:
ae6aa2ea 777 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
1da177e4
LT		 778
779#ifdef CONFIG_SMP
780/*
781 * Restart interruption handler, kick starter for additional CPUs
782 */
783 .globl restart_int_handler
784restart_int_handler:
785 lg %r15,__LC_SAVE_AREA+120 # load ksp
786 lghi %r10,__LC_CREGS_SAVE_AREA
787 lctlg %c0,%c15,0(%r10) # get new ctl regs
788 lghi %r10,__LC_AREGS_SAVE_AREA
789 lam %a0,%a15,0(%r10)
790 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
791 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
792 jg start_secondary
793#else
794/*
795 * If we do not run with SMP enabled, let the new CPU crash ...
796 */
797 .globl restart_int_handler
798restart_int_handler:
799 basr %r1,0
800restart_base:
801 lpswe restart_crash-restart_base(%r1)
802 .align 8
803restart_crash:
804 .long 0x000a0000,0x00000000,0x00000000,0x00000000
805restart_go:
806#endif
807
808#ifdef CONFIG_CHECK_STACK
809/*
810 * The synchronous or the asynchronous stack overflowed. We are dead.
811 * No need to properly save the registers, we are going to panic anyway.
812 * Setup a pt_regs so that show_trace can provide a good call trace.
813 */
814stack_overflow:
815 lg %r15,__LC_PANIC_STACK # change to panic stack
816 aghi %r1,-SP_SIZE
817 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
818 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
819 la %r1,__LC_SAVE_AREA
820 chi %r12,__LC_SVC_OLD_PSW
821 je 0f
822 chi %r12,__LC_PGM_OLD_PSW
823 je 0f
824 la %r1,__LC_SAVE_AREA+16
8250: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
826 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
827 la %r2,SP_PTREGS(%r15) # load pt_regs
828 jg kernel_stack_overflow
829#endif
830
831cleanup_table_system_call:
832 .quad system_call, sysc_do_svc
833cleanup_table_sysc_return:
834 .quad sysc_return, sysc_leave
835cleanup_table_sysc_leave:
836 .quad sysc_leave, sysc_work_loop
837cleanup_table_sysc_work_loop:
838 .quad sysc_work_loop, sysc_reschedule
ae6aa2ea
MS		 839cleanup_table_io_leave:
840 .quad io_leave, io_done
841cleanup_table_io_work_loop:
842 .quad io_work_loop, io_mcck_pending
1da177e4
LT		 843
844cleanup_critical:
845 clc 8(8,%r12),BASED(cleanup_table_system_call)
846 jl 0f
847 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
848 jl cleanup_system_call
8490:
850 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
851 jl 0f
852 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
853 jl cleanup_sysc_return
8540:
855 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
856 jl 0f
857 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
858 jl cleanup_sysc_leave
8590:
860 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
861 jl 0f
862 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
77fa2245 863 jl cleanup_sysc_return
ae6aa2ea
MS		 8640:
865 clc 8(8,%r12),BASED(cleanup_table_io_leave)
866 jl 0f
867 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
868 jl cleanup_io_leave
8690:
870 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
871 jl 0f
872 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
873 jl cleanup_io_return
1da177e4
LT		 8740:
875 br %r14
876
877cleanup_system_call:
878 mvc __LC_RETURN_PSW(16),0(%r12)
ae6aa2ea
MS		 879 cghi %r12,__LC_MCK_OLD_PSW
880 je 0f
881 la %r12,__LC_SAVE_AREA+32
882 j 1f
8830: la %r12,__LC_SAVE_AREA+64
8841:
1da177e4
LT		 885#ifdef CONFIG_VIRT_CPU_ACCOUNTING
886 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
887 jh 0f
888 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
8890: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
890 jhe cleanup_vtime
891#endif
892 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
893 jh 0f
ae6aa2ea
MS		 894 mvc __LC_SAVE_AREA(32),0(%r12)
8950: stg %r13,8(%r12)
896 stg %r12,__LC_SAVE_AREA+96 # argh
1da177e4 897 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 898 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
ae6aa2ea
MS		 899 lg %r12,__LC_SAVE_AREA+96 # argh
900 stg %r15,24(%r12)
1da177e4
LT		 901 llgh %r7,__LC_SVC_INT_CODE
902#ifdef CONFIG_VIRT_CPU_ACCOUNTING
903cleanup_vtime:
904 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
905 jhe cleanup_stime
906 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
907 jz cleanup_novtime
908 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
909cleanup_stime:
910 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
911 jh cleanup_update
912 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
913cleanup_update:
914 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
915cleanup_novtime:
916#endif
917 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
918 la %r12,__LC_RETURN_PSW
919 br %r14
920cleanup_system_call_insn:
921 .quad sysc_saveall
922#ifdef CONFIG_VIRT_CPU_ACCOUNTING
923 .quad system_call
924 .quad sysc_vtime
925 .quad sysc_stime
926 .quad sysc_update
927#endif
928
929cleanup_sysc_return:
930 mvc __LC_RETURN_PSW(8),0(%r12)
931 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
932 la %r12,__LC_RETURN_PSW
933 br %r14
934
935cleanup_sysc_leave:
936 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
ae6aa2ea 937 je 2f
1da177e4
LT		 938#ifdef CONFIG_VIRT_CPU_ACCOUNTING
939 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
940 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
ae6aa2ea 941 je 2f
1da177e4
LT		 942#endif
943 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
ae6aa2ea
MS		 944 cghi %r12,__LC_MCK_OLD_PSW
945 jne 0f
946 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
947 j 1f
9480: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9491: lmg %r0,%r11,SP_R0(%r15)
1da177e4 950 lg %r15,SP_R15(%r15)
ae6aa2ea 9512: la %r12,__LC_RETURN_PSW
1da177e4
LT		 952 br %r14
953cleanup_sysc_leave_insn:
954#ifdef CONFIG_VIRT_CPU_ACCOUNTING
955 .quad sysc_leave + 16
956#endif
957 .quad sysc_leave + 12
958
ae6aa2ea
MS		 959cleanup_io_return:
960 mvc __LC_RETURN_PSW(8),0(%r12)
961 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
962 la %r12,__LC_RETURN_PSW
963 br %r14
964
965cleanup_io_leave:
966 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
967 je 2f
968#ifdef CONFIG_VIRT_CPU_ACCOUNTING
969 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
970 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
971 je 2f
972#endif
973 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
974 cghi %r12,__LC_MCK_OLD_PSW
975 jne 0f
976 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
977 j 1f
9780: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9791: lmg %r0,%r11,SP_R0(%r15)
980 lg %r15,SP_R15(%r15)
9812: la %r12,__LC_RETURN_PSW
982 br %r14
983cleanup_io_leave_insn:
984#ifdef CONFIG_VIRT_CPU_ACCOUNTING
985 .quad io_leave + 20
986#endif
987 .quad io_leave + 16
988
1da177e4
LT		 989/*
990 * Integer constants
991 */
992 .align 4
993.Lconst:
994.Lc_pactive: .long PREEMPT_ACTIVE
995.Lnr_syscalls: .long NR_syscalls
996.L0x0130: .short 0x130
997.L0x0140: .short 0x140
998.L0x0150: .short 0x150
999.L0x0160: .short 0x160
1000.L0x0170: .short 0x170
1001.Lcritical_start:
1002 .quad __critical_start
1003.Lcritical_end:
1004 .quad __critical_end
1005
1006#define SYSCALL(esa,esame,emu) .long esame
1007 .globl sys_call_table
1008sys_call_table:
1009#include "syscalls.S"
1010#undef SYSCALL
1011
1012#ifdef CONFIG_S390_SUPPORT
1013
1014#define SYSCALL(esa,esame,emu) .long emu
1015 .globl sys_call_table_emu
1016sys_call_table_emu:
1017#include "syscalls.S"
1018#undef SYSCALL
1019#endif
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