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[S390] add __cpuinit to appldata cpu hotplug notifier.
[mirror_ubuntu-zesty-kernel.git] / arch / s390 / kernel / entry64.S
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1da177e4 1/*
54dfe5dd 2 * arch/s390/kernel/entry64.S
1da177e4
LT		 3 * S390 low-level entry points.
4 *
54dfe5dd 5 * Copyright (C) IBM Corp. 1999,2006
1da177e4
LT		 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
77fa2245 9 * Heiko Carstens <heiko.carstens@de.ibm.com>
1da177e4
LT		 10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
14#include <linux/config.h>
15#include <asm/cache.h>
16#include <asm/lowcore.h>
17#include <asm/errno.h>
18#include <asm/ptrace.h>
19#include <asm/thread_info.h>
0013a854 20#include <asm/asm-offsets.h>
1da177e4
LT		 21#include <asm/unistd.h>
22#include <asm/page.h>
23
24/*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
28SP_PTREGS = STACK_FRAME_OVERHEAD
29SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
50SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51
52STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53STACK_SIZE = 1 << STACK_SHIFT
54
54dfe5dd
HC		 55_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
56 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
57_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
58 _TIF_MCCK_PENDING)
1da177e4
LT		 59
60#define BASED(name) name-system_call(%r13)
61
62 .macro STORE_TIMER lc_offset
63#ifdef CONFIG_VIRT_CPU_ACCOUNTING
64 stpt \lc_offset
65#endif
66 .endm
67
68#ifdef CONFIG_VIRT_CPU_ACCOUNTING
69 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
70 lg %r10,\lc_from
71 slg %r10,\lc_to
72 alg %r10,\lc_sum
73 stg %r10,\lc_sum
74 .endm
75#endif
76
77/*
78 * Register usage in interrupt handlers:
79 * R9 - pointer to current task structure
80 * R13 - pointer to literal pool
81 * R14 - return register for function calls
82 * R15 - kernel stack pointer
83 */
84
85 .macro SAVE_ALL_BASE savearea
86 stmg %r12,%r15,\savearea
87 larl %r13,system_call
88 .endm
89
90 .macro SAVE_ALL psworg,savearea,sync
91 la %r12,\psworg
92 .if \sync
93 tm \psworg+1,0x01 # test problem state bit
94 jz 2f # skip stack setup save
95 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
96 .else
97 tm \psworg+1,0x01 # test problem state bit
98 jnz 1f # from user -> load kernel stack
99 clc \psworg+8(8),BASED(.Lcritical_end)
100 jhe 0f
101 clc \psworg+8(8),BASED(.Lcritical_start)
102 jl 0f
103 brasl %r14,cleanup_critical
6add9f7f 104 tm 1(%r12),0x01 # retest problem state after cleanup
1da177e4
LT		 105 jnz 1f
1060: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
107 slgr %r14,%r15
108 srag %r14,%r14,STACK_SHIFT
109 jz 2f
1101: lg %r15,__LC_ASYNC_STACK # load async stack
111 .endif
112#ifdef CONFIG_CHECK_STACK
113 j 3f
1142: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
115 jz stack_overflow
1163:
117#endif
77fa2245
HC		 1182:
119 .endm
120
121 .macro CREATE_STACK_FRAME psworg,savearea
122 aghi %r15,-SP_SIZE # make room for registers & psw
1da177e4
LT		 123 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
124 la %r12,\psworg
125 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
126 icm %r12,12,__LC_SVC_ILC
127 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
128 st %r12,SP_ILC(%r15)
129 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
130 la %r12,0
131 stg %r12,__SF_BACKCHAIN(%r15)
132 .endm
133
ae6aa2ea
MS		 134 .macro RESTORE_ALL psworg,sync
135 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
1da177e4 136 .if !\sync
ae6aa2ea 137 ni \psworg+1,0xfd # clear wait state bit
1da177e4
LT		 138 .endif
139 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
140 STORE_TIMER __LC_EXIT_TIMER
ae6aa2ea 141 lpswe \psworg # back to caller
1da177e4
LT		 142 .endm
143
144/*
145 * Scheduler resume function, called by switch_to
146 * gpr2 = (task_struct *) prev
147 * gpr3 = (task_struct *) next
148 * Returns:
149 * gpr2 = prev
150 */
151 .globl __switch_to
152__switch_to:
153 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
154 jz __switch_to_noper # if not we're fine
155 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
156 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
157 je __switch_to_noper # we got away without bashing TLB's
158 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
159__switch_to_noper:
77fa2245
HC		 160 lg %r4,__THREAD_info(%r2) # get thread_info of prev
161 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
162 jz __switch_to_no_mcck
163 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
164 lg %r4,__THREAD_info(%r3) # get thread_info of next
165 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
166__switch_to_no_mcck:
1da177e4
LT		 167 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
168 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
169 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
170 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
171 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
172 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
173 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
174 stg %r3,__LC_THREAD_INFO
175 aghi %r3,STACK_SIZE
176 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
177 br %r14
178
179__critical_start:
180/*
181 * SVC interrupt handler routine. System calls are synchronous events and
182 * are executed with interrupts enabled.
183 */
184
185 .globl system_call
186system_call:
187 STORE_TIMER __LC_SYNC_ENTER_TIMER
188sysc_saveall:
189 SAVE_ALL_BASE __LC_SAVE_AREA
190 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 191 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 192 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
193#ifdef CONFIG_VIRT_CPU_ACCOUNTING
194sysc_vtime:
195 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
196 jz sysc_do_svc
197 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
198sysc_stime:
199 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
200sysc_update:
201 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
202#endif
203sysc_do_svc:
204 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
205 slag %r7,%r7,2 # *4 and test for svc 0
206 jnz sysc_nr_ok
207 # svc 0: system call number in %r1
208 cl %r1,BASED(.Lnr_syscalls)
209 jnl sysc_nr_ok
210 lgfr %r7,%r1 # clear high word in r1
211 slag %r7,%r7,2 # svc 0: system call number in %r1
212sysc_nr_ok:
213 mvc SP_ARGS(8,%r15),SP_R7(%r15)
214sysc_do_restart:
215 larl %r10,sys_call_table
347a8dc3 216#ifdef CONFIG_COMPAT
c563077e
HC		 217 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
218 jno sysc_noemu
1da177e4
LT		 219 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
220sysc_noemu:
221#endif
222 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
223 lgf %r8,0(%r7,%r10) # load address of system call routine
224 jnz sysc_tracesys
225 basr %r14,%r8 # call sys_xxxx
226 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
227 # ATTENTION: check sys_execve_glue before
228 # changing anything here !!
229
230sysc_return:
231 tm SP_PSW+1(%r15),0x01 # returning to user ?
232 jno sysc_leave
233 tm __TI_flags+7(%r9),_TIF_WORK_SVC
234 jnz sysc_work # there is work to do (signals etc.)
235sysc_leave:
ae6aa2ea 236 RESTORE_ALL __LC_RETURN_PSW,1
1da177e4
LT		 237
238#
239# recheck if there is more work to do
240#
241sysc_work_loop:
242 tm __TI_flags+7(%r9),_TIF_WORK_SVC
243 jz sysc_leave # there is no work to do
244#
245# One of the work bits is on. Find out which one.
246#
247sysc_work:
77fa2245
HC		 248 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
249 jo sysc_mcck_pending
1da177e4
LT		 250 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
251 jo sysc_reschedule
54dfe5dd
HC		 252 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
253 jnz sysc_sigpending
1da177e4
LT		 254 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
255 jo sysc_restart
256 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
257 jo sysc_singlestep
258 j sysc_leave
259
260#
261# _TIF_NEED_RESCHED is set, call schedule
262#
263sysc_reschedule:
264 larl %r14,sysc_work_loop
265 jg schedule # return point is sysc_return
266
77fa2245
HC		 267#
268# _TIF_MCCK_PENDING is set, call handler
269#
270sysc_mcck_pending:
271 larl %r14,sysc_work_loop
272 jg s390_handle_mcck # TIF bit will be cleared by handler
273
1da177e4 274#
54dfe5dd 275# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
1da177e4
LT		 276#
277sysc_sigpending:
278 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
279 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 280 brasl %r14,do_signal # call do_signal
281 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
282 jo sysc_restart
283 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
284 jo sysc_singlestep
e1c3ad96 285 j sysc_work_loop
1da177e4
LT		 286
287#
288# _TIF_RESTART_SVC is set, set up registers and restart svc
289#
290sysc_restart:
291 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
292 lg %r7,SP_R2(%r15) # load new svc number
293 slag %r7,%r7,2 # *4
294 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
295 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
296 j sysc_do_restart # restart svc
297
298#
299# _TIF_SINGLE_STEP is set, call do_single_step
300#
301sysc_singlestep:
302 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
303 lhi %r0,__LC_PGM_OLD_PSW
304 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
305 la %r2,SP_PTREGS(%r15) # address of register-save area
306 larl %r14,sysc_return # load adr. of system return
307 jg do_single_step # branch to do_sigtrap
308
309
1da177e4
LT		 310#
311# call syscall_trace before and after system call
312# special linkage: %r12 contains the return address for trace_svc
313#
314sysc_tracesys:
315 la %r2,SP_PTREGS(%r15) # load pt_regs
316 la %r3,0
317 srl %r7,2
318 stg %r7,SP_R2(%r15)
319 brasl %r14,syscall_trace
320 lghi %r0,NR_syscalls
321 clg %r0,SP_R2(%r15)
322 jnh sysc_tracenogo
323 lg %r7,SP_R2(%r15) # strace might have changed the
324 sll %r7,2 # system call
325 lgf %r8,0(%r7,%r10)
326sysc_tracego:
327 lmg %r3,%r6,SP_R3(%r15)
328 lg %r2,SP_ORIG_R2(%r15)
329 basr %r14,%r8 # call sys_xxx
330 stg %r2,SP_R2(%r15) # store return value
331sysc_tracenogo:
332 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
333 jz sysc_return
334 la %r2,SP_PTREGS(%r15) # load pt_regs
335 la %r3,1
336 larl %r14,sysc_return # return point is sysc_return
337 jg syscall_trace
338
339#
340# a new process exits the kernel with ret_from_fork
341#
342 .globl ret_from_fork
343ret_from_fork:
344 lg %r13,__LC_SVC_NEW_PSW+8
345 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
346 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
347 jo 0f
348 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
3490: brasl %r14,schedule_tail
350 stosm 24(%r15),0x03 # reenable interrupts
351 j sysc_return
352
353#
354# clone, fork, vfork, exec and sigreturn need glue,
355# because they all expect pt_regs as parameter,
356# but are called with different parameter.
357# return-address is set up above
358#
359sys_clone_glue:
360 la %r2,SP_PTREGS(%r15) # load pt_regs
361 jg sys_clone # branch to sys_clone
362
347a8dc3 363#ifdef CONFIG_COMPAT
1da177e4
LT		 364sys32_clone_glue:
365 la %r2,SP_PTREGS(%r15) # load pt_regs
366 jg sys32_clone # branch to sys32_clone
367#endif
368
369sys_fork_glue:
370 la %r2,SP_PTREGS(%r15) # load pt_regs
371 jg sys_fork # branch to sys_fork
372
373sys_vfork_glue:
374 la %r2,SP_PTREGS(%r15) # load pt_regs
375 jg sys_vfork # branch to sys_vfork
376
377sys_execve_glue:
378 la %r2,SP_PTREGS(%r15) # load pt_regs
379 lgr %r12,%r14 # save return address
380 brasl %r14,sys_execve # call sys_execve
381 ltgr %r2,%r2 # check if execve failed
382 bnz 0(%r12) # it did fail -> store result in gpr2
383 b 6(%r12) # SKIP STG 2,SP_R2(15) in
384 # system_call/sysc_tracesys
347a8dc3 385#ifdef CONFIG_COMPAT
1da177e4
LT		 386sys32_execve_glue:
387 la %r2,SP_PTREGS(%r15) # load pt_regs
388 lgr %r12,%r14 # save return address
389 brasl %r14,sys32_execve # call sys32_execve
390 ltgr %r2,%r2 # check if execve failed
391 bnz 0(%r12) # it did fail -> store result in gpr2
392 b 6(%r12) # SKIP STG 2,SP_R2(15) in
393 # system_call/sysc_tracesys
394#endif
395
396sys_sigreturn_glue:
397 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
398 jg sys_sigreturn # branch to sys_sigreturn
399
347a8dc3 400#ifdef CONFIG_COMPAT
1da177e4
LT		 401sys32_sigreturn_glue:
402 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
403 jg sys32_sigreturn # branch to sys32_sigreturn
404#endif
405
406sys_rt_sigreturn_glue:
407 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
408 jg sys_rt_sigreturn # branch to sys_sigreturn
409
347a8dc3 410#ifdef CONFIG_COMPAT
1da177e4
LT		 411sys32_rt_sigreturn_glue:
412 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
413 jg sys32_rt_sigreturn # branch to sys32_sigreturn
414#endif
415
1da177e4
LT		 416sys_sigaltstack_glue:
417 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
418 jg sys_sigaltstack # branch to sys_sigreturn
419
347a8dc3 420#ifdef CONFIG_COMPAT
1da177e4
LT		 421sys32_sigaltstack_glue:
422 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
423 jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
424#endif
425
426/*
427 * Program check handler routine
428 */
429
430 .globl pgm_check_handler
431pgm_check_handler:
432/*
433 * First we need to check for a special case:
434 * Single stepping an instruction that disables the PER event mask will
435 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
436 * For a single stepped SVC the program check handler gets control after
437 * the SVC new PSW has been loaded. But we want to execute the SVC first and
438 * then handle the PER event. Therefore we update the SVC old PSW to point
439 * to the pgm_check_handler and branch to the SVC handler after we checked
440 * if we have to load the kernel stack register.
441 * For every other possible cause for PER event without the PER mask set
442 * we just ignore the PER event (FIXME: is there anything we have to do
443 * for LPSW?).
444 */
445 STORE_TIMER __LC_SYNC_ENTER_TIMER
446 SAVE_ALL_BASE __LC_SAVE_AREA
447 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
448 jnz pgm_per # got per exception -> special case
449 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 450 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 451#ifdef CONFIG_VIRT_CPU_ACCOUNTING
452 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
453 jz pgm_no_vtime
454 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
455 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
456 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
457pgm_no_vtime:
458#endif
459 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
460 lgf %r3,__LC_PGM_ILC # load program interruption code
461 lghi %r8,0x7f
462 ngr %r8,%r3
463pgm_do_call:
464 sll %r8,3
465 larl %r1,pgm_check_table
466 lg %r1,0(%r8,%r1) # load address of handler routine
467 la %r2,SP_PTREGS(%r15) # address of register-save area
468 larl %r14,sysc_return
469 br %r1 # branch to interrupt-handler
470
471#
472# handle per exception
473#
474pgm_per:
475 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
476 jnz pgm_per_std # ok, normal per event from user space
477# ok its one of the special cases, now we need to find out which one
478 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
479 je pgm_svcper
480# no interesting special case, ignore PER event
481 lmg %r12,%r15,__LC_SAVE_AREA
482 lpswe __LC_PGM_OLD_PSW
483
484#
485# Normal per exception
486#
487pgm_per_std:
488 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 489 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 490#ifdef CONFIG_VIRT_CPU_ACCOUNTING
491 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
492 jz pgm_no_vtime2
493 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
494 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
495 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
496pgm_no_vtime2:
497#endif
498 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
499 lg %r1,__TI_task(%r9)
500 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
501 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
502 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
503 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
504 lgf %r3,__LC_PGM_ILC # load program interruption code
505 lghi %r8,0x7f
506 ngr %r8,%r3 # clear per-event-bit and ilc
507 je sysc_return
508 j pgm_do_call
509
510#
511# it was a single stepped SVC that is causing all the trouble
512#
513pgm_svcper:
514 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 515 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 516#ifdef CONFIG_VIRT_CPU_ACCOUNTING
517 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
518 jz pgm_no_vtime3
519 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
520 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
521 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
522pgm_no_vtime3:
523#endif
524 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
525 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
526 lg %r1,__TI_task(%r9)
527 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
528 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
529 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
530 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
531 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
532 j sysc_do_svc
533
534/*
535 * IO interrupt handler routine
536 */
537 .globl io_int_handler
538io_int_handler:
539 STORE_TIMER __LC_ASYNC_ENTER_TIMER
540 stck __LC_INT_CLOCK
541 SAVE_ALL_BASE __LC_SAVE_AREA+32
542 SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+32,0
77fa2245 543 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 544#ifdef CONFIG_VIRT_CPU_ACCOUNTING
545 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
546 jz io_no_vtime
547 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
548 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
549 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
550io_no_vtime:
551#endif
552 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
553 la %r2,SP_PTREGS(%r15) # address of register-save area
554 brasl %r14,do_IRQ # call standard irq handler
555
556io_return:
557 tm SP_PSW+1(%r15),0x01 # returning to user ?
558#ifdef CONFIG_PREEMPT
559 jno io_preempt # no -> check for preemptive scheduling
560#else
561 jno io_leave # no-> skip resched & signal
562#endif
563 tm __TI_flags+7(%r9),_TIF_WORK_INT
564 jnz io_work # there is work to do (signals etc.)
565io_leave:
ae6aa2ea
MS		 566 RESTORE_ALL __LC_RETURN_PSW,0
567io_done:
1da177e4
LT		 568
569#ifdef CONFIG_PREEMPT
570io_preempt:
571 icm %r0,15,__TI_precount(%r9)
572 jnz io_leave
573 # switch to kernel stack
574 lg %r1,SP_R15(%r15)
575 aghi %r1,-SP_SIZE
576 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
577 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
578 lgr %r15,%r1
579io_resume_loop:
580 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
581 jno io_leave
582 larl %r1,.Lc_pactive
583 mvc __TI_precount(4,%r9),0(%r1)
584 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
585 brasl %r14,schedule # call schedule
586 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
587 xc __TI_precount(4,%r9),__TI_precount(%r9)
588 j io_resume_loop
589#endif
590
591#
592# switch to kernel stack, then check TIF bits
593#
594io_work:
595 lg %r1,__LC_KERNEL_STACK
596 aghi %r1,-SP_SIZE
597 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
598 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
599 lgr %r15,%r1
600#
601# One of the work bits is on. Find out which one.
54dfe5dd
HC		 602# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
603# and _TIF_MCCK_PENDING
1da177e4
LT		 604#
605io_work_loop:
77fa2245
HC		 606 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
607 jo io_mcck_pending
1da177e4
LT		 608 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
609 jo io_reschedule
54dfe5dd
HC		 610 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
611 jnz io_sigpending
1da177e4
LT		 612 j io_leave
613
77fa2245
HC		 614#
615# _TIF_MCCK_PENDING is set, call handler
616#
617io_mcck_pending:
618 larl %r14,io_work_loop
619 jg s390_handle_mcck # TIF bit will be cleared by handler
620
1da177e4
LT		 621#
622# _TIF_NEED_RESCHED is set, call schedule
623#
624io_reschedule:
625 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
626 brasl %r14,schedule # call scheduler
627 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
628 tm __TI_flags+7(%r9),_TIF_WORK_INT
629 jz io_leave # there is no work to do
630 j io_work_loop
631
632#
54dfe5dd 633# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
1da177e4
LT		 634#
635io_sigpending:
636 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
637 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 638 brasl %r14,do_signal # call do_signal
639 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
e1c3ad96 640 j io_work_loop
1da177e4
LT		 641
642/*
643 * External interrupt handler routine
644 */
645 .globl ext_int_handler
646ext_int_handler:
647 STORE_TIMER __LC_ASYNC_ENTER_TIMER
648 stck __LC_INT_CLOCK
649 SAVE_ALL_BASE __LC_SAVE_AREA+32
650 SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32,0
77fa2245 651 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 652#ifdef CONFIG_VIRT_CPU_ACCOUNTING
653 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
654 jz ext_no_vtime
655 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
656 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
657 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
658ext_no_vtime:
659#endif
660 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
661 la %r2,SP_PTREGS(%r15) # address of register-save area
662 llgh %r3,__LC_EXT_INT_CODE # get interruption code
663 brasl %r14,do_extint
664 j io_return
665
ae6aa2ea
MS		 666__critical_end:
667
1da177e4
LT		 668/*
669 * Machine check handler routines
670 */
671 .globl mcck_int_handler
672mcck_int_handler:
77fa2245
HC		 673 la %r1,4095 # revalidate r1
674 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
ae6aa2ea 675 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r1)
77fa2245 676 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
1da177e4 677 SAVE_ALL_BASE __LC_SAVE_AREA+64
77fa2245
HC		 678 la %r12,__LC_MCK_OLD_PSW
679 tm __LC_MCCK_CODE,0x80 # system damage?
680 jo mcck_int_main # yes -> rest of mcck code invalid
681 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
682 jo 0f
683 spt __LC_LAST_UPDATE_TIMER
1da177e4 684#ifdef CONFIG_VIRT_CPU_ACCOUNTING
8ffa7405
HC		 685 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
686 mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
687 mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER
1da177e4 688#endif
ae6aa2ea 6890: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
77fa2245
HC		 690 jno mcck_int_main # no -> skip cleanup critical
691 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
692 jnz mcck_int_main # from user -> load kernel stack
693 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
694 jhe mcck_int_main
695 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
696 jl mcck_int_main
697 brasl %r14,cleanup_critical
698mcck_int_main:
699 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
700 slgr %r14,%r15
701 srag %r14,%r14,PAGE_SHIFT
702 jz 0f
703 lg %r15,__LC_PANIC_STACK # load panic stack
7040: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
ae6aa2ea
MS		 705#ifdef CONFIG_VIRT_CPU_ACCOUNTING
706 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
707 jno mcck_no_vtime # no -> no timer update
708 tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ?
709 jz mcck_no_vtime
710 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
711 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
712 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
713mcck_no_vtime:
714#endif
77fa2245
HC		 715 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
716 la %r2,SP_PTREGS(%r15) # load pt_regs
717 brasl %r14,s390_do_machine_check
718 tm SP_PSW+1(%r15),0x01 # returning to user ?
719 jno mcck_return
720 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
721 aghi %r1,-SP_SIZE
722 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
723 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
724 lgr %r15,%r1
725 stosm __SF_EMPTY(%r15),0x04 # turn dat on
726 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
727 jno mcck_return
728 brasl %r14,s390_handle_mcck
1da177e4 729mcck_return:
ae6aa2ea 730 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
1da177e4
LT		 731
732#ifdef CONFIG_SMP
733/*
734 * Restart interruption handler, kick starter for additional CPUs
735 */
736 .globl restart_int_handler
737restart_int_handler:
738 lg %r15,__LC_SAVE_AREA+120 # load ksp
739 lghi %r10,__LC_CREGS_SAVE_AREA
740 lctlg %c0,%c15,0(%r10) # get new ctl regs
741 lghi %r10,__LC_AREGS_SAVE_AREA
742 lam %a0,%a15,0(%r10)
743 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
744 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
745 jg start_secondary
746#else
747/*
748 * If we do not run with SMP enabled, let the new CPU crash ...
749 */
750 .globl restart_int_handler
751restart_int_handler:
752 basr %r1,0
753restart_base:
754 lpswe restart_crash-restart_base(%r1)
755 .align 8
756restart_crash:
757 .long 0x000a0000,0x00000000,0x00000000,0x00000000
758restart_go:
759#endif
760
761#ifdef CONFIG_CHECK_STACK
762/*
763 * The synchronous or the asynchronous stack overflowed. We are dead.
764 * No need to properly save the registers, we are going to panic anyway.
765 * Setup a pt_regs so that show_trace can provide a good call trace.
766 */
767stack_overflow:
768 lg %r15,__LC_PANIC_STACK # change to panic stack
769 aghi %r1,-SP_SIZE
770 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
771 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
772 la %r1,__LC_SAVE_AREA
773 chi %r12,__LC_SVC_OLD_PSW
774 je 0f
775 chi %r12,__LC_PGM_OLD_PSW
776 je 0f
777 la %r1,__LC_SAVE_AREA+16
7780: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
779 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
780 la %r2,SP_PTREGS(%r15) # load pt_regs
781 jg kernel_stack_overflow
782#endif
783
784cleanup_table_system_call:
785 .quad system_call, sysc_do_svc
786cleanup_table_sysc_return:
787 .quad sysc_return, sysc_leave
788cleanup_table_sysc_leave:
789 .quad sysc_leave, sysc_work_loop
790cleanup_table_sysc_work_loop:
791 .quad sysc_work_loop, sysc_reschedule
ae6aa2ea
MS		 792cleanup_table_io_leave:
793 .quad io_leave, io_done
794cleanup_table_io_work_loop:
795 .quad io_work_loop, io_mcck_pending
1da177e4
LT		 796
797cleanup_critical:
798 clc 8(8,%r12),BASED(cleanup_table_system_call)
799 jl 0f
800 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
801 jl cleanup_system_call
8020:
803 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
804 jl 0f
805 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
806 jl cleanup_sysc_return
8070:
808 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
809 jl 0f
810 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
811 jl cleanup_sysc_leave
8120:
813 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
814 jl 0f
815 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
77fa2245 816 jl cleanup_sysc_return
ae6aa2ea
MS		 8170:
818 clc 8(8,%r12),BASED(cleanup_table_io_leave)
819 jl 0f
820 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
821 jl cleanup_io_leave
8220:
823 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
824 jl 0f
825 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
826 jl cleanup_io_return
1da177e4
LT		 8270:
828 br %r14
829
830cleanup_system_call:
831 mvc __LC_RETURN_PSW(16),0(%r12)
ae6aa2ea
MS		 832 cghi %r12,__LC_MCK_OLD_PSW
833 je 0f
834 la %r12,__LC_SAVE_AREA+32
835 j 1f
8360: la %r12,__LC_SAVE_AREA+64
8371:
1da177e4
LT		 838#ifdef CONFIG_VIRT_CPU_ACCOUNTING
839 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
840 jh 0f
841 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
8420: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
843 jhe cleanup_vtime
844#endif
845 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
846 jh 0f
ae6aa2ea
MS		 847 mvc __LC_SAVE_AREA(32),0(%r12)
8480: stg %r13,8(%r12)
849 stg %r12,__LC_SAVE_AREA+96 # argh
1da177e4 850 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
77fa2245 851 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
ae6aa2ea
MS		 852 lg %r12,__LC_SAVE_AREA+96 # argh
853 stg %r15,24(%r12)
1da177e4
LT		 854 llgh %r7,__LC_SVC_INT_CODE
855#ifdef CONFIG_VIRT_CPU_ACCOUNTING
856cleanup_vtime:
857 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
858 jhe cleanup_stime
859 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
860 jz cleanup_novtime
861 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
862cleanup_stime:
863 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
864 jh cleanup_update
865 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
866cleanup_update:
867 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
868cleanup_novtime:
869#endif
870 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
871 la %r12,__LC_RETURN_PSW
872 br %r14
873cleanup_system_call_insn:
874 .quad sysc_saveall
875#ifdef CONFIG_VIRT_CPU_ACCOUNTING
876 .quad system_call
877 .quad sysc_vtime
878 .quad sysc_stime
879 .quad sysc_update
880#endif
881
882cleanup_sysc_return:
883 mvc __LC_RETURN_PSW(8),0(%r12)
884 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
885 la %r12,__LC_RETURN_PSW
886 br %r14
887
888cleanup_sysc_leave:
889 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
ae6aa2ea 890 je 2f
1da177e4
LT		 891#ifdef CONFIG_VIRT_CPU_ACCOUNTING
892 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
893 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
ae6aa2ea 894 je 2f
1da177e4
LT		 895#endif
896 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
ae6aa2ea
MS		 897 cghi %r12,__LC_MCK_OLD_PSW
898 jne 0f
899 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
900 j 1f
9010: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9021: lmg %r0,%r11,SP_R0(%r15)
1da177e4 903 lg %r15,SP_R15(%r15)
ae6aa2ea 9042: la %r12,__LC_RETURN_PSW
1da177e4
LT		 905 br %r14
906cleanup_sysc_leave_insn:
907#ifdef CONFIG_VIRT_CPU_ACCOUNTING
908 .quad sysc_leave + 16
909#endif
910 .quad sysc_leave + 12
911
ae6aa2ea
MS		 912cleanup_io_return:
913 mvc __LC_RETURN_PSW(8),0(%r12)
914 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
915 la %r12,__LC_RETURN_PSW
916 br %r14
917
918cleanup_io_leave:
919 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
920 je 2f
921#ifdef CONFIG_VIRT_CPU_ACCOUNTING
922 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
923 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
924 je 2f
925#endif
926 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
927 cghi %r12,__LC_MCK_OLD_PSW
928 jne 0f
929 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
930 j 1f
9310: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9321: lmg %r0,%r11,SP_R0(%r15)
933 lg %r15,SP_R15(%r15)
9342: la %r12,__LC_RETURN_PSW
935 br %r14
936cleanup_io_leave_insn:
937#ifdef CONFIG_VIRT_CPU_ACCOUNTING
938 .quad io_leave + 20
939#endif
940 .quad io_leave + 16
941
1da177e4
LT		 942/*
943 * Integer constants
944 */
945 .align 4
946.Lconst:
947.Lc_pactive: .long PREEMPT_ACTIVE
948.Lnr_syscalls: .long NR_syscalls
949.L0x0130: .short 0x130
950.L0x0140: .short 0x140
951.L0x0150: .short 0x150
952.L0x0160: .short 0x160
953.L0x0170: .short 0x170
954.Lcritical_start:
955 .quad __critical_start
956.Lcritical_end:
957 .quad __critical_end
958
959#define SYSCALL(esa,esame,emu) .long esame
960 .globl sys_call_table
961sys_call_table:
962#include "syscalls.S"
963#undef SYSCALL
964
347a8dc3 965#ifdef CONFIG_COMPAT
1da177e4
LT		 966
967#define SYSCALL(esa,esame,emu) .long emu
968 .globl sys_call_table_emu
969sys_call_table_emu:
970#include "syscalls.S"
971#undef SYSCALL
972#endif
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