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Commit | Line | Data |
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1da177e4 | 1 | /* |
a53c8fab | 2 | * Copyright IBM Corp. 1999, 2010 |
0ad775db HC |
3 | * |
4 | * Author(s): Hartmut Penner <hp@de.ibm.com> | |
5 | * Martin Schwidefsky <schwidefsky@de.ibm.com> | |
6 | * Rob van der Heij <rvdhei@iae.nl> | |
7 | * Heiko Carstens <heiko.carstens@de.ibm.com> | |
1da177e4 LT |
8 | * |
9 | * There are 5 different IPL methods | |
10 | * 1) load the image directly into ram at address 0 and do an PSW restart | |
11 | * 2) linload will load the image from address 0x10000 to memory 0x10000 | |
12 | * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated) | |
13 | * 3) generate the tape ipl header, store the generated image on a tape | |
14 | * and ipl from it | |
15 | * In case of SL tape you need to IPL 5 times to get past VOL1 etc | |
16 | * 4) generate the vm reader ipl header, move the generated image to the | |
17 | * VM reader (use option NOH!) and do a ipl from reader (VM only) | |
18 | * 5) direct call of start by the SALIPL loader | |
19 | * We use the cpuid to distinguish between VM and native ipl | |
20 | * params for kernel are pushed to 0x10400 (see setup.h) | |
0ad775db | 21 | * |
1da177e4 LT |
22 | */ |
23 | ||
2133bb8d | 24 | #include <linux/init.h> |
144d634a | 25 | #include <linux/linkage.h> |
0013a854 | 26 | #include <asm/asm-offsets.h> |
1da177e4 LT |
27 | #include <asm/thread_info.h> |
28 | #include <asm/page.h> | |
29 | ||
0ad775db | 30 | #define ARCH_OFFSET 4 |
0ad775db | 31 | |
2133bb8d | 32 | __HEAD |
1da177e4 | 33 | |
25d83cbf HC |
34 | #define IPL_BS 0x730 |
35 | .org 0 | |
36 | .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded | |
37 | .long 0x02000018,0x60000050 # by ipl to addresses 0-23. | |
38 | .long 0x02000068,0x60000050 # (a PSW and two CCWs). | |
39 | .fill 80-24,1,0x40 # bytes 24-79 are discarded !! | |
40 | .long 0x020000f0,0x60000050 # The next 160 byte are loaded | |
41 | .long 0x02000140,0x60000050 # to addresses 0x18-0xb7 | |
42 | .long 0x02000190,0x60000050 # They form the continuation | |
43 | .long 0x020001e0,0x60000050 # of the CCW program started | |
44 | .long 0x02000230,0x60000050 # by ipl and load the range | |
45 | .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image | |
46 | .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730 | |
47 | .long 0x02000320,0x60000050 # in memory. At the end of | |
48 | .long 0x02000370,0x60000050 # the channel program the PSW | |
49 | .long 0x020003c0,0x60000050 # at location 0 is loaded. | |
50 | .long 0x02000410,0x60000050 # Initial processing starts | |
51eee033 | 51 | .long 0x02000460,0x60000050 # at 0x200 = iplstart. |
25d83cbf HC |
52 | .long 0x020004b0,0x60000050 |
53 | .long 0x02000500,0x60000050 | |
54 | .long 0x02000550,0x60000050 | |
55 | .long 0x020005a0,0x60000050 | |
56 | .long 0x020005f0,0x60000050 | |
57 | .long 0x02000640,0x60000050 | |
58 | .long 0x02000690,0x60000050 | |
59 | .long 0x020006e0,0x20000050 | |
1da177e4 | 60 | |
51eee033 MS |
61 | .org 0x200 |
62 | # | |
63 | # subroutine to set architecture mode | |
64 | # | |
65 | .Lsetmode: | |
51eee033 MS |
66 | mvi __LC_AR_MODE_ID,1 # set esame flag |
67 | slr %r0,%r0 # set cpuid to zero | |
68 | lhi %r1,2 # mode 2 = esame (dump) | |
69 | sigp %r1,%r0,0x12 # switch to esame mode | |
70 | bras %r13,0f | |
71 | .fill 16,4,0x0 | |
72 | 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs | |
73 | sam31 # switch to 31 bit addressing mode | |
51eee033 MS |
74 | br %r14 |
75 | ||
76 | # | |
77 | # subroutine to wait for end I/O | |
78 | # | |
79 | .Lirqwait: | |
51eee033 MS |
80 | mvc 0x1f0(16),.Lnewpsw # set up IO interrupt psw |
81 | lpsw .Lwaitpsw | |
82 | .Lioint: | |
83 | br %r14 | |
84 | .align 8 | |
85 | .Lnewpsw: | |
86 | .quad 0x0000000080000000,.Lioint | |
51eee033 MS |
87 | .Lwaitpsw: |
88 | .long 0x020a0000,0x80000000+.Lioint | |
89 | ||
1da177e4 LT |
90 | # |
91 | # subroutine for loading cards from the reader | |
92 | # | |
25d83cbf | 93 | .Lloader: |
51eee033 | 94 | la %r4,0(%r14) |
25d83cbf HC |
95 | la %r3,.Lorb # r2 = address of orb into r2 |
96 | la %r5,.Lirb # r4 = address of irb | |
97 | la %r6,.Lccws | |
98 | la %r7,20 | |
1da177e4 | 99 | .Linit: |
25d83cbf HC |
100 | st %r2,4(%r6) # initialize CCW data addresses |
101 | la %r2,0x50(%r2) | |
102 | la %r6,8(%r6) | |
103 | bct 7,.Linit | |
1da177e4 | 104 | |
25d83cbf HC |
105 | lctl %c6,%c6,.Lcr6 # set IO subclass mask |
106 | slr %r2,%r2 | |
1da177e4 | 107 | .Lldlp: |
25d83cbf HC |
108 | ssch 0(%r3) # load chunk of 1600 bytes |
109 | bnz .Llderr | |
1da177e4 | 110 | .Lwait4irq: |
51eee033 | 111 | bas %r14,.Lirqwait |
25d83cbf HC |
112 | c %r1,0xb8 # compare subchannel number |
113 | bne .Lwait4irq | |
114 | tsch 0(%r5) | |
1da177e4 | 115 | |
25d83cbf HC |
116 | slr %r0,%r0 |
117 | ic %r0,8(%r5) # get device status | |
118 | chi %r0,8 # channel end ? | |
119 | be .Lcont | |
120 | chi %r0,12 # channel end + device end ? | |
121 | be .Lcont | |
1da177e4 | 122 | |
25d83cbf HC |
123 | l %r0,4(%r5) |
124 | s %r0,8(%r3) # r0/8 = number of ccws executed | |
125 | mhi %r0,10 # *10 = number of bytes in ccws | |
126 | lh %r3,10(%r5) # get residual count | |
127 | sr %r0,%r3 # #ccws*80-residual=#bytes read | |
128 | ar %r2,%r0 | |
129 | ||
51eee033 | 130 | br %r4 # r2 contains the total size |
1da177e4 LT |
131 | |
132 | .Lcont: | |
25d83cbf HC |
133 | ahi %r2,0x640 # add 0x640 to total size |
134 | la %r6,.Lccws | |
135 | la %r7,20 | |
1da177e4 | 136 | .Lincr: |
25d83cbf HC |
137 | l %r0,4(%r6) # update CCW data addresses |
138 | ahi %r0,0x640 | |
139 | st %r0,4(%r6) | |
140 | ahi %r6,8 | |
141 | bct 7,.Lincr | |
1da177e4 | 142 | |
25d83cbf | 143 | b .Lldlp |
1da177e4 | 144 | .Llderr: |
25d83cbf | 145 | lpsw .Lcrash |
1da177e4 | 146 | |
25d83cbf HC |
147 | .align 8 |
148 | .Lorb: .long 0x00000000,0x0080ff00,.Lccws | |
149 | .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 | |
150 | .Lcr6: .long 0xff000000 | |
151 | .Lloadp:.long 0,0 | |
152 | .align 8 | |
153 | .Lcrash:.long 0x000a0000,0x00000000 | |
1da177e4 | 154 | |
25d83cbf HC |
155 | .align 8 |
156 | .Lccws: .rept 19 | |
157 | .long 0x02600050,0x00000000 | |
158 | .endr | |
159 | .long 0x02200050,0x00000000 | |
1da177e4 LT |
160 | |
161 | iplstart: | |
51eee033 | 162 | bas %r14,.Lsetmode # Immediately switch to 64 bit mode |
25d83cbf HC |
163 | lh %r1,0xb8 # test if subchannel number |
164 | bct %r1,.Lnoload # is valid | |
165 | l %r1,0xb8 # load ipl subchannel number | |
166 | la %r2,IPL_BS # load start address | |
167 | bas %r14,.Lloader # load rest of ipl image | |
168 | l %r12,.Lparm # pointer to parameter area | |
169 | st %r1,IPL_DEVICE+ARCH_OFFSET-PARMAREA(%r12) # save ipl device number | |
1da177e4 LT |
170 | |
171 | # | |
172 | # load parameter file from ipl device | |
173 | # | |
174 | .Lagain1: | |
25d83cbf HC |
175 | l %r2,.Linitrd # ramdisk loc. is temp |
176 | bas %r14,.Lloader # load parameter file | |
177 | ltr %r2,%r2 # got anything ? | |
178 | bz .Lnopf | |
179 | chi %r2,895 | |
180 | bnh .Lnotrunc | |
181 | la %r2,895 | |
1da177e4 | 182 | .Lnotrunc: |
25d83cbf HC |
183 | l %r4,.Linitrd |
184 | clc 0(3,%r4),.L_hdr # if it is HDRx | |
185 | bz .Lagain1 # skip dataset header | |
186 | clc 0(3,%r4),.L_eof # if it is EOFx | |
187 | bz .Lagain1 # skip dateset trailer | |
188 | la %r5,0(%r4,%r2) | |
189 | lr %r3,%r2 | |
61fd330d | 190 | la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line |
25d83cbf HC |
191 | mvc 0(256,%r3),0(%r4) |
192 | mvc 256(256,%r3),256(%r4) | |
193 | mvc 512(256,%r3),512(%r4) | |
194 | mvc 768(122,%r3),768(%r4) | |
195 | slr %r0,%r0 | |
196 | b .Lcntlp | |
1da177e4 | 197 | .Ldelspc: |
25d83cbf HC |
198 | ic %r0,0(%r2,%r3) |
199 | chi %r0,0x20 # is it a space ? | |
200 | be .Lcntlp | |
201 | ahi %r2,1 | |
202 | b .Leolp | |
1da177e4 | 203 | .Lcntlp: |
25d83cbf | 204 | brct %r2,.Ldelspc |
1da177e4 | 205 | .Leolp: |
25d83cbf HC |
206 | slr %r0,%r0 |
207 | stc %r0,0(%r2,%r3) # terminate buffer | |
1da177e4 LT |
208 | .Lnopf: |
209 | ||
210 | # | |
211 | # load ramdisk from ipl device | |
25d83cbf | 212 | # |
1da177e4 | 213 | .Lagain2: |
25d83cbf HC |
214 | l %r2,.Linitrd # addr of ramdisk |
215 | st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) | |
216 | bas %r14,.Lloader # load ramdisk | |
217 | st %r2,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r12) # store size of rd | |
218 | ltr %r2,%r2 | |
219 | bnz .Lrdcont | |
220 | st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) # no ramdisk found | |
1da177e4 | 221 | .Lrdcont: |
25d83cbf | 222 | l %r2,.Linitrd |
1da177e4 | 223 | |
25d83cbf HC |
224 | clc 0(3,%r2),.L_hdr # skip HDRx and EOFx |
225 | bz .Lagain2 | |
226 | clc 0(3,%r2),.L_eof | |
227 | bz .Lagain2 | |
1da177e4 | 228 | |
1da177e4 LT |
229 | # |
230 | # reset files in VM reader | |
231 | # | |
51eee033 MS |
232 | stidp .Lcpuid # store cpuid |
233 | tm .Lcpuid,0xff # running VM ? | |
25d83cbf HC |
234 | bno .Lnoreset |
235 | la %r2,.Lreset | |
236 | lhi %r3,26 | |
237 | diag %r2,%r3,8 | |
238 | la %r5,.Lirb | |
239 | stsch 0(%r5) # check if irq is pending | |
240 | tm 30(%r5),0x0f # by verifying if any of the | |
241 | bnz .Lwaitforirq # activity or status control | |
242 | tm 31(%r5),0xff # bits is set in the schib | |
243 | bz .Lnoreset | |
350e3ade | 244 | .Lwaitforirq: |
51eee033 | 245 | bas %r14,.Lirqwait # wait for IO interrupt |
25d83cbf | 246 | c %r1,0xb8 # compare subchannel number |
51eee033 | 247 | bne .Lwaitforirq |
25d83cbf HC |
248 | la %r5,.Lirb |
249 | tsch 0(%r5) | |
1da177e4 | 250 | .Lnoreset: |
25d83cbf | 251 | b .Lnoload |
2b071886 | 252 | |
1da177e4 LT |
253 | # |
254 | # everything loaded, go for it | |
255 | # | |
256 | .Lnoload: | |
25d83cbf HC |
257 | l %r1,.Lstartup |
258 | br %r1 | |
1da177e4 | 259 | |
e033b9a0 | 260 | .Linitrd:.long _end # default address of initrd |
1da177e4 LT |
261 | .Lparm: .long PARMAREA |
262 | .Lstartup: .long startup | |
25d83cbf HC |
263 | .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40 |
264 | .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6 | |
265 | .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold" | |
266 | .L_eof: .long 0xc5d6c600 /* C'EOF' */ | |
267 | .L_hdr: .long 0xc8c4d900 /* C'HDR' */ | |
51eee033 MS |
268 | .align 8 |
269 | .Lcpuid:.fill 8,1,0 | |
1da177e4 | 270 | |
1da177e4 LT |
271 | # |
272 | # SALIPL loader support. Based on a patch by Rob van der Heij. | |
273 | # This entry point is called directly from the SALIPL loader and | |
274 | # doesn't need a builtin ipl record. | |
275 | # | |
25d83cbf | 276 | .org 0x800 |
144d634a | 277 | ENTRY(start) |
25d83cbf | 278 | stm %r0,%r15,0x07b0 # store registers |
51eee033 | 279 | bas %r14,.Lsetmode # Immediately switch to 64 bit mode |
25d83cbf | 280 | basr %r12,%r0 |
1da177e4 | 281 | .base: |
25d83cbf HC |
282 | l %r11,.parm |
283 | l %r8,.cmd # pointer to command buffer | |
1da177e4 | 284 | |
25d83cbf HC |
285 | ltr %r9,%r9 # do we have SALIPL parameters? |
286 | bp .sk8x8 | |
1da177e4 | 287 | |
25d83cbf HC |
288 | mvc 0(64,%r8),0x00b0 # copy saved registers |
289 | xc 64(240-64,%r8),0(%r8) # remainder of buffer | |
290 | tr 0(64,%r8),.lowcase | |
291 | b .gotr | |
1da177e4 | 292 | .sk8x8: |
25d83cbf | 293 | mvc 0(240,%r8),0(%r9) # copy iplparms into buffer |
1da177e4 | 294 | .gotr: |
25d83cbf HC |
295 | slr %r0,%r0 |
296 | st %r0,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r11) | |
297 | st %r0,INITRD_START+ARCH_OFFSET-PARMAREA(%r11) | |
298 | j startup # continue with startup | |
25d83cbf HC |
299 | .cmd: .long COMMAND_LINE # address of command line buffer |
300 | .parm: .long PARMAREA | |
1da177e4 | 301 | .lowcase: |
25d83cbf | 302 | .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07 |
1da177e4 | 303 | .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f |
25d83cbf | 304 | .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17 |
1da177e4 | 305 | .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f |
25d83cbf | 306 | .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27 |
1da177e4 | 307 | .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f |
25d83cbf | 308 | .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37 |
1da177e4 | 309 | .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f |
25d83cbf | 310 | .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47 |
1da177e4 | 311 | .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f |
25d83cbf | 312 | .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57 |
1da177e4 | 313 | .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f |
25d83cbf | 314 | .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67 |
1da177e4 | 315 | .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f |
25d83cbf | 316 | .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77 |
1da177e4 LT |
317 | .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f |
318 | ||
25d83cbf | 319 | .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87 |
1da177e4 | 320 | .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f |
25d83cbf | 321 | .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97 |
1da177e4 | 322 | .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f |
25d83cbf | 323 | .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 |
1da177e4 | 324 | .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf |
25d83cbf | 325 | .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7 |
1da177e4 | 326 | .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf |
25d83cbf | 327 | .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg |
1da177e4 | 328 | .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi |
25d83cbf | 329 | .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop |
1da177e4 LT |
330 | .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr |
331 | .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx | |
332 | .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz | |
25d83cbf | 333 | .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7 |
1da177e4 LT |
334 | .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff |
335 | ||
e37f50e1 MS |
336 | # |
337 | # startup-code at 0x10000, running in absolute addressing mode | |
338 | # this is called either by the ipl loader or directly by PSW restart | |
339 | # or linload or SALIPL | |
340 | # | |
341 | .org 0x10000 | |
144d634a | 342 | ENTRY(startup) |
60a0c68d MH |
343 | j .Lep_startup_normal |
344 | .org 0x10008 | |
345 | # | |
346 | # This is a list of s390 kernel entry points. At address 0x1000f the number of | |
347 | # valid entry points is stored. | |
348 | # | |
349 | # IMPORTANT: Do not change this table, it is s390 kernel ABI! | |
350 | # | |
351 | .ascii "S390EP" | |
352 | .byte 0x00,0x01 | |
353 | # | |
354 | # kdump startup-code at 0x10010, running in 64 bit absolute addressing mode | |
355 | # | |
356 | .org 0x10010 | |
357 | ENTRY(startup_kdump) | |
358 | j .Lep_startup_kdump | |
359 | .Lep_startup_normal: | |
51eee033 MS |
360 | mvi __LC_AR_MODE_ID,1 # set esame flag |
361 | slr %r0,%r0 # set cpuid to zero | |
362 | lhi %r1,2 # mode 2 = esame (dump) | |
363 | sigp %r1,%r0,0x12 # switch to esame mode | |
364 | bras %r13,0f | |
365 | .fill 16,4,0x0 | |
366 | 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs | |
367 | sam31 # switch to 31 bit addressing mode | |
1844c9bc | 368 | basr %r13,0 # get base |
e37f50e1 | 369 | .LPG0: |
866ba284 MS |
370 | xc 0x200(256),0x200 # partially clear lowcore |
371 | xc 0x300(256),0x300 | |
60a0c68d | 372 | xc 0xe00(256),0xe00 |
22362a0e | 373 | lctlg %c0,%c15,0x200(%r0) # initialize control registers |
1844c9bc | 374 | stck __LC_LAST_UPDATE_CLOCK |
991c1505 HC |
375 | spt 6f-.LPG0(%r13) |
376 | mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13) | |
37e37c20 | 377 | xc __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST |
8c4caa4f | 378 | # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10} |
b881dcfb | 379 | .insn s,0xb2b10000,0 # store facilities @ __LC_STFL_FAC_LIST |
8c4caa4f MS |
380 | tm __LC_STFL_FAC_LIST,0x01 # stfle available ? |
381 | jz 0f | |
991c1505 | 382 | la %r0,1 |
8c4caa4f | 383 | .insn s,0xb2b00000,__LC_STFL_FAC_LIST # store facility list extended |
991c1505 HC |
384 | # verify if all required facilities are supported by the machine |
385 | 0: la %r1,__LC_STFL_FAC_LIST | |
386 | la %r2,3f+8-.LPG0(%r13) | |
387 | l %r3,0(%r2) | |
388 | 1: l %r0,0(%r1) | |
389 | n %r0,4(%r2) | |
390 | cl %r0,4(%r2) | |
391 | jne 2f | |
392 | la %r1,4(%r1) | |
393 | la %r2,4(%r2) | |
394 | ahi %r3,-1 | |
395 | jnz 1b | |
396 | j 4f | |
397 | 2: l %r15,.Lstack-.LPG0(%r13) | |
d90cbd46 HC |
398 | ahi %r15,-96 |
399 | la %r2,.Lals_string-.LPG0(%r13) | |
400 | l %r3,.Lsclp_print-.LPG0(%r13) | |
401 | basr %r14,%r3 | |
991c1505 | 402 | lpsw 3f-.LPG0(%r13) # machine type not good enough, crash |
d90cbd46 HC |
403 | .Lals_string: |
404 | .asciz "The Linux kernel requires more recent processor hardware" | |
405 | .Lsclp_print: | |
406 | .long _sclp_print_early | |
407 | .Lstack: | |
1844c9bc | 408 | .long 0x8000 + (1<<(PAGE_SHIFT+THREAD_ORDER)) |
e37f50e1 | 409 | .align 16 |
991c1505 HC |
410 | 3: .long 0x000a0000,0x8badcccc |
411 | ||
412 | # List of facilities that are required. If not all facilities are present | |
413 | # the kernel will crash. Format is number of facility words with bits set, | |
414 | # followed by the facility words. | |
415 | ||
f8b2dcbd | 416 | #if defined(CONFIG_MARCH_Z13) |
a69db2f6 | 417 | .long 2, 0xc100eff2, 0xf46cc800 |
f8b2dcbd | 418 | #elif defined(CONFIG_MARCH_ZEC12) |
a69db2f6 | 419 | .long 2, 0xc100eff2, 0xf46cc800 |
991c1505 | 420 | #elif defined(CONFIG_MARCH_Z196) |
4a36b44c | 421 | .long 2, 0xc100eff2, 0xf46c0000 |
f861e405 | 422 | #elif defined(CONFIG_MARCH_Z10) |
4a36b44c | 423 | .long 2, 0xc100eff2, 0xf0680000 |
8c4caa4f | 424 | #elif defined(CONFIG_MARCH_Z9_109) |
6eb58d9b | 425 | .long 1, 0xc100efc2 |
8c4caa4f | 426 | #elif defined(CONFIG_MARCH_Z990) |
991c1505 | 427 | .long 1, 0xc0002000 |
8c4caa4f | 428 | #elif defined(CONFIG_MARCH_Z900) |
991c1505 | 429 | .long 1, 0xc0000000 |
8c4caa4f | 430 | #endif |
991c1505 | 431 | 4: |
51eee033 | 432 | /* Continue with 64bit startup code in head64.S */ |
1844c9bc MS |
433 | sam64 # switch to 64 bit mode |
434 | jg startup_continue | |
51eee033 | 435 | |
ab96e798 | 436 | .align 8 |
991c1505 | 437 | 6: .long 0x7fffffff,0xffffffff |
e37f50e1 | 438 | |
60a0c68d MH |
439 | #include "head_kdump.S" |
440 | ||
e37f50e1 MS |
441 | # |
442 | # params at 10400 (setup.h) | |
443 | # | |
444 | .org PARMAREA | |
445 | .long 0,0 # IPL_DEVICE | |
446 | .long 0,0 # INITRD_START | |
447 | .long 0,0 # INITRD_SIZE | |
60a0c68d MH |
448 | .long 0,0 # OLDMEM_BASE |
449 | .long 0,0 # OLDMEM_SIZE | |
e37f50e1 MS |
450 | |
451 | .org COMMAND_LINE | |
452 | .byte "root=/dev/ram0 ro" | |
453 | .byte 0 | |
454 | ||
1844c9bc | 455 | .org 0x11000 |