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Commit | Line | Data |
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1da177e4 | 1 | /* |
f5daba1d | 2 | * Machine check handler |
1da177e4 | 3 | * |
a53c8fab | 4 | * Copyright IBM Corp. 2000, 2009 |
f5daba1d HC |
5 | * Author(s): Ingo Adlung <adlung@de.ibm.com>, |
6 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, | |
7 | * Cornelia Huck <cornelia.huck@de.ibm.com>, | |
8 | * Heiko Carstens <heiko.carstens@de.ibm.com>, | |
1da177e4 LT |
9 | */ |
10 | ||
052ff461 | 11 | #include <linux/kernel_stat.h> |
1da177e4 | 12 | #include <linux/init.h> |
1da177e4 | 13 | #include <linux/errno.h> |
81f64b87 | 14 | #include <linux/hardirq.h> |
022e4fc0 | 15 | #include <linux/time.h> |
3f07c014 IM |
16 | #include <linux/module.h> |
17 | #include <linux/sched/signal.h> | |
18 | ||
3994a52b | 19 | #include <linux/export.h> |
1da177e4 | 20 | #include <asm/lowcore.h> |
f5daba1d | 21 | #include <asm/smp.h> |
fd5ada04 | 22 | #include <asm/stp.h> |
76d4e00a | 23 | #include <asm/cputime.h> |
f5daba1d HC |
24 | #include <asm/nmi.h> |
25 | #include <asm/crw.h> | |
80703617 | 26 | #include <asm/switch_to.h> |
cad49cfc | 27 | #include <asm/ctl_reg.h> |
1da177e4 | 28 | |
77fa2245 | 29 | struct mcck_struct { |
36324963 HC |
30 | unsigned int kill_task : 1; |
31 | unsigned int channel_report : 1; | |
32 | unsigned int warning : 1; | |
29b0a825 | 33 | unsigned int stp_queue : 1; |
dc6e1555 | 34 | unsigned long mcck_code; |
77fa2245 HC |
35 | }; |
36 | ||
37 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); | |
38 | ||
3d68286a | 39 | static void s390_handle_damage(void) |
f5daba1d HC |
40 | { |
41 | smp_send_stop(); | |
42 | disabled_wait((unsigned long) __builtin_return_address(0)); | |
43 | while (1); | |
44 | } | |
45 | ||
1da177e4 | 46 | /* |
77fa2245 HC |
47 | * Main machine check handler function. Will be called with interrupts enabled |
48 | * or disabled and machine checks enabled or disabled. | |
1da177e4 | 49 | */ |
f5daba1d | 50 | void s390_handle_mcck(void) |
1da177e4 | 51 | { |
77fa2245 HC |
52 | unsigned long flags; |
53 | struct mcck_struct mcck; | |
1da177e4 | 54 | |
77fa2245 HC |
55 | /* |
56 | * Disable machine checks and get the current state of accumulated | |
57 | * machine checks. Afterwards delete the old state and enable machine | |
58 | * checks again. | |
59 | */ | |
60 | local_irq_save(flags); | |
61 | local_mcck_disable(); | |
2cb4a182 SO |
62 | mcck = *this_cpu_ptr(&cpu_mcck); |
63 | memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck)); | |
d3a73acb | 64 | clear_cpu_flag(CIF_MCCK_PENDING); |
77fa2245 HC |
65 | local_mcck_enable(); |
66 | local_irq_restore(flags); | |
1da177e4 | 67 | |
77fa2245 | 68 | if (mcck.channel_report) |
f5daba1d | 69 | crw_handle_channel_report(); |
7b886416 HC |
70 | /* |
71 | * A warning may remain for a prolonged period on the bare iron. | |
72 | * (actually until the machine is powered off, or the problem is gone) | |
73 | * So we just stop listening for the WARNING MCH and avoid continuously | |
74 | * being interrupted. One caveat is however, that we must do this per | |
75 | * processor and cannot use the smp version of ctl_clear_bit(). | |
76 | * On VM we only get one interrupt per virtally presented machinecheck. | |
77 | * Though one suffices, we may get one interrupt per (virtual) cpu. | |
78 | */ | |
77fa2245 | 79 | if (mcck.warning) { /* WARNING pending ? */ |
1da177e4 | 80 | static int mchchk_wng_posted = 0; |
7b886416 HC |
81 | |
82 | /* Use single cpu clear, as we cannot handle smp here. */ | |
1da177e4 LT |
83 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ |
84 | if (xchg(&mchchk_wng_posted, 1) == 0) | |
9ec52099 | 85 | kill_cad_pid(SIGPWR, 1); |
1da177e4 | 86 | } |
29b0a825 HC |
87 | if (mcck.stp_queue) |
88 | stp_queue_work(); | |
77fa2245 HC |
89 | if (mcck.kill_task) { |
90 | local_irq_enable(); | |
91 | printk(KERN_EMERG "mcck: Terminating task because of machine " | |
dc6e1555 | 92 | "malfunction (code 0x%016lx).\n", mcck.mcck_code); |
77fa2245 HC |
93 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", |
94 | current->comm, current->pid); | |
95 | do_exit(SIGSEGV); | |
96 | } | |
97 | } | |
71cde587 | 98 | EXPORT_SYMBOL_GPL(s390_handle_mcck); |
77fa2245 HC |
99 | |
100 | /* | |
101 | * returns 0 if all registers could be validated | |
102 | * returns 1 otherwise | |
103 | */ | |
8f149ea6 | 104 | static int notrace s390_validate_registers(union mci mci, int umode) |
77fa2245 HC |
105 | { |
106 | int kill_task; | |
77fa2245 | 107 | u64 zero; |
86fa7087 | 108 | void *fpt_save_area; |
77fa2245 HC |
109 | |
110 | kill_task = 0; | |
111 | zero = 0; | |
f5daba1d | 112 | |
dc6e1555 | 113 | if (!mci.gr) { |
77fa2245 HC |
114 | /* |
115 | * General purpose registers couldn't be restored and have | |
8f149ea6 | 116 | * unknown contents. Stop system or terminate process. |
77fa2245 | 117 | */ |
8f149ea6 MS |
118 | if (!umode) |
119 | s390_handle_damage(); | |
77fa2245 | 120 | kill_task = 1; |
f5daba1d | 121 | } |
70e28aa0 HC |
122 | /* Validate control registers */ |
123 | if (!mci.cr) { | |
124 | /* | |
125 | * Control registers have unknown contents. | |
126 | * Can't recover and therefore stopping machine. | |
127 | */ | |
128 | s390_handle_damage(); | |
129 | } else { | |
130 | asm volatile( | |
5791d90d HC |
131 | " lctlg 0,15,0(%0)\n" |
132 | " ptlb\n" | |
70e28aa0 HC |
133 | : : "a" (&S390_lowcore.cregs_save_area) : "memory"); |
134 | } | |
dc6e1555 | 135 | if (!mci.fp) { |
77fa2245 | 136 | /* |
8f149ea6 MS |
137 | * Floating point registers can't be restored. If the |
138 | * kernel currently uses floating point registers the | |
139 | * system is stopped. If the process has its floating | |
140 | * pointer registers loaded it is terminated. | |
141 | * Otherwise just revalidate the registers. | |
77fa2245 | 142 | */ |
8f149ea6 MS |
143 | if (S390_lowcore.fpu_flags & KERNEL_VXR_V0V7) |
144 | s390_handle_damage(); | |
145 | if (!test_cpu_flag(CIF_FPU)) | |
146 | kill_task = 1; | |
f5daba1d | 147 | } |
5a79859a | 148 | fpt_save_area = &S390_lowcore.floating_pt_save_area; |
dc6e1555 | 149 | if (!mci.fc) { |
5a79859a HC |
150 | /* |
151 | * Floating point control register can't be restored. | |
8f149ea6 MS |
152 | * If the kernel currently uses the floating pointer |
153 | * registers and needs the FPC register the system is | |
154 | * stopped. If the process has its floating pointer | |
155 | * registers loaded it is terminated. Otherwiese the | |
156 | * FPC is just revalidated. | |
5a79859a | 157 | */ |
8f149ea6 MS |
158 | if (S390_lowcore.fpu_flags & KERNEL_FPC) |
159 | s390_handle_damage(); | |
86fa7087 | 160 | asm volatile("lfpc %0" : : "Q" (zero)); |
8f149ea6 MS |
161 | if (!test_cpu_flag(CIF_FPU)) |
162 | kill_task = 1; | |
86fa7087 HC |
163 | } else { |
164 | asm volatile("lfpc %0" | |
165 | : : "Q" (S390_lowcore.fpt_creg_save_area)); | |
166 | } | |
5a79859a | 167 | |
cad49cfc | 168 | if (!MACHINE_HAS_VX) { |
975be635 | 169 | /* Validate floating point registers */ |
cad49cfc HC |
170 | asm volatile( |
171 | " ld 0,0(%0)\n" | |
172 | " ld 1,8(%0)\n" | |
173 | " ld 2,16(%0)\n" | |
174 | " ld 3,24(%0)\n" | |
175 | " ld 4,32(%0)\n" | |
176 | " ld 5,40(%0)\n" | |
177 | " ld 6,48(%0)\n" | |
178 | " ld 7,56(%0)\n" | |
179 | " ld 8,64(%0)\n" | |
180 | " ld 9,72(%0)\n" | |
181 | " ld 10,80(%0)\n" | |
182 | " ld 11,88(%0)\n" | |
183 | " ld 12,96(%0)\n" | |
184 | " ld 13,104(%0)\n" | |
185 | " ld 14,112(%0)\n" | |
186 | " ld 15,120(%0)\n" | |
86fa7087 | 187 | : : "a" (fpt_save_area) : "memory"); |
cad49cfc | 188 | } else { |
975be635 | 189 | /* Validate vector registers */ |
cad49cfc HC |
190 | union ctlreg0 cr0; |
191 | ||
dc6e1555 | 192 | if (!mci.vr) { |
80703617 | 193 | /* |
8f149ea6 MS |
194 | * Vector registers can't be restored. If the kernel |
195 | * currently uses vector registers the system is | |
196 | * stopped. If the process has its vector registers | |
197 | * loaded it is terminated. Otherwise just revalidate | |
198 | * the registers. | |
80703617 | 199 | */ |
8f149ea6 MS |
200 | if (S390_lowcore.fpu_flags & KERNEL_VXR) |
201 | s390_handle_damage(); | |
202 | if (!test_cpu_flag(CIF_FPU)) | |
203 | kill_task = 1; | |
80703617 | 204 | } |
cad49cfc HC |
205 | cr0.val = S390_lowcore.cregs_save_area[0]; |
206 | cr0.afp = cr0.vx = 1; | |
207 | __ctl_load(cr0.val, 0, 0); | |
9977e886 HB |
208 | asm volatile( |
209 | " la 1,%0\n" | |
210 | " .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */ | |
211 | " .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */ | |
212 | : : "Q" (*(struct vx_array *) | |
213 | &S390_lowcore.vector_save_area) : "1"); | |
cad49cfc | 214 | __ctl_load(S390_lowcore.cregs_save_area[0], 0, 0); |
80703617 | 215 | } |
975be635 | 216 | /* Validate access registers */ |
94c12cc7 MS |
217 | asm volatile( |
218 | " lam 0,15,0(%0)" | |
219 | : : "a" (&S390_lowcore.access_regs_save_area)); | |
dc6e1555 | 220 | if (!mci.ar) { |
77fa2245 HC |
221 | /* |
222 | * Access registers have unknown contents. | |
223 | * Terminating task. | |
224 | */ | |
225 | kill_task = 1; | |
f5daba1d | 226 | } |
77fa2245 | 227 | /* |
975be635 | 228 | * We don't even try to validate the TOD register, since we simply |
77fa2245 HC |
229 | * can't write something sensible into that register. |
230 | */ | |
77fa2245 | 231 | /* |
975be635 | 232 | * See if we can validate the TOD programmable register with its |
77fa2245 HC |
233 | * old contents (should be zero) otherwise set it to zero. |
234 | */ | |
dc6e1555 | 235 | if (!mci.pr) |
94c12cc7 MS |
236 | asm volatile( |
237 | " sr 0,0\n" | |
238 | " sckpf" | |
239 | : : : "0", "cc"); | |
77fa2245 HC |
240 | else |
241 | asm volatile( | |
86fa7087 | 242 | " l 0,%0\n" |
94c12cc7 | 243 | " sckpf" |
86fa7087 | 244 | : : "Q" (S390_lowcore.tod_progreg_save_area) |
94c12cc7 | 245 | : "0", "cc"); |
975be635 | 246 | /* Validate clock comparator register */ |
b6bed093 | 247 | set_clock_comparator(S390_lowcore.clock_comparator); |
77fa2245 | 248 | /* Check if old PSW is valid */ |
dc6e1555 | 249 | if (!mci.wp) |
77fa2245 HC |
250 | /* |
251 | * Can't tell if we come from user or kernel mode | |
252 | * -> stopping machine. | |
253 | */ | |
3d68286a | 254 | s390_handle_damage(); |
77fa2245 | 255 | |
dc6e1555 | 256 | if (!mci.ms || !mci.pm || !mci.ia) |
77fa2245 HC |
257 | kill_task = 1; |
258 | ||
259 | return kill_task; | |
260 | } | |
261 | ||
b73d40c6 | 262 | #define MAX_IPD_COUNT 29 |
022e4fc0 | 263 | #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ |
b73d40c6 | 264 | |
f5daba1d HC |
265 | #define ED_STP_ISLAND 6 /* External damage STP island check */ |
266 | #define ED_STP_SYNC 7 /* External damage STP sync check */ | |
f5daba1d | 267 | |
77fa2245 HC |
268 | /* |
269 | * machine check handler. | |
270 | */ | |
cc54c1e6 | 271 | void notrace s390_do_machine_check(struct pt_regs *regs) |
77fa2245 | 272 | { |
f5daba1d | 273 | static int ipd_count; |
b73d40c6 HC |
274 | static DEFINE_SPINLOCK(ipd_lock); |
275 | static unsigned long long last_ipd; | |
f5daba1d | 276 | struct mcck_struct *mcck; |
b73d40c6 | 277 | unsigned long long tmp; |
dc6e1555 | 278 | union mci mci; |
77fa2245 | 279 | |
81f64b87 | 280 | nmi_enter(); |
420f42ec | 281 | inc_irq_stat(NMI_NMI); |
dc6e1555 | 282 | mci.val = S390_lowcore.mcck_interruption_code; |
eb7e7d76 | 283 | mcck = this_cpu_ptr(&cpu_mcck); |
77fa2245 | 284 | |
dc6e1555 | 285 | if (mci.sd) { |
77fa2245 | 286 | /* System damage -> stopping machine */ |
3d68286a | 287 | s390_handle_damage(); |
f5daba1d | 288 | } |
dc6e1555 HC |
289 | if (mci.pd) { |
290 | if (mci.b) { | |
77fa2245 HC |
291 | /* Processing backup -> verify if we can survive this */ |
292 | u64 z_mcic, o_mcic, t_mcic; | |
77fa2245 HC |
293 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); |
294 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
295 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
296 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | | |
297 | 1ULL<<16); | |
dc6e1555 | 298 | t_mcic = mci.val; |
77fa2245 HC |
299 | |
300 | if (((t_mcic & z_mcic) != 0) || | |
301 | ((t_mcic & o_mcic) != o_mcic)) { | |
3d68286a | 302 | s390_handle_damage(); |
77fa2245 | 303 | } |
b73d40c6 HC |
304 | |
305 | /* | |
306 | * Nullifying exigent condition, therefore we might | |
307 | * retry this instruction. | |
308 | */ | |
b73d40c6 | 309 | spin_lock(&ipd_lock); |
1aae0560 | 310 | tmp = get_tod_clock(); |
b73d40c6 HC |
311 | if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) |
312 | ipd_count++; | |
313 | else | |
314 | ipd_count = 1; | |
b73d40c6 | 315 | last_ipd = tmp; |
b73d40c6 | 316 | if (ipd_count == MAX_IPD_COUNT) |
3d68286a | 317 | s390_handle_damage(); |
b73d40c6 | 318 | spin_unlock(&ipd_lock); |
f5daba1d | 319 | } else { |
77fa2245 | 320 | /* Processing damage -> stopping machine */ |
3d68286a | 321 | s390_handle_damage(); |
77fa2245 HC |
322 | } |
323 | } | |
8f149ea6 MS |
324 | if (s390_validate_registers(mci, user_mode(regs))) { |
325 | /* | |
326 | * Couldn't restore all register contents for the | |
327 | * user space process -> mark task for termination. | |
328 | */ | |
329 | mcck->kill_task = 1; | |
330 | mcck->mcck_code = mci.val; | |
331 | set_cpu_flag(CIF_MCCK_PENDING); | |
77fa2245 | 332 | } |
dc6e1555 | 333 | if (mci.cd) { |
d54853ef | 334 | /* Timing facility damage */ |
3d68286a | 335 | s390_handle_damage(); |
d54853ef | 336 | } |
dc6e1555 | 337 | if (mci.ed && mci.ec) { |
d54853ef | 338 | /* External damage */ |
d2fec595 | 339 | if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC)) |
29b0a825 | 340 | mcck->stp_queue |= stp_sync_check(); |
d2fec595 | 341 | if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND)) |
29b0a825 | 342 | mcck->stp_queue |= stp_island_check(); |
fd5ada04 | 343 | if (mcck->stp_queue) |
29b0a825 | 344 | set_cpu_flag(CIF_MCCK_PENDING); |
d54853ef | 345 | } |
dc6e1555 | 346 | if (mci.se) |
77fa2245 | 347 | /* Storage error uncorrected */ |
3d68286a | 348 | s390_handle_damage(); |
dc6e1555 | 349 | if (mci.ke) |
77fa2245 | 350 | /* Storage key-error uncorrected */ |
3d68286a | 351 | s390_handle_damage(); |
dc6e1555 | 352 | if (mci.ds && mci.fa) |
77fa2245 | 353 | /* Storage degradation */ |
3d68286a | 354 | s390_handle_damage(); |
dc6e1555 | 355 | if (mci.cp) { |
77fa2245 HC |
356 | /* Channel report word pending */ |
357 | mcck->channel_report = 1; | |
d3a73acb | 358 | set_cpu_flag(CIF_MCCK_PENDING); |
77fa2245 | 359 | } |
dc6e1555 | 360 | if (mci.w) { |
77fa2245 HC |
361 | /* Warning pending */ |
362 | mcck->warning = 1; | |
d3a73acb | 363 | set_cpu_flag(CIF_MCCK_PENDING); |
77fa2245 | 364 | } |
81f64b87 | 365 | nmi_exit(); |
1da177e4 LT |
366 | } |
367 | ||
f5daba1d | 368 | static int __init machine_check_init(void) |
1da177e4 | 369 | { |
d54853ef | 370 | ctl_set_bit(14, 25); /* enable external damage MCH */ |
f5daba1d | 371 | ctl_set_bit(14, 27); /* enable system recovery MCH */ |
1da177e4 | 372 | ctl_set_bit(14, 24); /* enable warning MCH */ |
1da177e4 LT |
373 | return 0; |
374 | } | |
24d05ff8 | 375 | early_initcall(machine_check_init); |