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Commit | Line | Data |
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1da177e4 | 1 | /* |
f5daba1d | 2 | * Machine check handler |
1da177e4 | 3 | * |
a53c8fab | 4 | * Copyright IBM Corp. 2000, 2009 |
f5daba1d HC |
5 | * Author(s): Ingo Adlung <adlung@de.ibm.com>, |
6 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, | |
7 | * Cornelia Huck <cornelia.huck@de.ibm.com>, | |
8 | * Heiko Carstens <heiko.carstens@de.ibm.com>, | |
1da177e4 LT |
9 | */ |
10 | ||
052ff461 | 11 | #include <linux/kernel_stat.h> |
1da177e4 | 12 | #include <linux/init.h> |
1da177e4 | 13 | #include <linux/errno.h> |
81f64b87 | 14 | #include <linux/hardirq.h> |
022e4fc0 | 15 | #include <linux/time.h> |
f5daba1d | 16 | #include <linux/module.h> |
1da177e4 | 17 | #include <asm/lowcore.h> |
f5daba1d HC |
18 | #include <asm/smp.h> |
19 | #include <asm/etr.h> | |
76d4e00a | 20 | #include <asm/cputime.h> |
f5daba1d HC |
21 | #include <asm/nmi.h> |
22 | #include <asm/crw.h> | |
80703617 | 23 | #include <asm/switch_to.h> |
cad49cfc | 24 | #include <asm/ctl_reg.h> |
1da177e4 | 25 | |
77fa2245 HC |
26 | struct mcck_struct { |
27 | int kill_task; | |
28 | int channel_report; | |
29 | int warning; | |
29b0a825 HC |
30 | unsigned int etr_queue : 1; |
31 | unsigned int stp_queue : 1; | |
dc6e1555 | 32 | unsigned long mcck_code; |
77fa2245 HC |
33 | }; |
34 | ||
35 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); | |
36 | ||
3d68286a | 37 | static void s390_handle_damage(void) |
f5daba1d HC |
38 | { |
39 | smp_send_stop(); | |
40 | disabled_wait((unsigned long) __builtin_return_address(0)); | |
41 | while (1); | |
42 | } | |
43 | ||
1da177e4 | 44 | /* |
77fa2245 HC |
45 | * Main machine check handler function. Will be called with interrupts enabled |
46 | * or disabled and machine checks enabled or disabled. | |
1da177e4 | 47 | */ |
f5daba1d | 48 | void s390_handle_mcck(void) |
1da177e4 | 49 | { |
77fa2245 HC |
50 | unsigned long flags; |
51 | struct mcck_struct mcck; | |
1da177e4 | 52 | |
77fa2245 HC |
53 | /* |
54 | * Disable machine checks and get the current state of accumulated | |
55 | * machine checks. Afterwards delete the old state and enable machine | |
56 | * checks again. | |
57 | */ | |
58 | local_irq_save(flags); | |
59 | local_mcck_disable(); | |
2cb4a182 SO |
60 | mcck = *this_cpu_ptr(&cpu_mcck); |
61 | memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck)); | |
d3a73acb | 62 | clear_cpu_flag(CIF_MCCK_PENDING); |
77fa2245 HC |
63 | local_mcck_enable(); |
64 | local_irq_restore(flags); | |
1da177e4 | 65 | |
77fa2245 | 66 | if (mcck.channel_report) |
f5daba1d | 67 | crw_handle_channel_report(); |
7b886416 HC |
68 | /* |
69 | * A warning may remain for a prolonged period on the bare iron. | |
70 | * (actually until the machine is powered off, or the problem is gone) | |
71 | * So we just stop listening for the WARNING MCH and avoid continuously | |
72 | * being interrupted. One caveat is however, that we must do this per | |
73 | * processor and cannot use the smp version of ctl_clear_bit(). | |
74 | * On VM we only get one interrupt per virtally presented machinecheck. | |
75 | * Though one suffices, we may get one interrupt per (virtual) cpu. | |
76 | */ | |
77fa2245 | 77 | if (mcck.warning) { /* WARNING pending ? */ |
1da177e4 | 78 | static int mchchk_wng_posted = 0; |
7b886416 HC |
79 | |
80 | /* Use single cpu clear, as we cannot handle smp here. */ | |
1da177e4 LT |
81 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ |
82 | if (xchg(&mchchk_wng_posted, 1) == 0) | |
9ec52099 | 83 | kill_cad_pid(SIGPWR, 1); |
1da177e4 | 84 | } |
29b0a825 HC |
85 | if (mcck.etr_queue) |
86 | etr_queue_work(); | |
87 | if (mcck.stp_queue) | |
88 | stp_queue_work(); | |
77fa2245 HC |
89 | if (mcck.kill_task) { |
90 | local_irq_enable(); | |
91 | printk(KERN_EMERG "mcck: Terminating task because of machine " | |
dc6e1555 | 92 | "malfunction (code 0x%016lx).\n", mcck.mcck_code); |
77fa2245 HC |
93 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", |
94 | current->comm, current->pid); | |
95 | do_exit(SIGSEGV); | |
96 | } | |
97 | } | |
71cde587 | 98 | EXPORT_SYMBOL_GPL(s390_handle_mcck); |
77fa2245 HC |
99 | |
100 | /* | |
101 | * returns 0 if all registers could be validated | |
102 | * returns 1 otherwise | |
103 | */ | |
975be635 | 104 | static int notrace s390_validate_registers(union mci mci) |
77fa2245 HC |
105 | { |
106 | int kill_task; | |
77fa2245 HC |
107 | u64 zero; |
108 | void *fpt_save_area, *fpt_creg_save_area; | |
109 | ||
110 | kill_task = 0; | |
111 | zero = 0; | |
f5daba1d | 112 | |
dc6e1555 | 113 | if (!mci.gr) { |
77fa2245 HC |
114 | /* |
115 | * General purpose registers couldn't be restored and have | |
116 | * unknown contents. Process needs to be terminated. | |
117 | */ | |
118 | kill_task = 1; | |
f5daba1d | 119 | } |
dc6e1555 | 120 | if (!mci.fp) { |
77fa2245 HC |
121 | /* |
122 | * Floating point registers can't be restored and | |
123 | * therefore the process needs to be terminated. | |
124 | */ | |
125 | kill_task = 1; | |
f5daba1d | 126 | } |
5a79859a HC |
127 | fpt_save_area = &S390_lowcore.floating_pt_save_area; |
128 | fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; | |
dc6e1555 | 129 | if (!mci.fc) { |
5a79859a HC |
130 | /* |
131 | * Floating point control register can't be restored. | |
132 | * Task will be terminated. | |
133 | */ | |
134 | asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); | |
135 | kill_task = 1; | |
136 | } else | |
137 | asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); | |
138 | ||
cad49cfc | 139 | if (!MACHINE_HAS_VX) { |
975be635 | 140 | /* Validate floating point registers */ |
cad49cfc HC |
141 | asm volatile( |
142 | " ld 0,0(%0)\n" | |
143 | " ld 1,8(%0)\n" | |
144 | " ld 2,16(%0)\n" | |
145 | " ld 3,24(%0)\n" | |
146 | " ld 4,32(%0)\n" | |
147 | " ld 5,40(%0)\n" | |
148 | " ld 6,48(%0)\n" | |
149 | " ld 7,56(%0)\n" | |
150 | " ld 8,64(%0)\n" | |
151 | " ld 9,72(%0)\n" | |
152 | " ld 10,80(%0)\n" | |
153 | " ld 11,88(%0)\n" | |
154 | " ld 12,96(%0)\n" | |
155 | " ld 13,104(%0)\n" | |
156 | " ld 14,112(%0)\n" | |
157 | " ld 15,120(%0)\n" | |
158 | : : "a" (fpt_save_area)); | |
159 | } else { | |
975be635 | 160 | /* Validate vector registers */ |
cad49cfc HC |
161 | union ctlreg0 cr0; |
162 | ||
dc6e1555 | 163 | if (!mci.vr) { |
80703617 MS |
164 | /* |
165 | * Vector registers can't be restored and therefore | |
166 | * the process needs to be terminated. | |
167 | */ | |
168 | kill_task = 1; | |
169 | } | |
cad49cfc HC |
170 | cr0.val = S390_lowcore.cregs_save_area[0]; |
171 | cr0.afp = cr0.vx = 1; | |
172 | __ctl_load(cr0.val, 0, 0); | |
9977e886 HB |
173 | asm volatile( |
174 | " la 1,%0\n" | |
175 | " .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */ | |
176 | " .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */ | |
177 | : : "Q" (*(struct vx_array *) | |
178 | &S390_lowcore.vector_save_area) : "1"); | |
cad49cfc | 179 | __ctl_load(S390_lowcore.cregs_save_area[0], 0, 0); |
80703617 | 180 | } |
975be635 | 181 | /* Validate access registers */ |
94c12cc7 MS |
182 | asm volatile( |
183 | " lam 0,15,0(%0)" | |
184 | : : "a" (&S390_lowcore.access_regs_save_area)); | |
dc6e1555 | 185 | if (!mci.ar) { |
77fa2245 HC |
186 | /* |
187 | * Access registers have unknown contents. | |
188 | * Terminating task. | |
189 | */ | |
190 | kill_task = 1; | |
f5daba1d | 191 | } |
975be635 | 192 | /* Validate control registers */ |
dc6e1555 | 193 | if (!mci.cr) { |
77fa2245 HC |
194 | /* |
195 | * Control registers have unknown contents. | |
196 | * Can't recover and therefore stopping machine. | |
197 | */ | |
3d68286a | 198 | s390_handle_damage(); |
f5daba1d | 199 | } else { |
94c12cc7 MS |
200 | asm volatile( |
201 | " lctlg 0,15,0(%0)" | |
202 | : : "a" (&S390_lowcore.cregs_save_area)); | |
f5daba1d | 203 | } |
77fa2245 | 204 | /* |
975be635 | 205 | * We don't even try to validate the TOD register, since we simply |
77fa2245 HC |
206 | * can't write something sensible into that register. |
207 | */ | |
77fa2245 | 208 | /* |
975be635 | 209 | * See if we can validate the TOD programmable register with its |
77fa2245 HC |
210 | * old contents (should be zero) otherwise set it to zero. |
211 | */ | |
dc6e1555 | 212 | if (!mci.pr) |
94c12cc7 MS |
213 | asm volatile( |
214 | " sr 0,0\n" | |
215 | " sckpf" | |
216 | : : : "0", "cc"); | |
77fa2245 HC |
217 | else |
218 | asm volatile( | |
94c12cc7 MS |
219 | " l 0,0(%0)\n" |
220 | " sckpf" | |
221 | : : "a" (&S390_lowcore.tod_progreg_save_area) | |
222 | : "0", "cc"); | |
975be635 | 223 | /* Validate clock comparator register */ |
b6bed093 | 224 | set_clock_comparator(S390_lowcore.clock_comparator); |
77fa2245 | 225 | /* Check if old PSW is valid */ |
dc6e1555 | 226 | if (!mci.wp) |
77fa2245 HC |
227 | /* |
228 | * Can't tell if we come from user or kernel mode | |
229 | * -> stopping machine. | |
230 | */ | |
3d68286a | 231 | s390_handle_damage(); |
77fa2245 | 232 | |
dc6e1555 | 233 | if (!mci.ms || !mci.pm || !mci.ia) |
77fa2245 HC |
234 | kill_task = 1; |
235 | ||
236 | return kill_task; | |
237 | } | |
238 | ||
b73d40c6 | 239 | #define MAX_IPD_COUNT 29 |
022e4fc0 | 240 | #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ |
b73d40c6 | 241 | |
f5daba1d HC |
242 | #define ED_STP_ISLAND 6 /* External damage STP island check */ |
243 | #define ED_STP_SYNC 7 /* External damage STP sync check */ | |
244 | #define ED_ETR_SYNC 12 /* External damage ETR sync check */ | |
245 | #define ED_ETR_SWITCH 13 /* External damage ETR switch to local */ | |
246 | ||
77fa2245 HC |
247 | /* |
248 | * machine check handler. | |
249 | */ | |
cc54c1e6 | 250 | void notrace s390_do_machine_check(struct pt_regs *regs) |
77fa2245 | 251 | { |
f5daba1d | 252 | static int ipd_count; |
b73d40c6 HC |
253 | static DEFINE_SPINLOCK(ipd_lock); |
254 | static unsigned long long last_ipd; | |
f5daba1d | 255 | struct mcck_struct *mcck; |
b73d40c6 | 256 | unsigned long long tmp; |
dc6e1555 | 257 | union mci mci; |
77fa2245 HC |
258 | int umode; |
259 | ||
81f64b87 | 260 | nmi_enter(); |
420f42ec | 261 | inc_irq_stat(NMI_NMI); |
dc6e1555 | 262 | mci.val = S390_lowcore.mcck_interruption_code; |
eb7e7d76 | 263 | mcck = this_cpu_ptr(&cpu_mcck); |
77fa2245 HC |
264 | umode = user_mode(regs); |
265 | ||
dc6e1555 | 266 | if (mci.sd) { |
77fa2245 | 267 | /* System damage -> stopping machine */ |
3d68286a | 268 | s390_handle_damage(); |
f5daba1d | 269 | } |
dc6e1555 HC |
270 | if (mci.pd) { |
271 | if (mci.b) { | |
77fa2245 HC |
272 | /* Processing backup -> verify if we can survive this */ |
273 | u64 z_mcic, o_mcic, t_mcic; | |
77fa2245 HC |
274 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); |
275 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
276 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
277 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | | |
278 | 1ULL<<16); | |
dc6e1555 | 279 | t_mcic = mci.val; |
77fa2245 HC |
280 | |
281 | if (((t_mcic & z_mcic) != 0) || | |
282 | ((t_mcic & o_mcic) != o_mcic)) { | |
3d68286a | 283 | s390_handle_damage(); |
77fa2245 | 284 | } |
b73d40c6 HC |
285 | |
286 | /* | |
287 | * Nullifying exigent condition, therefore we might | |
288 | * retry this instruction. | |
289 | */ | |
b73d40c6 | 290 | spin_lock(&ipd_lock); |
1aae0560 | 291 | tmp = get_tod_clock(); |
b73d40c6 HC |
292 | if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) |
293 | ipd_count++; | |
294 | else | |
295 | ipd_count = 1; | |
b73d40c6 | 296 | last_ipd = tmp; |
b73d40c6 | 297 | if (ipd_count == MAX_IPD_COUNT) |
3d68286a | 298 | s390_handle_damage(); |
b73d40c6 | 299 | spin_unlock(&ipd_lock); |
f5daba1d | 300 | } else { |
77fa2245 | 301 | /* Processing damage -> stopping machine */ |
3d68286a | 302 | s390_handle_damage(); |
77fa2245 HC |
303 | } |
304 | } | |
975be635 | 305 | if (s390_validate_registers(mci)) { |
77fa2245 HC |
306 | if (umode) { |
307 | /* | |
308 | * Couldn't restore all register contents while in | |
309 | * user mode -> mark task for termination. | |
310 | */ | |
311 | mcck->kill_task = 1; | |
dc6e1555 | 312 | mcck->mcck_code = mci.val; |
d3a73acb | 313 | set_cpu_flag(CIF_MCCK_PENDING); |
f5daba1d | 314 | } else { |
77fa2245 HC |
315 | /* |
316 | * Couldn't restore all register contents while in | |
317 | * kernel mode -> stopping machine. | |
318 | */ | |
3d68286a | 319 | s390_handle_damage(); |
f5daba1d | 320 | } |
77fa2245 | 321 | } |
dc6e1555 | 322 | if (mci.cd) { |
d54853ef | 323 | /* Timing facility damage */ |
3d68286a | 324 | s390_handle_damage(); |
d54853ef | 325 | } |
dc6e1555 | 326 | if (mci.ed && mci.ec) { |
d54853ef MS |
327 | /* External damage */ |
328 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC)) | |
29b0a825 | 329 | mcck->etr_queue |= etr_sync_check(); |
d54853ef | 330 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH)) |
29b0a825 | 331 | mcck->etr_queue |= etr_switch_to_local(); |
d2fec595 | 332 | if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC)) |
29b0a825 | 333 | mcck->stp_queue |= stp_sync_check(); |
d2fec595 | 334 | if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND)) |
29b0a825 HC |
335 | mcck->stp_queue |= stp_island_check(); |
336 | if (mcck->etr_queue || mcck->stp_queue) | |
337 | set_cpu_flag(CIF_MCCK_PENDING); | |
d54853ef | 338 | } |
dc6e1555 | 339 | if (mci.se) |
77fa2245 | 340 | /* Storage error uncorrected */ |
3d68286a | 341 | s390_handle_damage(); |
dc6e1555 | 342 | if (mci.ke) |
77fa2245 | 343 | /* Storage key-error uncorrected */ |
3d68286a | 344 | s390_handle_damage(); |
dc6e1555 | 345 | if (mci.ds && mci.fa) |
77fa2245 | 346 | /* Storage degradation */ |
3d68286a | 347 | s390_handle_damage(); |
dc6e1555 | 348 | if (mci.cp) { |
77fa2245 HC |
349 | /* Channel report word pending */ |
350 | mcck->channel_report = 1; | |
d3a73acb | 351 | set_cpu_flag(CIF_MCCK_PENDING); |
77fa2245 | 352 | } |
dc6e1555 | 353 | if (mci.w) { |
77fa2245 HC |
354 | /* Warning pending */ |
355 | mcck->warning = 1; | |
d3a73acb | 356 | set_cpu_flag(CIF_MCCK_PENDING); |
77fa2245 | 357 | } |
81f64b87 | 358 | nmi_exit(); |
1da177e4 LT |
359 | } |
360 | ||
f5daba1d | 361 | static int __init machine_check_init(void) |
1da177e4 | 362 | { |
d54853ef | 363 | ctl_set_bit(14, 25); /* enable external damage MCH */ |
f5daba1d | 364 | ctl_set_bit(14, 27); /* enable system recovery MCH */ |
1da177e4 | 365 | ctl_set_bit(14, 24); /* enable warning MCH */ |
1da177e4 LT |
366 | return 0; |
367 | } | |
24d05ff8 | 368 | early_initcall(machine_check_init); |