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1da177e4 1/*
5e9a2692 2 * Ptrace user space interface.
1da177e4 3 *
a53c8fab 4 * Copyright IBM Corp. 1999, 2010
5e9a2692 5 * Author(s): Denis Joseph Barrow
1da177e4 6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
1da177e4
LT
7 */
8
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/mm.h>
12#include <linux/smp.h>
1da177e4
LT
13#include <linux/errno.h>
14#include <linux/ptrace.h>
15#include <linux/user.h>
16#include <linux/security.h>
17#include <linux/audit.h>
7ed20e1a 18#include <linux/signal.h>
63506c41
MS
19#include <linux/elf.h>
20#include <linux/regset.h>
753c4dd6 21#include <linux/tracehook.h>
bcf5cef7 22#include <linux/seccomp.h>
048cd4e5 23#include <linux/compat.h>
9bf1226b 24#include <trace/syscall.h>
1da177e4
LT
25#include <asm/segment.h>
26#include <asm/page.h>
27#include <asm/pgtable.h>
28#include <asm/pgalloc.h>
1da177e4 29#include <asm/uaccess.h>
778959db 30#include <asm/unistd.h>
a0616cde 31#include <asm/switch_to.h>
a806170e 32#include "entry.h"
1da177e4 33
347a8dc3 34#ifdef CONFIG_COMPAT
1da177e4
LT
35#include "compat_ptrace.h"
36#endif
37
1c569f02
JS
38#define CREATE_TRACE_POINTS
39#include <trace/events/syscalls.h>
5e9ad7df 40
64597f9d 41void update_cr_regs(struct task_struct *task)
1da177e4 42{
5e9a2692
MS
43 struct pt_regs *regs = task_pt_regs(task);
44 struct thread_struct *thread = &task->thread;
a45aff52 45 struct per_regs old, new;
5e9a2692 46
d35339a4 47 /* Take care of the enable/disable of transactional execution. */
9977e886 48 if (MACHINE_HAS_TE) {
c63badeb 49 unsigned long cr, cr_new;
d35339a4 50
c63badeb 51 __ctl_store(cr, 0, 0);
9977e886
HB
52 /* Set or clear transaction execution TXC bit 8. */
53 cr_new = cr | (1UL << 55);
54 if (task->thread.per_flags & PER_FLAG_NO_TE)
55 cr_new &= ~(1UL << 55);
c63badeb 56 if (cr_new != cr)
a8a934e4 57 __ctl_load(cr_new, 0, 0);
9977e886
HB
58 /* Set or clear transaction execution TDC bits 62 and 63. */
59 __ctl_store(cr, 2, 2);
60 cr_new = cr & ~3UL;
61 if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND) {
62 if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND_TEND)
63 cr_new |= 1UL;
64 else
65 cr_new |= 2UL;
64597f9d 66 }
9977e886
HB
67 if (cr_new != cr)
68 __ctl_load(cr_new, 2, 2);
d35339a4 69 }
a45aff52
MS
70 /* Copy user specified PER registers */
71 new.control = thread->per_user.control;
72 new.start = thread->per_user.start;
73 new.end = thread->per_user.end;
74
75 /* merge TIF_SINGLE_STEP into user specified PER registers. */
2a0a5b22
JW
76 if (test_tsk_thread_flag(task, TIF_SINGLE_STEP) ||
77 test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) {
818a330c
MS
78 if (test_tsk_thread_flag(task, TIF_BLOCK_STEP))
79 new.control |= PER_EVENT_BRANCH;
80 else
81 new.control |= PER_EVENT_IFETCH;
d35339a4
MS
82 new.control |= PER_CONTROL_SUSPENSION;
83 new.control |= PER_EVENT_TRANSACTION_END;
2a0a5b22
JW
84 if (test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP))
85 new.control |= PER_EVENT_IFETCH;
a45aff52
MS
86 new.start = 0;
87 new.end = PSW_ADDR_INSN;
88 }
5e9a2692
MS
89
90 /* Take care of the PER enablement bit in the PSW. */
a45aff52 91 if (!(new.control & PER_EVENT_MASK)) {
1da177e4 92 regs->psw.mask &= ~PSW_MASK_PER;
5e9a2692 93 return;
c3311c13 94 }
5e9a2692
MS
95 regs->psw.mask |= PSW_MASK_PER;
96 __ctl_store(old, 9, 11);
a45aff52
MS
97 if (memcmp(&new, &old, sizeof(struct per_regs)) != 0)
98 __ctl_load(new, 9, 11);
1da177e4
LT
99}
100
0ac30be4 101void user_enable_single_step(struct task_struct *task)
1da177e4 102{
818a330c 103 clear_tsk_thread_flag(task, TIF_BLOCK_STEP);
5e9a2692 104 set_tsk_thread_flag(task, TIF_SINGLE_STEP);
1da177e4
LT
105}
106
0ac30be4 107void user_disable_single_step(struct task_struct *task)
1da177e4 108{
818a330c 109 clear_tsk_thread_flag(task, TIF_BLOCK_STEP);
5e9a2692 110 clear_tsk_thread_flag(task, TIF_SINGLE_STEP);
1da177e4
LT
111}
112
818a330c
MS
113void user_enable_block_step(struct task_struct *task)
114{
115 set_tsk_thread_flag(task, TIF_SINGLE_STEP);
116 set_tsk_thread_flag(task, TIF_BLOCK_STEP);
117}
118
1da177e4
LT
119/*
120 * Called by kernel/ptrace.c when detaching..
121 *
5e9a2692 122 * Clear all debugging related fields.
1da177e4 123 */
5e9a2692 124void ptrace_disable(struct task_struct *task)
1da177e4 125{
5e9a2692
MS
126 memset(&task->thread.per_user, 0, sizeof(task->thread.per_user));
127 memset(&task->thread.per_event, 0, sizeof(task->thread.per_event));
128 clear_tsk_thread_flag(task, TIF_SINGLE_STEP);
d3a73acb 129 clear_pt_regs_flag(task_pt_regs(task), PIF_PER_TRAP);
d35339a4 130 task->thread.per_flags = 0;
1da177e4
LT
131}
132
5a79859a 133#define __ADDR_MASK 7
1da177e4 134
5e9a2692
MS
135static inline unsigned long __peek_user_per(struct task_struct *child,
136 addr_t addr)
137{
138 struct per_struct_kernel *dummy = NULL;
139
140 if (addr == (addr_t) &dummy->cr9)
141 /* Control bits of the active per set. */
142 return test_thread_flag(TIF_SINGLE_STEP) ?
143 PER_EVENT_IFETCH : child->thread.per_user.control;
144 else if (addr == (addr_t) &dummy->cr10)
145 /* Start address of the active per set. */
146 return test_thread_flag(TIF_SINGLE_STEP) ?
147 0 : child->thread.per_user.start;
148 else if (addr == (addr_t) &dummy->cr11)
149 /* End address of the active per set. */
150 return test_thread_flag(TIF_SINGLE_STEP) ?
151 PSW_ADDR_INSN : child->thread.per_user.end;
152 else if (addr == (addr_t) &dummy->bits)
153 /* Single-step bit. */
154 return test_thread_flag(TIF_SINGLE_STEP) ?
155 (1UL << (BITS_PER_LONG - 1)) : 0;
156 else if (addr == (addr_t) &dummy->starting_addr)
157 /* Start address of the user specified per set. */
158 return child->thread.per_user.start;
159 else if (addr == (addr_t) &dummy->ending_addr)
160 /* End address of the user specified per set. */
161 return child->thread.per_user.end;
162 else if (addr == (addr_t) &dummy->perc_atmid)
163 /* PER code, ATMID and AI of the last PER trap */
164 return (unsigned long)
165 child->thread.per_event.cause << (BITS_PER_LONG - 16);
166 else if (addr == (addr_t) &dummy->address)
167 /* Address of the last PER trap */
168 return child->thread.per_event.address;
169 else if (addr == (addr_t) &dummy->access_id)
170 /* Access id of the last PER trap */
171 return (unsigned long)
172 child->thread.per_event.paid << (BITS_PER_LONG - 8);
173 return 0;
174}
175
1da177e4
LT
176/*
177 * Read the word at offset addr from the user area of a process. The
178 * trouble here is that the information is littered over different
179 * locations. The process registers are found on the kernel stack,
180 * the floating point stuff and the trace settings are stored in
181 * the task structure. In addition the different structures in
182 * struct user contain pad bytes that should be read as zeroes.
183 * Lovely...
184 */
63506c41 185static unsigned long __peek_user(struct task_struct *child, addr_t addr)
1da177e4
LT
186{
187 struct user *dummy = NULL;
63506c41 188 addr_t offset, tmp;
1da177e4
LT
189
190 if (addr < (addr_t) &dummy->regs.acrs) {
191 /*
192 * psw and gprs are stored on the stack
193 */
c7584fb6 194 tmp = *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr);
5ebf250d 195 if (addr == (addr_t) &dummy->regs.psw.mask) {
b50511e4 196 /* Return a clean psw mask. */
5ebf250d
HC
197 tmp &= PSW_MASK_USER | PSW_MASK_RI;
198 tmp |= PSW_USER_BITS;
199 }
1da177e4
LT
200
201 } else if (addr < (addr_t) &dummy->regs.orig_gpr2) {
202 /*
203 * access registers are stored in the thread structure
204 */
205 offset = addr - (addr_t) &dummy->regs.acrs;
778959db
MS
206 /*
207 * Very special case: old & broken 64 bit gdb reading
208 * from acrs[15]. Result is a 64 bit value. Read the
209 * 32 bit acrs[15] value and shift it by 32. Sick...
210 */
211 if (addr == (addr_t) &dummy->regs.acrs[15])
212 tmp = ((unsigned long) child->thread.acrs[15]) << 32;
213 else
5a79859a 214 tmp = *(addr_t *)((addr_t) &child->thread.acrs + offset);
1da177e4
LT
215
216 } else if (addr == (addr_t) &dummy->regs.orig_gpr2) {
217 /*
218 * orig_gpr2 is stored on the kernel stack
219 */
c7584fb6 220 tmp = (addr_t) task_pt_regs(child)->orig_gpr2;
1da177e4 221
3d6e48f4
JW
222 } else if (addr < (addr_t) &dummy->regs.fp_regs) {
223 /*
224 * prevent reads of padding hole between
225 * orig_gpr2 and fp_regs on s390.
226 */
227 tmp = 0;
228
86c558e8
MS
229 } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) {
230 /*
231 * floating point control reg. is in the thread structure
232 */
904818e2 233 tmp = child->thread.fpu.fpc;
86c558e8
MS
234 tmp <<= BITS_PER_LONG - 32;
235
1da177e4 236 } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) {
86c558e8 237 /*
904818e2
HB
238 * floating point regs. are either in child->thread.fpu
239 * or the child->thread.fpu.vxrs array
1da177e4 240 */
86c558e8 241 offset = addr - (addr_t) &dummy->regs.fp_regs.fprs;
904818e2 242 if (is_vx_task(child))
86c558e8 243 tmp = *(addr_t *)
904818e2 244 ((addr_t) child->thread.fpu.vxrs + 2*offset);
86c558e8 245 else
86c558e8 246 tmp = *(addr_t *)
904818e2 247 ((addr_t) &child->thread.fpu.fprs + offset);
1da177e4
LT
248
249 } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) {
250 /*
5e9a2692 251 * Handle access to the per_info structure.
1da177e4 252 */
5e9a2692
MS
253 addr -= (addr_t) &dummy->regs.per_info;
254 tmp = __peek_user_per(child, addr);
1da177e4
LT
255
256 } else
257 tmp = 0;
258
63506c41 259 return tmp;
1da177e4
LT
260}
261
1da177e4 262static int
63506c41 263peek_user(struct task_struct *child, addr_t addr, addr_t data)
1da177e4 264{
63506c41 265 addr_t tmp, mask;
1da177e4
LT
266
267 /*
268 * Stupid gdb peeks/pokes the access registers in 64 bit with
63506c41 269 * an alignment of 4. Programmers from hell...
1da177e4 270 */
778959db 271 mask = __ADDR_MASK;
547e3cec
MS
272 if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs &&
273 addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2)
778959db 274 mask = 3;
778959db 275 if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK)
1da177e4
LT
276 return -EIO;
277
63506c41
MS
278 tmp = __peek_user(child, addr);
279 return put_user(tmp, (addr_t __user *) data);
280}
281
5e9a2692
MS
282static inline void __poke_user_per(struct task_struct *child,
283 addr_t addr, addr_t data)
284{
285 struct per_struct_kernel *dummy = NULL;
286
287 /*
288 * There are only three fields in the per_info struct that the
289 * debugger user can write to.
290 * 1) cr9: the debugger wants to set a new PER event mask
291 * 2) starting_addr: the debugger wants to set a new starting
292 * address to use with the PER event mask.
293 * 3) ending_addr: the debugger wants to set a new ending
294 * address to use with the PER event mask.
295 * The user specified PER event mask and the start and end
296 * addresses are used only if single stepping is not in effect.
297 * Writes to any other field in per_info are ignored.
298 */
299 if (addr == (addr_t) &dummy->cr9)
300 /* PER event mask of the user specified per set. */
301 child->thread.per_user.control =
302 data & (PER_EVENT_MASK | PER_CONTROL_MASK);
303 else if (addr == (addr_t) &dummy->starting_addr)
304 /* Starting address of the user specified per set. */
305 child->thread.per_user.start = data;
306 else if (addr == (addr_t) &dummy->ending_addr)
307 /* Ending address of the user specified per set. */
308 child->thread.per_user.end = data;
309}
310
63506c41
MS
311/*
312 * Write a word to the user area of a process at location addr. This
313 * operation does have an additional problem compared to peek_user.
314 * Stores to the program status word and on the floating point
315 * control register needs to get checked for validity.
316 */
317static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
318{
319 struct user *dummy = NULL;
d4e81b35 320 addr_t offset;
63506c41 321
1da177e4
LT
322 if (addr < (addr_t) &dummy->regs.acrs) {
323 /*
324 * psw and gprs are stored on the stack
325 */
5ebf250d
HC
326 if (addr == (addr_t) &dummy->regs.psw.mask) {
327 unsigned long mask = PSW_MASK_USER;
328
329 mask |= is_ri_task(child) ? PSW_MASK_RI : 0;
dab6cf55
MS
330 if ((data ^ PSW_USER_BITS) & ~mask)
331 /* Invalid psw mask. */
332 return -EINVAL;
333 if ((data & PSW_MASK_ASC) == PSW_ASC_HOME)
334 /* Invalid address-space-control bits */
5ebf250d
HC
335 return -EINVAL;
336 if ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA))
dab6cf55 337 /* Invalid addressing mode bits */
5ebf250d
HC
338 return -EINVAL;
339 }
c7584fb6 340 *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data;
1da177e4
LT
341
342 } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) {
343 /*
344 * access registers are stored in the thread structure
345 */
346 offset = addr - (addr_t) &dummy->regs.acrs;
778959db
MS
347 /*
348 * Very special case: old & broken 64 bit gdb writing
349 * to acrs[15] with a 64 bit value. Ignore the lower
350 * half of the value and write the upper 32 bit to
351 * acrs[15]. Sick...
352 */
353 if (addr == (addr_t) &dummy->regs.acrs[15])
354 child->thread.acrs[15] = (unsigned int) (data >> 32);
355 else
5a79859a 356 *(addr_t *)((addr_t) &child->thread.acrs + offset) = data;
1da177e4
LT
357
358 } else if (addr == (addr_t) &dummy->regs.orig_gpr2) {
359 /*
360 * orig_gpr2 is stored on the kernel stack
361 */
c7584fb6 362 task_pt_regs(child)->orig_gpr2 = data;
1da177e4 363
3d6e48f4
JW
364 } else if (addr < (addr_t) &dummy->regs.fp_regs) {
365 /*
366 * prevent writes of padding hole between
367 * orig_gpr2 and fp_regs on s390.
368 */
369 return 0;
370
86c558e8
MS
371 } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) {
372 /*
373 * floating point control reg. is in the thread structure
374 */
375 if ((unsigned int) data != 0 ||
376 test_fp_ctl(data >> (BITS_PER_LONG - 32)))
377 return -EINVAL;
904818e2 378 child->thread.fpu.fpc = data >> (BITS_PER_LONG - 32);
86c558e8 379
1da177e4
LT
380 } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) {
381 /*
904818e2
HB
382 * floating point regs. are either in child->thread.fpu
383 * or the child->thread.fpu.vxrs array
1da177e4 384 */
86c558e8 385 offset = addr - (addr_t) &dummy->regs.fp_regs.fprs;
904818e2 386 if (is_vx_task(child))
86c558e8 387 *(addr_t *)((addr_t)
904818e2 388 child->thread.fpu.vxrs + 2*offset) = data;
86c558e8 389 else
86c558e8 390 *(addr_t *)((addr_t)
904818e2 391 &child->thread.fpu.fprs + offset) = data;
1da177e4
LT
392
393 } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) {
394 /*
5e9a2692 395 * Handle access to the per_info structure.
1da177e4 396 */
5e9a2692
MS
397 addr -= (addr_t) &dummy->regs.per_info;
398 __poke_user_per(child, addr, data);
1da177e4
LT
399
400 }
401
1da177e4
LT
402 return 0;
403}
404
5e9a2692 405static int poke_user(struct task_struct *child, addr_t addr, addr_t data)
63506c41 406{
63506c41
MS
407 addr_t mask;
408
409 /*
410 * Stupid gdb peeks/pokes the access registers in 64 bit with
411 * an alignment of 4. Programmers from hell indeed...
412 */
413 mask = __ADDR_MASK;
547e3cec
MS
414 if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs &&
415 addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2)
63506c41 416 mask = 3;
63506c41
MS
417 if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK)
418 return -EIO;
419
420 return __poke_user(child, addr, data);
421}
422
9b05a69e
NK
423long arch_ptrace(struct task_struct *child, long request,
424 unsigned long addr, unsigned long data)
1da177e4 425{
1da177e4
LT
426 ptrace_area parea;
427 int copied, ret;
428
429 switch (request) {
1da177e4
LT
430 case PTRACE_PEEKUSR:
431 /* read the word at location addr in the USER area. */
432 return peek_user(child, addr, data);
433
1da177e4
LT
434 case PTRACE_POKEUSR:
435 /* write the word at location addr in the USER area */
436 return poke_user(child, addr, data);
437
438 case PTRACE_PEEKUSR_AREA:
439 case PTRACE_POKEUSR_AREA:
2b67fc46 440 if (copy_from_user(&parea, (void __force __user *) addr,
1da177e4
LT
441 sizeof(parea)))
442 return -EFAULT;
443 addr = parea.kernel_addr;
444 data = parea.process_addr;
445 copied = 0;
446 while (copied < parea.len) {
447 if (request == PTRACE_PEEKUSR_AREA)
448 ret = peek_user(child, addr, data);
449 else {
2b67fc46
HC
450 addr_t utmp;
451 if (get_user(utmp,
452 (addr_t __force __user *) data))
1da177e4 453 return -EFAULT;
2b67fc46 454 ret = poke_user(child, addr, utmp);
1da177e4
LT
455 }
456 if (ret)
457 return ret;
458 addr += sizeof(unsigned long);
459 data += sizeof(unsigned long);
460 copied += sizeof(unsigned long);
461 }
462 return 0;
86f2552b
MS
463 case PTRACE_GET_LAST_BREAK:
464 put_user(task_thread_info(child)->last_break,
465 (unsigned long __user *) data);
466 return 0;
d35339a4
MS
467 case PTRACE_ENABLE_TE:
468 if (!MACHINE_HAS_TE)
469 return -EIO;
470 child->thread.per_flags &= ~PER_FLAG_NO_TE;
471 return 0;
472 case PTRACE_DISABLE_TE:
473 if (!MACHINE_HAS_TE)
474 return -EIO;
475 child->thread.per_flags |= PER_FLAG_NO_TE;
64597f9d
MM
476 child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND;
477 return 0;
478 case PTRACE_TE_ABORT_RAND:
479 if (!MACHINE_HAS_TE || (child->thread.per_flags & PER_FLAG_NO_TE))
480 return -EIO;
481 switch (data) {
482 case 0UL:
483 child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND;
484 break;
485 case 1UL:
486 child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND;
487 child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND_TEND;
488 break;
489 case 2UL:
490 child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND;
491 child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND_TEND;
492 break;
493 default:
494 return -EINVAL;
495 }
d35339a4 496 return 0;
07805ac8
CB
497 default:
498 /* Removing high order bit from addr (only for 31 bit). */
499 addr &= PSW_ADDR_INSN;
500 return ptrace_request(child, request, addr, data);
1da177e4 501 }
1da177e4
LT
502}
503
347a8dc3 504#ifdef CONFIG_COMPAT
1da177e4
LT
505/*
506 * Now the fun part starts... a 31 bit program running in the
507 * 31 bit emulation tracing another program. PTRACE_PEEKTEXT,
508 * PTRACE_PEEKDATA, PTRACE_POKETEXT and PTRACE_POKEDATA are easy
509 * to handle, the difference to the 64 bit versions of the requests
510 * is that the access is done in multiples of 4 byte instead of
511 * 8 bytes (sizeof(unsigned long) on 31/64 bit).
512 * The ugly part are PTRACE_PEEKUSR, PTRACE_PEEKUSR_AREA,
513 * PTRACE_POKEUSR and PTRACE_POKEUSR_AREA. If the traced program
514 * is a 31 bit program too, the content of struct user can be
515 * emulated. A 31 bit program peeking into the struct user of
516 * a 64 bit program is a no-no.
517 */
518
5e9a2692
MS
519/*
520 * Same as peek_user_per but for a 31 bit program.
521 */
522static inline __u32 __peek_user_per_compat(struct task_struct *child,
523 addr_t addr)
524{
525 struct compat_per_struct_kernel *dummy32 = NULL;
526
527 if (addr == (addr_t) &dummy32->cr9)
528 /* Control bits of the active per set. */
529 return (__u32) test_thread_flag(TIF_SINGLE_STEP) ?
530 PER_EVENT_IFETCH : child->thread.per_user.control;
531 else if (addr == (addr_t) &dummy32->cr10)
532 /* Start address of the active per set. */
533 return (__u32) test_thread_flag(TIF_SINGLE_STEP) ?
534 0 : child->thread.per_user.start;
535 else if (addr == (addr_t) &dummy32->cr11)
536 /* End address of the active per set. */
537 return test_thread_flag(TIF_SINGLE_STEP) ?
538 PSW32_ADDR_INSN : child->thread.per_user.end;
539 else if (addr == (addr_t) &dummy32->bits)
540 /* Single-step bit. */
541 return (__u32) test_thread_flag(TIF_SINGLE_STEP) ?
542 0x80000000 : 0;
543 else if (addr == (addr_t) &dummy32->starting_addr)
544 /* Start address of the user specified per set. */
545 return (__u32) child->thread.per_user.start;
546 else if (addr == (addr_t) &dummy32->ending_addr)
547 /* End address of the user specified per set. */
548 return (__u32) child->thread.per_user.end;
549 else if (addr == (addr_t) &dummy32->perc_atmid)
550 /* PER code, ATMID and AI of the last PER trap */
551 return (__u32) child->thread.per_event.cause << 16;
552 else if (addr == (addr_t) &dummy32->address)
553 /* Address of the last PER trap */
554 return (__u32) child->thread.per_event.address;
555 else if (addr == (addr_t) &dummy32->access_id)
556 /* Access id of the last PER trap */
557 return (__u32) child->thread.per_event.paid << 24;
558 return 0;
559}
560
1da177e4
LT
561/*
562 * Same as peek_user but for a 31 bit program.
563 */
63506c41 564static u32 __peek_user_compat(struct task_struct *child, addr_t addr)
1da177e4 565{
5e9a2692 566 struct compat_user *dummy32 = NULL;
1da177e4
LT
567 addr_t offset;
568 __u32 tmp;
569
1da177e4 570 if (addr < (addr_t) &dummy32->regs.acrs) {
b50511e4 571 struct pt_regs *regs = task_pt_regs(child);
1da177e4
LT
572 /*
573 * psw and gprs are stored on the stack
574 */
575 if (addr == (addr_t) &dummy32->regs.psw.mask) {
576 /* Fake a 31 bit psw mask. */
b50511e4 577 tmp = (__u32)(regs->psw.mask >> 32);
5ebf250d 578 tmp &= PSW32_MASK_USER | PSW32_MASK_RI;
f26946d7 579 tmp |= PSW32_USER_BITS;
1da177e4
LT
580 } else if (addr == (addr_t) &dummy32->regs.psw.addr) {
581 /* Fake a 31 bit psw address. */
d4e81b35
MS
582 tmp = (__u32) regs->psw.addr |
583 (__u32)(regs->psw.mask & PSW_MASK_BA);
1da177e4
LT
584 } else {
585 /* gpr 0-15 */
b50511e4 586 tmp = *(__u32 *)((addr_t) &regs->psw + addr*2 + 4);
1da177e4
LT
587 }
588 } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) {
589 /*
590 * access registers are stored in the thread structure
591 */
592 offset = addr - (addr_t) &dummy32->regs.acrs;
593 tmp = *(__u32*)((addr_t) &child->thread.acrs + offset);
594
595 } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) {
596 /*
597 * orig_gpr2 is stored on the kernel stack
598 */
c7584fb6 599 tmp = *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4);
1da177e4 600
3d6e48f4
JW
601 } else if (addr < (addr_t) &dummy32->regs.fp_regs) {
602 /*
603 * prevent reads of padding hole between
604 * orig_gpr2 and fp_regs on s390.
605 */
606 tmp = 0;
607
86c558e8
MS
608 } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) {
609 /*
610 * floating point control reg. is in the thread structure
611 */
904818e2 612 tmp = child->thread.fpu.fpc;
86c558e8 613
1da177e4
LT
614 } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) {
615 /*
904818e2
HB
616 * floating point regs. are either in child->thread.fpu
617 * or the child->thread.fpu.vxrs array
1da177e4 618 */
86c558e8 619 offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs;
904818e2 620 if (is_vx_task(child))
86c558e8 621 tmp = *(__u32 *)
904818e2 622 ((addr_t) child->thread.fpu.vxrs + 2*offset);
86c558e8 623 else
86c558e8 624 tmp = *(__u32 *)
904818e2 625 ((addr_t) &child->thread.fpu.fprs + offset);
1da177e4
LT
626
627 } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) {
628 /*
5e9a2692 629 * Handle access to the per_info structure.
1da177e4 630 */
5e9a2692
MS
631 addr -= (addr_t) &dummy32->regs.per_info;
632 tmp = __peek_user_per_compat(child, addr);
1da177e4
LT
633
634 } else
635 tmp = 0;
636
63506c41
MS
637 return tmp;
638}
639
640static int peek_user_compat(struct task_struct *child,
641 addr_t addr, addr_t data)
642{
643 __u32 tmp;
644
7757591a 645 if (!is_compat_task() || (addr & 3) || addr > sizeof(struct user) - 3)
63506c41
MS
646 return -EIO;
647
648 tmp = __peek_user_compat(child, addr);
1da177e4
LT
649 return put_user(tmp, (__u32 __user *) data);
650}
651
5e9a2692
MS
652/*
653 * Same as poke_user_per but for a 31 bit program.
654 */
655static inline void __poke_user_per_compat(struct task_struct *child,
656 addr_t addr, __u32 data)
657{
658 struct compat_per_struct_kernel *dummy32 = NULL;
659
660 if (addr == (addr_t) &dummy32->cr9)
661 /* PER event mask of the user specified per set. */
662 child->thread.per_user.control =
663 data & (PER_EVENT_MASK | PER_CONTROL_MASK);
664 else if (addr == (addr_t) &dummy32->starting_addr)
665 /* Starting address of the user specified per set. */
666 child->thread.per_user.start = data;
667 else if (addr == (addr_t) &dummy32->ending_addr)
668 /* Ending address of the user specified per set. */
669 child->thread.per_user.end = data;
670}
671
1da177e4
LT
672/*
673 * Same as poke_user but for a 31 bit program.
674 */
63506c41
MS
675static int __poke_user_compat(struct task_struct *child,
676 addr_t addr, addr_t data)
1da177e4 677{
5e9a2692 678 struct compat_user *dummy32 = NULL;
63506c41 679 __u32 tmp = (__u32) data;
1da177e4 680 addr_t offset;
1da177e4
LT
681
682 if (addr < (addr_t) &dummy32->regs.acrs) {
b50511e4 683 struct pt_regs *regs = task_pt_regs(child);
1da177e4
LT
684 /*
685 * psw, gprs, acrs and orig_gpr2 are stored on the stack
686 */
687 if (addr == (addr_t) &dummy32->regs.psw.mask) {
5ebf250d
HC
688 __u32 mask = PSW32_MASK_USER;
689
690 mask |= is_ri_task(child) ? PSW32_MASK_RI : 0;
1da177e4 691 /* Build a 64 bit psw mask from 31 bit mask. */
dab6cf55 692 if ((tmp ^ PSW32_USER_BITS) & ~mask)
1da177e4
LT
693 /* Invalid psw mask. */
694 return -EINVAL;
dab6cf55
MS
695 if ((data & PSW32_MASK_ASC) == PSW32_ASC_HOME)
696 /* Invalid address-space-control bits */
697 return -EINVAL;
b50511e4 698 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
d4e81b35 699 (regs->psw.mask & PSW_MASK_BA) |
5ebf250d 700 (__u64)(tmp & mask) << 32;
1da177e4
LT
701 } else if (addr == (addr_t) &dummy32->regs.psw.addr) {
702 /* Build a 64 bit psw address from 31 bit address. */
b50511e4 703 regs->psw.addr = (__u64) tmp & PSW32_ADDR_INSN;
d4e81b35
MS
704 /* Transfer 31 bit amode bit to psw mask. */
705 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) |
706 (__u64)(tmp & PSW32_ADDR_AMODE);
1da177e4
LT
707 } else {
708 /* gpr 0-15 */
b50511e4 709 *(__u32*)((addr_t) &regs->psw + addr*2 + 4) = tmp;
1da177e4
LT
710 }
711 } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) {
712 /*
713 * access registers are stored in the thread structure
714 */
715 offset = addr - (addr_t) &dummy32->regs.acrs;
716 *(__u32*)((addr_t) &child->thread.acrs + offset) = tmp;
717
718 } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) {
719 /*
720 * orig_gpr2 is stored on the kernel stack
721 */
c7584fb6 722 *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4) = tmp;
1da177e4 723
3d6e48f4
JW
724 } else if (addr < (addr_t) &dummy32->regs.fp_regs) {
725 /*
726 * prevent writess of padding hole between
727 * orig_gpr2 and fp_regs on s390.
728 */
729 return 0;
730
86c558e8 731 } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) {
1da177e4 732 /*
86c558e8 733 * floating point control reg. is in the thread structure
1da177e4 734 */
86c558e8 735 if (test_fp_ctl(tmp))
1da177e4 736 return -EINVAL;
904818e2 737 child->thread.fpu.fpc = data;
86c558e8
MS
738
739 } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) {
740 /*
904818e2
HB
741 * floating point regs. are either in child->thread.fpu
742 * or the child->thread.fpu.vxrs array
86c558e8
MS
743 */
744 offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs;
904818e2 745 if (is_vx_task(child))
86c558e8 746 *(__u32 *)((addr_t)
904818e2 747 child->thread.fpu.vxrs + 2*offset) = tmp;
86c558e8 748 else
86c558e8 749 *(__u32 *)((addr_t)
904818e2 750 &child->thread.fpu.fprs + offset) = tmp;
1da177e4
LT
751
752 } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) {
753 /*
5e9a2692 754 * Handle access to the per_info structure.
1da177e4 755 */
5e9a2692
MS
756 addr -= (addr_t) &dummy32->regs.per_info;
757 __poke_user_per_compat(child, addr, data);
1da177e4
LT
758 }
759
1da177e4
LT
760 return 0;
761}
762
63506c41
MS
763static int poke_user_compat(struct task_struct *child,
764 addr_t addr, addr_t data)
765{
5e9a2692
MS
766 if (!is_compat_task() || (addr & 3) ||
767 addr > sizeof(struct compat_user) - 3)
63506c41
MS
768 return -EIO;
769
770 return __poke_user_compat(child, addr, data);
771}
772
b499d76b
RM
773long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
774 compat_ulong_t caddr, compat_ulong_t cdata)
1da177e4 775{
b499d76b
RM
776 unsigned long addr = caddr;
777 unsigned long data = cdata;
5e9a2692 778 compat_ptrace_area parea;
1da177e4
LT
779 int copied, ret;
780
781 switch (request) {
1da177e4
LT
782 case PTRACE_PEEKUSR:
783 /* read the word at location addr in the USER area. */
63506c41 784 return peek_user_compat(child, addr, data);
1da177e4 785
1da177e4
LT
786 case PTRACE_POKEUSR:
787 /* write the word at location addr in the USER area */
63506c41 788 return poke_user_compat(child, addr, data);
1da177e4
LT
789
790 case PTRACE_PEEKUSR_AREA:
791 case PTRACE_POKEUSR_AREA:
2b67fc46 792 if (copy_from_user(&parea, (void __force __user *) addr,
1da177e4
LT
793 sizeof(parea)))
794 return -EFAULT;
795 addr = parea.kernel_addr;
796 data = parea.process_addr;
797 copied = 0;
798 while (copied < parea.len) {
799 if (request == PTRACE_PEEKUSR_AREA)
63506c41 800 ret = peek_user_compat(child, addr, data);
1da177e4 801 else {
2b67fc46
HC
802 __u32 utmp;
803 if (get_user(utmp,
804 (__u32 __force __user *) data))
1da177e4 805 return -EFAULT;
63506c41 806 ret = poke_user_compat(child, addr, utmp);
1da177e4
LT
807 }
808 if (ret)
809 return ret;
810 addr += sizeof(unsigned int);
811 data += sizeof(unsigned int);
812 copied += sizeof(unsigned int);
813 }
814 return 0;
86f2552b
MS
815 case PTRACE_GET_LAST_BREAK:
816 put_user(task_thread_info(child)->last_break,
817 (unsigned int __user *) data);
818 return 0;
1da177e4 819 }
b499d76b 820 return compat_ptrace_request(child, request, addr, data);
1da177e4
LT
821}
822#endif
823
753c4dd6 824asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
1da177e4 825{
545c174d 826 long ret = 0;
1da177e4 827
bcf5cef7 828 /* Do the secure computing check first. */
a4412fc9 829 if (secure_computing()) {
c63cb468
HC
830 /* seccomp failures shouldn't expose any additional code. */
831 ret = -1;
832 goto out;
833 }
bcf5cef7 834
c5c3a6d8 835 /*
753c4dd6
MS
836 * The sysc_tracesys code in entry.S stored the system
837 * call number to gprs[2].
c5c3a6d8 838 */
753c4dd6
MS
839 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
840 (tracehook_report_syscall_entry(regs) ||
841 regs->gprs[2] >= NR_syscalls)) {
842 /*
843 * Tracing decided this syscall should not happen or the
844 * debugger stored an invalid system call number. Skip
845 * the system call and the system call restart handling.
846 */
d3a73acb 847 clear_pt_regs_flag(regs, PIF_SYSCALL);
753c4dd6 848 ret = -1;
1da177e4 849 }
753c4dd6 850
66700001 851 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1c569f02 852 trace_sys_enter(regs, regs->gprs[2]);
9bf1226b 853
91397401 854 audit_syscall_entry(regs->gprs[2], regs->orig_gpr2,
b05d8447
EP
855 regs->gprs[3], regs->gprs[4],
856 regs->gprs[5]);
c63cb468 857out:
545c174d 858 return ret ?: regs->gprs[2];
753c4dd6
MS
859}
860
861asmlinkage void do_syscall_trace_exit(struct pt_regs *regs)
862{
d7e7528b 863 audit_syscall_exit(regs);
753c4dd6 864
66700001 865 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1c569f02 866 trace_sys_exit(regs, regs->gprs[2]);
9bf1226b 867
753c4dd6
MS
868 if (test_thread_flag(TIF_SYSCALL_TRACE))
869 tracehook_report_syscall_exit(regs, 0);
1da177e4 870}
63506c41
MS
871
872/*
873 * user_regset definitions.
874 */
875
876static int s390_regs_get(struct task_struct *target,
877 const struct user_regset *regset,
878 unsigned int pos, unsigned int count,
879 void *kbuf, void __user *ubuf)
880{
881 if (target == current)
882 save_access_regs(target->thread.acrs);
883
884 if (kbuf) {
885 unsigned long *k = kbuf;
886 while (count > 0) {
887 *k++ = __peek_user(target, pos);
888 count -= sizeof(*k);
889 pos += sizeof(*k);
890 }
891 } else {
892 unsigned long __user *u = ubuf;
893 while (count > 0) {
894 if (__put_user(__peek_user(target, pos), u++))
895 return -EFAULT;
896 count -= sizeof(*u);
897 pos += sizeof(*u);
898 }
899 }
900 return 0;
901}
902
903static int s390_regs_set(struct task_struct *target,
904 const struct user_regset *regset,
905 unsigned int pos, unsigned int count,
906 const void *kbuf, const void __user *ubuf)
907{
908 int rc = 0;
909
910 if (target == current)
911 save_access_regs(target->thread.acrs);
912
913 if (kbuf) {
914 const unsigned long *k = kbuf;
915 while (count > 0 && !rc) {
916 rc = __poke_user(target, pos, *k++);
917 count -= sizeof(*k);
918 pos += sizeof(*k);
919 }
920 } else {
921 const unsigned long __user *u = ubuf;
922 while (count > 0 && !rc) {
923 unsigned long word;
924 rc = __get_user(word, u++);
925 if (rc)
926 break;
927 rc = __poke_user(target, pos, word);
928 count -= sizeof(*u);
929 pos += sizeof(*u);
930 }
931 }
932
933 if (rc == 0 && target == current)
934 restore_access_regs(target->thread.acrs);
935
936 return rc;
937}
938
939static int s390_fpregs_get(struct task_struct *target,
940 const struct user_regset *regset, unsigned int pos,
941 unsigned int count, void *kbuf, void __user *ubuf)
942{
904818e2
HB
943 _s390_fp_regs fp_regs;
944
945 if (target == current)
d0164ee2 946 save_fpu_regs();
904818e2
HB
947
948 fp_regs.fpc = target->thread.fpu.fpc;
949 fpregs_store(&fp_regs, &target->thread.fpu);
63506c41
MS
950
951 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
904818e2 952 &fp_regs, 0, -1);
63506c41
MS
953}
954
955static int s390_fpregs_set(struct task_struct *target,
956 const struct user_regset *regset, unsigned int pos,
957 unsigned int count, const void *kbuf,
958 const void __user *ubuf)
959{
960 int rc = 0;
904818e2 961 freg_t fprs[__NUM_FPRS];
63506c41 962
904818e2 963 if (target == current)
d0164ee2 964 save_fpu_regs();
63506c41
MS
965
966 /* If setting FPC, must validate it first. */
967 if (count > 0 && pos < offsetof(s390_fp_regs, fprs)) {
904818e2 968 u32 ufpc[2] = { target->thread.fpu.fpc, 0 };
4725c860 969 rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ufpc,
63506c41
MS
970 0, offsetof(s390_fp_regs, fprs));
971 if (rc)
972 return rc;
4725c860 973 if (ufpc[1] != 0 || test_fp_ctl(ufpc[0]))
63506c41 974 return -EINVAL;
904818e2 975 target->thread.fpu.fpc = ufpc[0];
63506c41
MS
976 }
977
978 if (rc == 0 && count > 0)
979 rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
904818e2
HB
980 fprs, offsetof(s390_fp_regs, fprs), -1);
981 if (rc)
982 return rc;
63506c41 983
904818e2
HB
984 if (is_vx_task(target))
985 convert_fp_to_vx(target->thread.fpu.vxrs, fprs);
986 else
987 memcpy(target->thread.fpu.fprs, &fprs, sizeof(fprs));
988
63506c41
MS
989 return rc;
990}
991
86f2552b
MS
992static int s390_last_break_get(struct task_struct *target,
993 const struct user_regset *regset,
994 unsigned int pos, unsigned int count,
995 void *kbuf, void __user *ubuf)
996{
997 if (count > 0) {
998 if (kbuf) {
999 unsigned long *k = kbuf;
1000 *k = task_thread_info(target)->last_break;
1001 } else {
1002 unsigned long __user *u = ubuf;
1003 if (__put_user(task_thread_info(target)->last_break, u))
1004 return -EFAULT;
1005 }
1006 }
1007 return 0;
1008}
1009
b934069c
MS
1010static int s390_last_break_set(struct task_struct *target,
1011 const struct user_regset *regset,
1012 unsigned int pos, unsigned int count,
1013 const void *kbuf, const void __user *ubuf)
1014{
1015 return 0;
1016}
1017
d35339a4
MS
1018static int s390_tdb_get(struct task_struct *target,
1019 const struct user_regset *regset,
1020 unsigned int pos, unsigned int count,
1021 void *kbuf, void __user *ubuf)
1022{
1023 struct pt_regs *regs = task_pt_regs(target);
1024 unsigned char *data;
1025
1026 if (!(regs->int_code & 0x200))
1027 return -ENODATA;
1028 data = target->thread.trap_tdb;
1029 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, data, 0, 256);
1030}
1031
1032static int s390_tdb_set(struct task_struct *target,
1033 const struct user_regset *regset,
1034 unsigned int pos, unsigned int count,
1035 const void *kbuf, const void __user *ubuf)
1036{
1037 return 0;
1038}
1039
80703617
MS
1040static int s390_vxrs_low_get(struct task_struct *target,
1041 const struct user_regset *regset,
1042 unsigned int pos, unsigned int count,
1043 void *kbuf, void __user *ubuf)
1044{
1045 __u64 vxrs[__NUM_VXRS_LOW];
1046 int i;
1047
7490daf0
MS
1048 if (!MACHINE_HAS_VX)
1049 return -ENODEV;
904818e2 1050 if (is_vx_task(target)) {
80703617 1051 if (target == current)
d0164ee2 1052 save_fpu_regs();
80703617 1053 for (i = 0; i < __NUM_VXRS_LOW; i++)
904818e2 1054 vxrs[i] = *((__u64 *)(target->thread.fpu.vxrs + i) + 1);
80703617
MS
1055 } else
1056 memset(vxrs, 0, sizeof(vxrs));
1057 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1);
1058}
1059
1060static int s390_vxrs_low_set(struct task_struct *target,
1061 const struct user_regset *regset,
1062 unsigned int pos, unsigned int count,
1063 const void *kbuf, const void __user *ubuf)
1064{
1065 __u64 vxrs[__NUM_VXRS_LOW];
1066 int i, rc;
1067
7490daf0
MS
1068 if (!MACHINE_HAS_VX)
1069 return -ENODEV;
904818e2 1070 if (!is_vx_task(target)) {
80703617
MS
1071 rc = alloc_vector_registers(target);
1072 if (rc)
1073 return rc;
1074 } else if (target == current)
d0164ee2 1075 save_fpu_regs();
80703617
MS
1076
1077 rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1);
9977e886 1078 if (rc == 0)
80703617 1079 for (i = 0; i < __NUM_VXRS_LOW; i++)
904818e2 1080 *((__u64 *)(target->thread.fpu.vxrs + i) + 1) = vxrs[i];
80703617
MS
1081
1082 return rc;
1083}
1084
1085static int s390_vxrs_high_get(struct task_struct *target,
1086 const struct user_regset *regset,
1087 unsigned int pos, unsigned int count,
1088 void *kbuf, void __user *ubuf)
1089{
1090 __vector128 vxrs[__NUM_VXRS_HIGH];
1091
7490daf0
MS
1092 if (!MACHINE_HAS_VX)
1093 return -ENODEV;
904818e2 1094 if (is_vx_task(target)) {
80703617 1095 if (target == current)
d0164ee2 1096 save_fpu_regs();
904818e2 1097 memcpy(vxrs, target->thread.fpu.vxrs + __NUM_VXRS_LOW,
80703617
MS
1098 sizeof(vxrs));
1099 } else
1100 memset(vxrs, 0, sizeof(vxrs));
1101 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1);
1102}
1103
1104static int s390_vxrs_high_set(struct task_struct *target,
1105 const struct user_regset *regset,
1106 unsigned int pos, unsigned int count,
1107 const void *kbuf, const void __user *ubuf)
1108{
1109 int rc;
1110
7490daf0
MS
1111 if (!MACHINE_HAS_VX)
1112 return -ENODEV;
904818e2 1113 if (!is_vx_task(target)) {
80703617
MS
1114 rc = alloc_vector_registers(target);
1115 if (rc)
1116 return rc;
1117 } else if (target == current)
d0164ee2 1118 save_fpu_regs();
80703617
MS
1119
1120 rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
904818e2 1121 target->thread.fpu.vxrs + __NUM_VXRS_LOW, 0, -1);
80703617
MS
1122 return rc;
1123}
1124
20b40a79
MS
1125static int s390_system_call_get(struct task_struct *target,
1126 const struct user_regset *regset,
1127 unsigned int pos, unsigned int count,
1128 void *kbuf, void __user *ubuf)
1129{
1130 unsigned int *data = &task_thread_info(target)->system_call;
1131 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1132 data, 0, sizeof(unsigned int));
1133}
1134
1135static int s390_system_call_set(struct task_struct *target,
1136 const struct user_regset *regset,
1137 unsigned int pos, unsigned int count,
1138 const void *kbuf, const void __user *ubuf)
1139{
1140 unsigned int *data = &task_thread_info(target)->system_call;
1141 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1142 data, 0, sizeof(unsigned int));
1143}
1144
63506c41 1145static const struct user_regset s390_regsets[] = {
80703617 1146 {
63506c41
MS
1147 .core_note_type = NT_PRSTATUS,
1148 .n = sizeof(s390_regs) / sizeof(long),
1149 .size = sizeof(long),
1150 .align = sizeof(long),
1151 .get = s390_regs_get,
1152 .set = s390_regs_set,
1153 },
80703617 1154 {
63506c41
MS
1155 .core_note_type = NT_PRFPREG,
1156 .n = sizeof(s390_fp_regs) / sizeof(long),
1157 .size = sizeof(long),
1158 .align = sizeof(long),
1159 .get = s390_fpregs_get,
1160 .set = s390_fpregs_set,
1161 },
80703617
MS
1162 {
1163 .core_note_type = NT_S390_SYSTEM_CALL,
1164 .n = 1,
1165 .size = sizeof(unsigned int),
1166 .align = sizeof(unsigned int),
1167 .get = s390_system_call_get,
1168 .set = s390_system_call_set,
1169 },
80703617 1170 {
86f2552b
MS
1171 .core_note_type = NT_S390_LAST_BREAK,
1172 .n = 1,
1173 .size = sizeof(long),
1174 .align = sizeof(long),
1175 .get = s390_last_break_get,
b934069c 1176 .set = s390_last_break_set,
86f2552b 1177 },
80703617 1178 {
d35339a4
MS
1179 .core_note_type = NT_S390_TDB,
1180 .n = 1,
1181 .size = 256,
1182 .align = 1,
1183 .get = s390_tdb_get,
1184 .set = s390_tdb_set,
1185 },
80703617
MS
1186 {
1187 .core_note_type = NT_S390_VXRS_LOW,
1188 .n = __NUM_VXRS_LOW,
1189 .size = sizeof(__u64),
1190 .align = sizeof(__u64),
80703617
MS
1191 .get = s390_vxrs_low_get,
1192 .set = s390_vxrs_low_set,
20b40a79 1193 },
80703617
MS
1194 {
1195 .core_note_type = NT_S390_VXRS_HIGH,
1196 .n = __NUM_VXRS_HIGH,
1197 .size = sizeof(__vector128),
1198 .align = sizeof(__vector128),
80703617
MS
1199 .get = s390_vxrs_high_get,
1200 .set = s390_vxrs_high_set,
20b40a79 1201 },
63506c41
MS
1202};
1203
1204static const struct user_regset_view user_s390_view = {
1205 .name = UTS_MACHINE,
1206 .e_machine = EM_S390,
1207 .regsets = s390_regsets,
1208 .n = ARRAY_SIZE(s390_regsets)
1209};
1210
1211#ifdef CONFIG_COMPAT
1212static int s390_compat_regs_get(struct task_struct *target,
1213 const struct user_regset *regset,
1214 unsigned int pos, unsigned int count,
1215 void *kbuf, void __user *ubuf)
1216{
1217 if (target == current)
1218 save_access_regs(target->thread.acrs);
1219
1220 if (kbuf) {
1221 compat_ulong_t *k = kbuf;
1222 while (count > 0) {
1223 *k++ = __peek_user_compat(target, pos);
1224 count -= sizeof(*k);
1225 pos += sizeof(*k);
1226 }
1227 } else {
1228 compat_ulong_t __user *u = ubuf;
1229 while (count > 0) {
1230 if (__put_user(__peek_user_compat(target, pos), u++))
1231 return -EFAULT;
1232 count -= sizeof(*u);
1233 pos += sizeof(*u);
1234 }
1235 }
1236 return 0;
1237}
1238
1239static int s390_compat_regs_set(struct task_struct *target,
1240 const struct user_regset *regset,
1241 unsigned int pos, unsigned int count,
1242 const void *kbuf, const void __user *ubuf)
1243{
1244 int rc = 0;
1245
1246 if (target == current)
1247 save_access_regs(target->thread.acrs);
1248
1249 if (kbuf) {
1250 const compat_ulong_t *k = kbuf;
1251 while (count > 0 && !rc) {
1252 rc = __poke_user_compat(target, pos, *k++);
1253 count -= sizeof(*k);
1254 pos += sizeof(*k);
1255 }
1256 } else {
1257 const compat_ulong_t __user *u = ubuf;
1258 while (count > 0 && !rc) {
1259 compat_ulong_t word;
1260 rc = __get_user(word, u++);
1261 if (rc)
1262 break;
1263 rc = __poke_user_compat(target, pos, word);
1264 count -= sizeof(*u);
1265 pos += sizeof(*u);
1266 }
1267 }
1268
1269 if (rc == 0 && target == current)
1270 restore_access_regs(target->thread.acrs);
1271
1272 return rc;
1273}
1274
ea2a4d3a
HC
1275static int s390_compat_regs_high_get(struct task_struct *target,
1276 const struct user_regset *regset,
1277 unsigned int pos, unsigned int count,
1278 void *kbuf, void __user *ubuf)
1279{
1280 compat_ulong_t *gprs_high;
1281
1282 gprs_high = (compat_ulong_t *)
1283 &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)];
1284 if (kbuf) {
1285 compat_ulong_t *k = kbuf;
1286 while (count > 0) {
1287 *k++ = *gprs_high;
1288 gprs_high += 2;
1289 count -= sizeof(*k);
1290 }
1291 } else {
1292 compat_ulong_t __user *u = ubuf;
1293 while (count > 0) {
1294 if (__put_user(*gprs_high, u++))
1295 return -EFAULT;
1296 gprs_high += 2;
1297 count -= sizeof(*u);
1298 }
1299 }
1300 return 0;
1301}
1302
1303static int s390_compat_regs_high_set(struct task_struct *target,
1304 const struct user_regset *regset,
1305 unsigned int pos, unsigned int count,
1306 const void *kbuf, const void __user *ubuf)
1307{
1308 compat_ulong_t *gprs_high;
1309 int rc = 0;
1310
1311 gprs_high = (compat_ulong_t *)
1312 &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)];
1313 if (kbuf) {
1314 const compat_ulong_t *k = kbuf;
1315 while (count > 0) {
1316 *gprs_high = *k++;
1317 *gprs_high += 2;
1318 count -= sizeof(*k);
1319 }
1320 } else {
1321 const compat_ulong_t __user *u = ubuf;
1322 while (count > 0 && !rc) {
1323 unsigned long word;
1324 rc = __get_user(word, u++);
1325 if (rc)
1326 break;
1327 *gprs_high = word;
1328 *gprs_high += 2;
1329 count -= sizeof(*u);
1330 }
1331 }
1332
1333 return rc;
1334}
1335
86f2552b
MS
1336static int s390_compat_last_break_get(struct task_struct *target,
1337 const struct user_regset *regset,
1338 unsigned int pos, unsigned int count,
1339 void *kbuf, void __user *ubuf)
1340{
1341 compat_ulong_t last_break;
1342
1343 if (count > 0) {
1344 last_break = task_thread_info(target)->last_break;
1345 if (kbuf) {
1346 unsigned long *k = kbuf;
1347 *k = last_break;
1348 } else {
1349 unsigned long __user *u = ubuf;
1350 if (__put_user(last_break, u))
1351 return -EFAULT;
1352 }
1353 }
1354 return 0;
1355}
1356
b934069c
MS
1357static int s390_compat_last_break_set(struct task_struct *target,
1358 const struct user_regset *regset,
1359 unsigned int pos, unsigned int count,
1360 const void *kbuf, const void __user *ubuf)
1361{
1362 return 0;
1363}
1364
63506c41 1365static const struct user_regset s390_compat_regsets[] = {
80703617 1366 {
63506c41
MS
1367 .core_note_type = NT_PRSTATUS,
1368 .n = sizeof(s390_compat_regs) / sizeof(compat_long_t),
1369 .size = sizeof(compat_long_t),
1370 .align = sizeof(compat_long_t),
1371 .get = s390_compat_regs_get,
1372 .set = s390_compat_regs_set,
1373 },
80703617 1374 {
63506c41
MS
1375 .core_note_type = NT_PRFPREG,
1376 .n = sizeof(s390_fp_regs) / sizeof(compat_long_t),
1377 .size = sizeof(compat_long_t),
1378 .align = sizeof(compat_long_t),
1379 .get = s390_fpregs_get,
1380 .set = s390_fpregs_set,
1381 },
80703617
MS
1382 {
1383 .core_note_type = NT_S390_SYSTEM_CALL,
1384 .n = 1,
1385 .size = sizeof(compat_uint_t),
1386 .align = sizeof(compat_uint_t),
1387 .get = s390_system_call_get,
1388 .set = s390_system_call_set,
1389 },
1390 {
86f2552b
MS
1391 .core_note_type = NT_S390_LAST_BREAK,
1392 .n = 1,
1393 .size = sizeof(long),
1394 .align = sizeof(long),
1395 .get = s390_compat_last_break_get,
b934069c 1396 .set = s390_compat_last_break_set,
86f2552b 1397 },
80703617 1398 {
d35339a4
MS
1399 .core_note_type = NT_S390_TDB,
1400 .n = 1,
1401 .size = 256,
1402 .align = 1,
1403 .get = s390_tdb_get,
1404 .set = s390_tdb_set,
1405 },
80703617
MS
1406 {
1407 .core_note_type = NT_S390_VXRS_LOW,
1408 .n = __NUM_VXRS_LOW,
1409 .size = sizeof(__u64),
1410 .align = sizeof(__u64),
80703617
MS
1411 .get = s390_vxrs_low_get,
1412 .set = s390_vxrs_low_set,
1413 },
1414 {
1415 .core_note_type = NT_S390_VXRS_HIGH,
1416 .n = __NUM_VXRS_HIGH,
1417 .size = sizeof(__vector128),
1418 .align = sizeof(__vector128),
80703617
MS
1419 .get = s390_vxrs_high_get,
1420 .set = s390_vxrs_high_set,
20b40a79 1421 },
80703617 1422 {
622e99bf 1423 .core_note_type = NT_S390_HIGH_GPRS,
ea2a4d3a
HC
1424 .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t),
1425 .size = sizeof(compat_long_t),
1426 .align = sizeof(compat_long_t),
1427 .get = s390_compat_regs_high_get,
1428 .set = s390_compat_regs_high_set,
1429 },
63506c41
MS
1430};
1431
1432static const struct user_regset_view user_s390_compat_view = {
1433 .name = "s390",
1434 .e_machine = EM_S390,
1435 .regsets = s390_compat_regsets,
1436 .n = ARRAY_SIZE(s390_compat_regsets)
1437};
1438#endif
1439
1440const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1441{
1442#ifdef CONFIG_COMPAT
1443 if (test_tsk_thread_flag(task, TIF_31BIT))
1444 return &user_s390_compat_view;
1445#endif
1446 return &user_s390_view;
1447}
952974ac
HC
1448
1449static const char *gpr_names[NUM_GPRS] = {
1450 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1451 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1452};
1453
1454unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset)
1455{
1456 if (offset >= NUM_GPRS)
1457 return 0;
1458 return regs->gprs[offset];
1459}
1460
1461int regs_query_register_offset(const char *name)
1462{
1463 unsigned long offset;
1464
1465 if (!name || *name != 'r')
1466 return -EINVAL;
958d9072 1467 if (kstrtoul(name + 1, 10, &offset))
952974ac
HC
1468 return -EINVAL;
1469 if (offset >= NUM_GPRS)
1470 return -EINVAL;
1471 return offset;
1472}
1473
1474const char *regs_query_register_name(unsigned int offset)
1475{
1476 if (offset >= NUM_GPRS)
1477 return NULL;
1478 return gpr_names[offset];
1479}
1480
1481static int regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
1482{
1483 unsigned long ksp = kernel_stack_pointer(regs);
1484
1485 return (addr & ~(THREAD_SIZE - 1)) == (ksp & ~(THREAD_SIZE - 1));
1486}
1487
1488/**
1489 * regs_get_kernel_stack_nth() - get Nth entry of the stack
1490 * @regs:pt_regs which contains kernel stack pointer.
1491 * @n:stack entry number.
1492 *
1493 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
1494 * is specifined by @regs. If the @n th entry is NOT in the kernel stack,
1495 * this returns 0.
1496 */
1497unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
1498{
1499 unsigned long addr;
1500
1501 addr = kernel_stack_pointer(regs) + n * sizeof(long);
1502 if (!regs_within_kernel_stack(regs, addr))
1503 return 0;
1504 return *(unsigned long *)addr;
1505}