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Commit | Line | Data |
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1da177e4 | 1 | /* |
5e9a2692 | 2 | * Ptrace user space interface. |
1da177e4 | 3 | * |
a53c8fab | 4 | * Copyright IBM Corp. 1999, 2010 |
5e9a2692 | 5 | * Author(s): Denis Joseph Barrow |
1da177e4 | 6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
1da177e4 LT |
7 | */ |
8 | ||
9 | #include <linux/kernel.h> | |
10 | #include <linux/sched.h> | |
11 | #include <linux/mm.h> | |
12 | #include <linux/smp.h> | |
1da177e4 LT |
13 | #include <linux/errno.h> |
14 | #include <linux/ptrace.h> | |
15 | #include <linux/user.h> | |
16 | #include <linux/security.h> | |
17 | #include <linux/audit.h> | |
7ed20e1a | 18 | #include <linux/signal.h> |
63506c41 MS |
19 | #include <linux/elf.h> |
20 | #include <linux/regset.h> | |
753c4dd6 | 21 | #include <linux/tracehook.h> |
bcf5cef7 | 22 | #include <linux/seccomp.h> |
048cd4e5 | 23 | #include <linux/compat.h> |
9bf1226b | 24 | #include <trace/syscall.h> |
1da177e4 LT |
25 | #include <asm/segment.h> |
26 | #include <asm/page.h> | |
27 | #include <asm/pgtable.h> | |
28 | #include <asm/pgalloc.h> | |
1da177e4 | 29 | #include <asm/uaccess.h> |
778959db | 30 | #include <asm/unistd.h> |
a0616cde | 31 | #include <asm/switch_to.h> |
a806170e | 32 | #include "entry.h" |
1da177e4 | 33 | |
347a8dc3 | 34 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
35 | #include "compat_ptrace.h" |
36 | #endif | |
37 | ||
1c569f02 JS |
38 | #define CREATE_TRACE_POINTS |
39 | #include <trace/events/syscalls.h> | |
5e9ad7df | 40 | |
64597f9d | 41 | void update_cr_regs(struct task_struct *task) |
1da177e4 | 42 | { |
5e9a2692 MS |
43 | struct pt_regs *regs = task_pt_regs(task); |
44 | struct thread_struct *thread = &task->thread; | |
a45aff52 | 45 | struct per_regs old, new; |
5e9a2692 | 46 | |
d35339a4 | 47 | /* Take care of the enable/disable of transactional execution. */ |
80703617 | 48 | if (MACHINE_HAS_TE || MACHINE_HAS_VX) { |
c63badeb | 49 | unsigned long cr, cr_new; |
d35339a4 | 50 | |
c63badeb | 51 | __ctl_store(cr, 0, 0); |
80703617 MS |
52 | cr_new = cr; |
53 | if (MACHINE_HAS_TE) { | |
54 | /* Set or clear transaction execution TXC bit 8. */ | |
55 | cr_new |= (1UL << 55); | |
56 | if (task->thread.per_flags & PER_FLAG_NO_TE) | |
57 | cr_new &= ~(1UL << 55); | |
58 | } | |
59 | if (MACHINE_HAS_VX) { | |
60 | /* Enable/disable of vector extension */ | |
61 | cr_new &= ~(1UL << 17); | |
62 | if (task->thread.vxrs) | |
63 | cr_new |= (1UL << 17); | |
64 | } | |
c63badeb | 65 | if (cr_new != cr) |
a8a934e4 | 66 | __ctl_load(cr_new, 0, 0); |
80703617 MS |
67 | if (MACHINE_HAS_TE) { |
68 | /* Set/clear transaction execution TDC bits 62/63. */ | |
69 | __ctl_store(cr, 2, 2); | |
70 | cr_new = cr & ~3UL; | |
71 | if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND) { | |
72 | if (task->thread.per_flags & | |
73 | PER_FLAG_TE_ABORT_RAND_TEND) | |
74 | cr_new |= 1UL; | |
75 | else | |
76 | cr_new |= 2UL; | |
77 | } | |
78 | if (cr_new != cr) | |
79 | __ctl_load(cr_new, 2, 2); | |
64597f9d | 80 | } |
d35339a4 | 81 | } |
a45aff52 MS |
82 | /* Copy user specified PER registers */ |
83 | new.control = thread->per_user.control; | |
84 | new.start = thread->per_user.start; | |
85 | new.end = thread->per_user.end; | |
86 | ||
87 | /* merge TIF_SINGLE_STEP into user specified PER registers. */ | |
2a0a5b22 JW |
88 | if (test_tsk_thread_flag(task, TIF_SINGLE_STEP) || |
89 | test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) { | |
818a330c MS |
90 | if (test_tsk_thread_flag(task, TIF_BLOCK_STEP)) |
91 | new.control |= PER_EVENT_BRANCH; | |
92 | else | |
93 | new.control |= PER_EVENT_IFETCH; | |
d35339a4 MS |
94 | new.control |= PER_CONTROL_SUSPENSION; |
95 | new.control |= PER_EVENT_TRANSACTION_END; | |
2a0a5b22 JW |
96 | if (test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) |
97 | new.control |= PER_EVENT_IFETCH; | |
a45aff52 MS |
98 | new.start = 0; |
99 | new.end = PSW_ADDR_INSN; | |
100 | } | |
5e9a2692 MS |
101 | |
102 | /* Take care of the PER enablement bit in the PSW. */ | |
a45aff52 | 103 | if (!(new.control & PER_EVENT_MASK)) { |
1da177e4 | 104 | regs->psw.mask &= ~PSW_MASK_PER; |
5e9a2692 | 105 | return; |
c3311c13 | 106 | } |
5e9a2692 MS |
107 | regs->psw.mask |= PSW_MASK_PER; |
108 | __ctl_store(old, 9, 11); | |
a45aff52 MS |
109 | if (memcmp(&new, &old, sizeof(struct per_regs)) != 0) |
110 | __ctl_load(new, 9, 11); | |
1da177e4 LT |
111 | } |
112 | ||
0ac30be4 | 113 | void user_enable_single_step(struct task_struct *task) |
1da177e4 | 114 | { |
818a330c | 115 | clear_tsk_thread_flag(task, TIF_BLOCK_STEP); |
5e9a2692 | 116 | set_tsk_thread_flag(task, TIF_SINGLE_STEP); |
1da177e4 LT |
117 | } |
118 | ||
0ac30be4 | 119 | void user_disable_single_step(struct task_struct *task) |
1da177e4 | 120 | { |
818a330c | 121 | clear_tsk_thread_flag(task, TIF_BLOCK_STEP); |
5e9a2692 | 122 | clear_tsk_thread_flag(task, TIF_SINGLE_STEP); |
1da177e4 LT |
123 | } |
124 | ||
818a330c MS |
125 | void user_enable_block_step(struct task_struct *task) |
126 | { | |
127 | set_tsk_thread_flag(task, TIF_SINGLE_STEP); | |
128 | set_tsk_thread_flag(task, TIF_BLOCK_STEP); | |
129 | } | |
130 | ||
1da177e4 LT |
131 | /* |
132 | * Called by kernel/ptrace.c when detaching.. | |
133 | * | |
5e9a2692 | 134 | * Clear all debugging related fields. |
1da177e4 | 135 | */ |
5e9a2692 | 136 | void ptrace_disable(struct task_struct *task) |
1da177e4 | 137 | { |
5e9a2692 MS |
138 | memset(&task->thread.per_user, 0, sizeof(task->thread.per_user)); |
139 | memset(&task->thread.per_event, 0, sizeof(task->thread.per_event)); | |
140 | clear_tsk_thread_flag(task, TIF_SINGLE_STEP); | |
d3a73acb | 141 | clear_pt_regs_flag(task_pt_regs(task), PIF_PER_TRAP); |
d35339a4 | 142 | task->thread.per_flags = 0; |
1da177e4 LT |
143 | } |
144 | ||
5a79859a | 145 | #define __ADDR_MASK 7 |
1da177e4 | 146 | |
5e9a2692 MS |
147 | static inline unsigned long __peek_user_per(struct task_struct *child, |
148 | addr_t addr) | |
149 | { | |
150 | struct per_struct_kernel *dummy = NULL; | |
151 | ||
152 | if (addr == (addr_t) &dummy->cr9) | |
153 | /* Control bits of the active per set. */ | |
154 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
155 | PER_EVENT_IFETCH : child->thread.per_user.control; | |
156 | else if (addr == (addr_t) &dummy->cr10) | |
157 | /* Start address of the active per set. */ | |
158 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
159 | 0 : child->thread.per_user.start; | |
160 | else if (addr == (addr_t) &dummy->cr11) | |
161 | /* End address of the active per set. */ | |
162 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
163 | PSW_ADDR_INSN : child->thread.per_user.end; | |
164 | else if (addr == (addr_t) &dummy->bits) | |
165 | /* Single-step bit. */ | |
166 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
167 | (1UL << (BITS_PER_LONG - 1)) : 0; | |
168 | else if (addr == (addr_t) &dummy->starting_addr) | |
169 | /* Start address of the user specified per set. */ | |
170 | return child->thread.per_user.start; | |
171 | else if (addr == (addr_t) &dummy->ending_addr) | |
172 | /* End address of the user specified per set. */ | |
173 | return child->thread.per_user.end; | |
174 | else if (addr == (addr_t) &dummy->perc_atmid) | |
175 | /* PER code, ATMID and AI of the last PER trap */ | |
176 | return (unsigned long) | |
177 | child->thread.per_event.cause << (BITS_PER_LONG - 16); | |
178 | else if (addr == (addr_t) &dummy->address) | |
179 | /* Address of the last PER trap */ | |
180 | return child->thread.per_event.address; | |
181 | else if (addr == (addr_t) &dummy->access_id) | |
182 | /* Access id of the last PER trap */ | |
183 | return (unsigned long) | |
184 | child->thread.per_event.paid << (BITS_PER_LONG - 8); | |
185 | return 0; | |
186 | } | |
187 | ||
1da177e4 LT |
188 | /* |
189 | * Read the word at offset addr from the user area of a process. The | |
190 | * trouble here is that the information is littered over different | |
191 | * locations. The process registers are found on the kernel stack, | |
192 | * the floating point stuff and the trace settings are stored in | |
193 | * the task structure. In addition the different structures in | |
194 | * struct user contain pad bytes that should be read as zeroes. | |
195 | * Lovely... | |
196 | */ | |
63506c41 | 197 | static unsigned long __peek_user(struct task_struct *child, addr_t addr) |
1da177e4 LT |
198 | { |
199 | struct user *dummy = NULL; | |
63506c41 | 200 | addr_t offset, tmp; |
1da177e4 LT |
201 | |
202 | if (addr < (addr_t) &dummy->regs.acrs) { | |
203 | /* | |
204 | * psw and gprs are stored on the stack | |
205 | */ | |
c7584fb6 | 206 | tmp = *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr); |
5ebf250d | 207 | if (addr == (addr_t) &dummy->regs.psw.mask) { |
b50511e4 | 208 | /* Return a clean psw mask. */ |
5ebf250d HC |
209 | tmp &= PSW_MASK_USER | PSW_MASK_RI; |
210 | tmp |= PSW_USER_BITS; | |
211 | } | |
1da177e4 LT |
212 | |
213 | } else if (addr < (addr_t) &dummy->regs.orig_gpr2) { | |
214 | /* | |
215 | * access registers are stored in the thread structure | |
216 | */ | |
217 | offset = addr - (addr_t) &dummy->regs.acrs; | |
778959db MS |
218 | /* |
219 | * Very special case: old & broken 64 bit gdb reading | |
220 | * from acrs[15]. Result is a 64 bit value. Read the | |
221 | * 32 bit acrs[15] value and shift it by 32. Sick... | |
222 | */ | |
223 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
224 | tmp = ((unsigned long) child->thread.acrs[15]) << 32; | |
225 | else | |
5a79859a | 226 | tmp = *(addr_t *)((addr_t) &child->thread.acrs + offset); |
1da177e4 LT |
227 | |
228 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
229 | /* | |
230 | * orig_gpr2 is stored on the kernel stack | |
231 | */ | |
c7584fb6 | 232 | tmp = (addr_t) task_pt_regs(child)->orig_gpr2; |
1da177e4 | 233 | |
3d6e48f4 JW |
234 | } else if (addr < (addr_t) &dummy->regs.fp_regs) { |
235 | /* | |
236 | * prevent reads of padding hole between | |
237 | * orig_gpr2 and fp_regs on s390. | |
238 | */ | |
239 | tmp = 0; | |
240 | ||
86c558e8 MS |
241 | } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) { |
242 | /* | |
243 | * floating point control reg. is in the thread structure | |
244 | */ | |
245 | tmp = child->thread.fp_regs.fpc; | |
246 | tmp <<= BITS_PER_LONG - 32; | |
247 | ||
1da177e4 | 248 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { |
86c558e8 MS |
249 | /* |
250 | * floating point regs. are either in child->thread.fp_regs | |
251 | * or the child->thread.vxrs array | |
1da177e4 | 252 | */ |
86c558e8 | 253 | offset = addr - (addr_t) &dummy->regs.fp_regs.fprs; |
86c558e8 MS |
254 | if (child->thread.vxrs) |
255 | tmp = *(addr_t *) | |
256 | ((addr_t) child->thread.vxrs + 2*offset); | |
257 | else | |
86c558e8 MS |
258 | tmp = *(addr_t *) |
259 | ((addr_t) &child->thread.fp_regs.fprs + offset); | |
1da177e4 LT |
260 | |
261 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
262 | /* | |
5e9a2692 | 263 | * Handle access to the per_info structure. |
1da177e4 | 264 | */ |
5e9a2692 MS |
265 | addr -= (addr_t) &dummy->regs.per_info; |
266 | tmp = __peek_user_per(child, addr); | |
1da177e4 LT |
267 | |
268 | } else | |
269 | tmp = 0; | |
270 | ||
63506c41 | 271 | return tmp; |
1da177e4 LT |
272 | } |
273 | ||
1da177e4 | 274 | static int |
63506c41 | 275 | peek_user(struct task_struct *child, addr_t addr, addr_t data) |
1da177e4 | 276 | { |
63506c41 | 277 | addr_t tmp, mask; |
1da177e4 LT |
278 | |
279 | /* | |
280 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
63506c41 | 281 | * an alignment of 4. Programmers from hell... |
1da177e4 | 282 | */ |
778959db | 283 | mask = __ADDR_MASK; |
547e3cec MS |
284 | if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs && |
285 | addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2) | |
778959db | 286 | mask = 3; |
778959db | 287 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) |
1da177e4 LT |
288 | return -EIO; |
289 | ||
63506c41 MS |
290 | tmp = __peek_user(child, addr); |
291 | return put_user(tmp, (addr_t __user *) data); | |
292 | } | |
293 | ||
5e9a2692 MS |
294 | static inline void __poke_user_per(struct task_struct *child, |
295 | addr_t addr, addr_t data) | |
296 | { | |
297 | struct per_struct_kernel *dummy = NULL; | |
298 | ||
299 | /* | |
300 | * There are only three fields in the per_info struct that the | |
301 | * debugger user can write to. | |
302 | * 1) cr9: the debugger wants to set a new PER event mask | |
303 | * 2) starting_addr: the debugger wants to set a new starting | |
304 | * address to use with the PER event mask. | |
305 | * 3) ending_addr: the debugger wants to set a new ending | |
306 | * address to use with the PER event mask. | |
307 | * The user specified PER event mask and the start and end | |
308 | * addresses are used only if single stepping is not in effect. | |
309 | * Writes to any other field in per_info are ignored. | |
310 | */ | |
311 | if (addr == (addr_t) &dummy->cr9) | |
312 | /* PER event mask of the user specified per set. */ | |
313 | child->thread.per_user.control = | |
314 | data & (PER_EVENT_MASK | PER_CONTROL_MASK); | |
315 | else if (addr == (addr_t) &dummy->starting_addr) | |
316 | /* Starting address of the user specified per set. */ | |
317 | child->thread.per_user.start = data; | |
318 | else if (addr == (addr_t) &dummy->ending_addr) | |
319 | /* Ending address of the user specified per set. */ | |
320 | child->thread.per_user.end = data; | |
321 | } | |
322 | ||
63506c41 MS |
323 | /* |
324 | * Write a word to the user area of a process at location addr. This | |
325 | * operation does have an additional problem compared to peek_user. | |
326 | * Stores to the program status word and on the floating point | |
327 | * control register needs to get checked for validity. | |
328 | */ | |
329 | static int __poke_user(struct task_struct *child, addr_t addr, addr_t data) | |
330 | { | |
331 | struct user *dummy = NULL; | |
d4e81b35 | 332 | addr_t offset; |
63506c41 | 333 | |
1da177e4 LT |
334 | if (addr < (addr_t) &dummy->regs.acrs) { |
335 | /* | |
336 | * psw and gprs are stored on the stack | |
337 | */ | |
5ebf250d HC |
338 | if (addr == (addr_t) &dummy->regs.psw.mask) { |
339 | unsigned long mask = PSW_MASK_USER; | |
340 | ||
341 | mask |= is_ri_task(child) ? PSW_MASK_RI : 0; | |
dab6cf55 MS |
342 | if ((data ^ PSW_USER_BITS) & ~mask) |
343 | /* Invalid psw mask. */ | |
344 | return -EINVAL; | |
345 | if ((data & PSW_MASK_ASC) == PSW_ASC_HOME) | |
346 | /* Invalid address-space-control bits */ | |
5ebf250d HC |
347 | return -EINVAL; |
348 | if ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA)) | |
dab6cf55 | 349 | /* Invalid addressing mode bits */ |
5ebf250d HC |
350 | return -EINVAL; |
351 | } | |
c7584fb6 | 352 | *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data; |
1da177e4 LT |
353 | |
354 | } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) { | |
355 | /* | |
356 | * access registers are stored in the thread structure | |
357 | */ | |
358 | offset = addr - (addr_t) &dummy->regs.acrs; | |
778959db MS |
359 | /* |
360 | * Very special case: old & broken 64 bit gdb writing | |
361 | * to acrs[15] with a 64 bit value. Ignore the lower | |
362 | * half of the value and write the upper 32 bit to | |
363 | * acrs[15]. Sick... | |
364 | */ | |
365 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
366 | child->thread.acrs[15] = (unsigned int) (data >> 32); | |
367 | else | |
5a79859a | 368 | *(addr_t *)((addr_t) &child->thread.acrs + offset) = data; |
1da177e4 LT |
369 | |
370 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
371 | /* | |
372 | * orig_gpr2 is stored on the kernel stack | |
373 | */ | |
c7584fb6 | 374 | task_pt_regs(child)->orig_gpr2 = data; |
1da177e4 | 375 | |
3d6e48f4 JW |
376 | } else if (addr < (addr_t) &dummy->regs.fp_regs) { |
377 | /* | |
378 | * prevent writes of padding hole between | |
379 | * orig_gpr2 and fp_regs on s390. | |
380 | */ | |
381 | return 0; | |
382 | ||
86c558e8 MS |
383 | } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) { |
384 | /* | |
385 | * floating point control reg. is in the thread structure | |
386 | */ | |
387 | if ((unsigned int) data != 0 || | |
388 | test_fp_ctl(data >> (BITS_PER_LONG - 32))) | |
389 | return -EINVAL; | |
390 | child->thread.fp_regs.fpc = data >> (BITS_PER_LONG - 32); | |
391 | ||
1da177e4 LT |
392 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { |
393 | /* | |
86c558e8 MS |
394 | * floating point regs. are either in child->thread.fp_regs |
395 | * or the child->thread.vxrs array | |
1da177e4 | 396 | */ |
86c558e8 | 397 | offset = addr - (addr_t) &dummy->regs.fp_regs.fprs; |
86c558e8 MS |
398 | if (child->thread.vxrs) |
399 | *(addr_t *)((addr_t) | |
400 | child->thread.vxrs + 2*offset) = data; | |
401 | else | |
86c558e8 MS |
402 | *(addr_t *)((addr_t) |
403 | &child->thread.fp_regs.fprs + offset) = data; | |
1da177e4 LT |
404 | |
405 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
406 | /* | |
5e9a2692 | 407 | * Handle access to the per_info structure. |
1da177e4 | 408 | */ |
5e9a2692 MS |
409 | addr -= (addr_t) &dummy->regs.per_info; |
410 | __poke_user_per(child, addr, data); | |
1da177e4 LT |
411 | |
412 | } | |
413 | ||
1da177e4 LT |
414 | return 0; |
415 | } | |
416 | ||
5e9a2692 | 417 | static int poke_user(struct task_struct *child, addr_t addr, addr_t data) |
63506c41 | 418 | { |
63506c41 MS |
419 | addr_t mask; |
420 | ||
421 | /* | |
422 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
423 | * an alignment of 4. Programmers from hell indeed... | |
424 | */ | |
425 | mask = __ADDR_MASK; | |
547e3cec MS |
426 | if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs && |
427 | addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2) | |
63506c41 | 428 | mask = 3; |
63506c41 MS |
429 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) |
430 | return -EIO; | |
431 | ||
432 | return __poke_user(child, addr, data); | |
433 | } | |
434 | ||
9b05a69e NK |
435 | long arch_ptrace(struct task_struct *child, long request, |
436 | unsigned long addr, unsigned long data) | |
1da177e4 | 437 | { |
1da177e4 LT |
438 | ptrace_area parea; |
439 | int copied, ret; | |
440 | ||
441 | switch (request) { | |
1da177e4 LT |
442 | case PTRACE_PEEKUSR: |
443 | /* read the word at location addr in the USER area. */ | |
444 | return peek_user(child, addr, data); | |
445 | ||
1da177e4 LT |
446 | case PTRACE_POKEUSR: |
447 | /* write the word at location addr in the USER area */ | |
448 | return poke_user(child, addr, data); | |
449 | ||
450 | case PTRACE_PEEKUSR_AREA: | |
451 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 452 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
453 | sizeof(parea))) |
454 | return -EFAULT; | |
455 | addr = parea.kernel_addr; | |
456 | data = parea.process_addr; | |
457 | copied = 0; | |
458 | while (copied < parea.len) { | |
459 | if (request == PTRACE_PEEKUSR_AREA) | |
460 | ret = peek_user(child, addr, data); | |
461 | else { | |
2b67fc46 HC |
462 | addr_t utmp; |
463 | if (get_user(utmp, | |
464 | (addr_t __force __user *) data)) | |
1da177e4 | 465 | return -EFAULT; |
2b67fc46 | 466 | ret = poke_user(child, addr, utmp); |
1da177e4 LT |
467 | } |
468 | if (ret) | |
469 | return ret; | |
470 | addr += sizeof(unsigned long); | |
471 | data += sizeof(unsigned long); | |
472 | copied += sizeof(unsigned long); | |
473 | } | |
474 | return 0; | |
86f2552b MS |
475 | case PTRACE_GET_LAST_BREAK: |
476 | put_user(task_thread_info(child)->last_break, | |
477 | (unsigned long __user *) data); | |
478 | return 0; | |
d35339a4 MS |
479 | case PTRACE_ENABLE_TE: |
480 | if (!MACHINE_HAS_TE) | |
481 | return -EIO; | |
482 | child->thread.per_flags &= ~PER_FLAG_NO_TE; | |
483 | return 0; | |
484 | case PTRACE_DISABLE_TE: | |
485 | if (!MACHINE_HAS_TE) | |
486 | return -EIO; | |
487 | child->thread.per_flags |= PER_FLAG_NO_TE; | |
64597f9d MM |
488 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND; |
489 | return 0; | |
490 | case PTRACE_TE_ABORT_RAND: | |
491 | if (!MACHINE_HAS_TE || (child->thread.per_flags & PER_FLAG_NO_TE)) | |
492 | return -EIO; | |
493 | switch (data) { | |
494 | case 0UL: | |
495 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND; | |
496 | break; | |
497 | case 1UL: | |
498 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND; | |
499 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND_TEND; | |
500 | break; | |
501 | case 2UL: | |
502 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND; | |
503 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND_TEND; | |
504 | break; | |
505 | default: | |
506 | return -EINVAL; | |
507 | } | |
d35339a4 | 508 | return 0; |
07805ac8 CB |
509 | default: |
510 | /* Removing high order bit from addr (only for 31 bit). */ | |
511 | addr &= PSW_ADDR_INSN; | |
512 | return ptrace_request(child, request, addr, data); | |
1da177e4 | 513 | } |
1da177e4 LT |
514 | } |
515 | ||
347a8dc3 | 516 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
517 | /* |
518 | * Now the fun part starts... a 31 bit program running in the | |
519 | * 31 bit emulation tracing another program. PTRACE_PEEKTEXT, | |
520 | * PTRACE_PEEKDATA, PTRACE_POKETEXT and PTRACE_POKEDATA are easy | |
521 | * to handle, the difference to the 64 bit versions of the requests | |
522 | * is that the access is done in multiples of 4 byte instead of | |
523 | * 8 bytes (sizeof(unsigned long) on 31/64 bit). | |
524 | * The ugly part are PTRACE_PEEKUSR, PTRACE_PEEKUSR_AREA, | |
525 | * PTRACE_POKEUSR and PTRACE_POKEUSR_AREA. If the traced program | |
526 | * is a 31 bit program too, the content of struct user can be | |
527 | * emulated. A 31 bit program peeking into the struct user of | |
528 | * a 64 bit program is a no-no. | |
529 | */ | |
530 | ||
5e9a2692 MS |
531 | /* |
532 | * Same as peek_user_per but for a 31 bit program. | |
533 | */ | |
534 | static inline __u32 __peek_user_per_compat(struct task_struct *child, | |
535 | addr_t addr) | |
536 | { | |
537 | struct compat_per_struct_kernel *dummy32 = NULL; | |
538 | ||
539 | if (addr == (addr_t) &dummy32->cr9) | |
540 | /* Control bits of the active per set. */ | |
541 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
542 | PER_EVENT_IFETCH : child->thread.per_user.control; | |
543 | else if (addr == (addr_t) &dummy32->cr10) | |
544 | /* Start address of the active per set. */ | |
545 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
546 | 0 : child->thread.per_user.start; | |
547 | else if (addr == (addr_t) &dummy32->cr11) | |
548 | /* End address of the active per set. */ | |
549 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
550 | PSW32_ADDR_INSN : child->thread.per_user.end; | |
551 | else if (addr == (addr_t) &dummy32->bits) | |
552 | /* Single-step bit. */ | |
553 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
554 | 0x80000000 : 0; | |
555 | else if (addr == (addr_t) &dummy32->starting_addr) | |
556 | /* Start address of the user specified per set. */ | |
557 | return (__u32) child->thread.per_user.start; | |
558 | else if (addr == (addr_t) &dummy32->ending_addr) | |
559 | /* End address of the user specified per set. */ | |
560 | return (__u32) child->thread.per_user.end; | |
561 | else if (addr == (addr_t) &dummy32->perc_atmid) | |
562 | /* PER code, ATMID and AI of the last PER trap */ | |
563 | return (__u32) child->thread.per_event.cause << 16; | |
564 | else if (addr == (addr_t) &dummy32->address) | |
565 | /* Address of the last PER trap */ | |
566 | return (__u32) child->thread.per_event.address; | |
567 | else if (addr == (addr_t) &dummy32->access_id) | |
568 | /* Access id of the last PER trap */ | |
569 | return (__u32) child->thread.per_event.paid << 24; | |
570 | return 0; | |
571 | } | |
572 | ||
1da177e4 LT |
573 | /* |
574 | * Same as peek_user but for a 31 bit program. | |
575 | */ | |
63506c41 | 576 | static u32 __peek_user_compat(struct task_struct *child, addr_t addr) |
1da177e4 | 577 | { |
5e9a2692 | 578 | struct compat_user *dummy32 = NULL; |
1da177e4 LT |
579 | addr_t offset; |
580 | __u32 tmp; | |
581 | ||
1da177e4 | 582 | if (addr < (addr_t) &dummy32->regs.acrs) { |
b50511e4 | 583 | struct pt_regs *regs = task_pt_regs(child); |
1da177e4 LT |
584 | /* |
585 | * psw and gprs are stored on the stack | |
586 | */ | |
587 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
588 | /* Fake a 31 bit psw mask. */ | |
b50511e4 | 589 | tmp = (__u32)(regs->psw.mask >> 32); |
5ebf250d | 590 | tmp &= PSW32_MASK_USER | PSW32_MASK_RI; |
f26946d7 | 591 | tmp |= PSW32_USER_BITS; |
1da177e4 LT |
592 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
593 | /* Fake a 31 bit psw address. */ | |
d4e81b35 MS |
594 | tmp = (__u32) regs->psw.addr | |
595 | (__u32)(regs->psw.mask & PSW_MASK_BA); | |
1da177e4 LT |
596 | } else { |
597 | /* gpr 0-15 */ | |
b50511e4 | 598 | tmp = *(__u32 *)((addr_t) ®s->psw + addr*2 + 4); |
1da177e4 LT |
599 | } |
600 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
601 | /* | |
602 | * access registers are stored in the thread structure | |
603 | */ | |
604 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
605 | tmp = *(__u32*)((addr_t) &child->thread.acrs + offset); | |
606 | ||
607 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
608 | /* | |
609 | * orig_gpr2 is stored on the kernel stack | |
610 | */ | |
c7584fb6 | 611 | tmp = *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4); |
1da177e4 | 612 | |
3d6e48f4 JW |
613 | } else if (addr < (addr_t) &dummy32->regs.fp_regs) { |
614 | /* | |
615 | * prevent reads of padding hole between | |
616 | * orig_gpr2 and fp_regs on s390. | |
617 | */ | |
618 | tmp = 0; | |
619 | ||
86c558e8 MS |
620 | } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) { |
621 | /* | |
622 | * floating point control reg. is in the thread structure | |
623 | */ | |
624 | tmp = child->thread.fp_regs.fpc; | |
625 | ||
1da177e4 LT |
626 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { |
627 | /* | |
86c558e8 MS |
628 | * floating point regs. are either in child->thread.fp_regs |
629 | * or the child->thread.vxrs array | |
1da177e4 | 630 | */ |
86c558e8 | 631 | offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs; |
86c558e8 MS |
632 | if (child->thread.vxrs) |
633 | tmp = *(__u32 *) | |
634 | ((addr_t) child->thread.vxrs + 2*offset); | |
635 | else | |
86c558e8 MS |
636 | tmp = *(__u32 *) |
637 | ((addr_t) &child->thread.fp_regs.fprs + offset); | |
1da177e4 LT |
638 | |
639 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
640 | /* | |
5e9a2692 | 641 | * Handle access to the per_info structure. |
1da177e4 | 642 | */ |
5e9a2692 MS |
643 | addr -= (addr_t) &dummy32->regs.per_info; |
644 | tmp = __peek_user_per_compat(child, addr); | |
1da177e4 LT |
645 | |
646 | } else | |
647 | tmp = 0; | |
648 | ||
63506c41 MS |
649 | return tmp; |
650 | } | |
651 | ||
652 | static int peek_user_compat(struct task_struct *child, | |
653 | addr_t addr, addr_t data) | |
654 | { | |
655 | __u32 tmp; | |
656 | ||
7757591a | 657 | if (!is_compat_task() || (addr & 3) || addr > sizeof(struct user) - 3) |
63506c41 MS |
658 | return -EIO; |
659 | ||
660 | tmp = __peek_user_compat(child, addr); | |
1da177e4 LT |
661 | return put_user(tmp, (__u32 __user *) data); |
662 | } | |
663 | ||
5e9a2692 MS |
664 | /* |
665 | * Same as poke_user_per but for a 31 bit program. | |
666 | */ | |
667 | static inline void __poke_user_per_compat(struct task_struct *child, | |
668 | addr_t addr, __u32 data) | |
669 | { | |
670 | struct compat_per_struct_kernel *dummy32 = NULL; | |
671 | ||
672 | if (addr == (addr_t) &dummy32->cr9) | |
673 | /* PER event mask of the user specified per set. */ | |
674 | child->thread.per_user.control = | |
675 | data & (PER_EVENT_MASK | PER_CONTROL_MASK); | |
676 | else if (addr == (addr_t) &dummy32->starting_addr) | |
677 | /* Starting address of the user specified per set. */ | |
678 | child->thread.per_user.start = data; | |
679 | else if (addr == (addr_t) &dummy32->ending_addr) | |
680 | /* Ending address of the user specified per set. */ | |
681 | child->thread.per_user.end = data; | |
682 | } | |
683 | ||
1da177e4 LT |
684 | /* |
685 | * Same as poke_user but for a 31 bit program. | |
686 | */ | |
63506c41 MS |
687 | static int __poke_user_compat(struct task_struct *child, |
688 | addr_t addr, addr_t data) | |
1da177e4 | 689 | { |
5e9a2692 | 690 | struct compat_user *dummy32 = NULL; |
63506c41 | 691 | __u32 tmp = (__u32) data; |
1da177e4 | 692 | addr_t offset; |
1da177e4 LT |
693 | |
694 | if (addr < (addr_t) &dummy32->regs.acrs) { | |
b50511e4 | 695 | struct pt_regs *regs = task_pt_regs(child); |
1da177e4 LT |
696 | /* |
697 | * psw, gprs, acrs and orig_gpr2 are stored on the stack | |
698 | */ | |
699 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
5ebf250d HC |
700 | __u32 mask = PSW32_MASK_USER; |
701 | ||
702 | mask |= is_ri_task(child) ? PSW32_MASK_RI : 0; | |
1da177e4 | 703 | /* Build a 64 bit psw mask from 31 bit mask. */ |
dab6cf55 | 704 | if ((tmp ^ PSW32_USER_BITS) & ~mask) |
1da177e4 LT |
705 | /* Invalid psw mask. */ |
706 | return -EINVAL; | |
dab6cf55 MS |
707 | if ((data & PSW32_MASK_ASC) == PSW32_ASC_HOME) |
708 | /* Invalid address-space-control bits */ | |
709 | return -EINVAL; | |
b50511e4 | 710 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) | |
d4e81b35 | 711 | (regs->psw.mask & PSW_MASK_BA) | |
5ebf250d | 712 | (__u64)(tmp & mask) << 32; |
1da177e4 LT |
713 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
714 | /* Build a 64 bit psw address from 31 bit address. */ | |
b50511e4 | 715 | regs->psw.addr = (__u64) tmp & PSW32_ADDR_INSN; |
d4e81b35 MS |
716 | /* Transfer 31 bit amode bit to psw mask. */ |
717 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) | | |
718 | (__u64)(tmp & PSW32_ADDR_AMODE); | |
1da177e4 LT |
719 | } else { |
720 | /* gpr 0-15 */ | |
b50511e4 | 721 | *(__u32*)((addr_t) ®s->psw + addr*2 + 4) = tmp; |
1da177e4 LT |
722 | } |
723 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
724 | /* | |
725 | * access registers are stored in the thread structure | |
726 | */ | |
727 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
728 | *(__u32*)((addr_t) &child->thread.acrs + offset) = tmp; | |
729 | ||
730 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
731 | /* | |
732 | * orig_gpr2 is stored on the kernel stack | |
733 | */ | |
c7584fb6 | 734 | *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4) = tmp; |
1da177e4 | 735 | |
3d6e48f4 JW |
736 | } else if (addr < (addr_t) &dummy32->regs.fp_regs) { |
737 | /* | |
738 | * prevent writess of padding hole between | |
739 | * orig_gpr2 and fp_regs on s390. | |
740 | */ | |
741 | return 0; | |
742 | ||
86c558e8 | 743 | } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) { |
1da177e4 | 744 | /* |
86c558e8 | 745 | * floating point control reg. is in the thread structure |
1da177e4 | 746 | */ |
86c558e8 | 747 | if (test_fp_ctl(tmp)) |
1da177e4 | 748 | return -EINVAL; |
86c558e8 MS |
749 | child->thread.fp_regs.fpc = data; |
750 | ||
751 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { | |
752 | /* | |
753 | * floating point regs. are either in child->thread.fp_regs | |
754 | * or the child->thread.vxrs array | |
755 | */ | |
756 | offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs; | |
86c558e8 MS |
757 | if (child->thread.vxrs) |
758 | *(__u32 *)((addr_t) | |
759 | child->thread.vxrs + 2*offset) = tmp; | |
760 | else | |
86c558e8 MS |
761 | *(__u32 *)((addr_t) |
762 | &child->thread.fp_regs.fprs + offset) = tmp; | |
1da177e4 LT |
763 | |
764 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
765 | /* | |
5e9a2692 | 766 | * Handle access to the per_info structure. |
1da177e4 | 767 | */ |
5e9a2692 MS |
768 | addr -= (addr_t) &dummy32->regs.per_info; |
769 | __poke_user_per_compat(child, addr, data); | |
1da177e4 LT |
770 | } |
771 | ||
1da177e4 LT |
772 | return 0; |
773 | } | |
774 | ||
63506c41 MS |
775 | static int poke_user_compat(struct task_struct *child, |
776 | addr_t addr, addr_t data) | |
777 | { | |
5e9a2692 MS |
778 | if (!is_compat_task() || (addr & 3) || |
779 | addr > sizeof(struct compat_user) - 3) | |
63506c41 MS |
780 | return -EIO; |
781 | ||
782 | return __poke_user_compat(child, addr, data); | |
783 | } | |
784 | ||
b499d76b RM |
785 | long compat_arch_ptrace(struct task_struct *child, compat_long_t request, |
786 | compat_ulong_t caddr, compat_ulong_t cdata) | |
1da177e4 | 787 | { |
b499d76b RM |
788 | unsigned long addr = caddr; |
789 | unsigned long data = cdata; | |
5e9a2692 | 790 | compat_ptrace_area parea; |
1da177e4 LT |
791 | int copied, ret; |
792 | ||
793 | switch (request) { | |
1da177e4 LT |
794 | case PTRACE_PEEKUSR: |
795 | /* read the word at location addr in the USER area. */ | |
63506c41 | 796 | return peek_user_compat(child, addr, data); |
1da177e4 | 797 | |
1da177e4 LT |
798 | case PTRACE_POKEUSR: |
799 | /* write the word at location addr in the USER area */ | |
63506c41 | 800 | return poke_user_compat(child, addr, data); |
1da177e4 LT |
801 | |
802 | case PTRACE_PEEKUSR_AREA: | |
803 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 804 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
805 | sizeof(parea))) |
806 | return -EFAULT; | |
807 | addr = parea.kernel_addr; | |
808 | data = parea.process_addr; | |
809 | copied = 0; | |
810 | while (copied < parea.len) { | |
811 | if (request == PTRACE_PEEKUSR_AREA) | |
63506c41 | 812 | ret = peek_user_compat(child, addr, data); |
1da177e4 | 813 | else { |
2b67fc46 HC |
814 | __u32 utmp; |
815 | if (get_user(utmp, | |
816 | (__u32 __force __user *) data)) | |
1da177e4 | 817 | return -EFAULT; |
63506c41 | 818 | ret = poke_user_compat(child, addr, utmp); |
1da177e4 LT |
819 | } |
820 | if (ret) | |
821 | return ret; | |
822 | addr += sizeof(unsigned int); | |
823 | data += sizeof(unsigned int); | |
824 | copied += sizeof(unsigned int); | |
825 | } | |
826 | return 0; | |
86f2552b MS |
827 | case PTRACE_GET_LAST_BREAK: |
828 | put_user(task_thread_info(child)->last_break, | |
829 | (unsigned int __user *) data); | |
830 | return 0; | |
1da177e4 | 831 | } |
b499d76b | 832 | return compat_ptrace_request(child, request, addr, data); |
1da177e4 LT |
833 | } |
834 | #endif | |
835 | ||
753c4dd6 | 836 | asmlinkage long do_syscall_trace_enter(struct pt_regs *regs) |
1da177e4 | 837 | { |
545c174d | 838 | long ret = 0; |
1da177e4 | 839 | |
bcf5cef7 | 840 | /* Do the secure computing check first. */ |
a4412fc9 | 841 | if (secure_computing()) { |
c63cb468 HC |
842 | /* seccomp failures shouldn't expose any additional code. */ |
843 | ret = -1; | |
844 | goto out; | |
845 | } | |
bcf5cef7 | 846 | |
c5c3a6d8 | 847 | /* |
753c4dd6 MS |
848 | * The sysc_tracesys code in entry.S stored the system |
849 | * call number to gprs[2]. | |
c5c3a6d8 | 850 | */ |
753c4dd6 MS |
851 | if (test_thread_flag(TIF_SYSCALL_TRACE) && |
852 | (tracehook_report_syscall_entry(regs) || | |
853 | regs->gprs[2] >= NR_syscalls)) { | |
854 | /* | |
855 | * Tracing decided this syscall should not happen or the | |
856 | * debugger stored an invalid system call number. Skip | |
857 | * the system call and the system call restart handling. | |
858 | */ | |
d3a73acb | 859 | clear_pt_regs_flag(regs, PIF_SYSCALL); |
753c4dd6 | 860 | ret = -1; |
1da177e4 | 861 | } |
753c4dd6 | 862 | |
66700001 | 863 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 864 | trace_sys_enter(regs, regs->gprs[2]); |
9bf1226b | 865 | |
91397401 | 866 | audit_syscall_entry(regs->gprs[2], regs->orig_gpr2, |
b05d8447 EP |
867 | regs->gprs[3], regs->gprs[4], |
868 | regs->gprs[5]); | |
c63cb468 | 869 | out: |
545c174d | 870 | return ret ?: regs->gprs[2]; |
753c4dd6 MS |
871 | } |
872 | ||
873 | asmlinkage void do_syscall_trace_exit(struct pt_regs *regs) | |
874 | { | |
d7e7528b | 875 | audit_syscall_exit(regs); |
753c4dd6 | 876 | |
66700001 | 877 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 878 | trace_sys_exit(regs, regs->gprs[2]); |
9bf1226b | 879 | |
753c4dd6 MS |
880 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
881 | tracehook_report_syscall_exit(regs, 0); | |
1da177e4 | 882 | } |
63506c41 MS |
883 | |
884 | /* | |
885 | * user_regset definitions. | |
886 | */ | |
887 | ||
888 | static int s390_regs_get(struct task_struct *target, | |
889 | const struct user_regset *regset, | |
890 | unsigned int pos, unsigned int count, | |
891 | void *kbuf, void __user *ubuf) | |
892 | { | |
893 | if (target == current) | |
894 | save_access_regs(target->thread.acrs); | |
895 | ||
896 | if (kbuf) { | |
897 | unsigned long *k = kbuf; | |
898 | while (count > 0) { | |
899 | *k++ = __peek_user(target, pos); | |
900 | count -= sizeof(*k); | |
901 | pos += sizeof(*k); | |
902 | } | |
903 | } else { | |
904 | unsigned long __user *u = ubuf; | |
905 | while (count > 0) { | |
906 | if (__put_user(__peek_user(target, pos), u++)) | |
907 | return -EFAULT; | |
908 | count -= sizeof(*u); | |
909 | pos += sizeof(*u); | |
910 | } | |
911 | } | |
912 | return 0; | |
913 | } | |
914 | ||
915 | static int s390_regs_set(struct task_struct *target, | |
916 | const struct user_regset *regset, | |
917 | unsigned int pos, unsigned int count, | |
918 | const void *kbuf, const void __user *ubuf) | |
919 | { | |
920 | int rc = 0; | |
921 | ||
922 | if (target == current) | |
923 | save_access_regs(target->thread.acrs); | |
924 | ||
925 | if (kbuf) { | |
926 | const unsigned long *k = kbuf; | |
927 | while (count > 0 && !rc) { | |
928 | rc = __poke_user(target, pos, *k++); | |
929 | count -= sizeof(*k); | |
930 | pos += sizeof(*k); | |
931 | } | |
932 | } else { | |
933 | const unsigned long __user *u = ubuf; | |
934 | while (count > 0 && !rc) { | |
935 | unsigned long word; | |
936 | rc = __get_user(word, u++); | |
937 | if (rc) | |
938 | break; | |
939 | rc = __poke_user(target, pos, word); | |
940 | count -= sizeof(*u); | |
941 | pos += sizeof(*u); | |
942 | } | |
943 | } | |
944 | ||
945 | if (rc == 0 && target == current) | |
946 | restore_access_regs(target->thread.acrs); | |
947 | ||
948 | return rc; | |
949 | } | |
950 | ||
951 | static int s390_fpregs_get(struct task_struct *target, | |
952 | const struct user_regset *regset, unsigned int pos, | |
953 | unsigned int count, void *kbuf, void __user *ubuf) | |
954 | { | |
4725c860 MS |
955 | if (target == current) { |
956 | save_fp_ctl(&target->thread.fp_regs.fpc); | |
957 | save_fp_regs(target->thread.fp_regs.fprs); | |
5a79859a | 958 | } else if (target->thread.vxrs) { |
80703617 | 959 | int i; |
63506c41 | 960 | |
80703617 MS |
961 | for (i = 0; i < __NUM_VXRS_LOW; i++) |
962 | target->thread.fp_regs.fprs[i] = | |
963 | *(freg_t *)(target->thread.vxrs + i); | |
964 | } | |
63506c41 MS |
965 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
966 | &target->thread.fp_regs, 0, -1); | |
967 | } | |
968 | ||
969 | static int s390_fpregs_set(struct task_struct *target, | |
970 | const struct user_regset *regset, unsigned int pos, | |
971 | unsigned int count, const void *kbuf, | |
972 | const void __user *ubuf) | |
973 | { | |
974 | int rc = 0; | |
975 | ||
4725c860 MS |
976 | if (target == current) { |
977 | save_fp_ctl(&target->thread.fp_regs.fpc); | |
978 | save_fp_regs(target->thread.fp_regs.fprs); | |
979 | } | |
63506c41 MS |
980 | |
981 | /* If setting FPC, must validate it first. */ | |
982 | if (count > 0 && pos < offsetof(s390_fp_regs, fprs)) { | |
4725c860 MS |
983 | u32 ufpc[2] = { target->thread.fp_regs.fpc, 0 }; |
984 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ufpc, | |
63506c41 MS |
985 | 0, offsetof(s390_fp_regs, fprs)); |
986 | if (rc) | |
987 | return rc; | |
4725c860 | 988 | if (ufpc[1] != 0 || test_fp_ctl(ufpc[0])) |
63506c41 | 989 | return -EINVAL; |
4725c860 | 990 | target->thread.fp_regs.fpc = ufpc[0]; |
63506c41 MS |
991 | } |
992 | ||
993 | if (rc == 0 && count > 0) | |
994 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
995 | target->thread.fp_regs.fprs, | |
996 | offsetof(s390_fp_regs, fprs), -1); | |
997 | ||
80703617 MS |
998 | if (rc == 0) { |
999 | if (target == current) { | |
1000 | restore_fp_ctl(&target->thread.fp_regs.fpc); | |
1001 | restore_fp_regs(target->thread.fp_regs.fprs); | |
5a79859a | 1002 | } else if (target->thread.vxrs) { |
80703617 MS |
1003 | int i; |
1004 | ||
1005 | for (i = 0; i < __NUM_VXRS_LOW; i++) | |
1006 | *(freg_t *)(target->thread.vxrs + i) = | |
1007 | target->thread.fp_regs.fprs[i]; | |
1008 | } | |
4725c860 | 1009 | } |
63506c41 MS |
1010 | |
1011 | return rc; | |
1012 | } | |
1013 | ||
86f2552b MS |
1014 | static int s390_last_break_get(struct task_struct *target, |
1015 | const struct user_regset *regset, | |
1016 | unsigned int pos, unsigned int count, | |
1017 | void *kbuf, void __user *ubuf) | |
1018 | { | |
1019 | if (count > 0) { | |
1020 | if (kbuf) { | |
1021 | unsigned long *k = kbuf; | |
1022 | *k = task_thread_info(target)->last_break; | |
1023 | } else { | |
1024 | unsigned long __user *u = ubuf; | |
1025 | if (__put_user(task_thread_info(target)->last_break, u)) | |
1026 | return -EFAULT; | |
1027 | } | |
1028 | } | |
1029 | return 0; | |
1030 | } | |
1031 | ||
b934069c MS |
1032 | static int s390_last_break_set(struct task_struct *target, |
1033 | const struct user_regset *regset, | |
1034 | unsigned int pos, unsigned int count, | |
1035 | const void *kbuf, const void __user *ubuf) | |
1036 | { | |
1037 | return 0; | |
1038 | } | |
1039 | ||
d35339a4 MS |
1040 | static int s390_tdb_get(struct task_struct *target, |
1041 | const struct user_regset *regset, | |
1042 | unsigned int pos, unsigned int count, | |
1043 | void *kbuf, void __user *ubuf) | |
1044 | { | |
1045 | struct pt_regs *regs = task_pt_regs(target); | |
1046 | unsigned char *data; | |
1047 | ||
1048 | if (!(regs->int_code & 0x200)) | |
1049 | return -ENODATA; | |
1050 | data = target->thread.trap_tdb; | |
1051 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, data, 0, 256); | |
1052 | } | |
1053 | ||
1054 | static int s390_tdb_set(struct task_struct *target, | |
1055 | const struct user_regset *regset, | |
1056 | unsigned int pos, unsigned int count, | |
1057 | const void *kbuf, const void __user *ubuf) | |
1058 | { | |
1059 | return 0; | |
1060 | } | |
1061 | ||
80703617 MS |
1062 | static int s390_vxrs_low_get(struct task_struct *target, |
1063 | const struct user_regset *regset, | |
1064 | unsigned int pos, unsigned int count, | |
1065 | void *kbuf, void __user *ubuf) | |
1066 | { | |
1067 | __u64 vxrs[__NUM_VXRS_LOW]; | |
1068 | int i; | |
1069 | ||
7490daf0 MS |
1070 | if (!MACHINE_HAS_VX) |
1071 | return -ENODEV; | |
80703617 MS |
1072 | if (target->thread.vxrs) { |
1073 | if (target == current) | |
1074 | save_vx_regs(target->thread.vxrs); | |
1075 | for (i = 0; i < __NUM_VXRS_LOW; i++) | |
1076 | vxrs[i] = *((__u64 *)(target->thread.vxrs + i) + 1); | |
1077 | } else | |
1078 | memset(vxrs, 0, sizeof(vxrs)); | |
1079 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); | |
1080 | } | |
1081 | ||
1082 | static int s390_vxrs_low_set(struct task_struct *target, | |
1083 | const struct user_regset *regset, | |
1084 | unsigned int pos, unsigned int count, | |
1085 | const void *kbuf, const void __user *ubuf) | |
1086 | { | |
1087 | __u64 vxrs[__NUM_VXRS_LOW]; | |
1088 | int i, rc; | |
1089 | ||
7490daf0 MS |
1090 | if (!MACHINE_HAS_VX) |
1091 | return -ENODEV; | |
80703617 MS |
1092 | if (!target->thread.vxrs) { |
1093 | rc = alloc_vector_registers(target); | |
1094 | if (rc) | |
1095 | return rc; | |
1096 | } else if (target == current) | |
1097 | save_vx_regs(target->thread.vxrs); | |
1098 | ||
1099 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); | |
1100 | if (rc == 0) { | |
1101 | for (i = 0; i < __NUM_VXRS_LOW; i++) | |
1102 | *((__u64 *)(target->thread.vxrs + i) + 1) = vxrs[i]; | |
1103 | if (target == current) | |
1104 | restore_vx_regs(target->thread.vxrs); | |
1105 | } | |
1106 | ||
1107 | return rc; | |
1108 | } | |
1109 | ||
1110 | static int s390_vxrs_high_get(struct task_struct *target, | |
1111 | const struct user_regset *regset, | |
1112 | unsigned int pos, unsigned int count, | |
1113 | void *kbuf, void __user *ubuf) | |
1114 | { | |
1115 | __vector128 vxrs[__NUM_VXRS_HIGH]; | |
1116 | ||
7490daf0 MS |
1117 | if (!MACHINE_HAS_VX) |
1118 | return -ENODEV; | |
80703617 MS |
1119 | if (target->thread.vxrs) { |
1120 | if (target == current) | |
1121 | save_vx_regs(target->thread.vxrs); | |
1122 | memcpy(vxrs, target->thread.vxrs + __NUM_VXRS_LOW, | |
1123 | sizeof(vxrs)); | |
1124 | } else | |
1125 | memset(vxrs, 0, sizeof(vxrs)); | |
1126 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); | |
1127 | } | |
1128 | ||
1129 | static int s390_vxrs_high_set(struct task_struct *target, | |
1130 | const struct user_regset *regset, | |
1131 | unsigned int pos, unsigned int count, | |
1132 | const void *kbuf, const void __user *ubuf) | |
1133 | { | |
1134 | int rc; | |
1135 | ||
7490daf0 MS |
1136 | if (!MACHINE_HAS_VX) |
1137 | return -ENODEV; | |
80703617 MS |
1138 | if (!target->thread.vxrs) { |
1139 | rc = alloc_vector_registers(target); | |
1140 | if (rc) | |
1141 | return rc; | |
1142 | } else if (target == current) | |
1143 | save_vx_regs(target->thread.vxrs); | |
1144 | ||
1145 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
1146 | target->thread.vxrs + __NUM_VXRS_LOW, 0, -1); | |
1147 | if (rc == 0 && target == current) | |
1148 | restore_vx_regs(target->thread.vxrs); | |
1149 | ||
1150 | return rc; | |
1151 | } | |
1152 | ||
20b40a79 MS |
1153 | static int s390_system_call_get(struct task_struct *target, |
1154 | const struct user_regset *regset, | |
1155 | unsigned int pos, unsigned int count, | |
1156 | void *kbuf, void __user *ubuf) | |
1157 | { | |
1158 | unsigned int *data = &task_thread_info(target)->system_call; | |
1159 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
1160 | data, 0, sizeof(unsigned int)); | |
1161 | } | |
1162 | ||
1163 | static int s390_system_call_set(struct task_struct *target, | |
1164 | const struct user_regset *regset, | |
1165 | unsigned int pos, unsigned int count, | |
1166 | const void *kbuf, const void __user *ubuf) | |
1167 | { | |
1168 | unsigned int *data = &task_thread_info(target)->system_call; | |
1169 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
1170 | data, 0, sizeof(unsigned int)); | |
1171 | } | |
1172 | ||
63506c41 | 1173 | static const struct user_regset s390_regsets[] = { |
80703617 | 1174 | { |
63506c41 MS |
1175 | .core_note_type = NT_PRSTATUS, |
1176 | .n = sizeof(s390_regs) / sizeof(long), | |
1177 | .size = sizeof(long), | |
1178 | .align = sizeof(long), | |
1179 | .get = s390_regs_get, | |
1180 | .set = s390_regs_set, | |
1181 | }, | |
80703617 | 1182 | { |
63506c41 MS |
1183 | .core_note_type = NT_PRFPREG, |
1184 | .n = sizeof(s390_fp_regs) / sizeof(long), | |
1185 | .size = sizeof(long), | |
1186 | .align = sizeof(long), | |
1187 | .get = s390_fpregs_get, | |
1188 | .set = s390_fpregs_set, | |
1189 | }, | |
80703617 MS |
1190 | { |
1191 | .core_note_type = NT_S390_SYSTEM_CALL, | |
1192 | .n = 1, | |
1193 | .size = sizeof(unsigned int), | |
1194 | .align = sizeof(unsigned int), | |
1195 | .get = s390_system_call_get, | |
1196 | .set = s390_system_call_set, | |
1197 | }, | |
80703617 | 1198 | { |
86f2552b MS |
1199 | .core_note_type = NT_S390_LAST_BREAK, |
1200 | .n = 1, | |
1201 | .size = sizeof(long), | |
1202 | .align = sizeof(long), | |
1203 | .get = s390_last_break_get, | |
b934069c | 1204 | .set = s390_last_break_set, |
86f2552b | 1205 | }, |
80703617 | 1206 | { |
d35339a4 MS |
1207 | .core_note_type = NT_S390_TDB, |
1208 | .n = 1, | |
1209 | .size = 256, | |
1210 | .align = 1, | |
1211 | .get = s390_tdb_get, | |
1212 | .set = s390_tdb_set, | |
1213 | }, | |
80703617 MS |
1214 | { |
1215 | .core_note_type = NT_S390_VXRS_LOW, | |
1216 | .n = __NUM_VXRS_LOW, | |
1217 | .size = sizeof(__u64), | |
1218 | .align = sizeof(__u64), | |
80703617 MS |
1219 | .get = s390_vxrs_low_get, |
1220 | .set = s390_vxrs_low_set, | |
20b40a79 | 1221 | }, |
80703617 MS |
1222 | { |
1223 | .core_note_type = NT_S390_VXRS_HIGH, | |
1224 | .n = __NUM_VXRS_HIGH, | |
1225 | .size = sizeof(__vector128), | |
1226 | .align = sizeof(__vector128), | |
80703617 MS |
1227 | .get = s390_vxrs_high_get, |
1228 | .set = s390_vxrs_high_set, | |
20b40a79 | 1229 | }, |
63506c41 MS |
1230 | }; |
1231 | ||
1232 | static const struct user_regset_view user_s390_view = { | |
1233 | .name = UTS_MACHINE, | |
1234 | .e_machine = EM_S390, | |
1235 | .regsets = s390_regsets, | |
1236 | .n = ARRAY_SIZE(s390_regsets) | |
1237 | }; | |
1238 | ||
1239 | #ifdef CONFIG_COMPAT | |
1240 | static int s390_compat_regs_get(struct task_struct *target, | |
1241 | const struct user_regset *regset, | |
1242 | unsigned int pos, unsigned int count, | |
1243 | void *kbuf, void __user *ubuf) | |
1244 | { | |
1245 | if (target == current) | |
1246 | save_access_regs(target->thread.acrs); | |
1247 | ||
1248 | if (kbuf) { | |
1249 | compat_ulong_t *k = kbuf; | |
1250 | while (count > 0) { | |
1251 | *k++ = __peek_user_compat(target, pos); | |
1252 | count -= sizeof(*k); | |
1253 | pos += sizeof(*k); | |
1254 | } | |
1255 | } else { | |
1256 | compat_ulong_t __user *u = ubuf; | |
1257 | while (count > 0) { | |
1258 | if (__put_user(__peek_user_compat(target, pos), u++)) | |
1259 | return -EFAULT; | |
1260 | count -= sizeof(*u); | |
1261 | pos += sizeof(*u); | |
1262 | } | |
1263 | } | |
1264 | return 0; | |
1265 | } | |
1266 | ||
1267 | static int s390_compat_regs_set(struct task_struct *target, | |
1268 | const struct user_regset *regset, | |
1269 | unsigned int pos, unsigned int count, | |
1270 | const void *kbuf, const void __user *ubuf) | |
1271 | { | |
1272 | int rc = 0; | |
1273 | ||
1274 | if (target == current) | |
1275 | save_access_regs(target->thread.acrs); | |
1276 | ||
1277 | if (kbuf) { | |
1278 | const compat_ulong_t *k = kbuf; | |
1279 | while (count > 0 && !rc) { | |
1280 | rc = __poke_user_compat(target, pos, *k++); | |
1281 | count -= sizeof(*k); | |
1282 | pos += sizeof(*k); | |
1283 | } | |
1284 | } else { | |
1285 | const compat_ulong_t __user *u = ubuf; | |
1286 | while (count > 0 && !rc) { | |
1287 | compat_ulong_t word; | |
1288 | rc = __get_user(word, u++); | |
1289 | if (rc) | |
1290 | break; | |
1291 | rc = __poke_user_compat(target, pos, word); | |
1292 | count -= sizeof(*u); | |
1293 | pos += sizeof(*u); | |
1294 | } | |
1295 | } | |
1296 | ||
1297 | if (rc == 0 && target == current) | |
1298 | restore_access_regs(target->thread.acrs); | |
1299 | ||
1300 | return rc; | |
1301 | } | |
1302 | ||
ea2a4d3a HC |
1303 | static int s390_compat_regs_high_get(struct task_struct *target, |
1304 | const struct user_regset *regset, | |
1305 | unsigned int pos, unsigned int count, | |
1306 | void *kbuf, void __user *ubuf) | |
1307 | { | |
1308 | compat_ulong_t *gprs_high; | |
1309 | ||
1310 | gprs_high = (compat_ulong_t *) | |
1311 | &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)]; | |
1312 | if (kbuf) { | |
1313 | compat_ulong_t *k = kbuf; | |
1314 | while (count > 0) { | |
1315 | *k++ = *gprs_high; | |
1316 | gprs_high += 2; | |
1317 | count -= sizeof(*k); | |
1318 | } | |
1319 | } else { | |
1320 | compat_ulong_t __user *u = ubuf; | |
1321 | while (count > 0) { | |
1322 | if (__put_user(*gprs_high, u++)) | |
1323 | return -EFAULT; | |
1324 | gprs_high += 2; | |
1325 | count -= sizeof(*u); | |
1326 | } | |
1327 | } | |
1328 | return 0; | |
1329 | } | |
1330 | ||
1331 | static int s390_compat_regs_high_set(struct task_struct *target, | |
1332 | const struct user_regset *regset, | |
1333 | unsigned int pos, unsigned int count, | |
1334 | const void *kbuf, const void __user *ubuf) | |
1335 | { | |
1336 | compat_ulong_t *gprs_high; | |
1337 | int rc = 0; | |
1338 | ||
1339 | gprs_high = (compat_ulong_t *) | |
1340 | &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)]; | |
1341 | if (kbuf) { | |
1342 | const compat_ulong_t *k = kbuf; | |
1343 | while (count > 0) { | |
1344 | *gprs_high = *k++; | |
1345 | *gprs_high += 2; | |
1346 | count -= sizeof(*k); | |
1347 | } | |
1348 | } else { | |
1349 | const compat_ulong_t __user *u = ubuf; | |
1350 | while (count > 0 && !rc) { | |
1351 | unsigned long word; | |
1352 | rc = __get_user(word, u++); | |
1353 | if (rc) | |
1354 | break; | |
1355 | *gprs_high = word; | |
1356 | *gprs_high += 2; | |
1357 | count -= sizeof(*u); | |
1358 | } | |
1359 | } | |
1360 | ||
1361 | return rc; | |
1362 | } | |
1363 | ||
86f2552b MS |
1364 | static int s390_compat_last_break_get(struct task_struct *target, |
1365 | const struct user_regset *regset, | |
1366 | unsigned int pos, unsigned int count, | |
1367 | void *kbuf, void __user *ubuf) | |
1368 | { | |
1369 | compat_ulong_t last_break; | |
1370 | ||
1371 | if (count > 0) { | |
1372 | last_break = task_thread_info(target)->last_break; | |
1373 | if (kbuf) { | |
1374 | unsigned long *k = kbuf; | |
1375 | *k = last_break; | |
1376 | } else { | |
1377 | unsigned long __user *u = ubuf; | |
1378 | if (__put_user(last_break, u)) | |
1379 | return -EFAULT; | |
1380 | } | |
1381 | } | |
1382 | return 0; | |
1383 | } | |
1384 | ||
b934069c MS |
1385 | static int s390_compat_last_break_set(struct task_struct *target, |
1386 | const struct user_regset *regset, | |
1387 | unsigned int pos, unsigned int count, | |
1388 | const void *kbuf, const void __user *ubuf) | |
1389 | { | |
1390 | return 0; | |
1391 | } | |
1392 | ||
63506c41 | 1393 | static const struct user_regset s390_compat_regsets[] = { |
80703617 | 1394 | { |
63506c41 MS |
1395 | .core_note_type = NT_PRSTATUS, |
1396 | .n = sizeof(s390_compat_regs) / sizeof(compat_long_t), | |
1397 | .size = sizeof(compat_long_t), | |
1398 | .align = sizeof(compat_long_t), | |
1399 | .get = s390_compat_regs_get, | |
1400 | .set = s390_compat_regs_set, | |
1401 | }, | |
80703617 | 1402 | { |
63506c41 MS |
1403 | .core_note_type = NT_PRFPREG, |
1404 | .n = sizeof(s390_fp_regs) / sizeof(compat_long_t), | |
1405 | .size = sizeof(compat_long_t), | |
1406 | .align = sizeof(compat_long_t), | |
1407 | .get = s390_fpregs_get, | |
1408 | .set = s390_fpregs_set, | |
1409 | }, | |
80703617 MS |
1410 | { |
1411 | .core_note_type = NT_S390_SYSTEM_CALL, | |
1412 | .n = 1, | |
1413 | .size = sizeof(compat_uint_t), | |
1414 | .align = sizeof(compat_uint_t), | |
1415 | .get = s390_system_call_get, | |
1416 | .set = s390_system_call_set, | |
1417 | }, | |
1418 | { | |
86f2552b MS |
1419 | .core_note_type = NT_S390_LAST_BREAK, |
1420 | .n = 1, | |
1421 | .size = sizeof(long), | |
1422 | .align = sizeof(long), | |
1423 | .get = s390_compat_last_break_get, | |
b934069c | 1424 | .set = s390_compat_last_break_set, |
86f2552b | 1425 | }, |
80703617 | 1426 | { |
d35339a4 MS |
1427 | .core_note_type = NT_S390_TDB, |
1428 | .n = 1, | |
1429 | .size = 256, | |
1430 | .align = 1, | |
1431 | .get = s390_tdb_get, | |
1432 | .set = s390_tdb_set, | |
1433 | }, | |
80703617 MS |
1434 | { |
1435 | .core_note_type = NT_S390_VXRS_LOW, | |
1436 | .n = __NUM_VXRS_LOW, | |
1437 | .size = sizeof(__u64), | |
1438 | .align = sizeof(__u64), | |
80703617 MS |
1439 | .get = s390_vxrs_low_get, |
1440 | .set = s390_vxrs_low_set, | |
1441 | }, | |
1442 | { | |
1443 | .core_note_type = NT_S390_VXRS_HIGH, | |
1444 | .n = __NUM_VXRS_HIGH, | |
1445 | .size = sizeof(__vector128), | |
1446 | .align = sizeof(__vector128), | |
80703617 MS |
1447 | .get = s390_vxrs_high_get, |
1448 | .set = s390_vxrs_high_set, | |
20b40a79 | 1449 | }, |
80703617 | 1450 | { |
622e99bf | 1451 | .core_note_type = NT_S390_HIGH_GPRS, |
ea2a4d3a HC |
1452 | .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t), |
1453 | .size = sizeof(compat_long_t), | |
1454 | .align = sizeof(compat_long_t), | |
1455 | .get = s390_compat_regs_high_get, | |
1456 | .set = s390_compat_regs_high_set, | |
1457 | }, | |
63506c41 MS |
1458 | }; |
1459 | ||
1460 | static const struct user_regset_view user_s390_compat_view = { | |
1461 | .name = "s390", | |
1462 | .e_machine = EM_S390, | |
1463 | .regsets = s390_compat_regsets, | |
1464 | .n = ARRAY_SIZE(s390_compat_regsets) | |
1465 | }; | |
1466 | #endif | |
1467 | ||
1468 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) | |
1469 | { | |
1470 | #ifdef CONFIG_COMPAT | |
1471 | if (test_tsk_thread_flag(task, TIF_31BIT)) | |
1472 | return &user_s390_compat_view; | |
1473 | #endif | |
1474 | return &user_s390_view; | |
1475 | } | |
952974ac HC |
1476 | |
1477 | static const char *gpr_names[NUM_GPRS] = { | |
1478 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
1479 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
1480 | }; | |
1481 | ||
1482 | unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset) | |
1483 | { | |
1484 | if (offset >= NUM_GPRS) | |
1485 | return 0; | |
1486 | return regs->gprs[offset]; | |
1487 | } | |
1488 | ||
1489 | int regs_query_register_offset(const char *name) | |
1490 | { | |
1491 | unsigned long offset; | |
1492 | ||
1493 | if (!name || *name != 'r') | |
1494 | return -EINVAL; | |
958d9072 | 1495 | if (kstrtoul(name + 1, 10, &offset)) |
952974ac HC |
1496 | return -EINVAL; |
1497 | if (offset >= NUM_GPRS) | |
1498 | return -EINVAL; | |
1499 | return offset; | |
1500 | } | |
1501 | ||
1502 | const char *regs_query_register_name(unsigned int offset) | |
1503 | { | |
1504 | if (offset >= NUM_GPRS) | |
1505 | return NULL; | |
1506 | return gpr_names[offset]; | |
1507 | } | |
1508 | ||
1509 | static int regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr) | |
1510 | { | |
1511 | unsigned long ksp = kernel_stack_pointer(regs); | |
1512 | ||
1513 | return (addr & ~(THREAD_SIZE - 1)) == (ksp & ~(THREAD_SIZE - 1)); | |
1514 | } | |
1515 | ||
1516 | /** | |
1517 | * regs_get_kernel_stack_nth() - get Nth entry of the stack | |
1518 | * @regs:pt_regs which contains kernel stack pointer. | |
1519 | * @n:stack entry number. | |
1520 | * | |
1521 | * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which | |
1522 | * is specifined by @regs. If the @n th entry is NOT in the kernel stack, | |
1523 | * this returns 0. | |
1524 | */ | |
1525 | unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n) | |
1526 | { | |
1527 | unsigned long addr; | |
1528 | ||
1529 | addr = kernel_stack_pointer(regs) + n * sizeof(long); | |
1530 | if (!regs_within_kernel_stack(regs, addr)) | |
1531 | return 0; | |
1532 | return *(unsigned long *)addr; | |
1533 | } |