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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/setup.c | |
3 | * | |
4 | * S390 version | |
5 | * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
6 | * Author(s): Hartmut Penner (hp@de.ibm.com), | |
7 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
8 | * | |
9 | * Derived from "arch/i386/kernel/setup.c" | |
10 | * Copyright (C) 1995, Linus Torvalds | |
11 | */ | |
12 | ||
13 | /* | |
14 | * This file handles the architecture-dependent parts of initialization | |
15 | */ | |
16 | ||
17 | #include <linux/errno.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/stddef.h> | |
23 | #include <linux/unistd.h> | |
24 | #include <linux/ptrace.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/user.h> | |
1da177e4 LT |
27 | #include <linux/tty.h> |
28 | #include <linux/ioport.h> | |
29 | #include <linux/delay.h> | |
1da177e4 LT |
30 | #include <linux/init.h> |
31 | #include <linux/initrd.h> | |
32 | #include <linux/bootmem.h> | |
33 | #include <linux/root_dev.h> | |
34 | #include <linux/console.h> | |
35 | #include <linux/seq_file.h> | |
36 | #include <linux/kernel_stat.h> | |
1e8e3383 | 37 | #include <linux/device.h> |
585c3047 | 38 | #include <linux/notifier.h> |
65912a84 | 39 | #include <linux/pfn.h> |
fe355b7f | 40 | #include <linux/ctype.h> |
2b67fc46 | 41 | #include <linux/reboot.h> |
1da177e4 | 42 | |
46b05d26 | 43 | #include <asm/ipl.h> |
1da177e4 LT |
44 | #include <asm/uaccess.h> |
45 | #include <asm/system.h> | |
46 | #include <asm/smp.h> | |
47 | #include <asm/mmu_context.h> | |
48 | #include <asm/cpcmd.h> | |
49 | #include <asm/lowcore.h> | |
50 | #include <asm/irq.h> | |
0b642ede PO |
51 | #include <asm/page.h> |
52 | #include <asm/ptrace.h> | |
cc13ad62 | 53 | #include <asm/sections.h> |
fe355b7f | 54 | #include <asm/ebcdic.h> |
c1821c2e GS |
55 | #include <asm/compat.h> |
56 | ||
57 | long psw_kernel_bits = (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_PRIMARY | | |
58 | PSW_MASK_MCHECK | PSW_DEFAULT_KEY); | |
59 | long psw_user_bits = (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_HOME | | |
60 | PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | | |
61 | PSW_MASK_PSTATE | PSW_DEFAULT_KEY); | |
1da177e4 | 62 | |
d02765d1 GS |
63 | /* |
64 | * User copy operations. | |
65 | */ | |
66 | struct uaccess_ops uaccess; | |
d4ee453b | 67 | EXPORT_SYMBOL(uaccess); |
d02765d1 | 68 | |
1da177e4 LT |
69 | /* |
70 | * Machine setup.. | |
71 | */ | |
72 | unsigned int console_mode = 0; | |
73 | unsigned int console_devno = -1; | |
74 | unsigned int console_irq = -1; | |
1da177e4 | 75 | unsigned long machine_flags = 0; |
cf8ba7a9 MS |
76 | unsigned long elf_hwcap = 0; |
77 | char elf_platform[ELF_PLATFORM_SIZE]; | |
36a2bd42 | 78 | |
2bc89b5e | 79 | struct mem_chunk __meminitdata memory_chunk[MEMORY_CHUNKS]; |
1da177e4 | 80 | volatile int __cpu_logical_map[NR_CPUS]; /* logical cpu to cpu address */ |
c9e37353 | 81 | static unsigned long __initdata memory_end; |
1da177e4 | 82 | |
1da177e4 LT |
83 | /* |
84 | * This is set up by the setup-routine at boot-time | |
85 | * for S390 need to find out, what we have to setup | |
86 | * using address 0x10400 ... | |
87 | */ | |
88 | ||
89 | #include <asm/setup.h> | |
90 | ||
1da177e4 LT |
91 | static struct resource code_resource = { |
92 | .name = "Kernel code", | |
93 | .flags = IORESOURCE_BUSY | IORESOURCE_MEM, | |
94 | }; | |
95 | ||
96 | static struct resource data_resource = { | |
97 | .name = "Kernel data", | |
98 | .flags = IORESOURCE_BUSY | IORESOURCE_MEM, | |
99 | }; | |
100 | ||
101 | /* | |
102 | * cpu_init() initializes state that is per-CPU. | |
103 | */ | |
ea1f4eec | 104 | void __cpuinit cpu_init(void) |
1da177e4 LT |
105 | { |
106 | int addr = hard_smp_processor_id(); | |
107 | ||
108 | /* | |
109 | * Store processor id in lowcore (used e.g. in timer_interrupt) | |
110 | */ | |
72960a02 | 111 | get_cpu_id(&S390_lowcore.cpu_data.cpu_id); |
1da177e4 LT |
112 | S390_lowcore.cpu_data.cpu_addr = addr; |
113 | ||
114 | /* | |
115 | * Force FPU initialization: | |
116 | */ | |
117 | clear_thread_flag(TIF_USEDFPU); | |
118 | clear_used_math(); | |
119 | ||
120 | atomic_inc(&init_mm.mm_count); | |
121 | current->active_mm = &init_mm; | |
122 | if (current->mm) | |
123 | BUG(); | |
124 | enter_lazy_tlb(&init_mm, current); | |
125 | } | |
126 | ||
1da177e4 LT |
127 | /* |
128 | * condev= and conmode= setup parameter. | |
129 | */ | |
130 | ||
131 | static int __init condev_setup(char *str) | |
132 | { | |
133 | int vdev; | |
134 | ||
135 | vdev = simple_strtoul(str, &str, 0); | |
136 | if (vdev >= 0 && vdev < 65536) { | |
137 | console_devno = vdev; | |
138 | console_irq = -1; | |
139 | } | |
140 | return 1; | |
141 | } | |
142 | ||
143 | __setup("condev=", condev_setup); | |
144 | ||
145 | static int __init conmode_setup(char *str) | |
146 | { | |
8c0933ee | 147 | #if defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
148 | if (strncmp(str, "hwc", 4) == 0 || strncmp(str, "sclp", 5) == 0) |
149 | SET_CONSOLE_SCLP; | |
150 | #endif | |
151 | #if defined(CONFIG_TN3215_CONSOLE) | |
152 | if (strncmp(str, "3215", 5) == 0) | |
153 | SET_CONSOLE_3215; | |
154 | #endif | |
155 | #if defined(CONFIG_TN3270_CONSOLE) | |
156 | if (strncmp(str, "3270", 5) == 0) | |
157 | SET_CONSOLE_3270; | |
158 | #endif | |
159 | return 1; | |
160 | } | |
161 | ||
162 | __setup("conmode=", conmode_setup); | |
163 | ||
164 | static void __init conmode_default(void) | |
165 | { | |
166 | char query_buffer[1024]; | |
167 | char *ptr; | |
168 | ||
169 | if (MACHINE_IS_VM) { | |
740b5706 | 170 | cpcmd("QUERY CONSOLE", query_buffer, 1024, NULL); |
1da177e4 LT |
171 | console_devno = simple_strtoul(query_buffer + 5, NULL, 16); |
172 | ptr = strstr(query_buffer, "SUBCHANNEL ="); | |
173 | console_irq = simple_strtoul(ptr + 13, NULL, 16); | |
740b5706 | 174 | cpcmd("QUERY TERM", query_buffer, 1024, NULL); |
1da177e4 LT |
175 | ptr = strstr(query_buffer, "CONMODE"); |
176 | /* | |
177 | * Set the conmode to 3215 so that the device recognition | |
178 | * will set the cu_type of the console to 3215. If the | |
179 | * conmode is 3270 and we don't set it back then both | |
180 | * 3215 and the 3270 driver will try to access the console | |
181 | * device (3215 as console and 3270 as normal tty). | |
182 | */ | |
740b5706 | 183 | cpcmd("TERM CONMODE 3215", NULL, 0, NULL); |
1da177e4 | 184 | if (ptr == NULL) { |
8c0933ee | 185 | #if defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
186 | SET_CONSOLE_SCLP; |
187 | #endif | |
188 | return; | |
189 | } | |
190 | if (strncmp(ptr + 8, "3270", 4) == 0) { | |
191 | #if defined(CONFIG_TN3270_CONSOLE) | |
192 | SET_CONSOLE_3270; | |
193 | #elif defined(CONFIG_TN3215_CONSOLE) | |
194 | SET_CONSOLE_3215; | |
8c0933ee | 195 | #elif defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
196 | SET_CONSOLE_SCLP; |
197 | #endif | |
198 | } else if (strncmp(ptr + 8, "3215", 4) == 0) { | |
199 | #if defined(CONFIG_TN3215_CONSOLE) | |
200 | SET_CONSOLE_3215; | |
201 | #elif defined(CONFIG_TN3270_CONSOLE) | |
202 | SET_CONSOLE_3270; | |
8c0933ee | 203 | #elif defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
204 | SET_CONSOLE_SCLP; |
205 | #endif | |
206 | } | |
207 | } else if (MACHINE_IS_P390) { | |
208 | #if defined(CONFIG_TN3215_CONSOLE) | |
209 | SET_CONSOLE_3215; | |
210 | #elif defined(CONFIG_TN3270_CONSOLE) | |
211 | SET_CONSOLE_3270; | |
212 | #endif | |
213 | } else { | |
8c0933ee | 214 | #if defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
215 | SET_CONSOLE_SCLP; |
216 | #endif | |
217 | } | |
218 | } | |
219 | ||
411ed322 MH |
220 | #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) |
221 | static void __init setup_zfcpdump(unsigned int console_devno) | |
222 | { | |
223 | static char str[64]; | |
224 | ||
225 | if (ipl_info.type != IPL_TYPE_FCP_DUMP) | |
226 | return; | |
227 | if (console_devno != -1) | |
228 | sprintf(str, "cio_ignore=all,!0.0.%04x,!0.0.%04x", | |
229 | ipl_info.data.fcp.dev_id.devno, console_devno); | |
230 | else | |
231 | sprintf(str, "cio_ignore=all,!0.0.%04x", | |
232 | ipl_info.data.fcp.dev_id.devno); | |
0a71a312 | 233 | strcat(COMMAND_LINE, " "); |
411ed322 MH |
234 | strcat(COMMAND_LINE, str); |
235 | console_loglevel = 2; | |
236 | } | |
237 | #else | |
238 | static inline void setup_zfcpdump(unsigned int console_devno) {} | |
239 | #endif /* CONFIG_ZFCPDUMP */ | |
240 | ||
1da177e4 LT |
241 | /* |
242 | * Reboot, halt and power_off stubs. They just call _machine_restart, | |
243 | * _machine_halt or _machine_power_off. | |
244 | */ | |
245 | ||
246 | void machine_restart(char *command) | |
247 | { | |
7aa8dac7 | 248 | if ((!in_interrupt() && !in_atomic()) || oops_in_progress) |
06fa46a2 MS |
249 | /* |
250 | * Only unblank the console if we are called in enabled | |
251 | * context or a bust_spinlocks cleared the way for us. | |
252 | */ | |
253 | console_unblank(); | |
1da177e4 LT |
254 | _machine_restart(command); |
255 | } | |
256 | ||
1da177e4 LT |
257 | void machine_halt(void) |
258 | { | |
06fa46a2 MS |
259 | if (!in_interrupt() || oops_in_progress) |
260 | /* | |
261 | * Only unblank the console if we are called in enabled | |
262 | * context or a bust_spinlocks cleared the way for us. | |
263 | */ | |
264 | console_unblank(); | |
1da177e4 LT |
265 | _machine_halt(); |
266 | } | |
267 | ||
1da177e4 LT |
268 | void machine_power_off(void) |
269 | { | |
06fa46a2 MS |
270 | if (!in_interrupt() || oops_in_progress) |
271 | /* | |
272 | * Only unblank the console if we are called in enabled | |
273 | * context or a bust_spinlocks cleared the way for us. | |
274 | */ | |
275 | console_unblank(); | |
1da177e4 LT |
276 | _machine_power_off(); |
277 | } | |
278 | ||
53df751c MS |
279 | /* |
280 | * Dummy power off function. | |
281 | */ | |
282 | void (*pm_power_off)(void) = machine_power_off; | |
283 | ||
59685296 HC |
284 | static int __init early_parse_mem(char *p) |
285 | { | |
286 | memory_end = memparse(p, &p); | |
287 | return 0; | |
288 | } | |
289 | early_param("mem", early_parse_mem); | |
290 | ||
291 | /* | |
292 | * "ipldelay=XXX[sm]" sets ipl delay in seconds or minutes | |
293 | */ | |
294 | static int __init early_parse_ipldelay(char *p) | |
c9e37353 | 295 | { |
c9e37353 | 296 | unsigned long delay = 0; |
1da177e4 | 297 | |
59685296 | 298 | delay = simple_strtoul(p, &p, 0); |
1da177e4 | 299 | |
59685296 HC |
300 | switch (*p) { |
301 | case 's': | |
302 | case 'S': | |
303 | delay *= 1000000; | |
304 | break; | |
305 | case 'm': | |
306 | case 'M': | |
307 | delay *= 60 * 1000000; | |
c9e37353 | 308 | } |
59685296 HC |
309 | |
310 | /* now wait for the requested amount of time */ | |
311 | udelay(delay); | |
312 | ||
313 | return 0; | |
c9e37353 | 314 | } |
59685296 | 315 | early_param("ipldelay", early_parse_ipldelay); |
c9e37353 | 316 | |
c1821c2e GS |
317 | #ifdef CONFIG_S390_SWITCH_AMODE |
318 | unsigned int switch_amode = 0; | |
319 | EXPORT_SYMBOL_GPL(switch_amode); | |
320 | ||
4d284cac HC |
321 | static void set_amode_and_uaccess(unsigned long user_amode, |
322 | unsigned long user32_amode) | |
c1821c2e GS |
323 | { |
324 | psw_user_bits = PSW_BASE_BITS | PSW_MASK_DAT | user_amode | | |
325 | PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | | |
326 | PSW_MASK_PSTATE | PSW_DEFAULT_KEY; | |
327 | #ifdef CONFIG_COMPAT | |
328 | psw_user32_bits = PSW_BASE32_BITS | PSW_MASK_DAT | user_amode | | |
329 | PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | | |
330 | PSW_MASK_PSTATE | PSW_DEFAULT_KEY; | |
331 | psw32_user_bits = PSW32_BASE_BITS | PSW32_MASK_DAT | user32_amode | | |
332 | PSW32_MASK_IO | PSW32_MASK_EXT | PSW32_MASK_MCHECK | | |
333 | PSW32_MASK_PSTATE; | |
334 | #endif | |
335 | psw_kernel_bits = PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_HOME | | |
336 | PSW_MASK_MCHECK | PSW_DEFAULT_KEY; | |
337 | ||
338 | if (MACHINE_HAS_MVCOS) { | |
339 | printk("mvcos available.\n"); | |
340 | memcpy(&uaccess, &uaccess_mvcos_switch, sizeof(uaccess)); | |
341 | } else { | |
342 | printk("mvcos not available.\n"); | |
343 | memcpy(&uaccess, &uaccess_pt, sizeof(uaccess)); | |
344 | } | |
345 | } | |
346 | ||
347 | /* | |
348 | * Switch kernel/user addressing modes? | |
349 | */ | |
350 | static int __init early_parse_switch_amode(char *p) | |
351 | { | |
352 | switch_amode = 1; | |
353 | return 0; | |
354 | } | |
355 | early_param("switch_amode", early_parse_switch_amode); | |
356 | ||
357 | #else /* CONFIG_S390_SWITCH_AMODE */ | |
358 | static inline void set_amode_and_uaccess(unsigned long user_amode, | |
359 | unsigned long user32_amode) | |
360 | { | |
361 | } | |
362 | #endif /* CONFIG_S390_SWITCH_AMODE */ | |
363 | ||
364 | #ifdef CONFIG_S390_EXEC_PROTECT | |
365 | unsigned int s390_noexec = 0; | |
366 | EXPORT_SYMBOL_GPL(s390_noexec); | |
367 | ||
368 | /* | |
369 | * Enable execute protection? | |
370 | */ | |
371 | static int __init early_parse_noexec(char *p) | |
372 | { | |
373 | if (!strncmp(p, "off", 3)) | |
374 | return 0; | |
375 | switch_amode = 1; | |
376 | s390_noexec = 1; | |
377 | return 0; | |
378 | } | |
379 | early_param("noexec", early_parse_noexec); | |
380 | #endif /* CONFIG_S390_EXEC_PROTECT */ | |
381 | ||
382 | static void setup_addressing_mode(void) | |
383 | { | |
384 | if (s390_noexec) { | |
385 | printk("S390 execute protection active, "); | |
386 | set_amode_and_uaccess(PSW_ASC_SECONDARY, PSW32_ASC_SECONDARY); | |
7af0d6f7 | 387 | } else if (switch_amode) { |
c1821c2e GS |
388 | printk("S390 address spaces switched, "); |
389 | set_amode_and_uaccess(PSW_ASC_PRIMARY, PSW32_ASC_PRIMARY); | |
390 | } | |
411788ea HC |
391 | #ifdef CONFIG_TRACE_IRQFLAGS |
392 | sysc_restore_trace_psw.mask = psw_kernel_bits & ~PSW_MASK_MCHECK; | |
393 | io_restore_trace_psw.mask = psw_kernel_bits & ~PSW_MASK_MCHECK; | |
394 | #endif | |
c1821c2e GS |
395 | } |
396 | ||
c9e37353 HC |
397 | static void __init |
398 | setup_lowcore(void) | |
399 | { | |
400 | struct _lowcore *lc; | |
401 | int lc_pages; | |
402 | ||
403 | /* | |
404 | * Setup lowcore for boot cpu | |
405 | */ | |
406 | lc_pages = sizeof(void *) == 8 ? 2 : 1; | |
407 | lc = (struct _lowcore *) | |
408 | __alloc_bootmem(lc_pages * PAGE_SIZE, lc_pages * PAGE_SIZE, 0); | |
409 | memset(lc, 0, lc_pages * PAGE_SIZE); | |
0b642ede | 410 | lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY; |
c9e37353 HC |
411 | lc->restart_psw.addr = |
412 | PSW_ADDR_AMODE | (unsigned long) restart_int_handler; | |
c1821c2e GS |
413 | if (switch_amode) |
414 | lc->restart_psw.mask |= PSW_ASC_HOME; | |
415 | lc->external_new_psw.mask = psw_kernel_bits; | |
c9e37353 HC |
416 | lc->external_new_psw.addr = |
417 | PSW_ADDR_AMODE | (unsigned long) ext_int_handler; | |
c1821c2e | 418 | lc->svc_new_psw.mask = psw_kernel_bits | PSW_MASK_IO | PSW_MASK_EXT; |
c9e37353 | 419 | lc->svc_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) system_call; |
c1821c2e | 420 | lc->program_new_psw.mask = psw_kernel_bits; |
c9e37353 HC |
421 | lc->program_new_psw.addr = |
422 | PSW_ADDR_AMODE | (unsigned long)pgm_check_handler; | |
77fa2245 | 423 | lc->mcck_new_psw.mask = |
c1821c2e | 424 | psw_kernel_bits & ~PSW_MASK_MCHECK & ~PSW_MASK_DAT; |
c9e37353 HC |
425 | lc->mcck_new_psw.addr = |
426 | PSW_ADDR_AMODE | (unsigned long) mcck_int_handler; | |
c1821c2e | 427 | lc->io_new_psw.mask = psw_kernel_bits; |
c9e37353 HC |
428 | lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler; |
429 | lc->ipl_device = S390_lowcore.ipl_device; | |
430 | lc->jiffy_timer = -1LL; | |
431 | lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE; | |
432 | lc->async_stack = (unsigned long) | |
433 | __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE; | |
c9e37353 HC |
434 | lc->panic_stack = (unsigned long) |
435 | __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0) + PAGE_SIZE; | |
c9e37353 HC |
436 | lc->current_task = (unsigned long) init_thread_union.thread_info.task; |
437 | lc->thread_info = (unsigned long) &init_thread_union; | |
347a8dc3 | 438 | #ifndef CONFIG_64BIT |
77fa2245 HC |
439 | if (MACHINE_HAS_IEEE) { |
440 | lc->extended_save_area_addr = (__u32) | |
441 | __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0); | |
442 | /* enable extended save area */ | |
c4972f33 | 443 | __ctl_set_bit(14, 29); |
77fa2245 HC |
444 | } |
445 | #endif | |
c9e37353 HC |
446 | set_prefix((u32)(unsigned long) lc); |
447 | } | |
448 | ||
449 | static void __init | |
450 | setup_resources(void) | |
451 | { | |
fe355b7f | 452 | struct resource *res, *sub_res; |
c9e37353 HC |
453 | int i; |
454 | ||
cc13ad62 HC |
455 | code_resource.start = (unsigned long) &_text; |
456 | code_resource.end = (unsigned long) &_etext - 1; | |
457 | data_resource.start = (unsigned long) &_etext; | |
458 | data_resource.end = (unsigned long) &_edata - 1; | |
459 | ||
9f4b0ba8 HC |
460 | for (i = 0; i < MEMORY_CHUNKS; i++) { |
461 | if (!memory_chunk[i].size) | |
462 | continue; | |
c9e37353 HC |
463 | res = alloc_bootmem_low(sizeof(struct resource)); |
464 | res->flags = IORESOURCE_BUSY | IORESOURCE_MEM; | |
465 | switch (memory_chunk[i].type) { | |
466 | case CHUNK_READ_WRITE: | |
467 | res->name = "System RAM"; | |
468 | break; | |
469 | case CHUNK_READ_ONLY: | |
470 | res->name = "System ROM"; | |
471 | res->flags |= IORESOURCE_READONLY; | |
472 | break; | |
473 | default: | |
474 | res->name = "reserved"; | |
475 | } | |
476 | res->start = memory_chunk[i].addr; | |
477 | res->end = memory_chunk[i].addr + memory_chunk[i].size - 1; | |
478 | request_resource(&iomem_resource, res); | |
fe355b7f HY |
479 | |
480 | if (code_resource.start >= res->start && | |
481 | code_resource.start <= res->end && | |
482 | code_resource.end > res->end) { | |
483 | sub_res = alloc_bootmem_low(sizeof(struct resource)); | |
484 | memcpy(sub_res, &code_resource, | |
485 | sizeof(struct resource)); | |
486 | sub_res->end = res->end; | |
487 | code_resource.start = res->end + 1; | |
488 | request_resource(res, sub_res); | |
489 | } | |
490 | ||
491 | if (code_resource.start >= res->start && | |
492 | code_resource.start <= res->end && | |
493 | code_resource.end <= res->end) | |
494 | request_resource(res, &code_resource); | |
495 | ||
496 | if (data_resource.start >= res->start && | |
497 | data_resource.start <= res->end && | |
498 | data_resource.end > res->end) { | |
499 | sub_res = alloc_bootmem_low(sizeof(struct resource)); | |
500 | memcpy(sub_res, &data_resource, | |
501 | sizeof(struct resource)); | |
502 | sub_res->end = res->end; | |
503 | data_resource.start = res->end + 1; | |
504 | request_resource(res, sub_res); | |
505 | } | |
506 | ||
507 | if (data_resource.start >= res->start && | |
508 | data_resource.start <= res->end && | |
509 | data_resource.end <= res->end) | |
510 | request_resource(res, &data_resource); | |
c9e37353 HC |
511 | } |
512 | } | |
513 | ||
411ed322 MH |
514 | unsigned long real_memory_size; |
515 | EXPORT_SYMBOL_GPL(real_memory_size); | |
516 | ||
8b62bc96 HC |
517 | static void __init setup_memory_end(void) |
518 | { | |
411ed322 | 519 | unsigned long memory_size; |
5fd9c6e2 | 520 | unsigned long max_mem; |
8b62bc96 HC |
521 | int i; |
522 | ||
411ed322 MH |
523 | #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) |
524 | if (ipl_info.type == IPL_TYPE_FCP_DUMP) | |
525 | memory_end = ZFCPDUMP_HSA_SIZE; | |
526 | #endif | |
527 | memory_size = 0; | |
8b62bc96 HC |
528 | memory_end &= PAGE_MASK; |
529 | ||
0189103c | 530 | max_mem = memory_end ? min(VMEM_MAX_PHYS, memory_end) : VMEM_MAX_PHYS; |
5fd9c6e2 | 531 | memory_end = min(max_mem, memory_end); |
8b62bc96 | 532 | |
9f4b0ba8 HC |
533 | /* |
534 | * Make sure all chunks are MAX_ORDER aligned so we don't need the | |
535 | * extra checks that HOLES_IN_ZONE would require. | |
536 | */ | |
537 | for (i = 0; i < MEMORY_CHUNKS; i++) { | |
538 | unsigned long start, end; | |
539 | struct mem_chunk *chunk; | |
540 | unsigned long align; | |
541 | ||
542 | chunk = &memory_chunk[i]; | |
543 | align = 1UL << (MAX_ORDER + PAGE_SHIFT - 1); | |
544 | start = (chunk->addr + align - 1) & ~(align - 1); | |
545 | end = (chunk->addr + chunk->size) & ~(align - 1); | |
546 | if (start >= end) | |
547 | memset(chunk, 0, sizeof(*chunk)); | |
548 | else { | |
549 | chunk->addr = start; | |
550 | chunk->size = end - start; | |
551 | } | |
552 | } | |
553 | ||
8b62bc96 HC |
554 | for (i = 0; i < MEMORY_CHUNKS; i++) { |
555 | struct mem_chunk *chunk = &memory_chunk[i]; | |
556 | ||
411ed322 MH |
557 | real_memory_size = max(real_memory_size, |
558 | chunk->addr + chunk->size); | |
8b62bc96 HC |
559 | if (chunk->addr >= max_mem) { |
560 | memset(chunk, 0, sizeof(*chunk)); | |
561 | continue; | |
562 | } | |
563 | if (chunk->addr + chunk->size > max_mem) | |
564 | chunk->size = max_mem - chunk->addr; | |
565 | memory_size = max(memory_size, chunk->addr + chunk->size); | |
566 | } | |
567 | if (!memory_end) | |
568 | memory_end = memory_size; | |
8b62bc96 HC |
569 | } |
570 | ||
c9e37353 HC |
571 | static void __init |
572 | setup_memory(void) | |
573 | { | |
574 | unsigned long bootmap_size; | |
fe355b7f | 575 | unsigned long start_pfn, end_pfn; |
c9e37353 | 576 | int i; |
1da177e4 LT |
577 | |
578 | /* | |
579 | * partially used pages are not usable - thus | |
580 | * we are rounding upwards: | |
581 | */ | |
65912a84 HC |
582 | start_pfn = PFN_UP(__pa(&_end)); |
583 | end_pfn = max_pfn = PFN_DOWN(memory_end); | |
1da177e4 | 584 | |
65912a84 HC |
585 | #ifdef CONFIG_BLK_DEV_INITRD |
586 | /* | |
587 | * Move the initrd in case the bitmap of the bootmem allocater | |
588 | * would overwrite it. | |
589 | */ | |
590 | ||
591 | if (INITRD_START && INITRD_SIZE) { | |
592 | unsigned long bmap_size; | |
593 | unsigned long start; | |
594 | ||
595 | bmap_size = bootmem_bootmap_pages(end_pfn - start_pfn + 1); | |
596 | bmap_size = PFN_PHYS(bmap_size); | |
597 | ||
598 | if (PFN_PHYS(start_pfn) + bmap_size > INITRD_START) { | |
599 | start = PFN_PHYS(start_pfn) + bmap_size + PAGE_SIZE; | |
600 | ||
601 | if (start + INITRD_SIZE > memory_end) { | |
602 | printk("initrd extends beyond end of memory " | |
603 | "(0x%08lx > 0x%08lx)\n" | |
604 | "disabling initrd\n", | |
605 | start + INITRD_SIZE, memory_end); | |
606 | INITRD_START = INITRD_SIZE = 0; | |
607 | } else { | |
608 | printk("Moving initrd (0x%08lx -> 0x%08lx, " | |
609 | "size: %ld)\n", | |
610 | INITRD_START, start, INITRD_SIZE); | |
611 | memmove((void *) start, (void *) INITRD_START, | |
612 | INITRD_SIZE); | |
613 | INITRD_START = start; | |
614 | } | |
615 | } | |
616 | } | |
617 | #endif | |
618 | ||
1da177e4 | 619 | /* |
7676bef9 | 620 | * Initialize the boot-time allocator |
1da177e4 LT |
621 | */ |
622 | bootmap_size = init_bootmem(start_pfn, end_pfn); | |
623 | ||
624 | /* | |
625 | * Register RAM areas with the bootmem allocator. | |
626 | */ | |
c9e37353 | 627 | |
0b642ede | 628 | for (i = 0; i < MEMORY_CHUNKS && memory_chunk[i].size > 0; i++) { |
39b742f9 | 629 | unsigned long start_chunk, end_chunk, pfn; |
1da177e4 LT |
630 | |
631 | if (memory_chunk[i].type != CHUNK_READ_WRITE) | |
632 | continue; | |
39b742f9 HC |
633 | start_chunk = PFN_DOWN(memory_chunk[i].addr); |
634 | end_chunk = start_chunk + PFN_DOWN(memory_chunk[i].size) - 1; | |
635 | end_chunk = min(end_chunk, end_pfn); | |
636 | if (start_chunk >= end_chunk) | |
637 | continue; | |
638 | add_active_range(0, start_chunk, end_chunk); | |
639 | pfn = max(start_chunk, start_pfn); | |
640 | for (; pfn <= end_chunk; pfn++) | |
641 | page_set_storage_key(PFN_PHYS(pfn), PAGE_DEFAULT_KEY); | |
1da177e4 LT |
642 | } |
643 | ||
0b642ede PO |
644 | psw_set_key(PAGE_DEFAULT_KEY); |
645 | ||
39b742f9 | 646 | free_bootmem_with_active_regions(0, max_pfn); |
c9e37353 | 647 | |
615b04b3 HC |
648 | /* |
649 | * Reserve memory used for lowcore/command line/kernel image. | |
650 | */ | |
72a7fe39 | 651 | reserve_bootmem(0, (unsigned long)_ehead, BOOTMEM_DEFAULT); |
615b04b3 | 652 | reserve_bootmem((unsigned long)_stext, |
72a7fe39 BW |
653 | PFN_PHYS(start_pfn) - (unsigned long)_stext, |
654 | BOOTMEM_DEFAULT); | |
c9e37353 HC |
655 | /* |
656 | * Reserve the bootmem bitmap itself as well. We do this in two | |
657 | * steps (first step was init_bootmem()) because this catches | |
658 | * the (very unlikely) case of us accidentally initializing the | |
659 | * bootmem allocator with an invalid RAM area. | |
660 | */ | |
72a7fe39 BW |
661 | reserve_bootmem(start_pfn << PAGE_SHIFT, bootmap_size, |
662 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
663 | |
664 | #ifdef CONFIG_BLK_DEV_INITRD | |
65912a84 | 665 | if (INITRD_START && INITRD_SIZE) { |
1da177e4 | 666 | if (INITRD_START + INITRD_SIZE <= memory_end) { |
72a7fe39 BW |
667 | reserve_bootmem(INITRD_START, INITRD_SIZE, |
668 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
669 | initrd_start = INITRD_START; |
670 | initrd_end = initrd_start + INITRD_SIZE; | |
671 | } else { | |
c9e37353 HC |
672 | printk("initrd extends beyond end of memory " |
673 | "(0x%08lx > 0x%08lx)\ndisabling initrd\n", | |
674 | initrd_start + INITRD_SIZE, memory_end); | |
675 | initrd_start = initrd_end = 0; | |
1da177e4 | 676 | } |
c9e37353 | 677 | } |
1da177e4 | 678 | #endif |
c9e37353 | 679 | } |
1da177e4 | 680 | |
cf8ba7a9 MS |
681 | static __init unsigned int stfl(void) |
682 | { | |
683 | asm volatile( | |
684 | " .insn s,0xb2b10000,0(0)\n" /* stfl */ | |
685 | "0:\n" | |
686 | EX_TABLE(0b,0b)); | |
687 | return S390_lowcore.stfl_fac_list; | |
688 | } | |
689 | ||
690 | static __init int stfle(unsigned long long *list, int doublewords) | |
691 | { | |
692 | typedef struct { unsigned long long _[doublewords]; } addrtype; | |
693 | register unsigned long __nr asm("0") = doublewords - 1; | |
694 | ||
695 | asm volatile(".insn s,0xb2b00000,%0" /* stfle */ | |
696 | : "=m" (*(addrtype *) list), "+d" (__nr) : : "cc"); | |
697 | return __nr + 1; | |
698 | } | |
699 | ||
700 | /* | |
701 | * Setup hardware capabilities. | |
702 | */ | |
703 | static void __init setup_hwcaps(void) | |
704 | { | |
705 | static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 }; | |
706 | struct cpuinfo_S390 *cpuinfo = &S390_lowcore.cpu_data; | |
707 | unsigned long long facility_list_extended; | |
708 | unsigned int facility_list; | |
709 | int i; | |
710 | ||
711 | facility_list = stfl(); | |
712 | /* | |
713 | * The store facility list bits numbers as found in the principles | |
714 | * of operation are numbered with bit 1UL<<31 as number 0 to | |
715 | * bit 1UL<<0 as number 31. | |
716 | * Bit 0: instructions named N3, "backported" to esa-mode | |
717 | * Bit 2: z/Architecture mode is active | |
718 | * Bit 7: the store-facility-list-extended facility is installed | |
719 | * Bit 17: the message-security assist is installed | |
720 | * Bit 19: the long-displacement facility is installed | |
721 | * Bit 21: the extended-immediate facility is installed | |
722 | * These get translated to: | |
723 | * HWCAP_S390_ESAN3 bit 0, HWCAP_S390_ZARCH bit 1, | |
724 | * HWCAP_S390_STFLE bit 2, HWCAP_S390_MSA bit 3, | |
725 | * HWCAP_S390_LDISP bit 4, and HWCAP_S390_EIMM bit 5. | |
726 | */ | |
727 | for (i = 0; i < 6; i++) | |
728 | if (facility_list & (1UL << (31 - stfl_bits[i]))) | |
729 | elf_hwcap |= 1UL << i; | |
730 | ||
731 | /* | |
732 | * Check for additional facilities with store-facility-list-extended. | |
733 | * stfle stores doublewords (8 byte) with bit 1ULL<<63 as bit 0 | |
734 | * and 1ULL<<0 as bit 63. Bits 0-31 contain the same information | |
735 | * as stored by stfl, bits 32-xxx contain additional facilities. | |
736 | * How many facility words are stored depends on the number of | |
737 | * doublewords passed to the instruction. The additional facilites | |
738 | * are: | |
739 | * Bit 43: decimal floating point facility is installed | |
740 | * translated to: | |
741 | * HWCAP_S390_DFP bit 6. | |
742 | */ | |
743 | if ((elf_hwcap & (1UL << 2)) && | |
744 | stfle(&facility_list_extended, 1) > 0) { | |
745 | if (facility_list_extended & (1ULL << (64 - 43))) | |
746 | elf_hwcap |= 1UL << 6; | |
747 | } | |
748 | ||
749 | switch (cpuinfo->cpu_id.machine) { | |
750 | case 0x9672: | |
751 | #if !defined(CONFIG_64BIT) | |
752 | default: /* Use "g5" as default for 31 bit kernels. */ | |
753 | #endif | |
754 | strcpy(elf_platform, "g5"); | |
755 | break; | |
756 | case 0x2064: | |
757 | case 0x2066: | |
758 | #if defined(CONFIG_64BIT) | |
759 | default: /* Use "z900" as default for 64 bit kernels. */ | |
760 | #endif | |
761 | strcpy(elf_platform, "z900"); | |
762 | break; | |
763 | case 0x2084: | |
764 | case 0x2086: | |
765 | strcpy(elf_platform, "z990"); | |
766 | break; | |
767 | case 0x2094: | |
768 | strcpy(elf_platform, "z9-109"); | |
769 | break; | |
770 | } | |
771 | } | |
772 | ||
c9e37353 HC |
773 | /* |
774 | * Setup function called from init/main.c just after the banner | |
775 | * was printed. | |
776 | */ | |
1da177e4 | 777 | |
c9e37353 HC |
778 | void __init |
779 | setup_arch(char **cmdline_p) | |
780 | { | |
1da177e4 | 781 | /* |
c9e37353 | 782 | * print what head.S has found out about the machine |
1da177e4 | 783 | */ |
347a8dc3 | 784 | #ifndef CONFIG_64BIT |
c9e37353 HC |
785 | printk((MACHINE_IS_VM) ? |
786 | "We are running under VM (31 bit mode)\n" : | |
787 | "We are running native (31 bit mode)\n"); | |
788 | printk((MACHINE_HAS_IEEE) ? | |
789 | "This machine has an IEEE fpu\n" : | |
790 | "This machine has no IEEE fpu\n"); | |
347a8dc3 | 791 | #else /* CONFIG_64BIT */ |
c9e37353 HC |
792 | printk((MACHINE_IS_VM) ? |
793 | "We are running under VM (64 bit mode)\n" : | |
794 | "We are running native (64 bit mode)\n"); | |
347a8dc3 | 795 | #endif /* CONFIG_64BIT */ |
c9e37353 | 796 | |
59685296 | 797 | /* Save unparsed command line copy for /proc/cmdline */ |
e06b1a35 | 798 | strlcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE); |
59685296 HC |
799 | |
800 | *cmdline_p = COMMAND_LINE; | |
801 | *(*cmdline_p + COMMAND_LINE_SIZE - 1) = '\0'; | |
802 | ||
c9e37353 | 803 | ROOT_DEV = Root_RAM0; |
59685296 HC |
804 | |
805 | init_mm.start_code = PAGE_OFFSET; | |
806 | init_mm.end_code = (unsigned long) &_etext; | |
807 | init_mm.end_data = (unsigned long) &_edata; | |
808 | init_mm.brk = (unsigned long) &_end; | |
809 | ||
6c2a9e6d GS |
810 | if (MACHINE_HAS_MVCOS) |
811 | memcpy(&uaccess, &uaccess_mvcos, sizeof(uaccess)); | |
812 | else | |
813 | memcpy(&uaccess, &uaccess_std, sizeof(uaccess)); | |
814 | ||
59685296 HC |
815 | parse_early_param(); |
816 | ||
99ca4e58 | 817 | setup_ipl(); |
8b62bc96 | 818 | setup_memory_end(); |
c1821c2e | 819 | setup_addressing_mode(); |
c9e37353 HC |
820 | setup_memory(); |
821 | setup_resources(); | |
822 | setup_lowcore(); | |
823 | ||
1da177e4 LT |
824 | cpu_init(); |
825 | __cpu_logical_map[0] = S390_lowcore.cpu_data.cpu_addr; | |
826 | ||
cf8ba7a9 MS |
827 | /* |
828 | * Setup capabilities (ELF_HWCAP & ELF_PLATFORM). | |
829 | */ | |
830 | setup_hwcaps(); | |
831 | ||
1da177e4 LT |
832 | /* |
833 | * Create kernel page tables and switch to virtual addressing. | |
834 | */ | |
835 | paging_init(); | |
836 | ||
837 | /* Setup default console */ | |
838 | conmode_default(); | |
411ed322 MH |
839 | |
840 | /* Setup zfcpdump support */ | |
841 | setup_zfcpdump(console_devno); | |
1da177e4 LT |
842 | } |
843 | ||
ea1f4eec | 844 | void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo) |
1da177e4 | 845 | { |
08d07968 | 846 | printk(KERN_INFO "cpu %d " |
1da177e4 LT |
847 | #ifdef CONFIG_SMP |
848 | "phys_idx=%d " | |
849 | #endif | |
850 | "vers=%02X ident=%06X machine=%04X unused=%04X\n", | |
851 | cpuinfo->cpu_nr, | |
852 | #ifdef CONFIG_SMP | |
853 | cpuinfo->cpu_addr, | |
854 | #endif | |
855 | cpuinfo->cpu_id.version, | |
856 | cpuinfo->cpu_id.ident, | |
857 | cpuinfo->cpu_id.machine, | |
858 | cpuinfo->cpu_id.unused); | |
859 | } | |
860 | ||
861 | /* | |
862 | * show_cpuinfo - Get information on one CPU for use by procfs. | |
863 | */ | |
864 | ||
865 | static int show_cpuinfo(struct seq_file *m, void *v) | |
866 | { | |
cf8ba7a9 MS |
867 | static const char *hwcap_str[7] = { |
868 | "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp" | |
869 | }; | |
1da177e4 LT |
870 | struct cpuinfo_S390 *cpuinfo; |
871 | unsigned long n = (unsigned long) v - 1; | |
cf8ba7a9 | 872 | int i; |
1da177e4 | 873 | |
31ee4b2f | 874 | s390_adjust_jiffies(); |
b7ae9dd8 | 875 | preempt_disable(); |
1da177e4 LT |
876 | if (!n) { |
877 | seq_printf(m, "vendor_id : IBM/S390\n" | |
878 | "# processors : %i\n" | |
879 | "bogomips per cpu: %lu.%02lu\n", | |
880 | num_online_cpus(), loops_per_jiffy/(500000/HZ), | |
881 | (loops_per_jiffy/(5000/HZ))%100); | |
cf8ba7a9 MS |
882 | seq_puts(m, "features\t: "); |
883 | for (i = 0; i < 7; i++) | |
884 | if (hwcap_str[i] && (elf_hwcap & (1UL << i))) | |
885 | seq_printf(m, "%s ", hwcap_str[i]); | |
886 | seq_puts(m, "\n"); | |
1da177e4 | 887 | } |
cf8ba7a9 | 888 | |
1da177e4 LT |
889 | if (cpu_online(n)) { |
890 | #ifdef CONFIG_SMP | |
891 | if (smp_processor_id() == n) | |
892 | cpuinfo = &S390_lowcore.cpu_data; | |
893 | else | |
894 | cpuinfo = &lowcore_ptr[n]->cpu_data; | |
895 | #else | |
896 | cpuinfo = &S390_lowcore.cpu_data; | |
897 | #endif | |
898 | seq_printf(m, "processor %li: " | |
899 | "version = %02X, " | |
900 | "identification = %06X, " | |
901 | "machine = %04X\n", | |
902 | n, cpuinfo->cpu_id.version, | |
903 | cpuinfo->cpu_id.ident, | |
904 | cpuinfo->cpu_id.machine); | |
905 | } | |
b7ae9dd8 | 906 | preempt_enable(); |
1da177e4 LT |
907 | return 0; |
908 | } | |
909 | ||
910 | static void *c_start(struct seq_file *m, loff_t *pos) | |
911 | { | |
912 | return *pos < NR_CPUS ? (void *)((unsigned long) *pos + 1) : NULL; | |
913 | } | |
914 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
915 | { | |
916 | ++*pos; | |
917 | return c_start(m, pos); | |
918 | } | |
919 | static void c_stop(struct seq_file *m, void *v) | |
920 | { | |
921 | } | |
5c81cdbe | 922 | const struct seq_operations cpuinfo_op = { |
1da177e4 LT |
923 | .start = c_start, |
924 | .next = c_next, | |
925 | .stop = c_stop, | |
926 | .show = show_cpuinfo, | |
927 | }; | |
928 |