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s390/smp: remove redundant check
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1da177e4 1/*
8b646bd7 2 * SMP related functions
1da177e4 3 *
8b646bd7
MS
4 * Copyright IBM Corp. 1999,2012
5 * Author(s): Denis Joseph Barrow,
6 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
7 * Heiko Carstens <heiko.carstens@de.ibm.com>,
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
8b646bd7
MS
13 * The code outside of smp.c uses logical cpu numbers, only smp.c does
14 * the translation of logical to physical cpu ids. All new code that
15 * operates on physical cpu numbers needs to go into smp.c.
1da177e4
LT
16 */
17
395d31d4
MS
18#define KMSG_COMPONENT "cpu"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
f230886b 21#include <linux/workqueue.h>
1da177e4
LT
22#include <linux/module.h>
23#include <linux/init.h>
1da177e4 24#include <linux/mm.h>
4e950f6f 25#include <linux/err.h>
1da177e4
LT
26#include <linux/spinlock.h>
27#include <linux/kernel_stat.h>
1da177e4 28#include <linux/delay.h>
1da177e4 29#include <linux/interrupt.h>
3324e60a 30#include <linux/irqflags.h>
1da177e4 31#include <linux/cpu.h>
5a0e3ad6 32#include <linux/slab.h>
60a0c68d 33#include <linux/crash_dump.h>
cbb870c8 34#include <asm/asm-offsets.h>
1e3cab2f
HC
35#include <asm/switch_to.h>
36#include <asm/facility.h>
46b05d26 37#include <asm/ipl.h>
2b67fc46 38#include <asm/setup.h>
1da177e4 39#include <asm/irq.h>
1da177e4 40#include <asm/tlbflush.h>
2b67fc46 41#include <asm/timer.h>
411ed322 42#include <asm/lowcore.h>
08d07968 43#include <asm/sclp.h>
c742b31c 44#include <asm/vdso.h>
3ab121ab 45#include <asm/debug.h>
4857d4bb 46#include <asm/os_info.h>
a806170e 47#include "entry.h"
1da177e4 48
8b646bd7
MS
49enum {
50 sigp_sense = 1,
51 sigp_external_call = 2,
52 sigp_emergency_signal = 3,
53 sigp_start = 4,
54 sigp_stop = 5,
55 sigp_restart = 6,
56 sigp_stop_and_store_status = 9,
57 sigp_initial_cpu_reset = 11,
58 sigp_cpu_reset = 12,
59 sigp_set_prefix = 13,
60 sigp_store_status_at_address = 14,
61 sigp_store_extended_status_at_address = 15,
62 sigp_set_architecture = 18,
63 sigp_conditional_emergency_signal = 19,
64 sigp_sense_running = 21,
65};
fb380aad 66
8b646bd7
MS
67enum {
68 sigp_order_code_accepted = 0,
69 sigp_status_stored = 1,
70 sigp_busy = 2,
71 sigp_not_operational = 3,
72};
1da177e4 73
8b646bd7
MS
74enum {
75 ec_schedule = 0,
76 ec_call_function,
77 ec_call_function_single,
78 ec_stop_cpu,
79};
08d07968 80
8b646bd7 81enum {
08d07968
HC
82 CPU_STATE_STANDBY,
83 CPU_STATE_CONFIGURED,
84};
85
8b646bd7
MS
86struct pcpu {
87 struct cpu cpu;
8b646bd7
MS
88 struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
89 unsigned long async_stack; /* async stack for the cpu */
90 unsigned long panic_stack; /* panic stack for the cpu */
91 unsigned long ec_mask; /* bit mask for ec_xxx functions */
92 int state; /* physical cpu state */
93 u32 status; /* last status received via sigp */
94 u16 address; /* physical cpu address */
95};
96
97static u8 boot_cpu_type;
98static u16 boot_cpu_address;
99static struct pcpu pcpu_devices[NR_CPUS];
100
dbd70fb4 101DEFINE_MUTEX(smp_cpu_state_mutex);
08d07968 102
8b646bd7
MS
103/*
104 * Signal processor helper functions.
105 */
106static inline int __pcpu_sigp(u16 addr, u8 order, u32 parm, u32 *status)
107{
108 register unsigned int reg1 asm ("1") = parm;
109 int cc;
08d07968 110
8b646bd7
MS
111 asm volatile(
112 " sigp %1,%2,0(%3)\n"
113 " ipm %0\n"
114 " srl %0,28\n"
115 : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
116 if (status && cc == 1)
117 *status = reg1;
118 return cc;
119}
1da177e4 120
8b646bd7 121static inline int __pcpu_sigp_relax(u16 addr, u8 order, u32 parm, u32 *status)
5c0b912e 122{
8b646bd7 123 int cc;
5c0b912e 124
8b646bd7
MS
125 while (1) {
126 cc = __pcpu_sigp(addr, order, parm, status);
127 if (cc != sigp_busy)
128 return cc;
129 cpu_relax();
5c0b912e 130 }
5c0b912e
HC
131}
132
8b646bd7 133static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
a93b8ec1 134{
8b646bd7
MS
135 int cc, retry;
136
137 for (retry = 0; ; retry++) {
138 cc = __pcpu_sigp(pcpu->address, order, parm, &pcpu->status);
139 if (cc != sigp_busy)
140 break;
141 if (retry >= 3)
142 udelay(10);
143 }
144 return cc;
145}
146
147static inline int pcpu_stopped(struct pcpu *pcpu)
148{
149 if (__pcpu_sigp(pcpu->address, sigp_sense,
150 0, &pcpu->status) != sigp_status_stored)
151 return 0;
152 /* Check for stopped and check stop state */
153 return !!(pcpu->status & 0x50);
154}
155
156static inline int pcpu_running(struct pcpu *pcpu)
a93b8ec1 157{
8b646bd7
MS
158 if (__pcpu_sigp(pcpu->address, sigp_sense_running,
159 0, &pcpu->status) != sigp_status_stored)
160 return 1;
524b24ad
HC
161 /* Status stored condition code is equivalent to cpu not running. */
162 return 0;
a93b8ec1
HC
163}
164
1943f53c 165/*
8b646bd7 166 * Find struct pcpu by cpu address.
1943f53c 167 */
8b646bd7 168static struct pcpu *pcpu_find_address(const struct cpumask *mask, int address)
1943f53c
MH
169{
170 int cpu;
171
8b646bd7
MS
172 for_each_cpu(cpu, mask)
173 if (pcpu_devices[cpu].address == address)
174 return pcpu_devices + cpu;
175 return NULL;
176}
177
178static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
179{
180 int order;
181
182 set_bit(ec_bit, &pcpu->ec_mask);
183 order = pcpu_running(pcpu) ?
184 sigp_external_call : sigp_emergency_signal;
185 pcpu_sigp_retry(pcpu, order, 0);
186}
187
188static int __cpuinit pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
189{
190 struct _lowcore *lc;
191
192 if (pcpu != &pcpu_devices[0]) {
193 pcpu->lowcore = (struct _lowcore *)
194 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
195 pcpu->async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
196 pcpu->panic_stack = __get_free_page(GFP_KERNEL);
197 if (!pcpu->lowcore || !pcpu->panic_stack || !pcpu->async_stack)
198 goto out;
1943f53c 199 }
8b646bd7
MS
200 lc = pcpu->lowcore;
201 memcpy(lc, &S390_lowcore, 512);
202 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
203 lc->async_stack = pcpu->async_stack + ASYNC_SIZE;
204 lc->panic_stack = pcpu->panic_stack + PAGE_SIZE;
205 lc->cpu_nr = cpu;
206#ifndef CONFIG_64BIT
207 if (MACHINE_HAS_IEEE) {
208 lc->extended_save_area_addr = get_zeroed_page(GFP_KERNEL);
209 if (!lc->extended_save_area_addr)
210 goto out;
211 }
212#else
213 if (vdso_alloc_per_cpu(lc))
214 goto out;
215#endif
216 lowcore_ptr[cpu] = lc;
217 pcpu_sigp_retry(pcpu, sigp_set_prefix, (u32)(unsigned long) lc);
218 return 0;
219out:
220 if (pcpu != &pcpu_devices[0]) {
221 free_page(pcpu->panic_stack);
222 free_pages(pcpu->async_stack, ASYNC_ORDER);
223 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
224 }
225 return -ENOMEM;
1943f53c
MH
226}
227
9d0f46af
HC
228#ifdef CONFIG_HOTPLUG_CPU
229
8b646bd7 230static void pcpu_free_lowcore(struct pcpu *pcpu)
2c2df118 231{
8b646bd7
MS
232 pcpu_sigp_retry(pcpu, sigp_set_prefix, 0);
233 lowcore_ptr[pcpu - pcpu_devices] = NULL;
234#ifndef CONFIG_64BIT
235 if (MACHINE_HAS_IEEE) {
236 struct _lowcore *lc = pcpu->lowcore;
237
238 free_page((unsigned long) lc->extended_save_area_addr);
239 lc->extended_save_area_addr = 0;
240 }
241#else
242 vdso_free_per_cpu(pcpu->lowcore);
243#endif
244 if (pcpu != &pcpu_devices[0]) {
245 free_page(pcpu->panic_stack);
246 free_pages(pcpu->async_stack, ASYNC_ORDER);
247 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
248 }
249}
250
9d0f46af
HC
251#endif /* CONFIG_HOTPLUG_CPU */
252
8b646bd7
MS
253static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
254{
255 struct _lowcore *lc = pcpu->lowcore;
256
257 atomic_inc(&init_mm.context.attach_count);
258 lc->cpu_nr = cpu;
259 lc->percpu_offset = __per_cpu_offset[cpu];
260 lc->kernel_asce = S390_lowcore.kernel_asce;
261 lc->machine_flags = S390_lowcore.machine_flags;
262 lc->ftrace_func = S390_lowcore.ftrace_func;
263 lc->user_timer = lc->system_timer = lc->steal_timer = 0;
264 __ctl_store(lc->cregs_save_area, 0, 15);
265 save_access_regs((unsigned int *) lc->access_regs_save_area);
266 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
267 MAX_FACILITY_BIT/8);
268}
269
270static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
271{
272 struct _lowcore *lc = pcpu->lowcore;
273 struct thread_info *ti = task_thread_info(tsk);
274
275 lc->kernel_stack = (unsigned long) task_stack_page(tsk) + THREAD_SIZE;
276 lc->thread_info = (unsigned long) task_thread_info(tsk);
277 lc->current_task = (unsigned long) tsk;
278 lc->user_timer = ti->user_timer;
279 lc->system_timer = ti->system_timer;
280 lc->steal_timer = 0;
281}
282
283static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
284{
285 struct _lowcore *lc = pcpu->lowcore;
286
287 lc->restart_stack = lc->kernel_stack;
288 lc->restart_fn = (unsigned long) func;
289 lc->restart_data = (unsigned long) data;
290 lc->restart_source = -1UL;
291 pcpu_sigp_retry(pcpu, sigp_restart, 0);
292}
293
294/*
295 * Call function via PSW restart on pcpu and stop the current cpu.
296 */
297static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
298 void *data, unsigned long stack)
299{
061da3df
MH
300 struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
301 struct {
302 unsigned long stack;
303 void *func;
304 void *data;
305 unsigned long source;
306 } restart = { stack, func, data, stap() };
8b646bd7
MS
307
308 __load_psw_mask(psw_kernel_bits);
061da3df 309 if (pcpu->address == restart.source)
8b646bd7
MS
310 func(data); /* should not return */
311 /* Stop target cpu (if func returns this stops the current cpu). */
312 pcpu_sigp_retry(pcpu, sigp_stop, 0);
313 /* Restart func on the target cpu and stop the current cpu. */
061da3df 314 memcpy_absolute(&lc->restart_stack, &restart, sizeof(restart));
8b646bd7
MS
315 asm volatile(
316 "0: sigp 0,%0,6 # sigp restart to target cpu\n"
317 " brc 2,0b # busy, try again\n"
318 "1: sigp 0,%1,5 # sigp stop to current cpu\n"
319 " brc 2,1b # busy, try again\n"
061da3df 320 : : "d" (pcpu->address), "d" (restart.source) : "0", "1", "cc");
8b646bd7
MS
321 for (;;) ;
322}
323
324/*
325 * Call function on an online CPU.
326 */
327void smp_call_online_cpu(void (*func)(void *), void *data)
328{
329 struct pcpu *pcpu;
330
331 /* Use the current cpu if it is online. */
332 pcpu = pcpu_find_address(cpu_online_mask, stap());
333 if (!pcpu)
334 /* Use the first online cpu. */
335 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
336 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
337}
338
339/*
340 * Call function on the ipl CPU.
341 */
342void smp_call_ipl_cpu(void (*func)(void *), void *data)
343{
c6da39f2
MH
344 pcpu_delegate(&pcpu_devices[0], func, data,
345 pcpu_devices->panic_stack + PAGE_SIZE);
8b646bd7
MS
346}
347
348int smp_find_processor_id(u16 address)
349{
350 int cpu;
351
352 for_each_present_cpu(cpu)
353 if (pcpu_devices[cpu].address == address)
354 return cpu;
355 return -1;
2c2df118
HC
356}
357
8b646bd7 358int smp_vcpu_scheduled(int cpu)
85ac7ca5 359{
8b646bd7
MS
360 return pcpu_running(pcpu_devices + cpu);
361}
362
363void smp_yield(void)
364{
365 if (MACHINE_HAS_DIAG44)
366 asm volatile("diag 0,0,0x44");
2c2df118
HC
367}
368
8b646bd7 369void smp_yield_cpu(int cpu)
85ac7ca5 370{
8b646bd7
MS
371 if (MACHINE_HAS_DIAG9C)
372 asm volatile("diag %0,0,0x9c"
373 : : "d" (pcpu_devices[cpu].address));
374 else if (MACHINE_HAS_DIAG44)
375 asm volatile("diag 0,0,0x44");
376}
377
378/*
379 * Send cpus emergency shutdown signal. This gives the cpus the
380 * opportunity to complete outstanding interrupts.
381 */
382void smp_emergency_stop(cpumask_t *cpumask)
383{
384 u64 end;
385 int cpu;
386
387 end = get_clock() + (1000000UL << 12);
388 for_each_cpu(cpu, cpumask) {
389 struct pcpu *pcpu = pcpu_devices + cpu;
390 set_bit(ec_stop_cpu, &pcpu->ec_mask);
391 while (__pcpu_sigp(pcpu->address, sigp_emergency_signal,
392 0, NULL) == sigp_busy &&
393 get_clock() < end)
394 cpu_relax();
395 }
396 while (get_clock() < end) {
397 for_each_cpu(cpu, cpumask)
398 if (pcpu_stopped(pcpu_devices + cpu))
399 cpumask_clear_cpu(cpu, cpumask);
400 if (cpumask_empty(cpumask))
401 break;
85ac7ca5 402 cpu_relax();
8b646bd7 403 }
85ac7ca5
MS
404}
405
8b646bd7
MS
406/*
407 * Stop all cpus but the current one.
408 */
677d7623 409void smp_send_stop(void)
1da177e4 410{
85ac7ca5
MS
411 cpumask_t cpumask;
412 int cpu;
1da177e4 413
677d7623 414 /* Disable all interrupts/machine checks */
b50511e4 415 __load_psw_mask(psw_kernel_bits | PSW_MASK_DAT);
3324e60a 416 trace_hardirqs_off();
1da177e4 417
3ab121ab 418 debug_set_critical();
85ac7ca5
MS
419 cpumask_copy(&cpumask, cpu_online_mask);
420 cpumask_clear_cpu(smp_processor_id(), &cpumask);
421
8b646bd7
MS
422 if (oops_in_progress)
423 smp_emergency_stop(&cpumask);
1da177e4 424
85ac7ca5
MS
425 /* stop all processors */
426 for_each_cpu(cpu, &cpumask) {
8b646bd7
MS
427 struct pcpu *pcpu = pcpu_devices + cpu;
428 pcpu_sigp_retry(pcpu, sigp_stop, 0);
429 while (!pcpu_stopped(pcpu))
c6b5b847
HC
430 cpu_relax();
431 }
432}
433
8b646bd7
MS
434/*
435 * Stop the current cpu.
436 */
437void smp_stop_cpu(void)
438{
439 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), sigp_stop, 0);
440 for (;;) ;
441}
442
1da177e4
LT
443/*
444 * This is the main routine where commands issued by other
445 * cpus are handled.
446 */
fde15c3a 447static void do_ext_call_interrupt(struct ext_code ext_code,
f6649a7e 448 unsigned int param32, unsigned long param64)
1da177e4 449{
39ce010d 450 unsigned long bits;
8b646bd7 451 int cpu;
1da177e4 452
8b646bd7 453 cpu = smp_processor_id();
fde15c3a 454 if (ext_code.code == 0x1202)
8b646bd7 455 kstat_cpu(cpu).irqs[EXTINT_EXC]++;
2a3a2d66 456 else
8b646bd7 457 kstat_cpu(cpu).irqs[EXTINT_EMS]++;
39ce010d
HC
458 /*
459 * handle bit signal external calls
39ce010d 460 */
8b646bd7 461 bits = xchg(&pcpu_devices[cpu].ec_mask, 0);
1da177e4 462
85ac7ca5
MS
463 if (test_bit(ec_stop_cpu, &bits))
464 smp_stop_cpu();
465
184748cc
PZ
466 if (test_bit(ec_schedule, &bits))
467 scheduler_ipi();
468
39ce010d 469 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
470 generic_smp_call_function_interrupt();
471
472 if (test_bit(ec_call_function_single, &bits))
473 generic_smp_call_function_single_interrupt();
85ac7ca5 474
1da177e4
LT
475}
476
630cd046 477void arch_send_call_function_ipi_mask(const struct cpumask *mask)
ca9fc75a
HC
478{
479 int cpu;
480
630cd046 481 for_each_cpu(cpu, mask)
8b646bd7 482 pcpu_ec_call(pcpu_devices + cpu, ec_call_function);
ca9fc75a
HC
483}
484
485void arch_send_call_function_single_ipi(int cpu)
486{
8b646bd7 487 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
ca9fc75a
HC
488}
489
347a8dc3 490#ifndef CONFIG_64BIT
1da177e4
LT
491/*
492 * this function sends a 'purge tlb' signal to another CPU.
493 */
a806170e 494static void smp_ptlb_callback(void *info)
1da177e4 495{
ba8a9229 496 __tlb_flush_local();
1da177e4
LT
497}
498
499void smp_ptlb_all(void)
500{
15c8b6c1 501 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
502}
503EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 504#endif /* ! CONFIG_64BIT */
1da177e4
LT
505
506/*
507 * this function sends a 'reschedule' IPI to another CPU.
508 * it goes straight through and wastes no time serializing
509 * anything. Worst case is that we lose a reschedule ...
510 */
511void smp_send_reschedule(int cpu)
512{
8b646bd7 513 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
1da177e4
LT
514}
515
516/*
517 * parameter area for the set/clear control bit callbacks
518 */
94c12cc7 519struct ec_creg_mask_parms {
8b646bd7
MS
520 unsigned long orval;
521 unsigned long andval;
522 int cr;
94c12cc7 523};
1da177e4
LT
524
525/*
526 * callback for setting/clearing control bits
527 */
39ce010d
HC
528static void smp_ctl_bit_callback(void *info)
529{
94c12cc7 530 struct ec_creg_mask_parms *pp = info;
1da177e4 531 unsigned long cregs[16];
39ce010d 532
94c12cc7 533 __ctl_store(cregs, 0, 15);
8b646bd7 534 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
94c12cc7 535 __ctl_load(cregs, 0, 15);
1da177e4
LT
536}
537
538/*
539 * Set a bit in a control register of all cpus
540 */
94c12cc7
MS
541void smp_ctl_set_bit(int cr, int bit)
542{
8b646bd7 543 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
1da177e4 544
15c8b6c1 545 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 546}
39ce010d 547EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
548
549/*
550 * Clear a bit in a control register of all cpus
551 */
94c12cc7
MS
552void smp_ctl_clear_bit(int cr, int bit)
553{
8b646bd7 554 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
1da177e4 555
15c8b6c1 556 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 557}
39ce010d 558EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 559
60a0c68d 560#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_CRASH_DUMP)
411ed322 561
8b646bd7
MS
562struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
563EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
564
565static void __init smp_get_save_area(int cpu, u16 address)
411ed322 566{
8b646bd7
MS
567 void *lc = pcpu_devices[0].lowcore;
568 struct save_area *save_area;
569
60a0c68d 570 if (is_kdump_kernel())
411ed322 571 return;
8b646bd7
MS
572 if (!OLDMEM_BASE && (address == boot_cpu_address ||
573 ipl_info.type != IPL_TYPE_FCP_DUMP))
574 return;
285f6722 575 if (cpu >= NR_CPUS) {
8b646bd7
MS
576 pr_warning("CPU %i exceeds the maximum %i and is excluded "
577 "from the dump\n", cpu, NR_CPUS - 1);
285f6722 578 return;
411ed322 579 }
8b646bd7
MS
580 save_area = kmalloc(sizeof(struct save_area), GFP_KERNEL);
581 if (!save_area)
582 panic("could not allocate memory for save area\n");
583 zfcpdump_save_areas[cpu] = save_area;
584#ifdef CONFIG_CRASH_DUMP
585 if (address == boot_cpu_address) {
586 /* Copy the registers of the boot cpu. */
587 copy_oldmem_page(1, (void *) save_area, sizeof(*save_area),
588 SAVE_AREA_BASE - PAGE_SIZE, 0);
589 return;
590 }
591#endif
592 /* Get the registers of a non-boot cpu. */
593 __pcpu_sigp_relax(address, sigp_stop_and_store_status, 0, NULL);
594 memcpy_real(save_area, lc + SAVE_AREA_BASE, sizeof(*save_area));
411ed322
MH
595}
596
8b646bd7 597int smp_store_status(int cpu)
08d07968 598{
8b646bd7 599 struct pcpu *pcpu;
08d07968 600
8b646bd7
MS
601 pcpu = pcpu_devices + cpu;
602 if (__pcpu_sigp_relax(pcpu->address, sigp_stop_and_store_status,
603 0, NULL) != sigp_order_code_accepted)
604 return -EIO;
08d07968
HC
605 return 0;
606}
607
8b646bd7 608#else /* CONFIG_ZFCPDUMP || CONFIG_CRASH_DUMP */
08d07968 609
8b646bd7 610static inline void smp_get_save_area(int cpu, u16 address) { }
08d07968 611
8b646bd7 612#endif /* CONFIG_ZFCPDUMP || CONFIG_CRASH_DUMP */
08d07968 613
8b646bd7 614static struct sclp_cpu_info *smp_get_cpu_info(void)
08d07968 615{
8b646bd7 616 static int use_sigp_detection;
08d07968 617 struct sclp_cpu_info *info;
8b646bd7
MS
618 int address;
619
620 info = kzalloc(sizeof(*info), GFP_KERNEL);
621 if (info && (use_sigp_detection || sclp_get_cpu_info(info))) {
622 use_sigp_detection = 1;
623 for (address = 0; address <= MAX_CPU_ADDRESS; address++) {
624 if (__pcpu_sigp_relax(address, sigp_sense, 0, NULL) ==
625 sigp_not_operational)
626 continue;
627 info->cpu[info->configured].address = address;
628 info->configured++;
629 }
630 info->combined = info->configured;
08d07968 631 }
8b646bd7 632 return info;
08d07968
HC
633}
634
8b646bd7
MS
635static int __devinit smp_add_present_cpu(int cpu);
636
637static int __devinit __smp_rescan_cpus(struct sclp_cpu_info *info,
638 int sysfs_add)
08d07968 639{
8b646bd7 640 struct pcpu *pcpu;
08d07968 641 cpumask_t avail;
8b646bd7 642 int cpu, nr, i;
08d07968 643
8b646bd7 644 nr = 0;
0f1959f5 645 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
8b646bd7
MS
646 cpu = cpumask_first(&avail);
647 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
648 if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type)
649 continue;
650 if (pcpu_find_address(cpu_present_mask, info->cpu[i].address))
651 continue;
652 pcpu = pcpu_devices + cpu;
653 pcpu->address = info->cpu[i].address;
654 pcpu->state = (cpu >= info->configured) ?
655 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
656 cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
657 set_cpu_present(cpu, true);
658 if (sysfs_add && smp_add_present_cpu(cpu) != 0)
659 set_cpu_present(cpu, false);
660 else
661 nr++;
662 cpu = cpumask_next(cpu, &avail);
663 }
664 return nr;
1da177e4
LT
665}
666
48483b32
HC
667static void __init smp_detect_cpus(void)
668{
669 unsigned int cpu, c_cpus, s_cpus;
670 struct sclp_cpu_info *info;
48483b32 671
8b646bd7 672 info = smp_get_cpu_info();
48483b32
HC
673 if (!info)
674 panic("smp_detect_cpus failed to allocate memory\n");
48483b32
HC
675 if (info->has_cpu_type) {
676 for (cpu = 0; cpu < info->combined; cpu++) {
8b646bd7
MS
677 if (info->cpu[cpu].address != boot_cpu_address)
678 continue;
679 /* The boot cpu dictates the cpu type. */
680 boot_cpu_type = info->cpu[cpu].type;
681 break;
48483b32
HC
682 }
683 }
8b646bd7 684 c_cpus = s_cpus = 0;
48483b32 685 for (cpu = 0; cpu < info->combined; cpu++) {
8b646bd7 686 if (info->has_cpu_type && info->cpu[cpu].type != boot_cpu_type)
48483b32 687 continue;
8b646bd7
MS
688 if (cpu < info->configured) {
689 smp_get_save_area(c_cpus, info->cpu[cpu].address);
690 c_cpus++;
691 } else
48483b32 692 s_cpus++;
48483b32 693 }
395d31d4 694 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 695 get_online_cpus();
8b646bd7 696 __smp_rescan_cpus(info, 0);
9d40d2e3 697 put_online_cpus();
8b646bd7 698 kfree(info);
48483b32
HC
699}
700
1da177e4 701/*
39ce010d 702 * Activate a secondary processor.
1da177e4 703 */
8b646bd7 704static void __cpuinit smp_start_secondary(void *cpuvoid)
1da177e4 705{
8b646bd7
MS
706 S390_lowcore.last_update_clock = get_clock();
707 S390_lowcore.restart_stack = (unsigned long) restart_stack;
708 S390_lowcore.restart_fn = (unsigned long) do_restart;
709 S390_lowcore.restart_data = 0;
710 S390_lowcore.restart_source = -1UL;
711 restore_access_regs(S390_lowcore.access_regs_save_area);
712 __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
713 __load_psw_mask(psw_kernel_bits | PSW_MASK_DAT);
39ce010d 714 cpu_init();
5bfb5d69 715 preempt_disable();
39ce010d 716 init_cpu_timer();
39ce010d 717 init_cpu_vtimer();
29b08d2b 718 pfault_init();
e545a614 719 notify_cpu_starting(smp_processor_id());
ca9fc75a 720 ipi_call_lock();
0f1959f5 721 set_cpu_online(smp_processor_id(), true);
ca9fc75a 722 ipi_call_unlock();
1da177e4 723 local_irq_enable();
39ce010d
HC
724 /* cpu_idle will call schedule for us */
725 cpu_idle();
1da177e4
LT
726}
727
1da177e4 728/* Upping and downing of CPUs */
8239c25f 729int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
1da177e4 730{
8b646bd7
MS
731 struct pcpu *pcpu;
732 int rc;
1da177e4 733
8b646bd7
MS
734 pcpu = pcpu_devices + cpu;
735 if (pcpu->state != CPU_STATE_CONFIGURED)
08d07968 736 return -EIO;
8b646bd7
MS
737 if (pcpu_sigp_retry(pcpu, sigp_initial_cpu_reset, 0) !=
738 sigp_order_code_accepted)
08d07968 739 return -EIO;
e80e7813 740
8b646bd7
MS
741 rc = pcpu_alloc_lowcore(pcpu, cpu);
742 if (rc)
743 return rc;
744 pcpu_prepare_secondary(pcpu, cpu);
e80e7813 745 pcpu_attach_task(pcpu, tidle);
8b646bd7 746 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
1da177e4
LT
747 while (!cpu_online(cpu))
748 cpu_relax();
749 return 0;
750}
751
48483b32 752static int __init setup_possible_cpus(char *s)
255acee7 753{
8b646bd7 754 int max, cpu;
255acee7 755
8b646bd7
MS
756 if (kstrtoint(s, 0, &max) < 0)
757 return 0;
88e01285 758 init_cpu_possible(cpumask_of(0));
8b646bd7 759 for (cpu = 1; cpu < max && cpu < nr_cpu_ids; cpu++)
def6cfb7 760 set_cpu_possible(cpu, true);
37a33026
HC
761 return 0;
762}
763early_param("possible_cpus", setup_possible_cpus);
764
48483b32
HC
765#ifdef CONFIG_HOTPLUG_CPU
766
39ce010d 767int __cpu_disable(void)
1da177e4 768{
8b646bd7 769 unsigned long cregs[16];
1da177e4 770
8b646bd7
MS
771 set_cpu_online(smp_processor_id(), false);
772 /* Disable pseudo page faults on this cpu. */
29b08d2b 773 pfault_fini();
8b646bd7
MS
774 /* Disable interrupt sources via control register. */
775 __ctl_store(cregs, 0, 15);
776 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
777 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
778 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
779 __ctl_load(cregs, 0, 15);
1da177e4
LT
780 return 0;
781}
782
39ce010d 783void __cpu_die(unsigned int cpu)
1da177e4 784{
8b646bd7
MS
785 struct pcpu *pcpu;
786
1da177e4 787 /* Wait until target cpu is down */
8b646bd7
MS
788 pcpu = pcpu_devices + cpu;
789 while (!pcpu_stopped(pcpu))
1da177e4 790 cpu_relax();
8b646bd7 791 pcpu_free_lowcore(pcpu);
050eef36 792 atomic_dec(&init_mm.context.attach_count);
1da177e4
LT
793}
794
b456d94a 795void __noreturn cpu_die(void)
1da177e4
LT
796{
797 idle_task_exit();
8b646bd7
MS
798 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), sigp_stop, 0);
799 for (;;) ;
1da177e4
LT
800}
801
255acee7
HC
802#endif /* CONFIG_HOTPLUG_CPU */
803
1da177e4
LT
804void __init smp_prepare_cpus(unsigned int max_cpus)
805{
39ce010d
HC
806 /* request the 0x1201 emergency signal external interrupt */
807 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
808 panic("Couldn't request external interrupt 0x1201");
d98e19cc
MS
809 /* request the 0x1202 external call external interrupt */
810 if (register_external_interrupt(0x1202, do_ext_call_interrupt) != 0)
811 panic("Couldn't request external interrupt 0x1202");
8b646bd7 812 smp_detect_cpus();
1da177e4
LT
813}
814
ea1f4eec 815void __init smp_prepare_boot_cpu(void)
1da177e4 816{
8b646bd7
MS
817 struct pcpu *pcpu = pcpu_devices;
818
819 boot_cpu_address = stap();
8b646bd7
MS
820 pcpu->state = CPU_STATE_CONFIGURED;
821 pcpu->address = boot_cpu_address;
822 pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
823 pcpu->async_stack = S390_lowcore.async_stack - ASYNC_SIZE;
824 pcpu->panic_stack = S390_lowcore.panic_stack - PAGE_SIZE;
1da177e4 825 S390_lowcore.percpu_offset = __per_cpu_offset[0];
83a24e32 826 cpu_set_polarization(0, POLARIZATION_UNKNOWN);
8b646bd7
MS
827 set_cpu_present(0, true);
828 set_cpu_online(0, true);
1da177e4
LT
829}
830
ea1f4eec 831void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 832{
1da177e4
LT
833}
834
02beaccc
HC
835void __init smp_setup_processor_id(void)
836{
837 S390_lowcore.cpu_nr = 0;
02beaccc
HC
838}
839
1da177e4
LT
840/*
841 * the frequency of the profiling timer can be changed
842 * by writing a multiplier value into /proc/profile.
843 *
844 * usually you want to run this on all CPUs ;)
845 */
846int setup_profiling_timer(unsigned int multiplier)
847{
39ce010d 848 return 0;
1da177e4
LT
849}
850
08d07968 851#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd 852static ssize_t cpu_configure_show(struct device *dev,
8b646bd7 853 struct device_attribute *attr, char *buf)
08d07968
HC
854{
855 ssize_t count;
856
857 mutex_lock(&smp_cpu_state_mutex);
8b646bd7 858 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
08d07968
HC
859 mutex_unlock(&smp_cpu_state_mutex);
860 return count;
861}
862
8a25a2fd 863static ssize_t cpu_configure_store(struct device *dev,
8b646bd7
MS
864 struct device_attribute *attr,
865 const char *buf, size_t count)
08d07968 866{
8b646bd7
MS
867 struct pcpu *pcpu;
868 int cpu, val, rc;
08d07968
HC
869 char delim;
870
871 if (sscanf(buf, "%d %c", &val, &delim) != 1)
872 return -EINVAL;
873 if (val != 0 && val != 1)
874 return -EINVAL;
9d40d2e3 875 get_online_cpus();
0b18d318 876 mutex_lock(&smp_cpu_state_mutex);
08d07968 877 rc = -EBUSY;
2c2df118 878 /* disallow configuration changes of online cpus and cpu 0 */
8b646bd7 879 cpu = dev->id;
2c2df118 880 if (cpu_online(cpu) || cpu == 0)
08d07968 881 goto out;
8b646bd7 882 pcpu = pcpu_devices + cpu;
08d07968
HC
883 rc = 0;
884 switch (val) {
885 case 0:
8b646bd7
MS
886 if (pcpu->state != CPU_STATE_CONFIGURED)
887 break;
888 rc = sclp_cpu_deconfigure(pcpu->address);
889 if (rc)
890 break;
891 pcpu->state = CPU_STATE_STANDBY;
892 cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
893 topology_expect_change();
08d07968
HC
894 break;
895 case 1:
8b646bd7
MS
896 if (pcpu->state != CPU_STATE_STANDBY)
897 break;
898 rc = sclp_cpu_configure(pcpu->address);
899 if (rc)
900 break;
901 pcpu->state = CPU_STATE_CONFIGURED;
902 cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
903 topology_expect_change();
08d07968
HC
904 break;
905 default:
906 break;
907 }
908out:
08d07968 909 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 910 put_online_cpus();
08d07968
HC
911 return rc ? rc : count;
912}
8a25a2fd 913static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
08d07968
HC
914#endif /* CONFIG_HOTPLUG_CPU */
915
8a25a2fd
KS
916static ssize_t show_cpu_address(struct device *dev,
917 struct device_attribute *attr, char *buf)
08d07968 918{
8b646bd7 919 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
08d07968 920}
8a25a2fd 921static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
08d07968 922
08d07968
HC
923static struct attribute *cpu_common_attrs[] = {
924#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd 925 &dev_attr_configure.attr,
08d07968 926#endif
8a25a2fd 927 &dev_attr_address.attr,
08d07968
HC
928 NULL,
929};
930
931static struct attribute_group cpu_common_attr_group = {
932 .attrs = cpu_common_attrs,
933};
1da177e4 934
8a25a2fd
KS
935static ssize_t show_idle_count(struct device *dev,
936 struct device_attribute *attr, char *buf)
fae8b22d 937{
4c1051e3 938 struct s390_idle_data *idle = &per_cpu(s390_idle, dev->id);
fae8b22d 939 unsigned long long idle_count;
e98bbaaf 940 unsigned int sequence;
fae8b22d 941
4c1051e3
MS
942 do {
943 sequence = ACCESS_ONCE(idle->sequence);
944 idle_count = ACCESS_ONCE(idle->idle_count);
945 if (ACCESS_ONCE(idle->idle_enter))
946 idle_count++;
947 } while ((sequence & 1) || (idle->sequence != sequence));
fae8b22d
HC
948 return sprintf(buf, "%llu\n", idle_count);
949}
8a25a2fd 950static DEVICE_ATTR(idle_count, 0444, show_idle_count, NULL);
fae8b22d 951
8a25a2fd
KS
952static ssize_t show_idle_time(struct device *dev,
953 struct device_attribute *attr, char *buf)
fae8b22d 954{
4c1051e3
MS
955 struct s390_idle_data *idle = &per_cpu(s390_idle, dev->id);
956 unsigned long long now, idle_time, idle_enter, idle_exit;
e98bbaaf 957 unsigned int sequence;
fae8b22d 958
4c1051e3
MS
959 do {
960 now = get_clock();
961 sequence = ACCESS_ONCE(idle->sequence);
962 idle_time = ACCESS_ONCE(idle->idle_time);
963 idle_enter = ACCESS_ONCE(idle->idle_enter);
964 idle_exit = ACCESS_ONCE(idle->idle_exit);
965 } while ((sequence & 1) || (idle->sequence != sequence));
966 idle_time += idle_enter ? ((idle_exit ? : now) - idle_enter) : 0;
6f430924 967 return sprintf(buf, "%llu\n", idle_time >> 12);
fae8b22d 968}
8a25a2fd 969static DEVICE_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 970
08d07968 971static struct attribute *cpu_online_attrs[] = {
8a25a2fd
KS
972 &dev_attr_idle_count.attr,
973 &dev_attr_idle_time_us.attr,
fae8b22d
HC
974 NULL,
975};
976
08d07968
HC
977static struct attribute_group cpu_online_attr_group = {
978 .attrs = cpu_online_attrs,
fae8b22d
HC
979};
980
2fc2d1e9
HC
981static int __cpuinit smp_cpu_notify(struct notifier_block *self,
982 unsigned long action, void *hcpu)
983{
984 unsigned int cpu = (unsigned int)(long)hcpu;
8b646bd7 985 struct cpu *c = &pcpu_devices[cpu].cpu;
8a25a2fd 986 struct device *s = &c->dev;
fae8b22d 987 struct s390_idle_data *idle;
d882ba69 988 int err = 0;
2fc2d1e9
HC
989
990 switch (action) {
991 case CPU_ONLINE:
8bb78442 992 case CPU_ONLINE_FROZEN:
fae8b22d 993 idle = &per_cpu(s390_idle, cpu);
e98bbaaf 994 memset(idle, 0, sizeof(struct s390_idle_data));
d882ba69 995 err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
996 break;
997 case CPU_DEAD:
8bb78442 998 case CPU_DEAD_FROZEN:
08d07968 999 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
1000 break;
1001 }
d882ba69 1002 return notifier_from_errno(err);
2fc2d1e9
HC
1003}
1004
1005static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 1006 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
1007};
1008
2bc89b5e 1009static int __devinit smp_add_present_cpu(int cpu)
08d07968 1010{
8b646bd7 1011 struct cpu *c = &pcpu_devices[cpu].cpu;
8a25a2fd 1012 struct device *s = &c->dev;
08d07968
HC
1013 int rc;
1014
1015 c->hotpluggable = 1;
1016 rc = register_cpu(c, cpu);
1017 if (rc)
1018 goto out;
1019 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1020 if (rc)
1021 goto out_cpu;
83a24e32
HC
1022 if (cpu_online(cpu)) {
1023 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1024 if (rc)
1025 goto out_online;
1026 }
1027 rc = topology_cpu_init(c);
1028 if (rc)
1029 goto out_topology;
1030 return 0;
1031
1032out_topology:
1033 if (cpu_online(cpu))
1034 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1035out_online:
08d07968
HC
1036 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1037out_cpu:
1038#ifdef CONFIG_HOTPLUG_CPU
1039 unregister_cpu(c);
1040#endif
1041out:
1042 return rc;
1043}
1044
1045#ifdef CONFIG_HOTPLUG_CPU
1e489518 1046
67060d9c 1047int __ref smp_rescan_cpus(void)
08d07968 1048{
8b646bd7
MS
1049 struct sclp_cpu_info *info;
1050 int nr;
08d07968 1051
8b646bd7
MS
1052 info = smp_get_cpu_info();
1053 if (!info)
1054 return -ENOMEM;
9d40d2e3 1055 get_online_cpus();
0b18d318 1056 mutex_lock(&smp_cpu_state_mutex);
8b646bd7 1057 nr = __smp_rescan_cpus(info, 1);
08d07968 1058 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1059 put_online_cpus();
8b646bd7
MS
1060 kfree(info);
1061 if (nr)
c10fde0d 1062 topology_schedule_update();
8b646bd7 1063 return 0;
1e489518
HC
1064}
1065
8a25a2fd
KS
1066static ssize_t __ref rescan_store(struct device *dev,
1067 struct device_attribute *attr,
c9be0a36 1068 const char *buf,
1e489518
HC
1069 size_t count)
1070{
1071 int rc;
1072
1073 rc = smp_rescan_cpus();
08d07968
HC
1074 return rc ? rc : count;
1075}
8a25a2fd 1076static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
1077#endif /* CONFIG_HOTPLUG_CPU */
1078
83a24e32 1079static int __init s390_smp_init(void)
1da177e4 1080{
83a24e32 1081 int cpu, rc;
2fc2d1e9
HC
1082
1083 register_cpu_notifier(&smp_cpu_nb);
08d07968 1084#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd 1085 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
08d07968
HC
1086 if (rc)
1087 return rc;
1088#endif
1089 for_each_present_cpu(cpu) {
1090 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1091 if (rc)
1092 return rc;
1da177e4
LT
1093 }
1094 return 0;
1095}
83a24e32 1096subsys_initcall(s390_smp_init);