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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/smp.c | |
3 | * | |
155af2f9 | 4 | * Copyright IBM Corp. 1999, 2009 |
1da177e4 | 5 | * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), |
39ce010d HC |
6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
7 | * Heiko Carstens (heiko.carstens@de.ibm.com) | |
1da177e4 | 8 | * |
39ce010d | 9 | * based on other smp stuff by |
1da177e4 LT |
10 | * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> |
11 | * (c) 1998 Ingo Molnar | |
12 | * | |
13 | * We work with logical cpu numbering everywhere we can. The only | |
14 | * functions using the real cpu address (got from STAP) are the sigp | |
15 | * functions. For all other functions we use the identity mapping. | |
16 | * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is | |
17 | * used e.g. to find the idle task belonging to a logical cpu. Every array | |
18 | * in the kernel is sorted by the logical cpu number and not by the physical | |
19 | * one which is causing all the confusion with __cpu_logical_map and | |
20 | * cpu_number_map in other architectures. | |
21 | */ | |
22 | ||
395d31d4 MS |
23 | #define KMSG_COMPONENT "cpu" |
24 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
25 | ||
1da177e4 LT |
26 | #include <linux/module.h> |
27 | #include <linux/init.h> | |
1da177e4 | 28 | #include <linux/mm.h> |
4e950f6f | 29 | #include <linux/err.h> |
1da177e4 LT |
30 | #include <linux/spinlock.h> |
31 | #include <linux/kernel_stat.h> | |
1da177e4 LT |
32 | #include <linux/delay.h> |
33 | #include <linux/cache.h> | |
34 | #include <linux/interrupt.h> | |
3324e60a | 35 | #include <linux/irqflags.h> |
1da177e4 | 36 | #include <linux/cpu.h> |
2b67fc46 | 37 | #include <linux/timex.h> |
411ed322 | 38 | #include <linux/bootmem.h> |
5a0e3ad6 | 39 | #include <linux/slab.h> |
cbb870c8 | 40 | #include <asm/asm-offsets.h> |
46b05d26 | 41 | #include <asm/ipl.h> |
2b67fc46 | 42 | #include <asm/setup.h> |
1da177e4 LT |
43 | #include <asm/sigp.h> |
44 | #include <asm/pgalloc.h> | |
45 | #include <asm/irq.h> | |
46 | #include <asm/s390_ext.h> | |
47 | #include <asm/cpcmd.h> | |
48 | #include <asm/tlbflush.h> | |
2b67fc46 | 49 | #include <asm/timer.h> |
411ed322 | 50 | #include <asm/lowcore.h> |
08d07968 | 51 | #include <asm/sclp.h> |
76d4e00a | 52 | #include <asm/cputime.h> |
c742b31c | 53 | #include <asm/vdso.h> |
4bb5e07b | 54 | #include <asm/cpu.h> |
a806170e | 55 | #include "entry.h" |
1da177e4 | 56 | |
fb380aad | 57 | /* logical cpu to cpu address */ |
a93b8ec1 | 58 | unsigned short __cpu_logical_map[NR_CPUS]; |
fb380aad | 59 | |
1da177e4 LT |
60 | static struct task_struct *current_set[NR_CPUS]; |
61 | ||
08d07968 HC |
62 | static u8 smp_cpu_type; |
63 | static int smp_use_sigp_detection; | |
64 | ||
65 | enum s390_cpu_state { | |
66 | CPU_STATE_STANDBY, | |
67 | CPU_STATE_CONFIGURED, | |
68 | }; | |
69 | ||
dbd70fb4 | 70 | DEFINE_MUTEX(smp_cpu_state_mutex); |
c10fde0d | 71 | int smp_cpu_polarization[NR_CPUS]; |
08d07968 | 72 | static int smp_cpu_state[NR_CPUS]; |
c10fde0d | 73 | static int cpu_management; |
08d07968 HC |
74 | |
75 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | |
08d07968 | 76 | |
a93b8ec1 | 77 | static void smp_ext_bitcall(int, int); |
1da177e4 | 78 | |
a93b8ec1 | 79 | static int raw_cpu_stopped(int cpu) |
5c0b912e | 80 | { |
a93b8ec1 | 81 | u32 status; |
5c0b912e | 82 | |
a93b8ec1 | 83 | switch (raw_sigp_ps(&status, 0, cpu, sigp_sense)) { |
5c0b912e HC |
84 | case sigp_status_stored: |
85 | /* Check for stopped and check stop state */ | |
86 | if (status & 0x50) | |
87 | return 1; | |
88 | break; | |
89 | default: | |
90 | break; | |
91 | } | |
92 | return 0; | |
93 | } | |
94 | ||
a93b8ec1 HC |
95 | static inline int cpu_stopped(int cpu) |
96 | { | |
97 | return raw_cpu_stopped(cpu_logical_map(cpu)); | |
98 | } | |
99 | ||
2c2df118 HC |
100 | void smp_switch_to_ipl_cpu(void (*func)(void *), void *data) |
101 | { | |
102 | struct _lowcore *lc, *current_lc; | |
103 | struct stack_frame *sf; | |
104 | struct pt_regs *regs; | |
105 | unsigned long sp; | |
106 | ||
107 | if (smp_processor_id() == 0) | |
108 | func(data); | |
109 | __load_psw_mask(PSW_BASE_BITS | PSW_DEFAULT_KEY); | |
110 | /* Disable lowcore protection */ | |
111 | __ctl_clear_bit(0, 28); | |
112 | current_lc = lowcore_ptr[smp_processor_id()]; | |
113 | lc = lowcore_ptr[0]; | |
114 | if (!lc) | |
115 | lc = current_lc; | |
116 | lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY; | |
117 | lc->restart_psw.addr = PSW_ADDR_AMODE | (unsigned long) smp_restart_cpu; | |
118 | if (!cpu_online(0)) | |
119 | smp_switch_to_cpu(func, data, 0, stap(), __cpu_logical_map[0]); | |
a93b8ec1 | 120 | while (sigp(0, sigp_stop_and_store_status) == sigp_busy) |
2c2df118 HC |
121 | cpu_relax(); |
122 | sp = lc->panic_stack; | |
123 | sp -= sizeof(struct pt_regs); | |
124 | regs = (struct pt_regs *) sp; | |
125 | memcpy(®s->gprs, ¤t_lc->gpregs_save_area, sizeof(regs->gprs)); | |
cbb870c8 | 126 | regs->psw = lc->psw_save_area; |
2c2df118 HC |
127 | sp -= STACK_FRAME_OVERHEAD; |
128 | sf = (struct stack_frame *) sp; | |
129 | sf->back_chain = regs->gprs[15]; | |
130 | smp_switch_to_cpu(func, data, sp, stap(), __cpu_logical_map[0]); | |
131 | } | |
132 | ||
677d7623 | 133 | void smp_send_stop(void) |
1da177e4 | 134 | { |
39ce010d | 135 | int cpu, rc; |
1da177e4 | 136 | |
677d7623 HC |
137 | /* Disable all interrupts/machine checks */ |
138 | __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); | |
3324e60a | 139 | trace_hardirqs_off(); |
1da177e4 | 140 | |
677d7623 | 141 | /* stop all processors */ |
1da177e4 LT |
142 | for_each_online_cpu(cpu) { |
143 | if (cpu == smp_processor_id()) | |
144 | continue; | |
145 | do { | |
a93b8ec1 | 146 | rc = sigp(cpu, sigp_stop); |
39ce010d | 147 | } while (rc == sigp_busy); |
1da177e4 | 148 | |
5c0b912e | 149 | while (!cpu_stopped(cpu)) |
c6b5b847 HC |
150 | cpu_relax(); |
151 | } | |
152 | } | |
153 | ||
1da177e4 LT |
154 | /* |
155 | * This is the main routine where commands issued by other | |
156 | * cpus are handled. | |
157 | */ | |
158 | ||
2b67fc46 | 159 | static void do_ext_call_interrupt(__u16 code) |
1da177e4 | 160 | { |
39ce010d | 161 | unsigned long bits; |
1da177e4 | 162 | |
39ce010d HC |
163 | /* |
164 | * handle bit signal external calls | |
165 | * | |
166 | * For the ec_schedule signal we have to do nothing. All the work | |
167 | * is done automatically when we return from the interrupt. | |
168 | */ | |
1da177e4 LT |
169 | bits = xchg(&S390_lowcore.ext_call_fast, 0); |
170 | ||
39ce010d | 171 | if (test_bit(ec_call_function, &bits)) |
ca9fc75a HC |
172 | generic_smp_call_function_interrupt(); |
173 | ||
174 | if (test_bit(ec_call_function_single, &bits)) | |
175 | generic_smp_call_function_single_interrupt(); | |
1da177e4 LT |
176 | } |
177 | ||
178 | /* | |
179 | * Send an external call sigp to another cpu and return without waiting | |
180 | * for its completion. | |
181 | */ | |
a93b8ec1 | 182 | static void smp_ext_bitcall(int cpu, int sig) |
1da177e4 | 183 | { |
39ce010d HC |
184 | /* |
185 | * Set signaling bit in lowcore of target cpu and kick it | |
186 | */ | |
1da177e4 | 187 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); |
a93b8ec1 | 188 | while (sigp(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
189 | udelay(10); |
190 | } | |
191 | ||
630cd046 | 192 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
ca9fc75a HC |
193 | { |
194 | int cpu; | |
195 | ||
630cd046 | 196 | for_each_cpu(cpu, mask) |
ca9fc75a HC |
197 | smp_ext_bitcall(cpu, ec_call_function); |
198 | } | |
199 | ||
200 | void arch_send_call_function_single_ipi(int cpu) | |
201 | { | |
202 | smp_ext_bitcall(cpu, ec_call_function_single); | |
203 | } | |
204 | ||
347a8dc3 | 205 | #ifndef CONFIG_64BIT |
1da177e4 LT |
206 | /* |
207 | * this function sends a 'purge tlb' signal to another CPU. | |
208 | */ | |
a806170e | 209 | static void smp_ptlb_callback(void *info) |
1da177e4 | 210 | { |
ba8a9229 | 211 | __tlb_flush_local(); |
1da177e4 LT |
212 | } |
213 | ||
214 | void smp_ptlb_all(void) | |
215 | { | |
15c8b6c1 | 216 | on_each_cpu(smp_ptlb_callback, NULL, 1); |
1da177e4 LT |
217 | } |
218 | EXPORT_SYMBOL(smp_ptlb_all); | |
347a8dc3 | 219 | #endif /* ! CONFIG_64BIT */ |
1da177e4 LT |
220 | |
221 | /* | |
222 | * this function sends a 'reschedule' IPI to another CPU. | |
223 | * it goes straight through and wastes no time serializing | |
224 | * anything. Worst case is that we lose a reschedule ... | |
225 | */ | |
226 | void smp_send_reschedule(int cpu) | |
227 | { | |
39ce010d | 228 | smp_ext_bitcall(cpu, ec_schedule); |
1da177e4 LT |
229 | } |
230 | ||
231 | /* | |
232 | * parameter area for the set/clear control bit callbacks | |
233 | */ | |
94c12cc7 | 234 | struct ec_creg_mask_parms { |
1da177e4 LT |
235 | unsigned long orvals[16]; |
236 | unsigned long andvals[16]; | |
94c12cc7 | 237 | }; |
1da177e4 LT |
238 | |
239 | /* | |
240 | * callback for setting/clearing control bits | |
241 | */ | |
39ce010d HC |
242 | static void smp_ctl_bit_callback(void *info) |
243 | { | |
94c12cc7 | 244 | struct ec_creg_mask_parms *pp = info; |
1da177e4 LT |
245 | unsigned long cregs[16]; |
246 | int i; | |
39ce010d | 247 | |
94c12cc7 MS |
248 | __ctl_store(cregs, 0, 15); |
249 | for (i = 0; i <= 15; i++) | |
1da177e4 | 250 | cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i]; |
94c12cc7 | 251 | __ctl_load(cregs, 0, 15); |
1da177e4 LT |
252 | } |
253 | ||
254 | /* | |
255 | * Set a bit in a control register of all cpus | |
256 | */ | |
94c12cc7 MS |
257 | void smp_ctl_set_bit(int cr, int bit) |
258 | { | |
259 | struct ec_creg_mask_parms parms; | |
1da177e4 | 260 | |
94c12cc7 MS |
261 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
262 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 263 | parms.orvals[cr] = 1 << bit; |
15c8b6c1 | 264 | on_each_cpu(smp_ctl_bit_callback, &parms, 1); |
1da177e4 | 265 | } |
39ce010d | 266 | EXPORT_SYMBOL(smp_ctl_set_bit); |
1da177e4 LT |
267 | |
268 | /* | |
269 | * Clear a bit in a control register of all cpus | |
270 | */ | |
94c12cc7 MS |
271 | void smp_ctl_clear_bit(int cr, int bit) |
272 | { | |
273 | struct ec_creg_mask_parms parms; | |
1da177e4 | 274 | |
94c12cc7 MS |
275 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
276 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 277 | parms.andvals[cr] = ~(1L << bit); |
15c8b6c1 | 278 | on_each_cpu(smp_ctl_bit_callback, &parms, 1); |
1da177e4 | 279 | } |
39ce010d | 280 | EXPORT_SYMBOL(smp_ctl_clear_bit); |
1da177e4 | 281 | |
59f2e69d | 282 | #ifdef CONFIG_ZFCPDUMP |
411ed322 | 283 | |
285f6722 | 284 | static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) |
411ed322 | 285 | { |
411ed322 MH |
286 | if (ipl_info.type != IPL_TYPE_FCP_DUMP) |
287 | return; | |
285f6722 | 288 | if (cpu >= NR_CPUS) { |
395d31d4 MS |
289 | pr_warning("CPU %i exceeds the maximum %i and is excluded from " |
290 | "the dump\n", cpu, NR_CPUS - 1); | |
285f6722 | 291 | return; |
411ed322 | 292 | } |
f64ca217 | 293 | zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL); |
a93b8ec1 | 294 | while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy) |
285f6722 | 295 | cpu_relax(); |
92fe3132 MH |
296 | memcpy_real(zfcpdump_save_areas[cpu], |
297 | (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE, | |
298 | sizeof(struct save_area)); | |
411ed322 MH |
299 | } |
300 | ||
f64ca217 | 301 | struct save_area *zfcpdump_save_areas[NR_CPUS + 1]; |
411ed322 MH |
302 | EXPORT_SYMBOL_GPL(zfcpdump_save_areas); |
303 | ||
304 | #else | |
285f6722 HC |
305 | |
306 | static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { } | |
307 | ||
59f2e69d | 308 | #endif /* CONFIG_ZFCPDUMP */ |
411ed322 | 309 | |
08d07968 HC |
310 | static int cpu_known(int cpu_id) |
311 | { | |
312 | int cpu; | |
313 | ||
314 | for_each_present_cpu(cpu) { | |
315 | if (__cpu_logical_map[cpu] == cpu_id) | |
316 | return 1; | |
317 | } | |
318 | return 0; | |
319 | } | |
320 | ||
321 | static int smp_rescan_cpus_sigp(cpumask_t avail) | |
322 | { | |
323 | int cpu_id, logical_cpu; | |
324 | ||
93632d1b RR |
325 | logical_cpu = cpumask_first(&avail); |
326 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 | 327 | return 0; |
4bb5e07b | 328 | for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) { |
08d07968 HC |
329 | if (cpu_known(cpu_id)) |
330 | continue; | |
331 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 332 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
08d07968 HC |
333 | if (!cpu_stopped(logical_cpu)) |
334 | continue; | |
335 | cpu_set(logical_cpu, cpu_present_map); | |
336 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; | |
93632d1b RR |
337 | logical_cpu = cpumask_next(logical_cpu, &avail); |
338 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 HC |
339 | break; |
340 | } | |
341 | return 0; | |
342 | } | |
343 | ||
48483b32 | 344 | static int smp_rescan_cpus_sclp(cpumask_t avail) |
08d07968 HC |
345 | { |
346 | struct sclp_cpu_info *info; | |
347 | int cpu_id, logical_cpu, cpu; | |
348 | int rc; | |
349 | ||
93632d1b RR |
350 | logical_cpu = cpumask_first(&avail); |
351 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 | 352 | return 0; |
48483b32 | 353 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
08d07968 HC |
354 | if (!info) |
355 | return -ENOMEM; | |
356 | rc = sclp_get_cpu_info(info); | |
357 | if (rc) | |
358 | goto out; | |
359 | for (cpu = 0; cpu < info->combined; cpu++) { | |
360 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
361 | continue; | |
362 | cpu_id = info->cpu[cpu].address; | |
363 | if (cpu_known(cpu_id)) | |
364 | continue; | |
365 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 366 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
08d07968 HC |
367 | cpu_set(logical_cpu, cpu_present_map); |
368 | if (cpu >= info->configured) | |
369 | smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY; | |
370 | else | |
371 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; | |
93632d1b RR |
372 | logical_cpu = cpumask_next(logical_cpu, &avail); |
373 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 HC |
374 | break; |
375 | } | |
376 | out: | |
48483b32 | 377 | kfree(info); |
08d07968 HC |
378 | return rc; |
379 | } | |
380 | ||
1e489518 | 381 | static int __smp_rescan_cpus(void) |
08d07968 HC |
382 | { |
383 | cpumask_t avail; | |
384 | ||
48483b32 | 385 | cpus_xor(avail, cpu_possible_map, cpu_present_map); |
08d07968 HC |
386 | if (smp_use_sigp_detection) |
387 | return smp_rescan_cpus_sigp(avail); | |
388 | else | |
389 | return smp_rescan_cpus_sclp(avail); | |
1da177e4 LT |
390 | } |
391 | ||
48483b32 HC |
392 | static void __init smp_detect_cpus(void) |
393 | { | |
394 | unsigned int cpu, c_cpus, s_cpus; | |
395 | struct sclp_cpu_info *info; | |
396 | u16 boot_cpu_addr, cpu_addr; | |
397 | ||
398 | c_cpus = 1; | |
399 | s_cpus = 0; | |
7b468488 | 400 | boot_cpu_addr = __cpu_logical_map[0]; |
48483b32 HC |
401 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
402 | if (!info) | |
403 | panic("smp_detect_cpus failed to allocate memory\n"); | |
404 | /* Use sigp detection algorithm if sclp doesn't work. */ | |
405 | if (sclp_get_cpu_info(info)) { | |
406 | smp_use_sigp_detection = 1; | |
4bb5e07b | 407 | for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) { |
48483b32 HC |
408 | if (cpu == boot_cpu_addr) |
409 | continue; | |
a93b8ec1 | 410 | if (!raw_cpu_stopped(cpu)) |
48483b32 HC |
411 | continue; |
412 | smp_get_save_area(c_cpus, cpu); | |
413 | c_cpus++; | |
414 | } | |
415 | goto out; | |
416 | } | |
417 | ||
418 | if (info->has_cpu_type) { | |
419 | for (cpu = 0; cpu < info->combined; cpu++) { | |
420 | if (info->cpu[cpu].address == boot_cpu_addr) { | |
421 | smp_cpu_type = info->cpu[cpu].type; | |
422 | break; | |
423 | } | |
424 | } | |
425 | } | |
426 | ||
427 | for (cpu = 0; cpu < info->combined; cpu++) { | |
428 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
429 | continue; | |
430 | cpu_addr = info->cpu[cpu].address; | |
431 | if (cpu_addr == boot_cpu_addr) | |
432 | continue; | |
a93b8ec1 | 433 | if (!raw_cpu_stopped(cpu_addr)) { |
48483b32 HC |
434 | s_cpus++; |
435 | continue; | |
436 | } | |
437 | smp_get_save_area(c_cpus, cpu_addr); | |
438 | c_cpus++; | |
439 | } | |
440 | out: | |
441 | kfree(info); | |
395d31d4 | 442 | pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); |
9d40d2e3 | 443 | get_online_cpus(); |
1e489518 | 444 | __smp_rescan_cpus(); |
9d40d2e3 | 445 | put_online_cpus(); |
48483b32 HC |
446 | } |
447 | ||
1da177e4 | 448 | /* |
39ce010d | 449 | * Activate a secondary processor. |
1da177e4 | 450 | */ |
ea1f4eec | 451 | int __cpuinit start_secondary(void *cpuvoid) |
1da177e4 | 452 | { |
39ce010d HC |
453 | /* Setup the cpu */ |
454 | cpu_init(); | |
5bfb5d69 | 455 | preempt_disable(); |
d54853ef | 456 | /* Enable TOD clock interrupts on the secondary cpu. */ |
39ce010d | 457 | init_cpu_timer(); |
d54853ef | 458 | /* Enable cpu timer interrupts on the secondary cpu. */ |
39ce010d | 459 | init_cpu_vtimer(); |
1da177e4 | 460 | /* Enable pfault pseudo page faults on this cpu. */ |
29b08d2b HC |
461 | pfault_init(); |
462 | ||
e545a614 MS |
463 | /* call cpu notifiers */ |
464 | notify_cpu_starting(smp_processor_id()); | |
1da177e4 | 465 | /* Mark this cpu as online */ |
ca9fc75a | 466 | ipi_call_lock(); |
1da177e4 | 467 | cpu_set(smp_processor_id(), cpu_online_map); |
ca9fc75a | 468 | ipi_call_unlock(); |
1da177e4 LT |
469 | /* Switch on interrupts */ |
470 | local_irq_enable(); | |
39ce010d | 471 | /* Print info about this processor */ |
7b468488 | 472 | print_cpu_info(); |
39ce010d HC |
473 | /* cpu_idle will call schedule for us */ |
474 | cpu_idle(); | |
475 | return 0; | |
1da177e4 LT |
476 | } |
477 | ||
478 | static void __init smp_create_idle(unsigned int cpu) | |
479 | { | |
480 | struct task_struct *p; | |
481 | ||
482 | /* | |
483 | * don't care about the psw and regs settings since we'll never | |
484 | * reschedule the forked task. | |
485 | */ | |
486 | p = fork_idle(cpu); | |
487 | if (IS_ERR(p)) | |
488 | panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p)); | |
489 | current_set[cpu] = p; | |
490 | } | |
491 | ||
1cb6bb4b HC |
492 | static int __cpuinit smp_alloc_lowcore(int cpu) |
493 | { | |
494 | unsigned long async_stack, panic_stack; | |
495 | struct _lowcore *lowcore; | |
1cb6bb4b | 496 | |
3fd26a77 | 497 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); |
1cb6bb4b HC |
498 | if (!lowcore) |
499 | return -ENOMEM; | |
500 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
1cb6bb4b | 501 | panic_stack = __get_free_page(GFP_KERNEL); |
591bb4f6 HC |
502 | if (!panic_stack || !async_stack) |
503 | goto out; | |
98c7b388 HC |
504 | memcpy(lowcore, &S390_lowcore, 512); |
505 | memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512); | |
1cb6bb4b HC |
506 | lowcore->async_stack = async_stack + ASYNC_SIZE; |
507 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
508 | ||
509 | #ifndef CONFIG_64BIT | |
510 | if (MACHINE_HAS_IEEE) { | |
511 | unsigned long save_area; | |
512 | ||
513 | save_area = get_zeroed_page(GFP_KERNEL); | |
514 | if (!save_area) | |
33b1d09e | 515 | goto out; |
1cb6bb4b HC |
516 | lowcore->extended_save_area_addr = (u32) save_area; |
517 | } | |
c742b31c MS |
518 | #else |
519 | if (vdso_alloc_per_cpu(cpu, lowcore)) | |
520 | goto out; | |
1cb6bb4b HC |
521 | #endif |
522 | lowcore_ptr[cpu] = lowcore; | |
523 | return 0; | |
524 | ||
591bb4f6 | 525 | out: |
33b1d09e | 526 | free_page(panic_stack); |
1cb6bb4b | 527 | free_pages(async_stack, ASYNC_ORDER); |
3fd26a77 | 528 | free_pages((unsigned long) lowcore, LC_ORDER); |
1cb6bb4b HC |
529 | return -ENOMEM; |
530 | } | |
531 | ||
1cb6bb4b HC |
532 | static void smp_free_lowcore(int cpu) |
533 | { | |
534 | struct _lowcore *lowcore; | |
1cb6bb4b | 535 | |
1cb6bb4b HC |
536 | lowcore = lowcore_ptr[cpu]; |
537 | #ifndef CONFIG_64BIT | |
538 | if (MACHINE_HAS_IEEE) | |
539 | free_page((unsigned long) lowcore->extended_save_area_addr); | |
c742b31c MS |
540 | #else |
541 | vdso_free_per_cpu(cpu, lowcore); | |
1cb6bb4b HC |
542 | #endif |
543 | free_page(lowcore->panic_stack - PAGE_SIZE); | |
544 | free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER); | |
3fd26a77 | 545 | free_pages((unsigned long) lowcore, LC_ORDER); |
1cb6bb4b HC |
546 | lowcore_ptr[cpu] = NULL; |
547 | } | |
1cb6bb4b | 548 | |
1da177e4 | 549 | /* Upping and downing of CPUs */ |
1cb6bb4b | 550 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 | 551 | { |
39ce010d | 552 | struct _lowcore *cpu_lowcore; |
a93b8ec1 | 553 | struct task_struct *idle; |
1da177e4 | 554 | struct stack_frame *sf; |
d0d3cdf4 | 555 | u32 lowcore; |
a93b8ec1 | 556 | int ccode; |
1da177e4 | 557 | |
08d07968 HC |
558 | if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED) |
559 | return -EIO; | |
1cb6bb4b HC |
560 | if (smp_alloc_lowcore(cpu)) |
561 | return -ENOMEM; | |
d0d3cdf4 | 562 | do { |
a93b8ec1 | 563 | ccode = sigp(cpu, sigp_initial_cpu_reset); |
d0d3cdf4 HC |
564 | if (ccode == sigp_busy) |
565 | udelay(10); | |
566 | if (ccode == sigp_not_operational) | |
567 | goto err_out; | |
568 | } while (ccode == sigp_busy); | |
569 | ||
570 | lowcore = (u32)(unsigned long)lowcore_ptr[cpu]; | |
a93b8ec1 | 571 | while (sigp_p(lowcore, cpu, sigp_set_prefix) == sigp_busy) |
d0d3cdf4 | 572 | udelay(10); |
1da177e4 LT |
573 | |
574 | idle = current_set[cpu]; | |
39ce010d | 575 | cpu_lowcore = lowcore_ptr[cpu]; |
1da177e4 | 576 | cpu_lowcore->kernel_stack = (unsigned long) |
39ce010d | 577 | task_stack_page(idle) + THREAD_SIZE; |
1cb6bb4b | 578 | cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle); |
1da177e4 LT |
579 | sf = (struct stack_frame *) (cpu_lowcore->kernel_stack |
580 | - sizeof(struct pt_regs) | |
581 | - sizeof(struct stack_frame)); | |
582 | memset(sf, 0, sizeof(struct stack_frame)); | |
583 | sf->gprs[9] = (unsigned long) sf; | |
584 | cpu_lowcore->save_area[15] = (unsigned long) sf; | |
24d3e210 | 585 | __ctl_store(cpu_lowcore->cregs_save_area, 0, 15); |
94c12cc7 MS |
586 | asm volatile( |
587 | " stam 0,15,0(%0)" | |
588 | : : "a" (&cpu_lowcore->access_regs_save_area) : "memory"); | |
1da177e4 | 589 | cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; |
39ce010d | 590 | cpu_lowcore->current_task = (unsigned long) idle; |
7b468488 | 591 | cpu_lowcore->cpu_nr = cpu; |
591bb4f6 | 592 | cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce; |
25097bf1 | 593 | cpu_lowcore->machine_flags = S390_lowcore.machine_flags; |
dfd9f7ab | 594 | cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func; |
1da177e4 | 595 | eieio(); |
699ff13f | 596 | |
a93b8ec1 | 597 | while (sigp(cpu, sigp_restart) == sigp_busy) |
699ff13f | 598 | udelay(10); |
1da177e4 LT |
599 | |
600 | while (!cpu_online(cpu)) | |
601 | cpu_relax(); | |
602 | return 0; | |
d0d3cdf4 HC |
603 | |
604 | err_out: | |
605 | smp_free_lowcore(cpu); | |
606 | return -EIO; | |
1da177e4 LT |
607 | } |
608 | ||
48483b32 | 609 | static int __init setup_possible_cpus(char *s) |
255acee7 | 610 | { |
48483b32 | 611 | int pcpus, cpu; |
255acee7 | 612 | |
48483b32 | 613 | pcpus = simple_strtoul(s, NULL, 0); |
88e01285 HC |
614 | init_cpu_possible(cpumask_of(0)); |
615 | for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++) | |
def6cfb7 | 616 | set_cpu_possible(cpu, true); |
37a33026 HC |
617 | return 0; |
618 | } | |
619 | early_param("possible_cpus", setup_possible_cpus); | |
620 | ||
48483b32 HC |
621 | #ifdef CONFIG_HOTPLUG_CPU |
622 | ||
39ce010d | 623 | int __cpu_disable(void) |
1da177e4 | 624 | { |
94c12cc7 | 625 | struct ec_creg_mask_parms cr_parms; |
f3705136 | 626 | int cpu = smp_processor_id(); |
1da177e4 | 627 | |
f3705136 | 628 | cpu_clear(cpu, cpu_online_map); |
1da177e4 | 629 | |
1da177e4 | 630 | /* Disable pfault pseudo page faults on this cpu. */ |
29b08d2b | 631 | pfault_fini(); |
1da177e4 | 632 | |
94c12cc7 MS |
633 | memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals)); |
634 | memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals)); | |
1da177e4 | 635 | |
94c12cc7 | 636 | /* disable all external interrupts */ |
1da177e4 | 637 | cr_parms.orvals[0] = 0; |
39ce010d HC |
638 | cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 | |
639 | 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4); | |
1da177e4 | 640 | /* disable all I/O interrupts */ |
1da177e4 | 641 | cr_parms.orvals[6] = 0; |
39ce010d HC |
642 | cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 | |
643 | 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24); | |
1da177e4 | 644 | /* disable most machine checks */ |
1da177e4 | 645 | cr_parms.orvals[14] = 0; |
39ce010d HC |
646 | cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 | |
647 | 1 << 25 | 1 << 24); | |
94c12cc7 | 648 | |
1da177e4 LT |
649 | smp_ctl_bit_callback(&cr_parms); |
650 | ||
1da177e4 LT |
651 | return 0; |
652 | } | |
653 | ||
39ce010d | 654 | void __cpu_die(unsigned int cpu) |
1da177e4 LT |
655 | { |
656 | /* Wait until target cpu is down */ | |
5c0b912e | 657 | while (!cpu_stopped(cpu)) |
1da177e4 | 658 | cpu_relax(); |
a93b8ec1 | 659 | while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy) |
4f8048ee | 660 | udelay(10); |
1cb6bb4b | 661 | smp_free_lowcore(cpu); |
395d31d4 | 662 | pr_info("Processor %d stopped\n", cpu); |
1da177e4 LT |
663 | } |
664 | ||
39ce010d | 665 | void cpu_die(void) |
1da177e4 LT |
666 | { |
667 | idle_task_exit(); | |
a93b8ec1 | 668 | while (sigp(smp_processor_id(), sigp_stop) == sigp_busy) |
f8501ba7 | 669 | cpu_relax(); |
39ce010d | 670 | for (;;); |
1da177e4 LT |
671 | } |
672 | ||
255acee7 HC |
673 | #endif /* CONFIG_HOTPLUG_CPU */ |
674 | ||
1da177e4 LT |
675 | void __init smp_prepare_cpus(unsigned int max_cpus) |
676 | { | |
591bb4f6 HC |
677 | #ifndef CONFIG_64BIT |
678 | unsigned long save_area = 0; | |
679 | #endif | |
680 | unsigned long async_stack, panic_stack; | |
681 | struct _lowcore *lowcore; | |
1da177e4 | 682 | unsigned int cpu; |
39ce010d | 683 | |
48483b32 HC |
684 | smp_detect_cpus(); |
685 | ||
39ce010d HC |
686 | /* request the 0x1201 emergency signal external interrupt */ |
687 | if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) | |
688 | panic("Couldn't request external interrupt 0x1201"); | |
7b468488 | 689 | print_cpu_info(); |
1da177e4 | 690 | |
591bb4f6 | 691 | /* Reallocate current lowcore, but keep its contents. */ |
3fd26a77 | 692 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); |
591bb4f6 HC |
693 | panic_stack = __get_free_page(GFP_KERNEL); |
694 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
c742b31c | 695 | BUG_ON(!lowcore || !panic_stack || !async_stack); |
347a8dc3 | 696 | #ifndef CONFIG_64BIT |
77fa2245 | 697 | if (MACHINE_HAS_IEEE) |
591bb4f6 | 698 | save_area = get_zeroed_page(GFP_KERNEL); |
77fa2245 | 699 | #endif |
591bb4f6 HC |
700 | local_irq_disable(); |
701 | local_mcck_disable(); | |
702 | lowcore_ptr[smp_processor_id()] = lowcore; | |
703 | *lowcore = S390_lowcore; | |
704 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
705 | lowcore->async_stack = async_stack + ASYNC_SIZE; | |
706 | #ifndef CONFIG_64BIT | |
707 | if (MACHINE_HAS_IEEE) | |
708 | lowcore->extended_save_area_addr = (u32) save_area; | |
709 | #endif | |
710 | set_prefix((u32)(unsigned long) lowcore); | |
711 | local_mcck_enable(); | |
712 | local_irq_enable(); | |
3a6ba460 HC |
713 | #ifdef CONFIG_64BIT |
714 | if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore)) | |
715 | BUG(); | |
716 | #endif | |
97db7fbf | 717 | for_each_possible_cpu(cpu) |
1da177e4 LT |
718 | if (cpu != smp_processor_id()) |
719 | smp_create_idle(cpu); | |
720 | } | |
721 | ||
ea1f4eec | 722 | void __init smp_prepare_boot_cpu(void) |
1da177e4 LT |
723 | { |
724 | BUG_ON(smp_processor_id() != 0); | |
725 | ||
48483b32 HC |
726 | current_thread_info()->cpu = 0; |
727 | cpu_set(0, cpu_present_map); | |
1da177e4 | 728 | cpu_set(0, cpu_online_map); |
1da177e4 LT |
729 | S390_lowcore.percpu_offset = __per_cpu_offset[0]; |
730 | current_set[0] = current; | |
08d07968 | 731 | smp_cpu_state[0] = CPU_STATE_CONFIGURED; |
c10fde0d | 732 | smp_cpu_polarization[0] = POLARIZATION_UNKNWN; |
1da177e4 LT |
733 | } |
734 | ||
ea1f4eec | 735 | void __init smp_cpus_done(unsigned int max_cpus) |
1da177e4 | 736 | { |
1da177e4 LT |
737 | } |
738 | ||
02beaccc HC |
739 | void __init smp_setup_processor_id(void) |
740 | { | |
741 | S390_lowcore.cpu_nr = 0; | |
742 | __cpu_logical_map[0] = stap(); | |
743 | } | |
744 | ||
1da177e4 LT |
745 | /* |
746 | * the frequency of the profiling timer can be changed | |
747 | * by writing a multiplier value into /proc/profile. | |
748 | * | |
749 | * usually you want to run this on all CPUs ;) | |
750 | */ | |
751 | int setup_profiling_timer(unsigned int multiplier) | |
752 | { | |
39ce010d | 753 | return 0; |
1da177e4 LT |
754 | } |
755 | ||
08d07968 | 756 | #ifdef CONFIG_HOTPLUG_CPU |
4a0b2b4d AK |
757 | static ssize_t cpu_configure_show(struct sys_device *dev, |
758 | struct sysdev_attribute *attr, char *buf) | |
08d07968 HC |
759 | { |
760 | ssize_t count; | |
761 | ||
762 | mutex_lock(&smp_cpu_state_mutex); | |
763 | count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]); | |
764 | mutex_unlock(&smp_cpu_state_mutex); | |
765 | return count; | |
766 | } | |
767 | ||
4a0b2b4d AK |
768 | static ssize_t cpu_configure_store(struct sys_device *dev, |
769 | struct sysdev_attribute *attr, | |
770 | const char *buf, size_t count) | |
08d07968 HC |
771 | { |
772 | int cpu = dev->id; | |
773 | int val, rc; | |
774 | char delim; | |
775 | ||
776 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
777 | return -EINVAL; | |
778 | if (val != 0 && val != 1) | |
779 | return -EINVAL; | |
780 | ||
9d40d2e3 | 781 | get_online_cpus(); |
0b18d318 | 782 | mutex_lock(&smp_cpu_state_mutex); |
08d07968 | 783 | rc = -EBUSY; |
2c2df118 HC |
784 | /* disallow configuration changes of online cpus and cpu 0 */ |
785 | if (cpu_online(cpu) || cpu == 0) | |
08d07968 HC |
786 | goto out; |
787 | rc = 0; | |
788 | switch (val) { | |
789 | case 0: | |
790 | if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) { | |
791 | rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]); | |
c10fde0d | 792 | if (!rc) { |
08d07968 | 793 | smp_cpu_state[cpu] = CPU_STATE_STANDBY; |
c10fde0d HC |
794 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
795 | } | |
08d07968 HC |
796 | } |
797 | break; | |
798 | case 1: | |
799 | if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) { | |
800 | rc = sclp_cpu_configure(__cpu_logical_map[cpu]); | |
c10fde0d | 801 | if (!rc) { |
08d07968 | 802 | smp_cpu_state[cpu] = CPU_STATE_CONFIGURED; |
c10fde0d HC |
803 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
804 | } | |
08d07968 HC |
805 | } |
806 | break; | |
807 | default: | |
808 | break; | |
809 | } | |
810 | out: | |
08d07968 | 811 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 812 | put_online_cpus(); |
08d07968 HC |
813 | return rc ? rc : count; |
814 | } | |
815 | static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); | |
816 | #endif /* CONFIG_HOTPLUG_CPU */ | |
817 | ||
4a0b2b4d AK |
818 | static ssize_t cpu_polarization_show(struct sys_device *dev, |
819 | struct sysdev_attribute *attr, char *buf) | |
c10fde0d HC |
820 | { |
821 | int cpu = dev->id; | |
822 | ssize_t count; | |
823 | ||
824 | mutex_lock(&smp_cpu_state_mutex); | |
825 | switch (smp_cpu_polarization[cpu]) { | |
826 | case POLARIZATION_HRZ: | |
827 | count = sprintf(buf, "horizontal\n"); | |
828 | break; | |
829 | case POLARIZATION_VL: | |
830 | count = sprintf(buf, "vertical:low\n"); | |
831 | break; | |
832 | case POLARIZATION_VM: | |
833 | count = sprintf(buf, "vertical:medium\n"); | |
834 | break; | |
835 | case POLARIZATION_VH: | |
836 | count = sprintf(buf, "vertical:high\n"); | |
837 | break; | |
838 | default: | |
839 | count = sprintf(buf, "unknown\n"); | |
840 | break; | |
841 | } | |
842 | mutex_unlock(&smp_cpu_state_mutex); | |
843 | return count; | |
844 | } | |
845 | static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL); | |
846 | ||
4a0b2b4d AK |
847 | static ssize_t show_cpu_address(struct sys_device *dev, |
848 | struct sysdev_attribute *attr, char *buf) | |
08d07968 HC |
849 | { |
850 | return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]); | |
851 | } | |
852 | static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL); | |
853 | ||
854 | ||
855 | static struct attribute *cpu_common_attrs[] = { | |
856 | #ifdef CONFIG_HOTPLUG_CPU | |
857 | &attr_configure.attr, | |
858 | #endif | |
859 | &attr_address.attr, | |
c10fde0d | 860 | &attr_polarization.attr, |
08d07968 HC |
861 | NULL, |
862 | }; | |
863 | ||
864 | static struct attribute_group cpu_common_attr_group = { | |
865 | .attrs = cpu_common_attrs, | |
866 | }; | |
1da177e4 | 867 | |
4a0b2b4d AK |
868 | static ssize_t show_capability(struct sys_device *dev, |
869 | struct sysdev_attribute *attr, char *buf) | |
2fc2d1e9 HC |
870 | { |
871 | unsigned int capability; | |
872 | int rc; | |
873 | ||
874 | rc = get_cpu_capability(&capability); | |
875 | if (rc) | |
876 | return rc; | |
877 | return sprintf(buf, "%u\n", capability); | |
878 | } | |
879 | static SYSDEV_ATTR(capability, 0444, show_capability, NULL); | |
880 | ||
4a0b2b4d AK |
881 | static ssize_t show_idle_count(struct sys_device *dev, |
882 | struct sysdev_attribute *attr, char *buf) | |
fae8b22d HC |
883 | { |
884 | struct s390_idle_data *idle; | |
885 | unsigned long long idle_count; | |
e98bbaaf | 886 | unsigned int sequence; |
fae8b22d HC |
887 | |
888 | idle = &per_cpu(s390_idle, dev->id); | |
e98bbaaf MS |
889 | repeat: |
890 | sequence = idle->sequence; | |
891 | smp_rmb(); | |
892 | if (sequence & 1) | |
893 | goto repeat; | |
fae8b22d | 894 | idle_count = idle->idle_count; |
6f430924 MS |
895 | if (idle->idle_enter) |
896 | idle_count++; | |
e98bbaaf MS |
897 | smp_rmb(); |
898 | if (idle->sequence != sequence) | |
899 | goto repeat; | |
fae8b22d HC |
900 | return sprintf(buf, "%llu\n", idle_count); |
901 | } | |
902 | static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL); | |
903 | ||
4a0b2b4d AK |
904 | static ssize_t show_idle_time(struct sys_device *dev, |
905 | struct sysdev_attribute *attr, char *buf) | |
fae8b22d HC |
906 | { |
907 | struct s390_idle_data *idle; | |
6f430924 | 908 | unsigned long long now, idle_time, idle_enter; |
e98bbaaf | 909 | unsigned int sequence; |
fae8b22d HC |
910 | |
911 | idle = &per_cpu(s390_idle, dev->id); | |
6f430924 | 912 | now = get_clock(); |
e98bbaaf MS |
913 | repeat: |
914 | sequence = idle->sequence; | |
915 | smp_rmb(); | |
916 | if (sequence & 1) | |
917 | goto repeat; | |
6f430924 MS |
918 | idle_time = idle->idle_time; |
919 | idle_enter = idle->idle_enter; | |
920 | if (idle_enter != 0ULL && idle_enter < now) | |
921 | idle_time += now - idle_enter; | |
e98bbaaf MS |
922 | smp_rmb(); |
923 | if (idle->sequence != sequence) | |
924 | goto repeat; | |
6f430924 | 925 | return sprintf(buf, "%llu\n", idle_time >> 12); |
fae8b22d | 926 | } |
69d39d66 | 927 | static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL); |
fae8b22d | 928 | |
08d07968 | 929 | static struct attribute *cpu_online_attrs[] = { |
fae8b22d HC |
930 | &attr_capability.attr, |
931 | &attr_idle_count.attr, | |
69d39d66 | 932 | &attr_idle_time_us.attr, |
fae8b22d HC |
933 | NULL, |
934 | }; | |
935 | ||
08d07968 HC |
936 | static struct attribute_group cpu_online_attr_group = { |
937 | .attrs = cpu_online_attrs, | |
fae8b22d HC |
938 | }; |
939 | ||
2fc2d1e9 HC |
940 | static int __cpuinit smp_cpu_notify(struct notifier_block *self, |
941 | unsigned long action, void *hcpu) | |
942 | { | |
943 | unsigned int cpu = (unsigned int)(long)hcpu; | |
944 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
945 | struct sys_device *s = &c->sysdev; | |
fae8b22d | 946 | struct s390_idle_data *idle; |
2fc2d1e9 HC |
947 | |
948 | switch (action) { | |
949 | case CPU_ONLINE: | |
8bb78442 | 950 | case CPU_ONLINE_FROZEN: |
fae8b22d | 951 | idle = &per_cpu(s390_idle, cpu); |
e98bbaaf | 952 | memset(idle, 0, sizeof(struct s390_idle_data)); |
08d07968 | 953 | if (sysfs_create_group(&s->kobj, &cpu_online_attr_group)) |
2fc2d1e9 HC |
954 | return NOTIFY_BAD; |
955 | break; | |
956 | case CPU_DEAD: | |
8bb78442 | 957 | case CPU_DEAD_FROZEN: |
08d07968 | 958 | sysfs_remove_group(&s->kobj, &cpu_online_attr_group); |
2fc2d1e9 HC |
959 | break; |
960 | } | |
961 | return NOTIFY_OK; | |
962 | } | |
963 | ||
964 | static struct notifier_block __cpuinitdata smp_cpu_nb = { | |
39ce010d | 965 | .notifier_call = smp_cpu_notify, |
2fc2d1e9 HC |
966 | }; |
967 | ||
2bc89b5e | 968 | static int __devinit smp_add_present_cpu(int cpu) |
08d07968 HC |
969 | { |
970 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
971 | struct sys_device *s = &c->sysdev; | |
972 | int rc; | |
973 | ||
974 | c->hotpluggable = 1; | |
975 | rc = register_cpu(c, cpu); | |
976 | if (rc) | |
977 | goto out; | |
978 | rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); | |
979 | if (rc) | |
980 | goto out_cpu; | |
981 | if (!cpu_online(cpu)) | |
982 | goto out; | |
983 | rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group); | |
984 | if (!rc) | |
985 | return 0; | |
986 | sysfs_remove_group(&s->kobj, &cpu_common_attr_group); | |
987 | out_cpu: | |
988 | #ifdef CONFIG_HOTPLUG_CPU | |
989 | unregister_cpu(c); | |
990 | #endif | |
991 | out: | |
992 | return rc; | |
993 | } | |
994 | ||
995 | #ifdef CONFIG_HOTPLUG_CPU | |
1e489518 | 996 | |
67060d9c | 997 | int __ref smp_rescan_cpus(void) |
08d07968 HC |
998 | { |
999 | cpumask_t newcpus; | |
1000 | int cpu; | |
1001 | int rc; | |
1002 | ||
9d40d2e3 | 1003 | get_online_cpus(); |
0b18d318 | 1004 | mutex_lock(&smp_cpu_state_mutex); |
08d07968 | 1005 | newcpus = cpu_present_map; |
1e489518 | 1006 | rc = __smp_rescan_cpus(); |
08d07968 HC |
1007 | if (rc) |
1008 | goto out; | |
1009 | cpus_andnot(newcpus, cpu_present_map, newcpus); | |
1010 | for_each_cpu_mask(cpu, newcpus) { | |
1011 | rc = smp_add_present_cpu(cpu); | |
1012 | if (rc) | |
1013 | cpu_clear(cpu, cpu_present_map); | |
1014 | } | |
1015 | rc = 0; | |
1016 | out: | |
08d07968 | 1017 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 1018 | put_online_cpus(); |
c10fde0d HC |
1019 | if (!cpus_empty(newcpus)) |
1020 | topology_schedule_update(); | |
1e489518 HC |
1021 | return rc; |
1022 | } | |
1023 | ||
c9be0a36 AK |
1024 | static ssize_t __ref rescan_store(struct sysdev_class *class, |
1025 | struct sysdev_class_attribute *attr, | |
1026 | const char *buf, | |
1e489518 HC |
1027 | size_t count) |
1028 | { | |
1029 | int rc; | |
1030 | ||
1031 | rc = smp_rescan_cpus(); | |
08d07968 HC |
1032 | return rc ? rc : count; |
1033 | } | |
da5aae70 | 1034 | static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store); |
08d07968 HC |
1035 | #endif /* CONFIG_HOTPLUG_CPU */ |
1036 | ||
5fbcae57 HC |
1037 | static ssize_t dispatching_show(struct sysdev_class *class, |
1038 | struct sysdev_class_attribute *attr, | |
1039 | char *buf) | |
c10fde0d HC |
1040 | { |
1041 | ssize_t count; | |
1042 | ||
1043 | mutex_lock(&smp_cpu_state_mutex); | |
1044 | count = sprintf(buf, "%d\n", cpu_management); | |
1045 | mutex_unlock(&smp_cpu_state_mutex); | |
1046 | return count; | |
1047 | } | |
1048 | ||
c9be0a36 AK |
1049 | static ssize_t dispatching_store(struct sysdev_class *dev, |
1050 | struct sysdev_class_attribute *attr, | |
1051 | const char *buf, | |
da5aae70 | 1052 | size_t count) |
c10fde0d HC |
1053 | { |
1054 | int val, rc; | |
1055 | char delim; | |
1056 | ||
1057 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
1058 | return -EINVAL; | |
1059 | if (val != 0 && val != 1) | |
1060 | return -EINVAL; | |
1061 | rc = 0; | |
c10fde0d | 1062 | get_online_cpus(); |
0b18d318 | 1063 | mutex_lock(&smp_cpu_state_mutex); |
c10fde0d HC |
1064 | if (cpu_management == val) |
1065 | goto out; | |
1066 | rc = topology_set_cpu_management(val); | |
1067 | if (!rc) | |
1068 | cpu_management = val; | |
1069 | out: | |
c10fde0d | 1070 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 1071 | put_online_cpus(); |
c10fde0d HC |
1072 | return rc ? rc : count; |
1073 | } | |
da5aae70 HC |
1074 | static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show, |
1075 | dispatching_store); | |
c10fde0d | 1076 | |
1da177e4 LT |
1077 | static int __init topology_init(void) |
1078 | { | |
1079 | int cpu; | |
fae8b22d | 1080 | int rc; |
2fc2d1e9 HC |
1081 | |
1082 | register_cpu_notifier(&smp_cpu_nb); | |
1da177e4 | 1083 | |
08d07968 | 1084 | #ifdef CONFIG_HOTPLUG_CPU |
da5aae70 | 1085 | rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan); |
08d07968 HC |
1086 | if (rc) |
1087 | return rc; | |
1088 | #endif | |
da5aae70 | 1089 | rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching); |
c10fde0d HC |
1090 | if (rc) |
1091 | return rc; | |
08d07968 HC |
1092 | for_each_present_cpu(cpu) { |
1093 | rc = smp_add_present_cpu(cpu); | |
fae8b22d HC |
1094 | if (rc) |
1095 | return rc; | |
1da177e4 LT |
1096 | } |
1097 | return 0; | |
1098 | } | |
1da177e4 | 1099 | subsys_initcall(topology_init); |