]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/smp.c | |
3 | * | |
155af2f9 | 4 | * Copyright IBM Corp. 1999, 2009 |
1da177e4 | 5 | * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), |
39ce010d HC |
6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
7 | * Heiko Carstens (heiko.carstens@de.ibm.com) | |
1da177e4 | 8 | * |
39ce010d | 9 | * based on other smp stuff by |
1da177e4 LT |
10 | * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> |
11 | * (c) 1998 Ingo Molnar | |
12 | * | |
13 | * We work with logical cpu numbering everywhere we can. The only | |
14 | * functions using the real cpu address (got from STAP) are the sigp | |
15 | * functions. For all other functions we use the identity mapping. | |
16 | * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is | |
17 | * used e.g. to find the idle task belonging to a logical cpu. Every array | |
18 | * in the kernel is sorted by the logical cpu number and not by the physical | |
19 | * one which is causing all the confusion with __cpu_logical_map and | |
20 | * cpu_number_map in other architectures. | |
21 | */ | |
22 | ||
395d31d4 MS |
23 | #define KMSG_COMPONENT "cpu" |
24 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
25 | ||
f230886b | 26 | #include <linux/workqueue.h> |
1da177e4 LT |
27 | #include <linux/module.h> |
28 | #include <linux/init.h> | |
1da177e4 | 29 | #include <linux/mm.h> |
4e950f6f | 30 | #include <linux/err.h> |
1da177e4 LT |
31 | #include <linux/spinlock.h> |
32 | #include <linux/kernel_stat.h> | |
1da177e4 LT |
33 | #include <linux/delay.h> |
34 | #include <linux/cache.h> | |
35 | #include <linux/interrupt.h> | |
3324e60a | 36 | #include <linux/irqflags.h> |
1da177e4 | 37 | #include <linux/cpu.h> |
2b67fc46 | 38 | #include <linux/timex.h> |
411ed322 | 39 | #include <linux/bootmem.h> |
5a0e3ad6 | 40 | #include <linux/slab.h> |
cbb870c8 | 41 | #include <asm/asm-offsets.h> |
46b05d26 | 42 | #include <asm/ipl.h> |
2b67fc46 | 43 | #include <asm/setup.h> |
1da177e4 LT |
44 | #include <asm/sigp.h> |
45 | #include <asm/pgalloc.h> | |
46 | #include <asm/irq.h> | |
47 | #include <asm/s390_ext.h> | |
48 | #include <asm/cpcmd.h> | |
49 | #include <asm/tlbflush.h> | |
2b67fc46 | 50 | #include <asm/timer.h> |
411ed322 | 51 | #include <asm/lowcore.h> |
08d07968 | 52 | #include <asm/sclp.h> |
76d4e00a | 53 | #include <asm/cputime.h> |
c742b31c | 54 | #include <asm/vdso.h> |
4bb5e07b | 55 | #include <asm/cpu.h> |
a806170e | 56 | #include "entry.h" |
1da177e4 | 57 | |
fb380aad | 58 | /* logical cpu to cpu address */ |
a93b8ec1 | 59 | unsigned short __cpu_logical_map[NR_CPUS]; |
fb380aad | 60 | |
1da177e4 LT |
61 | static struct task_struct *current_set[NR_CPUS]; |
62 | ||
08d07968 HC |
63 | static u8 smp_cpu_type; |
64 | static int smp_use_sigp_detection; | |
65 | ||
66 | enum s390_cpu_state { | |
67 | CPU_STATE_STANDBY, | |
68 | CPU_STATE_CONFIGURED, | |
69 | }; | |
70 | ||
dbd70fb4 | 71 | DEFINE_MUTEX(smp_cpu_state_mutex); |
c10fde0d | 72 | int smp_cpu_polarization[NR_CPUS]; |
08d07968 | 73 | static int smp_cpu_state[NR_CPUS]; |
c10fde0d | 74 | static int cpu_management; |
08d07968 HC |
75 | |
76 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | |
08d07968 | 77 | |
a93b8ec1 | 78 | static void smp_ext_bitcall(int, int); |
1da177e4 | 79 | |
a93b8ec1 | 80 | static int raw_cpu_stopped(int cpu) |
5c0b912e | 81 | { |
a93b8ec1 | 82 | u32 status; |
5c0b912e | 83 | |
a93b8ec1 | 84 | switch (raw_sigp_ps(&status, 0, cpu, sigp_sense)) { |
5c0b912e HC |
85 | case sigp_status_stored: |
86 | /* Check for stopped and check stop state */ | |
87 | if (status & 0x50) | |
88 | return 1; | |
89 | break; | |
90 | default: | |
91 | break; | |
92 | } | |
93 | return 0; | |
94 | } | |
95 | ||
a93b8ec1 HC |
96 | static inline int cpu_stopped(int cpu) |
97 | { | |
98 | return raw_cpu_stopped(cpu_logical_map(cpu)); | |
99 | } | |
100 | ||
2c2df118 HC |
101 | void smp_switch_to_ipl_cpu(void (*func)(void *), void *data) |
102 | { | |
103 | struct _lowcore *lc, *current_lc; | |
104 | struct stack_frame *sf; | |
105 | struct pt_regs *regs; | |
106 | unsigned long sp; | |
107 | ||
108 | if (smp_processor_id() == 0) | |
109 | func(data); | |
110 | __load_psw_mask(PSW_BASE_BITS | PSW_DEFAULT_KEY); | |
111 | /* Disable lowcore protection */ | |
112 | __ctl_clear_bit(0, 28); | |
113 | current_lc = lowcore_ptr[smp_processor_id()]; | |
114 | lc = lowcore_ptr[0]; | |
115 | if (!lc) | |
116 | lc = current_lc; | |
117 | lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY; | |
118 | lc->restart_psw.addr = PSW_ADDR_AMODE | (unsigned long) smp_restart_cpu; | |
119 | if (!cpu_online(0)) | |
120 | smp_switch_to_cpu(func, data, 0, stap(), __cpu_logical_map[0]); | |
a93b8ec1 | 121 | while (sigp(0, sigp_stop_and_store_status) == sigp_busy) |
2c2df118 HC |
122 | cpu_relax(); |
123 | sp = lc->panic_stack; | |
124 | sp -= sizeof(struct pt_regs); | |
125 | regs = (struct pt_regs *) sp; | |
126 | memcpy(®s->gprs, ¤t_lc->gpregs_save_area, sizeof(regs->gprs)); | |
cbb870c8 | 127 | regs->psw = lc->psw_save_area; |
2c2df118 HC |
128 | sp -= STACK_FRAME_OVERHEAD; |
129 | sf = (struct stack_frame *) sp; | |
130 | sf->back_chain = regs->gprs[15]; | |
131 | smp_switch_to_cpu(func, data, sp, stap(), __cpu_logical_map[0]); | |
132 | } | |
133 | ||
677d7623 | 134 | void smp_send_stop(void) |
1da177e4 | 135 | { |
39ce010d | 136 | int cpu, rc; |
1da177e4 | 137 | |
677d7623 HC |
138 | /* Disable all interrupts/machine checks */ |
139 | __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); | |
3324e60a | 140 | trace_hardirqs_off(); |
1da177e4 | 141 | |
677d7623 | 142 | /* stop all processors */ |
1da177e4 LT |
143 | for_each_online_cpu(cpu) { |
144 | if (cpu == smp_processor_id()) | |
145 | continue; | |
146 | do { | |
a93b8ec1 | 147 | rc = sigp(cpu, sigp_stop); |
39ce010d | 148 | } while (rc == sigp_busy); |
1da177e4 | 149 | |
5c0b912e | 150 | while (!cpu_stopped(cpu)) |
c6b5b847 HC |
151 | cpu_relax(); |
152 | } | |
153 | } | |
154 | ||
1da177e4 LT |
155 | /* |
156 | * This is the main routine where commands issued by other | |
157 | * cpus are handled. | |
158 | */ | |
159 | ||
f6649a7e MS |
160 | static void do_ext_call_interrupt(unsigned int ext_int_code, |
161 | unsigned int param32, unsigned long param64) | |
1da177e4 | 162 | { |
39ce010d | 163 | unsigned long bits; |
1da177e4 | 164 | |
052ff461 | 165 | kstat_cpu(smp_processor_id()).irqs[EXTINT_IPI]++; |
39ce010d HC |
166 | /* |
167 | * handle bit signal external calls | |
39ce010d | 168 | */ |
1da177e4 LT |
169 | bits = xchg(&S390_lowcore.ext_call_fast, 0); |
170 | ||
184748cc PZ |
171 | if (test_bit(ec_schedule, &bits)) |
172 | scheduler_ipi(); | |
173 | ||
39ce010d | 174 | if (test_bit(ec_call_function, &bits)) |
ca9fc75a HC |
175 | generic_smp_call_function_interrupt(); |
176 | ||
177 | if (test_bit(ec_call_function_single, &bits)) | |
178 | generic_smp_call_function_single_interrupt(); | |
1da177e4 LT |
179 | } |
180 | ||
181 | /* | |
182 | * Send an external call sigp to another cpu and return without waiting | |
183 | * for its completion. | |
184 | */ | |
a93b8ec1 | 185 | static void smp_ext_bitcall(int cpu, int sig) |
1da177e4 | 186 | { |
39ce010d HC |
187 | /* |
188 | * Set signaling bit in lowcore of target cpu and kick it | |
189 | */ | |
1da177e4 | 190 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); |
a93b8ec1 | 191 | while (sigp(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
192 | udelay(10); |
193 | } | |
194 | ||
630cd046 | 195 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
ca9fc75a HC |
196 | { |
197 | int cpu; | |
198 | ||
630cd046 | 199 | for_each_cpu(cpu, mask) |
ca9fc75a HC |
200 | smp_ext_bitcall(cpu, ec_call_function); |
201 | } | |
202 | ||
203 | void arch_send_call_function_single_ipi(int cpu) | |
204 | { | |
205 | smp_ext_bitcall(cpu, ec_call_function_single); | |
206 | } | |
207 | ||
347a8dc3 | 208 | #ifndef CONFIG_64BIT |
1da177e4 LT |
209 | /* |
210 | * this function sends a 'purge tlb' signal to another CPU. | |
211 | */ | |
a806170e | 212 | static void smp_ptlb_callback(void *info) |
1da177e4 | 213 | { |
ba8a9229 | 214 | __tlb_flush_local(); |
1da177e4 LT |
215 | } |
216 | ||
217 | void smp_ptlb_all(void) | |
218 | { | |
15c8b6c1 | 219 | on_each_cpu(smp_ptlb_callback, NULL, 1); |
1da177e4 LT |
220 | } |
221 | EXPORT_SYMBOL(smp_ptlb_all); | |
347a8dc3 | 222 | #endif /* ! CONFIG_64BIT */ |
1da177e4 LT |
223 | |
224 | /* | |
225 | * this function sends a 'reschedule' IPI to another CPU. | |
226 | * it goes straight through and wastes no time serializing | |
227 | * anything. Worst case is that we lose a reschedule ... | |
228 | */ | |
229 | void smp_send_reschedule(int cpu) | |
230 | { | |
39ce010d | 231 | smp_ext_bitcall(cpu, ec_schedule); |
1da177e4 LT |
232 | } |
233 | ||
234 | /* | |
235 | * parameter area for the set/clear control bit callbacks | |
236 | */ | |
94c12cc7 | 237 | struct ec_creg_mask_parms { |
1da177e4 LT |
238 | unsigned long orvals[16]; |
239 | unsigned long andvals[16]; | |
94c12cc7 | 240 | }; |
1da177e4 LT |
241 | |
242 | /* | |
243 | * callback for setting/clearing control bits | |
244 | */ | |
39ce010d HC |
245 | static void smp_ctl_bit_callback(void *info) |
246 | { | |
94c12cc7 | 247 | struct ec_creg_mask_parms *pp = info; |
1da177e4 LT |
248 | unsigned long cregs[16]; |
249 | int i; | |
39ce010d | 250 | |
94c12cc7 MS |
251 | __ctl_store(cregs, 0, 15); |
252 | for (i = 0; i <= 15; i++) | |
1da177e4 | 253 | cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i]; |
94c12cc7 | 254 | __ctl_load(cregs, 0, 15); |
1da177e4 LT |
255 | } |
256 | ||
257 | /* | |
258 | * Set a bit in a control register of all cpus | |
259 | */ | |
94c12cc7 MS |
260 | void smp_ctl_set_bit(int cr, int bit) |
261 | { | |
262 | struct ec_creg_mask_parms parms; | |
1da177e4 | 263 | |
94c12cc7 MS |
264 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
265 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 266 | parms.orvals[cr] = 1 << bit; |
15c8b6c1 | 267 | on_each_cpu(smp_ctl_bit_callback, &parms, 1); |
1da177e4 | 268 | } |
39ce010d | 269 | EXPORT_SYMBOL(smp_ctl_set_bit); |
1da177e4 LT |
270 | |
271 | /* | |
272 | * Clear a bit in a control register of all cpus | |
273 | */ | |
94c12cc7 MS |
274 | void smp_ctl_clear_bit(int cr, int bit) |
275 | { | |
276 | struct ec_creg_mask_parms parms; | |
1da177e4 | 277 | |
94c12cc7 MS |
278 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
279 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 280 | parms.andvals[cr] = ~(1L << bit); |
15c8b6c1 | 281 | on_each_cpu(smp_ctl_bit_callback, &parms, 1); |
1da177e4 | 282 | } |
39ce010d | 283 | EXPORT_SYMBOL(smp_ctl_clear_bit); |
1da177e4 | 284 | |
59f2e69d | 285 | #ifdef CONFIG_ZFCPDUMP |
411ed322 | 286 | |
285f6722 | 287 | static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) |
411ed322 | 288 | { |
411ed322 MH |
289 | if (ipl_info.type != IPL_TYPE_FCP_DUMP) |
290 | return; | |
285f6722 | 291 | if (cpu >= NR_CPUS) { |
395d31d4 MS |
292 | pr_warning("CPU %i exceeds the maximum %i and is excluded from " |
293 | "the dump\n", cpu, NR_CPUS - 1); | |
285f6722 | 294 | return; |
411ed322 | 295 | } |
f64ca217 | 296 | zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL); |
a93b8ec1 | 297 | while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy) |
285f6722 | 298 | cpu_relax(); |
92fe3132 MH |
299 | memcpy_real(zfcpdump_save_areas[cpu], |
300 | (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE, | |
301 | sizeof(struct save_area)); | |
411ed322 MH |
302 | } |
303 | ||
f64ca217 | 304 | struct save_area *zfcpdump_save_areas[NR_CPUS + 1]; |
411ed322 MH |
305 | EXPORT_SYMBOL_GPL(zfcpdump_save_areas); |
306 | ||
307 | #else | |
285f6722 HC |
308 | |
309 | static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { } | |
310 | ||
59f2e69d | 311 | #endif /* CONFIG_ZFCPDUMP */ |
411ed322 | 312 | |
08d07968 HC |
313 | static int cpu_known(int cpu_id) |
314 | { | |
315 | int cpu; | |
316 | ||
317 | for_each_present_cpu(cpu) { | |
318 | if (__cpu_logical_map[cpu] == cpu_id) | |
319 | return 1; | |
320 | } | |
321 | return 0; | |
322 | } | |
323 | ||
324 | static int smp_rescan_cpus_sigp(cpumask_t avail) | |
325 | { | |
326 | int cpu_id, logical_cpu; | |
327 | ||
93632d1b RR |
328 | logical_cpu = cpumask_first(&avail); |
329 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 | 330 | return 0; |
4bb5e07b | 331 | for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) { |
08d07968 HC |
332 | if (cpu_known(cpu_id)) |
333 | continue; | |
334 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 335 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
08d07968 HC |
336 | if (!cpu_stopped(logical_cpu)) |
337 | continue; | |
0f1959f5 | 338 | set_cpu_present(logical_cpu, true); |
08d07968 | 339 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; |
93632d1b RR |
340 | logical_cpu = cpumask_next(logical_cpu, &avail); |
341 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 HC |
342 | break; |
343 | } | |
344 | return 0; | |
345 | } | |
346 | ||
48483b32 | 347 | static int smp_rescan_cpus_sclp(cpumask_t avail) |
08d07968 HC |
348 | { |
349 | struct sclp_cpu_info *info; | |
350 | int cpu_id, logical_cpu, cpu; | |
351 | int rc; | |
352 | ||
93632d1b RR |
353 | logical_cpu = cpumask_first(&avail); |
354 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 | 355 | return 0; |
48483b32 | 356 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
08d07968 HC |
357 | if (!info) |
358 | return -ENOMEM; | |
359 | rc = sclp_get_cpu_info(info); | |
360 | if (rc) | |
361 | goto out; | |
362 | for (cpu = 0; cpu < info->combined; cpu++) { | |
363 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
364 | continue; | |
365 | cpu_id = info->cpu[cpu].address; | |
366 | if (cpu_known(cpu_id)) | |
367 | continue; | |
368 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 369 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
0f1959f5 | 370 | set_cpu_present(logical_cpu, true); |
08d07968 HC |
371 | if (cpu >= info->configured) |
372 | smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY; | |
373 | else | |
374 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; | |
93632d1b RR |
375 | logical_cpu = cpumask_next(logical_cpu, &avail); |
376 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 HC |
377 | break; |
378 | } | |
379 | out: | |
48483b32 | 380 | kfree(info); |
08d07968 HC |
381 | return rc; |
382 | } | |
383 | ||
1e489518 | 384 | static int __smp_rescan_cpus(void) |
08d07968 HC |
385 | { |
386 | cpumask_t avail; | |
387 | ||
0f1959f5 | 388 | cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); |
08d07968 HC |
389 | if (smp_use_sigp_detection) |
390 | return smp_rescan_cpus_sigp(avail); | |
391 | else | |
392 | return smp_rescan_cpus_sclp(avail); | |
1da177e4 LT |
393 | } |
394 | ||
48483b32 HC |
395 | static void __init smp_detect_cpus(void) |
396 | { | |
397 | unsigned int cpu, c_cpus, s_cpus; | |
398 | struct sclp_cpu_info *info; | |
399 | u16 boot_cpu_addr, cpu_addr; | |
400 | ||
401 | c_cpus = 1; | |
402 | s_cpus = 0; | |
7b468488 | 403 | boot_cpu_addr = __cpu_logical_map[0]; |
48483b32 HC |
404 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
405 | if (!info) | |
406 | panic("smp_detect_cpus failed to allocate memory\n"); | |
407 | /* Use sigp detection algorithm if sclp doesn't work. */ | |
408 | if (sclp_get_cpu_info(info)) { | |
409 | smp_use_sigp_detection = 1; | |
4bb5e07b | 410 | for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) { |
48483b32 HC |
411 | if (cpu == boot_cpu_addr) |
412 | continue; | |
a93b8ec1 | 413 | if (!raw_cpu_stopped(cpu)) |
48483b32 HC |
414 | continue; |
415 | smp_get_save_area(c_cpus, cpu); | |
416 | c_cpus++; | |
417 | } | |
418 | goto out; | |
419 | } | |
420 | ||
421 | if (info->has_cpu_type) { | |
422 | for (cpu = 0; cpu < info->combined; cpu++) { | |
423 | if (info->cpu[cpu].address == boot_cpu_addr) { | |
424 | smp_cpu_type = info->cpu[cpu].type; | |
425 | break; | |
426 | } | |
427 | } | |
428 | } | |
429 | ||
430 | for (cpu = 0; cpu < info->combined; cpu++) { | |
431 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
432 | continue; | |
433 | cpu_addr = info->cpu[cpu].address; | |
434 | if (cpu_addr == boot_cpu_addr) | |
435 | continue; | |
a93b8ec1 | 436 | if (!raw_cpu_stopped(cpu_addr)) { |
48483b32 HC |
437 | s_cpus++; |
438 | continue; | |
439 | } | |
440 | smp_get_save_area(c_cpus, cpu_addr); | |
441 | c_cpus++; | |
442 | } | |
443 | out: | |
444 | kfree(info); | |
395d31d4 | 445 | pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); |
9d40d2e3 | 446 | get_online_cpus(); |
1e489518 | 447 | __smp_rescan_cpus(); |
9d40d2e3 | 448 | put_online_cpus(); |
48483b32 HC |
449 | } |
450 | ||
1da177e4 | 451 | /* |
39ce010d | 452 | * Activate a secondary processor. |
1da177e4 | 453 | */ |
ea1f4eec | 454 | int __cpuinit start_secondary(void *cpuvoid) |
1da177e4 | 455 | { |
39ce010d HC |
456 | /* Setup the cpu */ |
457 | cpu_init(); | |
5bfb5d69 | 458 | preempt_disable(); |
d54853ef | 459 | /* Enable TOD clock interrupts on the secondary cpu. */ |
39ce010d | 460 | init_cpu_timer(); |
d54853ef | 461 | /* Enable cpu timer interrupts on the secondary cpu. */ |
39ce010d | 462 | init_cpu_vtimer(); |
1da177e4 | 463 | /* Enable pfault pseudo page faults on this cpu. */ |
29b08d2b HC |
464 | pfault_init(); |
465 | ||
e545a614 MS |
466 | /* call cpu notifiers */ |
467 | notify_cpu_starting(smp_processor_id()); | |
1da177e4 | 468 | /* Mark this cpu as online */ |
ca9fc75a | 469 | ipi_call_lock(); |
0f1959f5 | 470 | set_cpu_online(smp_processor_id(), true); |
ca9fc75a | 471 | ipi_call_unlock(); |
1da177e4 LT |
472 | /* Switch on interrupts */ |
473 | local_irq_enable(); | |
39ce010d HC |
474 | /* cpu_idle will call schedule for us */ |
475 | cpu_idle(); | |
476 | return 0; | |
1da177e4 LT |
477 | } |
478 | ||
f230886b HC |
479 | struct create_idle { |
480 | struct work_struct work; | |
481 | struct task_struct *idle; | |
482 | struct completion done; | |
483 | int cpu; | |
484 | }; | |
485 | ||
486 | static void __cpuinit smp_fork_idle(struct work_struct *work) | |
1da177e4 | 487 | { |
f230886b | 488 | struct create_idle *c_idle; |
1da177e4 | 489 | |
f230886b HC |
490 | c_idle = container_of(work, struct create_idle, work); |
491 | c_idle->idle = fork_idle(c_idle->cpu); | |
492 | complete(&c_idle->done); | |
1da177e4 LT |
493 | } |
494 | ||
1cb6bb4b HC |
495 | static int __cpuinit smp_alloc_lowcore(int cpu) |
496 | { | |
497 | unsigned long async_stack, panic_stack; | |
498 | struct _lowcore *lowcore; | |
1cb6bb4b | 499 | |
3fd26a77 | 500 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); |
1cb6bb4b HC |
501 | if (!lowcore) |
502 | return -ENOMEM; | |
503 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
1cb6bb4b | 504 | panic_stack = __get_free_page(GFP_KERNEL); |
591bb4f6 HC |
505 | if (!panic_stack || !async_stack) |
506 | goto out; | |
98c7b388 HC |
507 | memcpy(lowcore, &S390_lowcore, 512); |
508 | memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512); | |
1cb6bb4b HC |
509 | lowcore->async_stack = async_stack + ASYNC_SIZE; |
510 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
511 | ||
512 | #ifndef CONFIG_64BIT | |
513 | if (MACHINE_HAS_IEEE) { | |
514 | unsigned long save_area; | |
515 | ||
516 | save_area = get_zeroed_page(GFP_KERNEL); | |
517 | if (!save_area) | |
33b1d09e | 518 | goto out; |
1cb6bb4b HC |
519 | lowcore->extended_save_area_addr = (u32) save_area; |
520 | } | |
c742b31c MS |
521 | #else |
522 | if (vdso_alloc_per_cpu(cpu, lowcore)) | |
523 | goto out; | |
1cb6bb4b HC |
524 | #endif |
525 | lowcore_ptr[cpu] = lowcore; | |
526 | return 0; | |
527 | ||
591bb4f6 | 528 | out: |
33b1d09e | 529 | free_page(panic_stack); |
1cb6bb4b | 530 | free_pages(async_stack, ASYNC_ORDER); |
3fd26a77 | 531 | free_pages((unsigned long) lowcore, LC_ORDER); |
1cb6bb4b HC |
532 | return -ENOMEM; |
533 | } | |
534 | ||
1cb6bb4b HC |
535 | static void smp_free_lowcore(int cpu) |
536 | { | |
537 | struct _lowcore *lowcore; | |
1cb6bb4b | 538 | |
1cb6bb4b HC |
539 | lowcore = lowcore_ptr[cpu]; |
540 | #ifndef CONFIG_64BIT | |
541 | if (MACHINE_HAS_IEEE) | |
542 | free_page((unsigned long) lowcore->extended_save_area_addr); | |
c742b31c MS |
543 | #else |
544 | vdso_free_per_cpu(cpu, lowcore); | |
1cb6bb4b HC |
545 | #endif |
546 | free_page(lowcore->panic_stack - PAGE_SIZE); | |
547 | free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER); | |
3fd26a77 | 548 | free_pages((unsigned long) lowcore, LC_ORDER); |
1cb6bb4b HC |
549 | lowcore_ptr[cpu] = NULL; |
550 | } | |
1cb6bb4b | 551 | |
1da177e4 | 552 | /* Upping and downing of CPUs */ |
1cb6bb4b | 553 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 | 554 | { |
39ce010d | 555 | struct _lowcore *cpu_lowcore; |
f230886b | 556 | struct create_idle c_idle; |
a93b8ec1 | 557 | struct task_struct *idle; |
1da177e4 | 558 | struct stack_frame *sf; |
d0d3cdf4 | 559 | u32 lowcore; |
a93b8ec1 | 560 | int ccode; |
1da177e4 | 561 | |
08d07968 HC |
562 | if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED) |
563 | return -EIO; | |
f230886b HC |
564 | idle = current_set[cpu]; |
565 | if (!idle) { | |
566 | c_idle.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done); | |
567 | INIT_WORK_ONSTACK(&c_idle.work, smp_fork_idle); | |
568 | c_idle.cpu = cpu; | |
569 | schedule_work(&c_idle.work); | |
570 | wait_for_completion(&c_idle.done); | |
571 | if (IS_ERR(c_idle.idle)) | |
572 | return PTR_ERR(c_idle.idle); | |
573 | idle = c_idle.idle; | |
574 | current_set[cpu] = c_idle.idle; | |
575 | } | |
da7f51c1 | 576 | init_idle(idle, cpu); |
1cb6bb4b HC |
577 | if (smp_alloc_lowcore(cpu)) |
578 | return -ENOMEM; | |
d0d3cdf4 | 579 | do { |
a93b8ec1 | 580 | ccode = sigp(cpu, sigp_initial_cpu_reset); |
d0d3cdf4 HC |
581 | if (ccode == sigp_busy) |
582 | udelay(10); | |
583 | if (ccode == sigp_not_operational) | |
584 | goto err_out; | |
585 | } while (ccode == sigp_busy); | |
586 | ||
587 | lowcore = (u32)(unsigned long)lowcore_ptr[cpu]; | |
a93b8ec1 | 588 | while (sigp_p(lowcore, cpu, sigp_set_prefix) == sigp_busy) |
d0d3cdf4 | 589 | udelay(10); |
1da177e4 | 590 | |
39ce010d | 591 | cpu_lowcore = lowcore_ptr[cpu]; |
1da177e4 | 592 | cpu_lowcore->kernel_stack = (unsigned long) |
39ce010d | 593 | task_stack_page(idle) + THREAD_SIZE; |
1cb6bb4b | 594 | cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle); |
1da177e4 LT |
595 | sf = (struct stack_frame *) (cpu_lowcore->kernel_stack |
596 | - sizeof(struct pt_regs) | |
597 | - sizeof(struct stack_frame)); | |
598 | memset(sf, 0, sizeof(struct stack_frame)); | |
599 | sf->gprs[9] = (unsigned long) sf; | |
600 | cpu_lowcore->save_area[15] = (unsigned long) sf; | |
24d3e210 | 601 | __ctl_store(cpu_lowcore->cregs_save_area, 0, 15); |
050eef36 | 602 | atomic_inc(&init_mm.context.attach_count); |
94c12cc7 MS |
603 | asm volatile( |
604 | " stam 0,15,0(%0)" | |
605 | : : "a" (&cpu_lowcore->access_regs_save_area) : "memory"); | |
1da177e4 | 606 | cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; |
39ce010d | 607 | cpu_lowcore->current_task = (unsigned long) idle; |
7b468488 | 608 | cpu_lowcore->cpu_nr = cpu; |
591bb4f6 | 609 | cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce; |
25097bf1 | 610 | cpu_lowcore->machine_flags = S390_lowcore.machine_flags; |
dfd9f7ab | 611 | cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func; |
14375bc4 MS |
612 | memcpy(cpu_lowcore->stfle_fac_list, S390_lowcore.stfle_fac_list, |
613 | MAX_FACILITY_BIT/8); | |
1da177e4 | 614 | eieio(); |
699ff13f | 615 | |
a93b8ec1 | 616 | while (sigp(cpu, sigp_restart) == sigp_busy) |
699ff13f | 617 | udelay(10); |
1da177e4 LT |
618 | |
619 | while (!cpu_online(cpu)) | |
620 | cpu_relax(); | |
621 | return 0; | |
d0d3cdf4 HC |
622 | |
623 | err_out: | |
624 | smp_free_lowcore(cpu); | |
625 | return -EIO; | |
1da177e4 LT |
626 | } |
627 | ||
48483b32 | 628 | static int __init setup_possible_cpus(char *s) |
255acee7 | 629 | { |
48483b32 | 630 | int pcpus, cpu; |
255acee7 | 631 | |
48483b32 | 632 | pcpus = simple_strtoul(s, NULL, 0); |
88e01285 HC |
633 | init_cpu_possible(cpumask_of(0)); |
634 | for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++) | |
def6cfb7 | 635 | set_cpu_possible(cpu, true); |
37a33026 HC |
636 | return 0; |
637 | } | |
638 | early_param("possible_cpus", setup_possible_cpus); | |
639 | ||
48483b32 HC |
640 | #ifdef CONFIG_HOTPLUG_CPU |
641 | ||
39ce010d | 642 | int __cpu_disable(void) |
1da177e4 | 643 | { |
94c12cc7 | 644 | struct ec_creg_mask_parms cr_parms; |
f3705136 | 645 | int cpu = smp_processor_id(); |
1da177e4 | 646 | |
0f1959f5 | 647 | set_cpu_online(cpu, false); |
1da177e4 | 648 | |
1da177e4 | 649 | /* Disable pfault pseudo page faults on this cpu. */ |
29b08d2b | 650 | pfault_fini(); |
1da177e4 | 651 | |
94c12cc7 MS |
652 | memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals)); |
653 | memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals)); | |
1da177e4 | 654 | |
94c12cc7 | 655 | /* disable all external interrupts */ |
1da177e4 | 656 | cr_parms.orvals[0] = 0; |
39ce010d HC |
657 | cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 | |
658 | 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4); | |
1da177e4 | 659 | /* disable all I/O interrupts */ |
1da177e4 | 660 | cr_parms.orvals[6] = 0; |
39ce010d HC |
661 | cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 | |
662 | 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24); | |
1da177e4 | 663 | /* disable most machine checks */ |
1da177e4 | 664 | cr_parms.orvals[14] = 0; |
39ce010d HC |
665 | cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 | |
666 | 1 << 25 | 1 << 24); | |
94c12cc7 | 667 | |
1da177e4 LT |
668 | smp_ctl_bit_callback(&cr_parms); |
669 | ||
1da177e4 LT |
670 | return 0; |
671 | } | |
672 | ||
39ce010d | 673 | void __cpu_die(unsigned int cpu) |
1da177e4 LT |
674 | { |
675 | /* Wait until target cpu is down */ | |
5c0b912e | 676 | while (!cpu_stopped(cpu)) |
1da177e4 | 677 | cpu_relax(); |
a93b8ec1 | 678 | while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy) |
4f8048ee | 679 | udelay(10); |
1cb6bb4b | 680 | smp_free_lowcore(cpu); |
050eef36 | 681 | atomic_dec(&init_mm.context.attach_count); |
1da177e4 LT |
682 | } |
683 | ||
b456d94a | 684 | void __noreturn cpu_die(void) |
1da177e4 LT |
685 | { |
686 | idle_task_exit(); | |
a93b8ec1 | 687 | while (sigp(smp_processor_id(), sigp_stop) == sigp_busy) |
f8501ba7 | 688 | cpu_relax(); |
39ce010d | 689 | for (;;); |
1da177e4 LT |
690 | } |
691 | ||
255acee7 HC |
692 | #endif /* CONFIG_HOTPLUG_CPU */ |
693 | ||
1da177e4 LT |
694 | void __init smp_prepare_cpus(unsigned int max_cpus) |
695 | { | |
591bb4f6 HC |
696 | #ifndef CONFIG_64BIT |
697 | unsigned long save_area = 0; | |
698 | #endif | |
699 | unsigned long async_stack, panic_stack; | |
700 | struct _lowcore *lowcore; | |
39ce010d | 701 | |
48483b32 HC |
702 | smp_detect_cpus(); |
703 | ||
39ce010d HC |
704 | /* request the 0x1201 emergency signal external interrupt */ |
705 | if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) | |
706 | panic("Couldn't request external interrupt 0x1201"); | |
1da177e4 | 707 | |
591bb4f6 | 708 | /* Reallocate current lowcore, but keep its contents. */ |
3fd26a77 | 709 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); |
591bb4f6 HC |
710 | panic_stack = __get_free_page(GFP_KERNEL); |
711 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
c742b31c | 712 | BUG_ON(!lowcore || !panic_stack || !async_stack); |
347a8dc3 | 713 | #ifndef CONFIG_64BIT |
77fa2245 | 714 | if (MACHINE_HAS_IEEE) |
591bb4f6 | 715 | save_area = get_zeroed_page(GFP_KERNEL); |
77fa2245 | 716 | #endif |
591bb4f6 HC |
717 | local_irq_disable(); |
718 | local_mcck_disable(); | |
719 | lowcore_ptr[smp_processor_id()] = lowcore; | |
720 | *lowcore = S390_lowcore; | |
721 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
722 | lowcore->async_stack = async_stack + ASYNC_SIZE; | |
723 | #ifndef CONFIG_64BIT | |
724 | if (MACHINE_HAS_IEEE) | |
725 | lowcore->extended_save_area_addr = (u32) save_area; | |
726 | #endif | |
727 | set_prefix((u32)(unsigned long) lowcore); | |
728 | local_mcck_enable(); | |
729 | local_irq_enable(); | |
3a6ba460 HC |
730 | #ifdef CONFIG_64BIT |
731 | if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore)) | |
732 | BUG(); | |
733 | #endif | |
1da177e4 LT |
734 | } |
735 | ||
ea1f4eec | 736 | void __init smp_prepare_boot_cpu(void) |
1da177e4 LT |
737 | { |
738 | BUG_ON(smp_processor_id() != 0); | |
739 | ||
48483b32 | 740 | current_thread_info()->cpu = 0; |
0f1959f5 KM |
741 | set_cpu_present(0, true); |
742 | set_cpu_online(0, true); | |
1da177e4 LT |
743 | S390_lowcore.percpu_offset = __per_cpu_offset[0]; |
744 | current_set[0] = current; | |
08d07968 | 745 | smp_cpu_state[0] = CPU_STATE_CONFIGURED; |
c10fde0d | 746 | smp_cpu_polarization[0] = POLARIZATION_UNKNWN; |
1da177e4 LT |
747 | } |
748 | ||
ea1f4eec | 749 | void __init smp_cpus_done(unsigned int max_cpus) |
1da177e4 | 750 | { |
1da177e4 LT |
751 | } |
752 | ||
02beaccc HC |
753 | void __init smp_setup_processor_id(void) |
754 | { | |
755 | S390_lowcore.cpu_nr = 0; | |
756 | __cpu_logical_map[0] = stap(); | |
757 | } | |
758 | ||
1da177e4 LT |
759 | /* |
760 | * the frequency of the profiling timer can be changed | |
761 | * by writing a multiplier value into /proc/profile. | |
762 | * | |
763 | * usually you want to run this on all CPUs ;) | |
764 | */ | |
765 | int setup_profiling_timer(unsigned int multiplier) | |
766 | { | |
39ce010d | 767 | return 0; |
1da177e4 LT |
768 | } |
769 | ||
08d07968 | 770 | #ifdef CONFIG_HOTPLUG_CPU |
4a0b2b4d AK |
771 | static ssize_t cpu_configure_show(struct sys_device *dev, |
772 | struct sysdev_attribute *attr, char *buf) | |
08d07968 HC |
773 | { |
774 | ssize_t count; | |
775 | ||
776 | mutex_lock(&smp_cpu_state_mutex); | |
777 | count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]); | |
778 | mutex_unlock(&smp_cpu_state_mutex); | |
779 | return count; | |
780 | } | |
781 | ||
4a0b2b4d AK |
782 | static ssize_t cpu_configure_store(struct sys_device *dev, |
783 | struct sysdev_attribute *attr, | |
784 | const char *buf, size_t count) | |
08d07968 HC |
785 | { |
786 | int cpu = dev->id; | |
787 | int val, rc; | |
788 | char delim; | |
789 | ||
790 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
791 | return -EINVAL; | |
792 | if (val != 0 && val != 1) | |
793 | return -EINVAL; | |
794 | ||
9d40d2e3 | 795 | get_online_cpus(); |
0b18d318 | 796 | mutex_lock(&smp_cpu_state_mutex); |
08d07968 | 797 | rc = -EBUSY; |
2c2df118 HC |
798 | /* disallow configuration changes of online cpus and cpu 0 */ |
799 | if (cpu_online(cpu) || cpu == 0) | |
08d07968 HC |
800 | goto out; |
801 | rc = 0; | |
802 | switch (val) { | |
803 | case 0: | |
804 | if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) { | |
805 | rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]); | |
c10fde0d | 806 | if (!rc) { |
08d07968 | 807 | smp_cpu_state[cpu] = CPU_STATE_STANDBY; |
c10fde0d HC |
808 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
809 | } | |
08d07968 HC |
810 | } |
811 | break; | |
812 | case 1: | |
813 | if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) { | |
814 | rc = sclp_cpu_configure(__cpu_logical_map[cpu]); | |
c10fde0d | 815 | if (!rc) { |
08d07968 | 816 | smp_cpu_state[cpu] = CPU_STATE_CONFIGURED; |
c10fde0d HC |
817 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
818 | } | |
08d07968 HC |
819 | } |
820 | break; | |
821 | default: | |
822 | break; | |
823 | } | |
824 | out: | |
08d07968 | 825 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 826 | put_online_cpus(); |
08d07968 HC |
827 | return rc ? rc : count; |
828 | } | |
829 | static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); | |
830 | #endif /* CONFIG_HOTPLUG_CPU */ | |
831 | ||
4a0b2b4d AK |
832 | static ssize_t cpu_polarization_show(struct sys_device *dev, |
833 | struct sysdev_attribute *attr, char *buf) | |
c10fde0d HC |
834 | { |
835 | int cpu = dev->id; | |
836 | ssize_t count; | |
837 | ||
838 | mutex_lock(&smp_cpu_state_mutex); | |
839 | switch (smp_cpu_polarization[cpu]) { | |
840 | case POLARIZATION_HRZ: | |
841 | count = sprintf(buf, "horizontal\n"); | |
842 | break; | |
843 | case POLARIZATION_VL: | |
844 | count = sprintf(buf, "vertical:low\n"); | |
845 | break; | |
846 | case POLARIZATION_VM: | |
847 | count = sprintf(buf, "vertical:medium\n"); | |
848 | break; | |
849 | case POLARIZATION_VH: | |
850 | count = sprintf(buf, "vertical:high\n"); | |
851 | break; | |
852 | default: | |
853 | count = sprintf(buf, "unknown\n"); | |
854 | break; | |
855 | } | |
856 | mutex_unlock(&smp_cpu_state_mutex); | |
857 | return count; | |
858 | } | |
859 | static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL); | |
860 | ||
4a0b2b4d AK |
861 | static ssize_t show_cpu_address(struct sys_device *dev, |
862 | struct sysdev_attribute *attr, char *buf) | |
08d07968 HC |
863 | { |
864 | return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]); | |
865 | } | |
866 | static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL); | |
867 | ||
868 | ||
869 | static struct attribute *cpu_common_attrs[] = { | |
870 | #ifdef CONFIG_HOTPLUG_CPU | |
871 | &attr_configure.attr, | |
872 | #endif | |
873 | &attr_address.attr, | |
c10fde0d | 874 | &attr_polarization.attr, |
08d07968 HC |
875 | NULL, |
876 | }; | |
877 | ||
878 | static struct attribute_group cpu_common_attr_group = { | |
879 | .attrs = cpu_common_attrs, | |
880 | }; | |
1da177e4 | 881 | |
4a0b2b4d AK |
882 | static ssize_t show_capability(struct sys_device *dev, |
883 | struct sysdev_attribute *attr, char *buf) | |
2fc2d1e9 HC |
884 | { |
885 | unsigned int capability; | |
886 | int rc; | |
887 | ||
888 | rc = get_cpu_capability(&capability); | |
889 | if (rc) | |
890 | return rc; | |
891 | return sprintf(buf, "%u\n", capability); | |
892 | } | |
893 | static SYSDEV_ATTR(capability, 0444, show_capability, NULL); | |
894 | ||
4a0b2b4d AK |
895 | static ssize_t show_idle_count(struct sys_device *dev, |
896 | struct sysdev_attribute *attr, char *buf) | |
fae8b22d HC |
897 | { |
898 | struct s390_idle_data *idle; | |
899 | unsigned long long idle_count; | |
e98bbaaf | 900 | unsigned int sequence; |
fae8b22d HC |
901 | |
902 | idle = &per_cpu(s390_idle, dev->id); | |
e98bbaaf MS |
903 | repeat: |
904 | sequence = idle->sequence; | |
905 | smp_rmb(); | |
906 | if (sequence & 1) | |
907 | goto repeat; | |
fae8b22d | 908 | idle_count = idle->idle_count; |
6f430924 MS |
909 | if (idle->idle_enter) |
910 | idle_count++; | |
e98bbaaf MS |
911 | smp_rmb(); |
912 | if (idle->sequence != sequence) | |
913 | goto repeat; | |
fae8b22d HC |
914 | return sprintf(buf, "%llu\n", idle_count); |
915 | } | |
916 | static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL); | |
917 | ||
4a0b2b4d AK |
918 | static ssize_t show_idle_time(struct sys_device *dev, |
919 | struct sysdev_attribute *attr, char *buf) | |
fae8b22d HC |
920 | { |
921 | struct s390_idle_data *idle; | |
6f430924 | 922 | unsigned long long now, idle_time, idle_enter; |
e98bbaaf | 923 | unsigned int sequence; |
fae8b22d HC |
924 | |
925 | idle = &per_cpu(s390_idle, dev->id); | |
6f430924 | 926 | now = get_clock(); |
e98bbaaf MS |
927 | repeat: |
928 | sequence = idle->sequence; | |
929 | smp_rmb(); | |
930 | if (sequence & 1) | |
931 | goto repeat; | |
6f430924 MS |
932 | idle_time = idle->idle_time; |
933 | idle_enter = idle->idle_enter; | |
934 | if (idle_enter != 0ULL && idle_enter < now) | |
935 | idle_time += now - idle_enter; | |
e98bbaaf MS |
936 | smp_rmb(); |
937 | if (idle->sequence != sequence) | |
938 | goto repeat; | |
6f430924 | 939 | return sprintf(buf, "%llu\n", idle_time >> 12); |
fae8b22d | 940 | } |
69d39d66 | 941 | static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL); |
fae8b22d | 942 | |
08d07968 | 943 | static struct attribute *cpu_online_attrs[] = { |
fae8b22d HC |
944 | &attr_capability.attr, |
945 | &attr_idle_count.attr, | |
69d39d66 | 946 | &attr_idle_time_us.attr, |
fae8b22d HC |
947 | NULL, |
948 | }; | |
949 | ||
08d07968 HC |
950 | static struct attribute_group cpu_online_attr_group = { |
951 | .attrs = cpu_online_attrs, | |
fae8b22d HC |
952 | }; |
953 | ||
2fc2d1e9 HC |
954 | static int __cpuinit smp_cpu_notify(struct notifier_block *self, |
955 | unsigned long action, void *hcpu) | |
956 | { | |
957 | unsigned int cpu = (unsigned int)(long)hcpu; | |
958 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
959 | struct sys_device *s = &c->sysdev; | |
fae8b22d | 960 | struct s390_idle_data *idle; |
d882ba69 | 961 | int err = 0; |
2fc2d1e9 HC |
962 | |
963 | switch (action) { | |
964 | case CPU_ONLINE: | |
8bb78442 | 965 | case CPU_ONLINE_FROZEN: |
fae8b22d | 966 | idle = &per_cpu(s390_idle, cpu); |
e98bbaaf | 967 | memset(idle, 0, sizeof(struct s390_idle_data)); |
d882ba69 | 968 | err = sysfs_create_group(&s->kobj, &cpu_online_attr_group); |
2fc2d1e9 HC |
969 | break; |
970 | case CPU_DEAD: | |
8bb78442 | 971 | case CPU_DEAD_FROZEN: |
08d07968 | 972 | sysfs_remove_group(&s->kobj, &cpu_online_attr_group); |
2fc2d1e9 HC |
973 | break; |
974 | } | |
d882ba69 | 975 | return notifier_from_errno(err); |
2fc2d1e9 HC |
976 | } |
977 | ||
978 | static struct notifier_block __cpuinitdata smp_cpu_nb = { | |
39ce010d | 979 | .notifier_call = smp_cpu_notify, |
2fc2d1e9 HC |
980 | }; |
981 | ||
2bc89b5e | 982 | static int __devinit smp_add_present_cpu(int cpu) |
08d07968 HC |
983 | { |
984 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
985 | struct sys_device *s = &c->sysdev; | |
986 | int rc; | |
987 | ||
988 | c->hotpluggable = 1; | |
989 | rc = register_cpu(c, cpu); | |
990 | if (rc) | |
991 | goto out; | |
992 | rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); | |
993 | if (rc) | |
994 | goto out_cpu; | |
995 | if (!cpu_online(cpu)) | |
996 | goto out; | |
997 | rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group); | |
998 | if (!rc) | |
999 | return 0; | |
1000 | sysfs_remove_group(&s->kobj, &cpu_common_attr_group); | |
1001 | out_cpu: | |
1002 | #ifdef CONFIG_HOTPLUG_CPU | |
1003 | unregister_cpu(c); | |
1004 | #endif | |
1005 | out: | |
1006 | return rc; | |
1007 | } | |
1008 | ||
1009 | #ifdef CONFIG_HOTPLUG_CPU | |
1e489518 | 1010 | |
67060d9c | 1011 | int __ref smp_rescan_cpus(void) |
08d07968 HC |
1012 | { |
1013 | cpumask_t newcpus; | |
1014 | int cpu; | |
1015 | int rc; | |
1016 | ||
9d40d2e3 | 1017 | get_online_cpus(); |
0b18d318 | 1018 | mutex_lock(&smp_cpu_state_mutex); |
0f1959f5 | 1019 | cpumask_copy(&newcpus, cpu_present_mask); |
1e489518 | 1020 | rc = __smp_rescan_cpus(); |
08d07968 HC |
1021 | if (rc) |
1022 | goto out; | |
0f1959f5 KM |
1023 | cpumask_andnot(&newcpus, cpu_present_mask, &newcpus); |
1024 | for_each_cpu(cpu, &newcpus) { | |
08d07968 HC |
1025 | rc = smp_add_present_cpu(cpu); |
1026 | if (rc) | |
0f1959f5 | 1027 | set_cpu_present(cpu, false); |
08d07968 HC |
1028 | } |
1029 | rc = 0; | |
1030 | out: | |
08d07968 | 1031 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 1032 | put_online_cpus(); |
0f1959f5 | 1033 | if (!cpumask_empty(&newcpus)) |
c10fde0d | 1034 | topology_schedule_update(); |
1e489518 HC |
1035 | return rc; |
1036 | } | |
1037 | ||
c9be0a36 AK |
1038 | static ssize_t __ref rescan_store(struct sysdev_class *class, |
1039 | struct sysdev_class_attribute *attr, | |
1040 | const char *buf, | |
1e489518 HC |
1041 | size_t count) |
1042 | { | |
1043 | int rc; | |
1044 | ||
1045 | rc = smp_rescan_cpus(); | |
08d07968 HC |
1046 | return rc ? rc : count; |
1047 | } | |
da5aae70 | 1048 | static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store); |
08d07968 HC |
1049 | #endif /* CONFIG_HOTPLUG_CPU */ |
1050 | ||
5fbcae57 HC |
1051 | static ssize_t dispatching_show(struct sysdev_class *class, |
1052 | struct sysdev_class_attribute *attr, | |
1053 | char *buf) | |
c10fde0d HC |
1054 | { |
1055 | ssize_t count; | |
1056 | ||
1057 | mutex_lock(&smp_cpu_state_mutex); | |
1058 | count = sprintf(buf, "%d\n", cpu_management); | |
1059 | mutex_unlock(&smp_cpu_state_mutex); | |
1060 | return count; | |
1061 | } | |
1062 | ||
c9be0a36 AK |
1063 | static ssize_t dispatching_store(struct sysdev_class *dev, |
1064 | struct sysdev_class_attribute *attr, | |
1065 | const char *buf, | |
da5aae70 | 1066 | size_t count) |
c10fde0d HC |
1067 | { |
1068 | int val, rc; | |
1069 | char delim; | |
1070 | ||
1071 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
1072 | return -EINVAL; | |
1073 | if (val != 0 && val != 1) | |
1074 | return -EINVAL; | |
1075 | rc = 0; | |
c10fde0d | 1076 | get_online_cpus(); |
0b18d318 | 1077 | mutex_lock(&smp_cpu_state_mutex); |
c10fde0d HC |
1078 | if (cpu_management == val) |
1079 | goto out; | |
1080 | rc = topology_set_cpu_management(val); | |
1081 | if (!rc) | |
1082 | cpu_management = val; | |
1083 | out: | |
c10fde0d | 1084 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 1085 | put_online_cpus(); |
c10fde0d HC |
1086 | return rc ? rc : count; |
1087 | } | |
da5aae70 HC |
1088 | static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show, |
1089 | dispatching_store); | |
c10fde0d | 1090 | |
1da177e4 LT |
1091 | static int __init topology_init(void) |
1092 | { | |
1093 | int cpu; | |
fae8b22d | 1094 | int rc; |
2fc2d1e9 HC |
1095 | |
1096 | register_cpu_notifier(&smp_cpu_nb); | |
1da177e4 | 1097 | |
08d07968 | 1098 | #ifdef CONFIG_HOTPLUG_CPU |
da5aae70 | 1099 | rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan); |
08d07968 HC |
1100 | if (rc) |
1101 | return rc; | |
1102 | #endif | |
da5aae70 | 1103 | rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching); |
c10fde0d HC |
1104 | if (rc) |
1105 | return rc; | |
08d07968 HC |
1106 | for_each_present_cpu(cpu) { |
1107 | rc = smp_add_present_cpu(cpu); | |
fae8b22d HC |
1108 | if (rc) |
1109 | return rc; | |
1da177e4 LT |
1110 | } |
1111 | return 0; | |
1112 | } | |
1da177e4 | 1113 | subsys_initcall(topology_init); |