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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/smp.c | |
3 | * | |
255acee7 | 4 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 LT |
5 | * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), |
6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
7 | * Heiko Carstens (heiko.carstens@de.ibm.com) | |
8 | * | |
9 | * based on other smp stuff by | |
10 | * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> | |
11 | * (c) 1998 Ingo Molnar | |
12 | * | |
13 | * We work with logical cpu numbering everywhere we can. The only | |
14 | * functions using the real cpu address (got from STAP) are the sigp | |
15 | * functions. For all other functions we use the identity mapping. | |
16 | * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is | |
17 | * used e.g. to find the idle task belonging to a logical cpu. Every array | |
18 | * in the kernel is sorted by the logical cpu number and not by the physical | |
19 | * one which is causing all the confusion with __cpu_logical_map and | |
20 | * cpu_number_map in other architectures. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/init.h> | |
1da177e4 LT |
25 | #include <linux/mm.h> |
26 | #include <linux/spinlock.h> | |
27 | #include <linux/kernel_stat.h> | |
28 | #include <linux/smp_lock.h> | |
1da177e4 LT |
29 | #include <linux/delay.h> |
30 | #include <linux/cache.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/cpu.h> | |
2b67fc46 | 33 | #include <linux/timex.h> |
411ed322 | 34 | #include <linux/bootmem.h> |
46b05d26 | 35 | #include <asm/ipl.h> |
2b67fc46 | 36 | #include <asm/setup.h> |
1da177e4 LT |
37 | #include <asm/sigp.h> |
38 | #include <asm/pgalloc.h> | |
39 | #include <asm/irq.h> | |
40 | #include <asm/s390_ext.h> | |
41 | #include <asm/cpcmd.h> | |
42 | #include <asm/tlbflush.h> | |
2b67fc46 | 43 | #include <asm/timer.h> |
411ed322 | 44 | #include <asm/lowcore.h> |
1da177e4 | 45 | |
1da177e4 LT |
46 | extern volatile int __cpu_logical_map[]; |
47 | ||
48 | /* | |
49 | * An array with a pointer the lowcore of every CPU. | |
50 | */ | |
51 | ||
52 | struct _lowcore *lowcore_ptr[NR_CPUS]; | |
53 | ||
255acee7 HC |
54 | cpumask_t cpu_online_map = CPU_MASK_NONE; |
55 | cpumask_t cpu_possible_map = CPU_MASK_NONE; | |
1da177e4 LT |
56 | |
57 | static struct task_struct *current_set[NR_CPUS]; | |
58 | ||
1da177e4 | 59 | static void smp_ext_bitcall(int, ec_bit_sig); |
1da177e4 LT |
60 | |
61 | /* | |
63db6e8d JG |
62 | * Structure and data for __smp_call_function_map(). This is designed to |
63 | * minimise static memory requirements. It also looks cleaner. | |
1da177e4 LT |
64 | */ |
65 | static DEFINE_SPINLOCK(call_lock); | |
66 | ||
67 | struct call_data_struct { | |
68 | void (*func) (void *info); | |
69 | void *info; | |
63db6e8d JG |
70 | cpumask_t started; |
71 | cpumask_t finished; | |
1da177e4 LT |
72 | int wait; |
73 | }; | |
74 | ||
75 | static struct call_data_struct * call_data; | |
76 | ||
77 | /* | |
78 | * 'Call function' interrupt callback | |
79 | */ | |
80 | static void do_call_function(void) | |
81 | { | |
82 | void (*func) (void *info) = call_data->func; | |
83 | void *info = call_data->info; | |
84 | int wait = call_data->wait; | |
85 | ||
63db6e8d | 86 | cpu_set(smp_processor_id(), call_data->started); |
1da177e4 LT |
87 | (*func)(info); |
88 | if (wait) | |
63db6e8d | 89 | cpu_set(smp_processor_id(), call_data->finished);; |
1da177e4 LT |
90 | } |
91 | ||
63db6e8d JG |
92 | static void __smp_call_function_map(void (*func) (void *info), void *info, |
93 | int nonatomic, int wait, cpumask_t map) | |
1da177e4 LT |
94 | { |
95 | struct call_data_struct data; | |
63db6e8d | 96 | int cpu, local = 0; |
1da177e4 | 97 | |
63db6e8d | 98 | /* |
25864162 | 99 | * Can deadlock when interrupts are disabled or if in wrong context. |
63db6e8d | 100 | */ |
25864162 | 101 | WARN_ON(irqs_disabled() || in_irq()); |
1da177e4 | 102 | |
63db6e8d JG |
103 | /* |
104 | * Check for local function call. We have to have the same call order | |
105 | * as in on_each_cpu() because of machine_restart_smp(). | |
106 | */ | |
107 | if (cpu_isset(smp_processor_id(), map)) { | |
108 | local = 1; | |
109 | cpu_clear(smp_processor_id(), map); | |
110 | } | |
111 | ||
112 | cpus_and(map, map, cpu_online_map); | |
113 | if (cpus_empty(map)) | |
114 | goto out; | |
1da177e4 LT |
115 | |
116 | data.func = func; | |
117 | data.info = info; | |
63db6e8d | 118 | data.started = CPU_MASK_NONE; |
1da177e4 LT |
119 | data.wait = wait; |
120 | if (wait) | |
63db6e8d | 121 | data.finished = CPU_MASK_NONE; |
1da177e4 | 122 | |
0ec67667 | 123 | spin_lock_bh(&call_lock); |
1da177e4 | 124 | call_data = &data; |
63db6e8d JG |
125 | |
126 | for_each_cpu_mask(cpu, map) | |
127 | smp_ext_bitcall(cpu, ec_call_function); | |
1da177e4 LT |
128 | |
129 | /* Wait for response */ | |
63db6e8d | 130 | while (!cpus_equal(map, data.started)) |
1da177e4 LT |
131 | cpu_relax(); |
132 | ||
133 | if (wait) | |
63db6e8d | 134 | while (!cpus_equal(map, data.finished)) |
1da177e4 | 135 | cpu_relax(); |
63db6e8d | 136 | |
0ec67667 | 137 | spin_unlock_bh(&call_lock); |
1da177e4 | 138 | |
63db6e8d JG |
139 | out: |
140 | local_irq_disable(); | |
141 | if (local) | |
142 | func(info); | |
143 | local_irq_enable(); | |
1da177e4 LT |
144 | } |
145 | ||
146 | /* | |
63db6e8d JG |
147 | * smp_call_function: |
148 | * @func: the function to run; this must be fast and non-blocking | |
149 | * @info: an arbitrary pointer to pass to the function | |
150 | * @nonatomic: unused | |
151 | * @wait: if true, wait (atomically) until function has completed on other CPUs | |
1da177e4 | 152 | * |
63db6e8d | 153 | * Run a function on all other CPUs. |
1da177e4 | 154 | * |
63db6e8d | 155 | * You must not call this function with disabled interrupts or from a |
25864162 | 156 | * hardware interrupt handler. You may call it from a bottom half. |
1da177e4 | 157 | */ |
63db6e8d JG |
158 | int smp_call_function(void (*func) (void *info), void *info, int nonatomic, |
159 | int wait) | |
1da177e4 | 160 | { |
63db6e8d | 161 | cpumask_t map; |
1da177e4 | 162 | |
25864162 | 163 | preempt_disable(); |
63db6e8d JG |
164 | map = cpu_online_map; |
165 | cpu_clear(smp_processor_id(), map); | |
166 | __smp_call_function_map(func, info, nonatomic, wait, map); | |
25864162 | 167 | preempt_enable(); |
63db6e8d JG |
168 | return 0; |
169 | } | |
170 | EXPORT_SYMBOL(smp_call_function); | |
1da177e4 | 171 | |
63db6e8d JG |
172 | /* |
173 | * smp_call_function_on: | |
174 | * @func: the function to run; this must be fast and non-blocking | |
175 | * @info: an arbitrary pointer to pass to the function | |
176 | * @nonatomic: unused | |
177 | * @wait: if true, wait (atomically) until function has completed on other CPUs | |
178 | * @cpu: the CPU where func should run | |
179 | * | |
180 | * Run a function on one processor. | |
181 | * | |
182 | * You must not call this function with disabled interrupts or from a | |
25864162 | 183 | * hardware interrupt handler. You may call it from a bottom half. |
63db6e8d JG |
184 | */ |
185 | int smp_call_function_on(void (*func) (void *info), void *info, int nonatomic, | |
186 | int wait, int cpu) | |
187 | { | |
188 | cpumask_t map = CPU_MASK_NONE; | |
1da177e4 | 189 | |
25864162 | 190 | preempt_disable(); |
63db6e8d JG |
191 | cpu_set(cpu, map); |
192 | __smp_call_function_map(func, info, nonatomic, wait, map); | |
25864162 | 193 | preempt_enable(); |
1da177e4 LT |
194 | return 0; |
195 | } | |
196 | EXPORT_SYMBOL(smp_call_function_on); | |
197 | ||
4d284cac | 198 | static void do_send_stop(void) |
1da177e4 LT |
199 | { |
200 | int cpu, rc; | |
201 | ||
202 | /* stop all processors */ | |
203 | for_each_online_cpu(cpu) { | |
204 | if (cpu == smp_processor_id()) | |
205 | continue; | |
206 | do { | |
207 | rc = signal_processor(cpu, sigp_stop); | |
208 | } while (rc == sigp_busy); | |
209 | } | |
210 | } | |
211 | ||
4d284cac | 212 | static void do_store_status(void) |
1da177e4 LT |
213 | { |
214 | int cpu, rc; | |
215 | ||
216 | /* store status of all processors in their lowcores (real 0) */ | |
217 | for_each_online_cpu(cpu) { | |
218 | if (cpu == smp_processor_id()) | |
219 | continue; | |
220 | do { | |
221 | rc = signal_processor_p( | |
222 | (__u32)(unsigned long) lowcore_ptr[cpu], cpu, | |
223 | sigp_store_status_at_address); | |
224 | } while(rc == sigp_busy); | |
225 | } | |
226 | } | |
227 | ||
4d284cac | 228 | static void do_wait_for_stop(void) |
c6b5b847 HC |
229 | { |
230 | int cpu; | |
231 | ||
232 | /* Wait for all other cpus to enter stopped state */ | |
233 | for_each_online_cpu(cpu) { | |
234 | if (cpu == smp_processor_id()) | |
235 | continue; | |
236 | while(!smp_cpu_not_running(cpu)) | |
237 | cpu_relax(); | |
238 | } | |
239 | } | |
240 | ||
1da177e4 LT |
241 | /* |
242 | * this function sends a 'stop' sigp to all other CPUs in the system. | |
243 | * it goes straight through. | |
244 | */ | |
245 | void smp_send_stop(void) | |
246 | { | |
c6b5b847 | 247 | /* Disable all interrupts/machine checks */ |
c1821c2e | 248 | __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); |
c6b5b847 | 249 | |
1da177e4 LT |
250 | /* write magic number to zero page (absolute 0) */ |
251 | lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC; | |
252 | ||
253 | /* stop other processors. */ | |
254 | do_send_stop(); | |
255 | ||
c6b5b847 HC |
256 | /* wait until other processors are stopped */ |
257 | do_wait_for_stop(); | |
258 | ||
1da177e4 LT |
259 | /* store status of other processors. */ |
260 | do_store_status(); | |
261 | } | |
262 | ||
263 | /* | |
264 | * Reboot, halt and power_off routines for SMP. | |
265 | */ | |
266 | ||
1da177e4 LT |
267 | void machine_restart_smp(char * __unused) |
268 | { | |
c6b5b847 HC |
269 | smp_send_stop(); |
270 | do_reipl(); | |
1da177e4 LT |
271 | } |
272 | ||
273 | void machine_halt_smp(void) | |
274 | { | |
c6b5b847 HC |
275 | smp_send_stop(); |
276 | if (MACHINE_IS_VM && strlen(vmhalt_cmd) > 0) | |
277 | __cpcmd(vmhalt_cmd, NULL, 0, NULL); | |
278 | signal_processor(smp_processor_id(), sigp_stop_and_store_status); | |
279 | for (;;); | |
1da177e4 LT |
280 | } |
281 | ||
282 | void machine_power_off_smp(void) | |
283 | { | |
c6b5b847 HC |
284 | smp_send_stop(); |
285 | if (MACHINE_IS_VM && strlen(vmpoff_cmd) > 0) | |
286 | __cpcmd(vmpoff_cmd, NULL, 0, NULL); | |
287 | signal_processor(smp_processor_id(), sigp_stop_and_store_status); | |
288 | for (;;); | |
1da177e4 LT |
289 | } |
290 | ||
291 | /* | |
292 | * This is the main routine where commands issued by other | |
293 | * cpus are handled. | |
294 | */ | |
295 | ||
2b67fc46 | 296 | static void do_ext_call_interrupt(__u16 code) |
1da177e4 LT |
297 | { |
298 | unsigned long bits; | |
299 | ||
300 | /* | |
301 | * handle bit signal external calls | |
302 | * | |
303 | * For the ec_schedule signal we have to do nothing. All the work | |
304 | * is done automatically when we return from the interrupt. | |
305 | */ | |
306 | bits = xchg(&S390_lowcore.ext_call_fast, 0); | |
307 | ||
308 | if (test_bit(ec_call_function, &bits)) | |
309 | do_call_function(); | |
310 | } | |
311 | ||
312 | /* | |
313 | * Send an external call sigp to another cpu and return without waiting | |
314 | * for its completion. | |
315 | */ | |
316 | static void smp_ext_bitcall(int cpu, ec_bit_sig sig) | |
317 | { | |
318 | /* | |
319 | * Set signaling bit in lowcore of target cpu and kick it | |
320 | */ | |
321 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); | |
99b2d8df | 322 | while(signal_processor(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
323 | udelay(10); |
324 | } | |
325 | ||
347a8dc3 | 326 | #ifndef CONFIG_64BIT |
1da177e4 LT |
327 | /* |
328 | * this function sends a 'purge tlb' signal to another CPU. | |
329 | */ | |
330 | void smp_ptlb_callback(void *info) | |
331 | { | |
332 | local_flush_tlb(); | |
333 | } | |
334 | ||
335 | void smp_ptlb_all(void) | |
336 | { | |
337 | on_each_cpu(smp_ptlb_callback, NULL, 0, 1); | |
338 | } | |
339 | EXPORT_SYMBOL(smp_ptlb_all); | |
347a8dc3 | 340 | #endif /* ! CONFIG_64BIT */ |
1da177e4 LT |
341 | |
342 | /* | |
343 | * this function sends a 'reschedule' IPI to another CPU. | |
344 | * it goes straight through and wastes no time serializing | |
345 | * anything. Worst case is that we lose a reschedule ... | |
346 | */ | |
347 | void smp_send_reschedule(int cpu) | |
348 | { | |
349 | smp_ext_bitcall(cpu, ec_schedule); | |
350 | } | |
351 | ||
352 | /* | |
353 | * parameter area for the set/clear control bit callbacks | |
354 | */ | |
94c12cc7 | 355 | struct ec_creg_mask_parms { |
1da177e4 LT |
356 | unsigned long orvals[16]; |
357 | unsigned long andvals[16]; | |
94c12cc7 | 358 | }; |
1da177e4 LT |
359 | |
360 | /* | |
361 | * callback for setting/clearing control bits | |
362 | */ | |
2b67fc46 | 363 | static void smp_ctl_bit_callback(void *info) { |
94c12cc7 | 364 | struct ec_creg_mask_parms *pp = info; |
1da177e4 LT |
365 | unsigned long cregs[16]; |
366 | int i; | |
367 | ||
94c12cc7 MS |
368 | __ctl_store(cregs, 0, 15); |
369 | for (i = 0; i <= 15; i++) | |
1da177e4 | 370 | cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i]; |
94c12cc7 | 371 | __ctl_load(cregs, 0, 15); |
1da177e4 LT |
372 | } |
373 | ||
374 | /* | |
375 | * Set a bit in a control register of all cpus | |
376 | */ | |
94c12cc7 MS |
377 | void smp_ctl_set_bit(int cr, int bit) |
378 | { | |
379 | struct ec_creg_mask_parms parms; | |
1da177e4 | 380 | |
94c12cc7 MS |
381 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
382 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 383 | parms.orvals[cr] = 1 << bit; |
94c12cc7 | 384 | on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); |
1da177e4 LT |
385 | } |
386 | ||
387 | /* | |
388 | * Clear a bit in a control register of all cpus | |
389 | */ | |
94c12cc7 MS |
390 | void smp_ctl_clear_bit(int cr, int bit) |
391 | { | |
392 | struct ec_creg_mask_parms parms; | |
1da177e4 | 393 | |
94c12cc7 MS |
394 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
395 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 396 | parms.andvals[cr] = ~(1L << bit); |
94c12cc7 | 397 | on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); |
1da177e4 LT |
398 | } |
399 | ||
411ed322 MH |
400 | #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) |
401 | ||
402 | /* | |
403 | * zfcpdump_prefix_array holds prefix registers for the following scenario: | |
404 | * 64 bit zfcpdump kernel and 31 bit kernel which is to be dumped. We have to | |
405 | * save its prefix registers, since they get lost, when switching from 31 bit | |
406 | * to 64 bit. | |
407 | */ | |
408 | unsigned int zfcpdump_prefix_array[NR_CPUS + 1] \ | |
409 | __attribute__((__section__(".data"))); | |
410 | ||
411 | static void __init smp_get_save_areas(void) | |
412 | { | |
413 | unsigned int cpu, cpu_num, rc; | |
414 | __u16 boot_cpu_addr; | |
415 | ||
416 | if (ipl_info.type != IPL_TYPE_FCP_DUMP) | |
417 | return; | |
418 | boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr; | |
419 | cpu_num = 1; | |
420 | for (cpu = 0; cpu <= 65535; cpu++) { | |
421 | if ((u16) cpu == boot_cpu_addr) | |
422 | continue; | |
423 | __cpu_logical_map[1] = (__u16) cpu; | |
424 | if (signal_processor(1, sigp_sense) == sigp_not_operational) | |
425 | continue; | |
426 | if (cpu_num >= NR_CPUS) { | |
427 | printk("WARNING: Registers for cpu %i are not " | |
428 | "saved, since dump kernel was compiled with" | |
429 | "NR_CPUS=%i!\n", cpu_num, NR_CPUS); | |
430 | continue; | |
431 | } | |
432 | zfcpdump_save_areas[cpu_num] = | |
433 | alloc_bootmem(sizeof(union save_area)); | |
434 | while (1) { | |
435 | rc = signal_processor(1, sigp_stop_and_store_status); | |
436 | if (rc != sigp_busy) | |
437 | break; | |
438 | cpu_relax(); | |
439 | } | |
440 | memcpy(zfcpdump_save_areas[cpu_num], | |
441 | (void *)(unsigned long) store_prefix() + | |
442 | SAVE_AREA_BASE, SAVE_AREA_SIZE); | |
443 | #ifdef __s390x__ | |
444 | /* copy original prefix register */ | |
445 | zfcpdump_save_areas[cpu_num]->s390x.pref_reg = | |
446 | zfcpdump_prefix_array[cpu_num]; | |
447 | #endif | |
448 | cpu_num++; | |
449 | } | |
450 | } | |
451 | ||
452 | union save_area *zfcpdump_save_areas[NR_CPUS + 1]; | |
453 | EXPORT_SYMBOL_GPL(zfcpdump_save_areas); | |
454 | ||
455 | #else | |
456 | #define smp_get_save_areas() do { } while (0) | |
457 | #endif | |
458 | ||
1da177e4 LT |
459 | /* |
460 | * Lets check how many CPUs we have. | |
461 | */ | |
462 | ||
255acee7 HC |
463 | static unsigned int |
464 | __init smp_count_cpus(void) | |
1da177e4 | 465 | { |
255acee7 | 466 | unsigned int cpu, num_cpus; |
1da177e4 LT |
467 | __u16 boot_cpu_addr; |
468 | ||
469 | /* | |
470 | * cpu 0 is the boot cpu. See smp_prepare_boot_cpu. | |
471 | */ | |
472 | ||
473 | boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr; | |
474 | current_thread_info()->cpu = 0; | |
475 | num_cpus = 1; | |
255acee7 | 476 | for (cpu = 0; cpu <= 65535; cpu++) { |
1da177e4 LT |
477 | if ((__u16) cpu == boot_cpu_addr) |
478 | continue; | |
255acee7 HC |
479 | __cpu_logical_map[1] = (__u16) cpu; |
480 | if (signal_processor(1, sigp_sense) == | |
1da177e4 LT |
481 | sigp_not_operational) |
482 | continue; | |
1da177e4 LT |
483 | num_cpus++; |
484 | } | |
485 | ||
1da177e4 LT |
486 | printk("Detected %d CPU's\n",(int) num_cpus); |
487 | printk("Boot cpu address %2X\n", boot_cpu_addr); | |
255acee7 HC |
488 | |
489 | return num_cpus; | |
1da177e4 LT |
490 | } |
491 | ||
492 | /* | |
493 | * Activate a secondary processor. | |
494 | */ | |
1da177e4 LT |
495 | int __devinit start_secondary(void *cpuvoid) |
496 | { | |
497 | /* Setup the cpu */ | |
498 | cpu_init(); | |
5bfb5d69 | 499 | preempt_disable(); |
d54853ef | 500 | /* Enable TOD clock interrupts on the secondary cpu. */ |
1da177e4 LT |
501 | init_cpu_timer(); |
502 | #ifdef CONFIG_VIRT_TIMER | |
d54853ef | 503 | /* Enable cpu timer interrupts on the secondary cpu. */ |
1da177e4 LT |
504 | init_cpu_vtimer(); |
505 | #endif | |
1da177e4 | 506 | /* Enable pfault pseudo page faults on this cpu. */ |
29b08d2b HC |
507 | pfault_init(); |
508 | ||
1da177e4 LT |
509 | /* Mark this cpu as online */ |
510 | cpu_set(smp_processor_id(), cpu_online_map); | |
511 | /* Switch on interrupts */ | |
512 | local_irq_enable(); | |
513 | /* Print info about this processor */ | |
514 | print_cpu_info(&S390_lowcore.cpu_data); | |
515 | /* cpu_idle will call schedule for us */ | |
516 | cpu_idle(); | |
517 | return 0; | |
518 | } | |
519 | ||
520 | static void __init smp_create_idle(unsigned int cpu) | |
521 | { | |
522 | struct task_struct *p; | |
523 | ||
524 | /* | |
525 | * don't care about the psw and regs settings since we'll never | |
526 | * reschedule the forked task. | |
527 | */ | |
528 | p = fork_idle(cpu); | |
529 | if (IS_ERR(p)) | |
530 | panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p)); | |
531 | current_set[cpu] = p; | |
532 | } | |
533 | ||
534 | /* Reserving and releasing of CPUs */ | |
535 | ||
536 | static DEFINE_SPINLOCK(smp_reserve_lock); | |
537 | static int smp_cpu_reserved[NR_CPUS]; | |
538 | ||
539 | int | |
540 | smp_get_cpu(cpumask_t cpu_mask) | |
541 | { | |
542 | unsigned long flags; | |
543 | int cpu; | |
544 | ||
545 | spin_lock_irqsave(&smp_reserve_lock, flags); | |
546 | /* Try to find an already reserved cpu. */ | |
547 | for_each_cpu_mask(cpu, cpu_mask) { | |
548 | if (smp_cpu_reserved[cpu] != 0) { | |
549 | smp_cpu_reserved[cpu]++; | |
550 | /* Found one. */ | |
551 | goto out; | |
552 | } | |
553 | } | |
554 | /* Reserve a new cpu from cpu_mask. */ | |
555 | for_each_cpu_mask(cpu, cpu_mask) { | |
556 | if (cpu_online(cpu)) { | |
557 | smp_cpu_reserved[cpu]++; | |
558 | goto out; | |
559 | } | |
560 | } | |
561 | cpu = -ENODEV; | |
562 | out: | |
563 | spin_unlock_irqrestore(&smp_reserve_lock, flags); | |
564 | return cpu; | |
565 | } | |
566 | ||
567 | void | |
568 | smp_put_cpu(int cpu) | |
569 | { | |
570 | unsigned long flags; | |
571 | ||
572 | spin_lock_irqsave(&smp_reserve_lock, flags); | |
573 | smp_cpu_reserved[cpu]--; | |
574 | spin_unlock_irqrestore(&smp_reserve_lock, flags); | |
575 | } | |
576 | ||
4d284cac | 577 | static int |
1da177e4 LT |
578 | cpu_stopped(int cpu) |
579 | { | |
580 | __u32 status; | |
581 | ||
582 | /* Check for stopped state */ | |
583 | if (signal_processor_ps(&status, 0, cpu, sigp_sense) == sigp_status_stored) { | |
584 | if (status & 0x40) | |
585 | return 1; | |
586 | } | |
587 | return 0; | |
588 | } | |
589 | ||
590 | /* Upping and downing of CPUs */ | |
591 | ||
592 | int | |
593 | __cpu_up(unsigned int cpu) | |
594 | { | |
595 | struct task_struct *idle; | |
596 | struct _lowcore *cpu_lowcore; | |
597 | struct stack_frame *sf; | |
598 | sigp_ccode ccode; | |
599 | int curr_cpu; | |
600 | ||
601 | for (curr_cpu = 0; curr_cpu <= 65535; curr_cpu++) { | |
602 | __cpu_logical_map[cpu] = (__u16) curr_cpu; | |
603 | if (cpu_stopped(cpu)) | |
604 | break; | |
605 | } | |
606 | ||
607 | if (!cpu_stopped(cpu)) | |
608 | return -ENODEV; | |
609 | ||
610 | ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]), | |
611 | cpu, sigp_set_prefix); | |
612 | if (ccode){ | |
613 | printk("sigp_set_prefix failed for cpu %d " | |
614 | "with condition code %d\n", | |
615 | (int) cpu, (int) ccode); | |
616 | return -EIO; | |
617 | } | |
618 | ||
619 | idle = current_set[cpu]; | |
620 | cpu_lowcore = lowcore_ptr[cpu]; | |
621 | cpu_lowcore->kernel_stack = (unsigned long) | |
30af7120 | 622 | task_stack_page(idle) + (THREAD_SIZE); |
1da177e4 LT |
623 | sf = (struct stack_frame *) (cpu_lowcore->kernel_stack |
624 | - sizeof(struct pt_regs) | |
625 | - sizeof(struct stack_frame)); | |
626 | memset(sf, 0, sizeof(struct stack_frame)); | |
627 | sf->gprs[9] = (unsigned long) sf; | |
628 | cpu_lowcore->save_area[15] = (unsigned long) sf; | |
629 | __ctl_store(cpu_lowcore->cregs_save_area[0], 0, 15); | |
94c12cc7 MS |
630 | asm volatile( |
631 | " stam 0,15,0(%0)" | |
632 | : : "a" (&cpu_lowcore->access_regs_save_area) : "memory"); | |
1da177e4 LT |
633 | cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; |
634 | cpu_lowcore->current_task = (unsigned long) idle; | |
635 | cpu_lowcore->cpu_data.cpu_nr = cpu; | |
636 | eieio(); | |
699ff13f MR |
637 | |
638 | while (signal_processor(cpu,sigp_restart) == sigp_busy) | |
639 | udelay(10); | |
1da177e4 LT |
640 | |
641 | while (!cpu_online(cpu)) | |
642 | cpu_relax(); | |
643 | return 0; | |
644 | } | |
645 | ||
255acee7 | 646 | static unsigned int __initdata additional_cpus; |
37a33026 | 647 | static unsigned int __initdata possible_cpus; |
255acee7 HC |
648 | |
649 | void __init smp_setup_cpu_possible_map(void) | |
650 | { | |
54330456 | 651 | unsigned int phy_cpus, pos_cpus, cpu; |
255acee7 | 652 | |
411ed322 | 653 | smp_get_save_areas(); |
54330456 HC |
654 | phy_cpus = smp_count_cpus(); |
655 | pos_cpus = min(phy_cpus + additional_cpus, (unsigned int) NR_CPUS); | |
255acee7 | 656 | |
37a33026 | 657 | if (possible_cpus) |
54330456 | 658 | pos_cpus = min(possible_cpus, (unsigned int) NR_CPUS); |
255acee7 | 659 | |
54330456 | 660 | for (cpu = 0; cpu < pos_cpus; cpu++) |
255acee7 HC |
661 | cpu_set(cpu, cpu_possible_map); |
662 | ||
54330456 HC |
663 | phy_cpus = min(phy_cpus, pos_cpus); |
664 | ||
665 | for (cpu = 0; cpu < phy_cpus; cpu++) | |
666 | cpu_set(cpu, cpu_present_map); | |
255acee7 HC |
667 | } |
668 | ||
669 | #ifdef CONFIG_HOTPLUG_CPU | |
670 | ||
671 | static int __init setup_additional_cpus(char *s) | |
672 | { | |
673 | additional_cpus = simple_strtoul(s, NULL, 0); | |
674 | return 0; | |
675 | } | |
676 | early_param("additional_cpus", setup_additional_cpus); | |
677 | ||
37a33026 HC |
678 | static int __init setup_possible_cpus(char *s) |
679 | { | |
680 | possible_cpus = simple_strtoul(s, NULL, 0); | |
681 | return 0; | |
682 | } | |
683 | early_param("possible_cpus", setup_possible_cpus); | |
684 | ||
1da177e4 LT |
685 | int |
686 | __cpu_disable(void) | |
687 | { | |
688 | unsigned long flags; | |
94c12cc7 | 689 | struct ec_creg_mask_parms cr_parms; |
f3705136 | 690 | int cpu = smp_processor_id(); |
1da177e4 LT |
691 | |
692 | spin_lock_irqsave(&smp_reserve_lock, flags); | |
f3705136 | 693 | if (smp_cpu_reserved[cpu] != 0) { |
1da177e4 LT |
694 | spin_unlock_irqrestore(&smp_reserve_lock, flags); |
695 | return -EBUSY; | |
696 | } | |
f3705136 | 697 | cpu_clear(cpu, cpu_online_map); |
1da177e4 | 698 | |
1da177e4 | 699 | /* Disable pfault pseudo page faults on this cpu. */ |
29b08d2b | 700 | pfault_fini(); |
1da177e4 | 701 | |
94c12cc7 MS |
702 | memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals)); |
703 | memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals)); | |
1da177e4 | 704 | |
94c12cc7 | 705 | /* disable all external interrupts */ |
1da177e4 LT |
706 | cr_parms.orvals[0] = 0; |
707 | cr_parms.andvals[0] = ~(1<<15 | 1<<14 | 1<<13 | 1<<12 | | |
708 | 1<<11 | 1<<10 | 1<< 6 | 1<< 4); | |
1da177e4 | 709 | /* disable all I/O interrupts */ |
1da177e4 LT |
710 | cr_parms.orvals[6] = 0; |
711 | cr_parms.andvals[6] = ~(1<<31 | 1<<30 | 1<<29 | 1<<28 | | |
712 | 1<<27 | 1<<26 | 1<<25 | 1<<24); | |
1da177e4 | 713 | /* disable most machine checks */ |
1da177e4 LT |
714 | cr_parms.orvals[14] = 0; |
715 | cr_parms.andvals[14] = ~(1<<28 | 1<<27 | 1<<26 | 1<<25 | 1<<24); | |
94c12cc7 | 716 | |
1da177e4 LT |
717 | smp_ctl_bit_callback(&cr_parms); |
718 | ||
719 | spin_unlock_irqrestore(&smp_reserve_lock, flags); | |
720 | return 0; | |
721 | } | |
722 | ||
723 | void | |
724 | __cpu_die(unsigned int cpu) | |
725 | { | |
726 | /* Wait until target cpu is down */ | |
727 | while (!smp_cpu_not_running(cpu)) | |
728 | cpu_relax(); | |
729 | printk("Processor %d spun down\n", cpu); | |
730 | } | |
731 | ||
732 | void | |
733 | cpu_die(void) | |
734 | { | |
735 | idle_task_exit(); | |
736 | signal_processor(smp_processor_id(), sigp_stop); | |
737 | BUG(); | |
738 | for(;;); | |
739 | } | |
740 | ||
255acee7 HC |
741 | #endif /* CONFIG_HOTPLUG_CPU */ |
742 | ||
1da177e4 LT |
743 | /* |
744 | * Cycle through the processors and setup structures. | |
745 | */ | |
746 | ||
747 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
748 | { | |
749 | unsigned long stack; | |
750 | unsigned int cpu; | |
751 | int i; | |
752 | ||
99b2d8df HC |
753 | /* request the 0x1201 emergency signal external interrupt */ |
754 | if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) | |
755 | panic("Couldn't request external interrupt 0x1201"); | |
1da177e4 LT |
756 | memset(lowcore_ptr,0,sizeof(lowcore_ptr)); |
757 | /* | |
758 | * Initialize prefix pages and stacks for all possible cpus | |
759 | */ | |
760 | print_cpu_info(&S390_lowcore.cpu_data); | |
761 | ||
97db7fbf | 762 | for_each_possible_cpu(i) { |
1da177e4 LT |
763 | lowcore_ptr[i] = (struct _lowcore *) |
764 | __get_free_pages(GFP_KERNEL|GFP_DMA, | |
765 | sizeof(void*) == 8 ? 1 : 0); | |
766 | stack = __get_free_pages(GFP_KERNEL,ASYNC_ORDER); | |
767 | if (lowcore_ptr[i] == NULL || stack == 0ULL) | |
768 | panic("smp_boot_cpus failed to allocate memory\n"); | |
769 | ||
770 | *(lowcore_ptr[i]) = S390_lowcore; | |
771 | lowcore_ptr[i]->async_stack = stack + (ASYNC_SIZE); | |
1da177e4 LT |
772 | stack = __get_free_pages(GFP_KERNEL,0); |
773 | if (stack == 0ULL) | |
774 | panic("smp_boot_cpus failed to allocate memory\n"); | |
775 | lowcore_ptr[i]->panic_stack = stack + (PAGE_SIZE); | |
347a8dc3 | 776 | #ifndef CONFIG_64BIT |
77fa2245 HC |
777 | if (MACHINE_HAS_IEEE) { |
778 | lowcore_ptr[i]->extended_save_area_addr = | |
779 | (__u32) __get_free_pages(GFP_KERNEL,0); | |
780 | if (lowcore_ptr[i]->extended_save_area_addr == 0) | |
781 | panic("smp_boot_cpus failed to " | |
782 | "allocate memory\n"); | |
783 | } | |
1da177e4 LT |
784 | #endif |
785 | } | |
347a8dc3 | 786 | #ifndef CONFIG_64BIT |
77fa2245 HC |
787 | if (MACHINE_HAS_IEEE) |
788 | ctl_set_bit(14, 29); /* enable extended save area */ | |
789 | #endif | |
1da177e4 LT |
790 | set_prefix((u32)(unsigned long) lowcore_ptr[smp_processor_id()]); |
791 | ||
97db7fbf | 792 | for_each_possible_cpu(cpu) |
1da177e4 LT |
793 | if (cpu != smp_processor_id()) |
794 | smp_create_idle(cpu); | |
795 | } | |
796 | ||
797 | void __devinit smp_prepare_boot_cpu(void) | |
798 | { | |
799 | BUG_ON(smp_processor_id() != 0); | |
800 | ||
801 | cpu_set(0, cpu_online_map); | |
1da177e4 LT |
802 | S390_lowcore.percpu_offset = __per_cpu_offset[0]; |
803 | current_set[0] = current; | |
804 | } | |
805 | ||
806 | void smp_cpus_done(unsigned int max_cpus) | |
807 | { | |
54330456 | 808 | cpu_present_map = cpu_possible_map; |
1da177e4 LT |
809 | } |
810 | ||
811 | /* | |
812 | * the frequency of the profiling timer can be changed | |
813 | * by writing a multiplier value into /proc/profile. | |
814 | * | |
815 | * usually you want to run this on all CPUs ;) | |
816 | */ | |
817 | int setup_profiling_timer(unsigned int multiplier) | |
818 | { | |
819 | return 0; | |
820 | } | |
821 | ||
822 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | |
823 | ||
824 | static int __init topology_init(void) | |
825 | { | |
826 | int cpu; | |
827 | int ret; | |
828 | ||
97db7fbf | 829 | for_each_possible_cpu(cpu) { |
6721f778 HC |
830 | struct cpu *c = &per_cpu(cpu_devices, cpu); |
831 | ||
832 | c->hotpluggable = 1; | |
833 | ret = register_cpu(c, cpu); | |
1da177e4 LT |
834 | if (ret) |
835 | printk(KERN_WARNING "topology_init: register_cpu %d " | |
836 | "failed (%d)\n", cpu, ret); | |
837 | } | |
838 | return 0; | |
839 | } | |
840 | ||
841 | subsys_initcall(topology_init); | |
842 | ||
255acee7 | 843 | EXPORT_SYMBOL(cpu_online_map); |
1da177e4 LT |
844 | EXPORT_SYMBOL(cpu_possible_map); |
845 | EXPORT_SYMBOL(lowcore_ptr); | |
846 | EXPORT_SYMBOL(smp_ctl_set_bit); | |
847 | EXPORT_SYMBOL(smp_ctl_clear_bit); | |
1da177e4 LT |
848 | EXPORT_SYMBOL(smp_get_cpu); |
849 | EXPORT_SYMBOL(smp_put_cpu); |