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[S390] smp: delay idle task creation
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CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/smp.c
3 *
155af2f9 4 * Copyright IBM Corp. 1999, 2009
1da177e4 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
39ce010d
HC
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com)
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * We work with logical cpu numbering everywhere we can. The only
14 * functions using the real cpu address (got from STAP) are the sigp
15 * functions. For all other functions we use the identity mapping.
16 * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
17 * used e.g. to find the idle task belonging to a logical cpu. Every array
18 * in the kernel is sorted by the logical cpu number and not by the physical
19 * one which is causing all the confusion with __cpu_logical_map and
20 * cpu_number_map in other architectures.
21 */
22
395d31d4
MS
23#define KMSG_COMPONENT "cpu"
24#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
25
f230886b 26#include <linux/workqueue.h>
1da177e4
LT
27#include <linux/module.h>
28#include <linux/init.h>
1da177e4 29#include <linux/mm.h>
4e950f6f 30#include <linux/err.h>
1da177e4
LT
31#include <linux/spinlock.h>
32#include <linux/kernel_stat.h>
1da177e4
LT
33#include <linux/delay.h>
34#include <linux/cache.h>
35#include <linux/interrupt.h>
3324e60a 36#include <linux/irqflags.h>
1da177e4 37#include <linux/cpu.h>
2b67fc46 38#include <linux/timex.h>
411ed322 39#include <linux/bootmem.h>
5a0e3ad6 40#include <linux/slab.h>
cbb870c8 41#include <asm/asm-offsets.h>
46b05d26 42#include <asm/ipl.h>
2b67fc46 43#include <asm/setup.h>
1da177e4
LT
44#include <asm/sigp.h>
45#include <asm/pgalloc.h>
46#include <asm/irq.h>
47#include <asm/s390_ext.h>
48#include <asm/cpcmd.h>
49#include <asm/tlbflush.h>
2b67fc46 50#include <asm/timer.h>
411ed322 51#include <asm/lowcore.h>
08d07968 52#include <asm/sclp.h>
76d4e00a 53#include <asm/cputime.h>
c742b31c 54#include <asm/vdso.h>
4bb5e07b 55#include <asm/cpu.h>
a806170e 56#include "entry.h"
1da177e4 57
fb380aad 58/* logical cpu to cpu address */
a93b8ec1 59unsigned short __cpu_logical_map[NR_CPUS];
fb380aad 60
1da177e4
LT
61static struct task_struct *current_set[NR_CPUS];
62
08d07968
HC
63static u8 smp_cpu_type;
64static int smp_use_sigp_detection;
65
66enum s390_cpu_state {
67 CPU_STATE_STANDBY,
68 CPU_STATE_CONFIGURED,
69};
70
dbd70fb4 71DEFINE_MUTEX(smp_cpu_state_mutex);
c10fde0d 72int smp_cpu_polarization[NR_CPUS];
08d07968 73static int smp_cpu_state[NR_CPUS];
c10fde0d 74static int cpu_management;
08d07968
HC
75
76static DEFINE_PER_CPU(struct cpu, cpu_devices);
08d07968 77
a93b8ec1 78static void smp_ext_bitcall(int, int);
1da177e4 79
a93b8ec1 80static int raw_cpu_stopped(int cpu)
5c0b912e 81{
a93b8ec1 82 u32 status;
5c0b912e 83
a93b8ec1 84 switch (raw_sigp_ps(&status, 0, cpu, sigp_sense)) {
5c0b912e
HC
85 case sigp_status_stored:
86 /* Check for stopped and check stop state */
87 if (status & 0x50)
88 return 1;
89 break;
90 default:
91 break;
92 }
93 return 0;
94}
95
a93b8ec1
HC
96static inline int cpu_stopped(int cpu)
97{
98 return raw_cpu_stopped(cpu_logical_map(cpu));
99}
100
2c2df118
HC
101void smp_switch_to_ipl_cpu(void (*func)(void *), void *data)
102{
103 struct _lowcore *lc, *current_lc;
104 struct stack_frame *sf;
105 struct pt_regs *regs;
106 unsigned long sp;
107
108 if (smp_processor_id() == 0)
109 func(data);
110 __load_psw_mask(PSW_BASE_BITS | PSW_DEFAULT_KEY);
111 /* Disable lowcore protection */
112 __ctl_clear_bit(0, 28);
113 current_lc = lowcore_ptr[smp_processor_id()];
114 lc = lowcore_ptr[0];
115 if (!lc)
116 lc = current_lc;
117 lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
118 lc->restart_psw.addr = PSW_ADDR_AMODE | (unsigned long) smp_restart_cpu;
119 if (!cpu_online(0))
120 smp_switch_to_cpu(func, data, 0, stap(), __cpu_logical_map[0]);
a93b8ec1 121 while (sigp(0, sigp_stop_and_store_status) == sigp_busy)
2c2df118
HC
122 cpu_relax();
123 sp = lc->panic_stack;
124 sp -= sizeof(struct pt_regs);
125 regs = (struct pt_regs *) sp;
126 memcpy(&regs->gprs, &current_lc->gpregs_save_area, sizeof(regs->gprs));
cbb870c8 127 regs->psw = lc->psw_save_area;
2c2df118
HC
128 sp -= STACK_FRAME_OVERHEAD;
129 sf = (struct stack_frame *) sp;
130 sf->back_chain = regs->gprs[15];
131 smp_switch_to_cpu(func, data, sp, stap(), __cpu_logical_map[0]);
132}
133
677d7623 134void smp_send_stop(void)
1da177e4 135{
39ce010d 136 int cpu, rc;
1da177e4 137
677d7623
HC
138 /* Disable all interrupts/machine checks */
139 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
3324e60a 140 trace_hardirqs_off();
1da177e4 141
677d7623 142 /* stop all processors */
1da177e4
LT
143 for_each_online_cpu(cpu) {
144 if (cpu == smp_processor_id())
145 continue;
146 do {
a93b8ec1 147 rc = sigp(cpu, sigp_stop);
39ce010d 148 } while (rc == sigp_busy);
1da177e4 149
5c0b912e 150 while (!cpu_stopped(cpu))
c6b5b847
HC
151 cpu_relax();
152 }
153}
154
1da177e4
LT
155/*
156 * This is the main routine where commands issued by other
157 * cpus are handled.
158 */
159
f6649a7e
MS
160static void do_ext_call_interrupt(unsigned int ext_int_code,
161 unsigned int param32, unsigned long param64)
1da177e4 162{
39ce010d 163 unsigned long bits;
1da177e4 164
052ff461 165 kstat_cpu(smp_processor_id()).irqs[EXTINT_IPI]++;
39ce010d
HC
166 /*
167 * handle bit signal external calls
168 *
169 * For the ec_schedule signal we have to do nothing. All the work
170 * is done automatically when we return from the interrupt.
171 */
1da177e4
LT
172 bits = xchg(&S390_lowcore.ext_call_fast, 0);
173
39ce010d 174 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
175 generic_smp_call_function_interrupt();
176
177 if (test_bit(ec_call_function_single, &bits))
178 generic_smp_call_function_single_interrupt();
1da177e4
LT
179}
180
181/*
182 * Send an external call sigp to another cpu and return without waiting
183 * for its completion.
184 */
a93b8ec1 185static void smp_ext_bitcall(int cpu, int sig)
1da177e4 186{
39ce010d
HC
187 /*
188 * Set signaling bit in lowcore of target cpu and kick it
189 */
1da177e4 190 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
a93b8ec1 191 while (sigp(cpu, sigp_emergency_signal) == sigp_busy)
1da177e4
LT
192 udelay(10);
193}
194
630cd046 195void arch_send_call_function_ipi_mask(const struct cpumask *mask)
ca9fc75a
HC
196{
197 int cpu;
198
630cd046 199 for_each_cpu(cpu, mask)
ca9fc75a
HC
200 smp_ext_bitcall(cpu, ec_call_function);
201}
202
203void arch_send_call_function_single_ipi(int cpu)
204{
205 smp_ext_bitcall(cpu, ec_call_function_single);
206}
207
347a8dc3 208#ifndef CONFIG_64BIT
1da177e4
LT
209/*
210 * this function sends a 'purge tlb' signal to another CPU.
211 */
a806170e 212static void smp_ptlb_callback(void *info)
1da177e4 213{
ba8a9229 214 __tlb_flush_local();
1da177e4
LT
215}
216
217void smp_ptlb_all(void)
218{
15c8b6c1 219 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
220}
221EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 222#endif /* ! CONFIG_64BIT */
1da177e4
LT
223
224/*
225 * this function sends a 'reschedule' IPI to another CPU.
226 * it goes straight through and wastes no time serializing
227 * anything. Worst case is that we lose a reschedule ...
228 */
229void smp_send_reschedule(int cpu)
230{
39ce010d 231 smp_ext_bitcall(cpu, ec_schedule);
1da177e4
LT
232}
233
234/*
235 * parameter area for the set/clear control bit callbacks
236 */
94c12cc7 237struct ec_creg_mask_parms {
1da177e4
LT
238 unsigned long orvals[16];
239 unsigned long andvals[16];
94c12cc7 240};
1da177e4
LT
241
242/*
243 * callback for setting/clearing control bits
244 */
39ce010d
HC
245static void smp_ctl_bit_callback(void *info)
246{
94c12cc7 247 struct ec_creg_mask_parms *pp = info;
1da177e4
LT
248 unsigned long cregs[16];
249 int i;
39ce010d 250
94c12cc7
MS
251 __ctl_store(cregs, 0, 15);
252 for (i = 0; i <= 15; i++)
1da177e4 253 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
94c12cc7 254 __ctl_load(cregs, 0, 15);
1da177e4
LT
255}
256
257/*
258 * Set a bit in a control register of all cpus
259 */
94c12cc7
MS
260void smp_ctl_set_bit(int cr, int bit)
261{
262 struct ec_creg_mask_parms parms;
1da177e4 263
94c12cc7
MS
264 memset(&parms.orvals, 0, sizeof(parms.orvals));
265 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 266 parms.orvals[cr] = 1 << bit;
15c8b6c1 267 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 268}
39ce010d 269EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
270
271/*
272 * Clear a bit in a control register of all cpus
273 */
94c12cc7
MS
274void smp_ctl_clear_bit(int cr, int bit)
275{
276 struct ec_creg_mask_parms parms;
1da177e4 277
94c12cc7
MS
278 memset(&parms.orvals, 0, sizeof(parms.orvals));
279 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 280 parms.andvals[cr] = ~(1L << bit);
15c8b6c1 281 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 282}
39ce010d 283EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 284
59f2e69d 285#ifdef CONFIG_ZFCPDUMP
411ed322 286
285f6722 287static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
411ed322 288{
411ed322
MH
289 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
290 return;
285f6722 291 if (cpu >= NR_CPUS) {
395d31d4
MS
292 pr_warning("CPU %i exceeds the maximum %i and is excluded from "
293 "the dump\n", cpu, NR_CPUS - 1);
285f6722 294 return;
411ed322 295 }
f64ca217 296 zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL);
a93b8ec1 297 while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy)
285f6722 298 cpu_relax();
92fe3132
MH
299 memcpy_real(zfcpdump_save_areas[cpu],
300 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
301 sizeof(struct save_area));
411ed322
MH
302}
303
f64ca217 304struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
411ed322
MH
305EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
306
307#else
285f6722
HC
308
309static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
310
59f2e69d 311#endif /* CONFIG_ZFCPDUMP */
411ed322 312
08d07968
HC
313static int cpu_known(int cpu_id)
314{
315 int cpu;
316
317 for_each_present_cpu(cpu) {
318 if (__cpu_logical_map[cpu] == cpu_id)
319 return 1;
320 }
321 return 0;
322}
323
324static int smp_rescan_cpus_sigp(cpumask_t avail)
325{
326 int cpu_id, logical_cpu;
327
93632d1b
RR
328 logical_cpu = cpumask_first(&avail);
329 if (logical_cpu >= nr_cpu_ids)
08d07968 330 return 0;
4bb5e07b 331 for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) {
08d07968
HC
332 if (cpu_known(cpu_id))
333 continue;
334 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 335 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
336 if (!cpu_stopped(logical_cpu))
337 continue;
338 cpu_set(logical_cpu, cpu_present_map);
339 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
340 logical_cpu = cpumask_next(logical_cpu, &avail);
341 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
342 break;
343 }
344 return 0;
345}
346
48483b32 347static int smp_rescan_cpus_sclp(cpumask_t avail)
08d07968
HC
348{
349 struct sclp_cpu_info *info;
350 int cpu_id, logical_cpu, cpu;
351 int rc;
352
93632d1b
RR
353 logical_cpu = cpumask_first(&avail);
354 if (logical_cpu >= nr_cpu_ids)
08d07968 355 return 0;
48483b32 356 info = kmalloc(sizeof(*info), GFP_KERNEL);
08d07968
HC
357 if (!info)
358 return -ENOMEM;
359 rc = sclp_get_cpu_info(info);
360 if (rc)
361 goto out;
362 for (cpu = 0; cpu < info->combined; cpu++) {
363 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
364 continue;
365 cpu_id = info->cpu[cpu].address;
366 if (cpu_known(cpu_id))
367 continue;
368 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 369 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
370 cpu_set(logical_cpu, cpu_present_map);
371 if (cpu >= info->configured)
372 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
373 else
374 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
375 logical_cpu = cpumask_next(logical_cpu, &avail);
376 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
377 break;
378 }
379out:
48483b32 380 kfree(info);
08d07968
HC
381 return rc;
382}
383
1e489518 384static int __smp_rescan_cpus(void)
08d07968
HC
385{
386 cpumask_t avail;
387
48483b32 388 cpus_xor(avail, cpu_possible_map, cpu_present_map);
08d07968
HC
389 if (smp_use_sigp_detection)
390 return smp_rescan_cpus_sigp(avail);
391 else
392 return smp_rescan_cpus_sclp(avail);
1da177e4
LT
393}
394
48483b32
HC
395static void __init smp_detect_cpus(void)
396{
397 unsigned int cpu, c_cpus, s_cpus;
398 struct sclp_cpu_info *info;
399 u16 boot_cpu_addr, cpu_addr;
400
401 c_cpus = 1;
402 s_cpus = 0;
7b468488 403 boot_cpu_addr = __cpu_logical_map[0];
48483b32
HC
404 info = kmalloc(sizeof(*info), GFP_KERNEL);
405 if (!info)
406 panic("smp_detect_cpus failed to allocate memory\n");
407 /* Use sigp detection algorithm if sclp doesn't work. */
408 if (sclp_get_cpu_info(info)) {
409 smp_use_sigp_detection = 1;
4bb5e07b 410 for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) {
48483b32
HC
411 if (cpu == boot_cpu_addr)
412 continue;
a93b8ec1 413 if (!raw_cpu_stopped(cpu))
48483b32
HC
414 continue;
415 smp_get_save_area(c_cpus, cpu);
416 c_cpus++;
417 }
418 goto out;
419 }
420
421 if (info->has_cpu_type) {
422 for (cpu = 0; cpu < info->combined; cpu++) {
423 if (info->cpu[cpu].address == boot_cpu_addr) {
424 smp_cpu_type = info->cpu[cpu].type;
425 break;
426 }
427 }
428 }
429
430 for (cpu = 0; cpu < info->combined; cpu++) {
431 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
432 continue;
433 cpu_addr = info->cpu[cpu].address;
434 if (cpu_addr == boot_cpu_addr)
435 continue;
a93b8ec1 436 if (!raw_cpu_stopped(cpu_addr)) {
48483b32
HC
437 s_cpus++;
438 continue;
439 }
440 smp_get_save_area(c_cpus, cpu_addr);
441 c_cpus++;
442 }
443out:
444 kfree(info);
395d31d4 445 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 446 get_online_cpus();
1e489518 447 __smp_rescan_cpus();
9d40d2e3 448 put_online_cpus();
48483b32
HC
449}
450
1da177e4 451/*
39ce010d 452 * Activate a secondary processor.
1da177e4 453 */
ea1f4eec 454int __cpuinit start_secondary(void *cpuvoid)
1da177e4 455{
39ce010d
HC
456 /* Setup the cpu */
457 cpu_init();
5bfb5d69 458 preempt_disable();
d54853ef 459 /* Enable TOD clock interrupts on the secondary cpu. */
39ce010d 460 init_cpu_timer();
d54853ef 461 /* Enable cpu timer interrupts on the secondary cpu. */
39ce010d 462 init_cpu_vtimer();
1da177e4 463 /* Enable pfault pseudo page faults on this cpu. */
29b08d2b
HC
464 pfault_init();
465
e545a614
MS
466 /* call cpu notifiers */
467 notify_cpu_starting(smp_processor_id());
1da177e4 468 /* Mark this cpu as online */
ca9fc75a 469 ipi_call_lock();
1da177e4 470 cpu_set(smp_processor_id(), cpu_online_map);
ca9fc75a 471 ipi_call_unlock();
1da177e4
LT
472 /* Switch on interrupts */
473 local_irq_enable();
39ce010d 474 /* Print info about this processor */
7b468488 475 print_cpu_info();
39ce010d
HC
476 /* cpu_idle will call schedule for us */
477 cpu_idle();
478 return 0;
1da177e4
LT
479}
480
f230886b
HC
481struct create_idle {
482 struct work_struct work;
483 struct task_struct *idle;
484 struct completion done;
485 int cpu;
486};
487
488static void __cpuinit smp_fork_idle(struct work_struct *work)
1da177e4 489{
f230886b 490 struct create_idle *c_idle;
1da177e4 491
f230886b
HC
492 c_idle = container_of(work, struct create_idle, work);
493 c_idle->idle = fork_idle(c_idle->cpu);
494 complete(&c_idle->done);
1da177e4
LT
495}
496
1cb6bb4b
HC
497static int __cpuinit smp_alloc_lowcore(int cpu)
498{
499 unsigned long async_stack, panic_stack;
500 struct _lowcore *lowcore;
1cb6bb4b 501
3fd26a77 502 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1cb6bb4b
HC
503 if (!lowcore)
504 return -ENOMEM;
505 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
1cb6bb4b 506 panic_stack = __get_free_page(GFP_KERNEL);
591bb4f6
HC
507 if (!panic_stack || !async_stack)
508 goto out;
98c7b388
HC
509 memcpy(lowcore, &S390_lowcore, 512);
510 memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
1cb6bb4b
HC
511 lowcore->async_stack = async_stack + ASYNC_SIZE;
512 lowcore->panic_stack = panic_stack + PAGE_SIZE;
513
514#ifndef CONFIG_64BIT
515 if (MACHINE_HAS_IEEE) {
516 unsigned long save_area;
517
518 save_area = get_zeroed_page(GFP_KERNEL);
519 if (!save_area)
33b1d09e 520 goto out;
1cb6bb4b
HC
521 lowcore->extended_save_area_addr = (u32) save_area;
522 }
c742b31c
MS
523#else
524 if (vdso_alloc_per_cpu(cpu, lowcore))
525 goto out;
1cb6bb4b
HC
526#endif
527 lowcore_ptr[cpu] = lowcore;
528 return 0;
529
591bb4f6 530out:
33b1d09e 531 free_page(panic_stack);
1cb6bb4b 532 free_pages(async_stack, ASYNC_ORDER);
3fd26a77 533 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
534 return -ENOMEM;
535}
536
1cb6bb4b
HC
537static void smp_free_lowcore(int cpu)
538{
539 struct _lowcore *lowcore;
1cb6bb4b 540
1cb6bb4b
HC
541 lowcore = lowcore_ptr[cpu];
542#ifndef CONFIG_64BIT
543 if (MACHINE_HAS_IEEE)
544 free_page((unsigned long) lowcore->extended_save_area_addr);
c742b31c
MS
545#else
546 vdso_free_per_cpu(cpu, lowcore);
1cb6bb4b
HC
547#endif
548 free_page(lowcore->panic_stack - PAGE_SIZE);
549 free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
3fd26a77 550 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
551 lowcore_ptr[cpu] = NULL;
552}
1cb6bb4b 553
1da177e4 554/* Upping and downing of CPUs */
1cb6bb4b 555int __cpuinit __cpu_up(unsigned int cpu)
1da177e4 556{
39ce010d 557 struct _lowcore *cpu_lowcore;
f230886b 558 struct create_idle c_idle;
a93b8ec1 559 struct task_struct *idle;
1da177e4 560 struct stack_frame *sf;
d0d3cdf4 561 u32 lowcore;
a93b8ec1 562 int ccode;
1da177e4 563
08d07968
HC
564 if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
565 return -EIO;
f230886b
HC
566 idle = current_set[cpu];
567 if (!idle) {
568 c_idle.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done);
569 INIT_WORK_ONSTACK(&c_idle.work, smp_fork_idle);
570 c_idle.cpu = cpu;
571 schedule_work(&c_idle.work);
572 wait_for_completion(&c_idle.done);
573 if (IS_ERR(c_idle.idle))
574 return PTR_ERR(c_idle.idle);
575 idle = c_idle.idle;
576 current_set[cpu] = c_idle.idle;
577 }
1cb6bb4b
HC
578 if (smp_alloc_lowcore(cpu))
579 return -ENOMEM;
d0d3cdf4 580 do {
a93b8ec1 581 ccode = sigp(cpu, sigp_initial_cpu_reset);
d0d3cdf4
HC
582 if (ccode == sigp_busy)
583 udelay(10);
584 if (ccode == sigp_not_operational)
585 goto err_out;
586 } while (ccode == sigp_busy);
587
588 lowcore = (u32)(unsigned long)lowcore_ptr[cpu];
a93b8ec1 589 while (sigp_p(lowcore, cpu, sigp_set_prefix) == sigp_busy)
d0d3cdf4 590 udelay(10);
1da177e4 591
39ce010d 592 cpu_lowcore = lowcore_ptr[cpu];
1da177e4 593 cpu_lowcore->kernel_stack = (unsigned long)
39ce010d 594 task_stack_page(idle) + THREAD_SIZE;
1cb6bb4b 595 cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
1da177e4
LT
596 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
597 - sizeof(struct pt_regs)
598 - sizeof(struct stack_frame));
599 memset(sf, 0, sizeof(struct stack_frame));
600 sf->gprs[9] = (unsigned long) sf;
601 cpu_lowcore->save_area[15] = (unsigned long) sf;
24d3e210 602 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
050eef36 603 atomic_inc(&init_mm.context.attach_count);
94c12cc7
MS
604 asm volatile(
605 " stam 0,15,0(%0)"
606 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
1da177e4 607 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
39ce010d 608 cpu_lowcore->current_task = (unsigned long) idle;
7b468488 609 cpu_lowcore->cpu_nr = cpu;
591bb4f6 610 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
25097bf1 611 cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
dfd9f7ab 612 cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func;
14375bc4
MS
613 memcpy(cpu_lowcore->stfle_fac_list, S390_lowcore.stfle_fac_list,
614 MAX_FACILITY_BIT/8);
1da177e4 615 eieio();
699ff13f 616
a93b8ec1 617 while (sigp(cpu, sigp_restart) == sigp_busy)
699ff13f 618 udelay(10);
1da177e4
LT
619
620 while (!cpu_online(cpu))
621 cpu_relax();
622 return 0;
d0d3cdf4
HC
623
624err_out:
625 smp_free_lowcore(cpu);
626 return -EIO;
1da177e4
LT
627}
628
48483b32 629static int __init setup_possible_cpus(char *s)
255acee7 630{
48483b32 631 int pcpus, cpu;
255acee7 632
48483b32 633 pcpus = simple_strtoul(s, NULL, 0);
88e01285
HC
634 init_cpu_possible(cpumask_of(0));
635 for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
def6cfb7 636 set_cpu_possible(cpu, true);
37a33026
HC
637 return 0;
638}
639early_param("possible_cpus", setup_possible_cpus);
640
48483b32
HC
641#ifdef CONFIG_HOTPLUG_CPU
642
39ce010d 643int __cpu_disable(void)
1da177e4 644{
94c12cc7 645 struct ec_creg_mask_parms cr_parms;
f3705136 646 int cpu = smp_processor_id();
1da177e4 647
f3705136 648 cpu_clear(cpu, cpu_online_map);
1da177e4 649
1da177e4 650 /* Disable pfault pseudo page faults on this cpu. */
29b08d2b 651 pfault_fini();
1da177e4 652
94c12cc7
MS
653 memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
654 memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
1da177e4 655
94c12cc7 656 /* disable all external interrupts */
1da177e4 657 cr_parms.orvals[0] = 0;
39ce010d
HC
658 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 |
659 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4);
1da177e4 660 /* disable all I/O interrupts */
1da177e4 661 cr_parms.orvals[6] = 0;
39ce010d
HC
662 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
663 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
1da177e4 664 /* disable most machine checks */
1da177e4 665 cr_parms.orvals[14] = 0;
39ce010d
HC
666 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
667 1 << 25 | 1 << 24);
94c12cc7 668
1da177e4
LT
669 smp_ctl_bit_callback(&cr_parms);
670
1da177e4
LT
671 return 0;
672}
673
39ce010d 674void __cpu_die(unsigned int cpu)
1da177e4
LT
675{
676 /* Wait until target cpu is down */
5c0b912e 677 while (!cpu_stopped(cpu))
1da177e4 678 cpu_relax();
a93b8ec1 679 while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy)
4f8048ee 680 udelay(10);
1cb6bb4b 681 smp_free_lowcore(cpu);
050eef36 682 atomic_dec(&init_mm.context.attach_count);
395d31d4 683 pr_info("Processor %d stopped\n", cpu);
1da177e4
LT
684}
685
39ce010d 686void cpu_die(void)
1da177e4
LT
687{
688 idle_task_exit();
a93b8ec1 689 while (sigp(smp_processor_id(), sigp_stop) == sigp_busy)
f8501ba7 690 cpu_relax();
39ce010d 691 for (;;);
1da177e4
LT
692}
693
255acee7
HC
694#endif /* CONFIG_HOTPLUG_CPU */
695
1da177e4
LT
696void __init smp_prepare_cpus(unsigned int max_cpus)
697{
591bb4f6
HC
698#ifndef CONFIG_64BIT
699 unsigned long save_area = 0;
700#endif
701 unsigned long async_stack, panic_stack;
702 struct _lowcore *lowcore;
39ce010d 703
48483b32
HC
704 smp_detect_cpus();
705
39ce010d
HC
706 /* request the 0x1201 emergency signal external interrupt */
707 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
708 panic("Couldn't request external interrupt 0x1201");
7b468488 709 print_cpu_info();
1da177e4 710
591bb4f6 711 /* Reallocate current lowcore, but keep its contents. */
3fd26a77 712 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
591bb4f6
HC
713 panic_stack = __get_free_page(GFP_KERNEL);
714 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
c742b31c 715 BUG_ON(!lowcore || !panic_stack || !async_stack);
347a8dc3 716#ifndef CONFIG_64BIT
77fa2245 717 if (MACHINE_HAS_IEEE)
591bb4f6 718 save_area = get_zeroed_page(GFP_KERNEL);
77fa2245 719#endif
591bb4f6
HC
720 local_irq_disable();
721 local_mcck_disable();
722 lowcore_ptr[smp_processor_id()] = lowcore;
723 *lowcore = S390_lowcore;
724 lowcore->panic_stack = panic_stack + PAGE_SIZE;
725 lowcore->async_stack = async_stack + ASYNC_SIZE;
726#ifndef CONFIG_64BIT
727 if (MACHINE_HAS_IEEE)
728 lowcore->extended_save_area_addr = (u32) save_area;
729#endif
730 set_prefix((u32)(unsigned long) lowcore);
731 local_mcck_enable();
732 local_irq_enable();
3a6ba460
HC
733#ifdef CONFIG_64BIT
734 if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore))
735 BUG();
736#endif
1da177e4
LT
737}
738
ea1f4eec 739void __init smp_prepare_boot_cpu(void)
1da177e4
LT
740{
741 BUG_ON(smp_processor_id() != 0);
742
48483b32
HC
743 current_thread_info()->cpu = 0;
744 cpu_set(0, cpu_present_map);
1da177e4 745 cpu_set(0, cpu_online_map);
1da177e4
LT
746 S390_lowcore.percpu_offset = __per_cpu_offset[0];
747 current_set[0] = current;
08d07968 748 smp_cpu_state[0] = CPU_STATE_CONFIGURED;
c10fde0d 749 smp_cpu_polarization[0] = POLARIZATION_UNKNWN;
1da177e4
LT
750}
751
ea1f4eec 752void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 753{
1da177e4
LT
754}
755
02beaccc
HC
756void __init smp_setup_processor_id(void)
757{
758 S390_lowcore.cpu_nr = 0;
759 __cpu_logical_map[0] = stap();
760}
761
1da177e4
LT
762/*
763 * the frequency of the profiling timer can be changed
764 * by writing a multiplier value into /proc/profile.
765 *
766 * usually you want to run this on all CPUs ;)
767 */
768int setup_profiling_timer(unsigned int multiplier)
769{
39ce010d 770 return 0;
1da177e4
LT
771}
772
08d07968 773#ifdef CONFIG_HOTPLUG_CPU
4a0b2b4d
AK
774static ssize_t cpu_configure_show(struct sys_device *dev,
775 struct sysdev_attribute *attr, char *buf)
08d07968
HC
776{
777 ssize_t count;
778
779 mutex_lock(&smp_cpu_state_mutex);
780 count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
781 mutex_unlock(&smp_cpu_state_mutex);
782 return count;
783}
784
4a0b2b4d
AK
785static ssize_t cpu_configure_store(struct sys_device *dev,
786 struct sysdev_attribute *attr,
787 const char *buf, size_t count)
08d07968
HC
788{
789 int cpu = dev->id;
790 int val, rc;
791 char delim;
792
793 if (sscanf(buf, "%d %c", &val, &delim) != 1)
794 return -EINVAL;
795 if (val != 0 && val != 1)
796 return -EINVAL;
797
9d40d2e3 798 get_online_cpus();
0b18d318 799 mutex_lock(&smp_cpu_state_mutex);
08d07968 800 rc = -EBUSY;
2c2df118
HC
801 /* disallow configuration changes of online cpus and cpu 0 */
802 if (cpu_online(cpu) || cpu == 0)
08d07968
HC
803 goto out;
804 rc = 0;
805 switch (val) {
806 case 0:
807 if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
808 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
c10fde0d 809 if (!rc) {
08d07968 810 smp_cpu_state[cpu] = CPU_STATE_STANDBY;
c10fde0d
HC
811 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
812 }
08d07968
HC
813 }
814 break;
815 case 1:
816 if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
817 rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
c10fde0d 818 if (!rc) {
08d07968 819 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
c10fde0d
HC
820 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
821 }
08d07968
HC
822 }
823 break;
824 default:
825 break;
826 }
827out:
08d07968 828 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 829 put_online_cpus();
08d07968
HC
830 return rc ? rc : count;
831}
832static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
833#endif /* CONFIG_HOTPLUG_CPU */
834
4a0b2b4d
AK
835static ssize_t cpu_polarization_show(struct sys_device *dev,
836 struct sysdev_attribute *attr, char *buf)
c10fde0d
HC
837{
838 int cpu = dev->id;
839 ssize_t count;
840
841 mutex_lock(&smp_cpu_state_mutex);
842 switch (smp_cpu_polarization[cpu]) {
843 case POLARIZATION_HRZ:
844 count = sprintf(buf, "horizontal\n");
845 break;
846 case POLARIZATION_VL:
847 count = sprintf(buf, "vertical:low\n");
848 break;
849 case POLARIZATION_VM:
850 count = sprintf(buf, "vertical:medium\n");
851 break;
852 case POLARIZATION_VH:
853 count = sprintf(buf, "vertical:high\n");
854 break;
855 default:
856 count = sprintf(buf, "unknown\n");
857 break;
858 }
859 mutex_unlock(&smp_cpu_state_mutex);
860 return count;
861}
862static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
863
4a0b2b4d
AK
864static ssize_t show_cpu_address(struct sys_device *dev,
865 struct sysdev_attribute *attr, char *buf)
08d07968
HC
866{
867 return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
868}
869static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
870
871
872static struct attribute *cpu_common_attrs[] = {
873#ifdef CONFIG_HOTPLUG_CPU
874 &attr_configure.attr,
875#endif
876 &attr_address.attr,
c10fde0d 877 &attr_polarization.attr,
08d07968
HC
878 NULL,
879};
880
881static struct attribute_group cpu_common_attr_group = {
882 .attrs = cpu_common_attrs,
883};
1da177e4 884
4a0b2b4d
AK
885static ssize_t show_capability(struct sys_device *dev,
886 struct sysdev_attribute *attr, char *buf)
2fc2d1e9
HC
887{
888 unsigned int capability;
889 int rc;
890
891 rc = get_cpu_capability(&capability);
892 if (rc)
893 return rc;
894 return sprintf(buf, "%u\n", capability);
895}
896static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
897
4a0b2b4d
AK
898static ssize_t show_idle_count(struct sys_device *dev,
899 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
900{
901 struct s390_idle_data *idle;
902 unsigned long long idle_count;
e98bbaaf 903 unsigned int sequence;
fae8b22d
HC
904
905 idle = &per_cpu(s390_idle, dev->id);
e98bbaaf
MS
906repeat:
907 sequence = idle->sequence;
908 smp_rmb();
909 if (sequence & 1)
910 goto repeat;
fae8b22d 911 idle_count = idle->idle_count;
6f430924
MS
912 if (idle->idle_enter)
913 idle_count++;
e98bbaaf
MS
914 smp_rmb();
915 if (idle->sequence != sequence)
916 goto repeat;
fae8b22d
HC
917 return sprintf(buf, "%llu\n", idle_count);
918}
919static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
920
4a0b2b4d
AK
921static ssize_t show_idle_time(struct sys_device *dev,
922 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
923{
924 struct s390_idle_data *idle;
6f430924 925 unsigned long long now, idle_time, idle_enter;
e98bbaaf 926 unsigned int sequence;
fae8b22d
HC
927
928 idle = &per_cpu(s390_idle, dev->id);
6f430924 929 now = get_clock();
e98bbaaf
MS
930repeat:
931 sequence = idle->sequence;
932 smp_rmb();
933 if (sequence & 1)
934 goto repeat;
6f430924
MS
935 idle_time = idle->idle_time;
936 idle_enter = idle->idle_enter;
937 if (idle_enter != 0ULL && idle_enter < now)
938 idle_time += now - idle_enter;
e98bbaaf
MS
939 smp_rmb();
940 if (idle->sequence != sequence)
941 goto repeat;
6f430924 942 return sprintf(buf, "%llu\n", idle_time >> 12);
fae8b22d 943}
69d39d66 944static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 945
08d07968 946static struct attribute *cpu_online_attrs[] = {
fae8b22d
HC
947 &attr_capability.attr,
948 &attr_idle_count.attr,
69d39d66 949 &attr_idle_time_us.attr,
fae8b22d
HC
950 NULL,
951};
952
08d07968
HC
953static struct attribute_group cpu_online_attr_group = {
954 .attrs = cpu_online_attrs,
fae8b22d
HC
955};
956
2fc2d1e9
HC
957static int __cpuinit smp_cpu_notify(struct notifier_block *self,
958 unsigned long action, void *hcpu)
959{
960 unsigned int cpu = (unsigned int)(long)hcpu;
961 struct cpu *c = &per_cpu(cpu_devices, cpu);
962 struct sys_device *s = &c->sysdev;
fae8b22d 963 struct s390_idle_data *idle;
d882ba69 964 int err = 0;
2fc2d1e9
HC
965
966 switch (action) {
967 case CPU_ONLINE:
8bb78442 968 case CPU_ONLINE_FROZEN:
fae8b22d 969 idle = &per_cpu(s390_idle, cpu);
e98bbaaf 970 memset(idle, 0, sizeof(struct s390_idle_data));
d882ba69 971 err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
972 break;
973 case CPU_DEAD:
8bb78442 974 case CPU_DEAD_FROZEN:
08d07968 975 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
976 break;
977 }
d882ba69 978 return notifier_from_errno(err);
2fc2d1e9
HC
979}
980
981static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 982 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
983};
984
2bc89b5e 985static int __devinit smp_add_present_cpu(int cpu)
08d07968
HC
986{
987 struct cpu *c = &per_cpu(cpu_devices, cpu);
988 struct sys_device *s = &c->sysdev;
989 int rc;
990
991 c->hotpluggable = 1;
992 rc = register_cpu(c, cpu);
993 if (rc)
994 goto out;
995 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
996 if (rc)
997 goto out_cpu;
998 if (!cpu_online(cpu))
999 goto out;
1000 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1001 if (!rc)
1002 return 0;
1003 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1004out_cpu:
1005#ifdef CONFIG_HOTPLUG_CPU
1006 unregister_cpu(c);
1007#endif
1008out:
1009 return rc;
1010}
1011
1012#ifdef CONFIG_HOTPLUG_CPU
1e489518 1013
67060d9c 1014int __ref smp_rescan_cpus(void)
08d07968
HC
1015{
1016 cpumask_t newcpus;
1017 int cpu;
1018 int rc;
1019
9d40d2e3 1020 get_online_cpus();
0b18d318 1021 mutex_lock(&smp_cpu_state_mutex);
08d07968 1022 newcpus = cpu_present_map;
1e489518 1023 rc = __smp_rescan_cpus();
08d07968
HC
1024 if (rc)
1025 goto out;
1026 cpus_andnot(newcpus, cpu_present_map, newcpus);
1027 for_each_cpu_mask(cpu, newcpus) {
1028 rc = smp_add_present_cpu(cpu);
1029 if (rc)
1030 cpu_clear(cpu, cpu_present_map);
1031 }
1032 rc = 0;
1033out:
08d07968 1034 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1035 put_online_cpus();
c10fde0d
HC
1036 if (!cpus_empty(newcpus))
1037 topology_schedule_update();
1e489518
HC
1038 return rc;
1039}
1040
c9be0a36
AK
1041static ssize_t __ref rescan_store(struct sysdev_class *class,
1042 struct sysdev_class_attribute *attr,
1043 const char *buf,
1e489518
HC
1044 size_t count)
1045{
1046 int rc;
1047
1048 rc = smp_rescan_cpus();
08d07968
HC
1049 return rc ? rc : count;
1050}
da5aae70 1051static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
1052#endif /* CONFIG_HOTPLUG_CPU */
1053
5fbcae57
HC
1054static ssize_t dispatching_show(struct sysdev_class *class,
1055 struct sysdev_class_attribute *attr,
1056 char *buf)
c10fde0d
HC
1057{
1058 ssize_t count;
1059
1060 mutex_lock(&smp_cpu_state_mutex);
1061 count = sprintf(buf, "%d\n", cpu_management);
1062 mutex_unlock(&smp_cpu_state_mutex);
1063 return count;
1064}
1065
c9be0a36
AK
1066static ssize_t dispatching_store(struct sysdev_class *dev,
1067 struct sysdev_class_attribute *attr,
1068 const char *buf,
da5aae70 1069 size_t count)
c10fde0d
HC
1070{
1071 int val, rc;
1072 char delim;
1073
1074 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1075 return -EINVAL;
1076 if (val != 0 && val != 1)
1077 return -EINVAL;
1078 rc = 0;
c10fde0d 1079 get_online_cpus();
0b18d318 1080 mutex_lock(&smp_cpu_state_mutex);
c10fde0d
HC
1081 if (cpu_management == val)
1082 goto out;
1083 rc = topology_set_cpu_management(val);
1084 if (!rc)
1085 cpu_management = val;
1086out:
c10fde0d 1087 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1088 put_online_cpus();
c10fde0d
HC
1089 return rc ? rc : count;
1090}
da5aae70
HC
1091static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
1092 dispatching_store);
c10fde0d 1093
1da177e4
LT
1094static int __init topology_init(void)
1095{
1096 int cpu;
fae8b22d 1097 int rc;
2fc2d1e9
HC
1098
1099 register_cpu_notifier(&smp_cpu_nb);
1da177e4 1100
08d07968 1101#ifdef CONFIG_HOTPLUG_CPU
da5aae70 1102 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
08d07968
HC
1103 if (rc)
1104 return rc;
1105#endif
da5aae70 1106 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
c10fde0d
HC
1107 if (rc)
1108 return rc;
08d07968
HC
1109 for_each_present_cpu(cpu) {
1110 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1111 if (rc)
1112 return rc;
1da177e4
LT
1113 }
1114 return 0;
1115}
1da177e4 1116subsys_initcall(topology_init);