[mirror_ubuntu-eoan-kernel.git] / arch / s390 / kernel / swsusp.S

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * S390 64-bit swsusp implementation
 *
 * Copyright IBM Corp. 2009
 *
 * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
 *	      Michael Holzheu <holzheu@linux.vnet.ibm.com>
 */

#include <linux/linkage.h>
#include <asm/page.h>
#include <asm/ptrace.h>
#include <asm/thread_info.h>
#include <asm/asm-offsets.h>
#include <asm/nospec-insn.h>
#include <asm/sigp.h>

/*
 * Save register context in absolute 0 lowcore and call swsusp_save() to
 * create in-memory kernel image. The context is saved in the designated
 * "store status" memory locations (see POP).
 * We return from this function twice. The first time during the suspend to
 * disk process. The second time via the swsusp_arch_resume() function
 * (see below) in the resume process.
 * This function runs with disabled interrupts.
 */
	GEN_BR_THUNK %r14

	.section .text
ENTRY(swsusp_arch_suspend)
	lg	%r1,__LC_NODAT_STACK
	stmg	%r6,%r15,__SF_GPRS(%r1)
	aghi	%r1,-STACK_FRAME_OVERHEAD
	stg	%r15,__SF_BACKCHAIN(%r1)
	lgr	%r15,%r1

	/* Store FPU registers */
	brasl	%r14,save_fpu_regs

	/* Deactivate DAT */
	stnsm	__SF_EMPTY(%r15),0xfb

	/* Store prefix register on stack */
	stpx	__SF_EMPTY(%r15)

	/* Save prefix register contents for lowcore copy */
	llgf	%r10,__SF_EMPTY(%r15)

	/* Get pointer to save area */
	lghi	%r1,0x1000

	/* Save CPU address */
	stap	__LC_EXT_CPU_ADDR(%r0)

	/* Store registers */
	mvc	0x318(4,%r1),__SF_EMPTY(%r15)	/* move prefix to lowcore */
	stam	%a0,%a15,0x340(%r1)		/* store access registers */
	stctg	%c0,%c15,0x380(%r1)		/* store control registers */
	stmg	%r0,%r15,0x280(%r1)		/* store general registers */

	stpt	0x328(%r1)			/* store timer */
	stck	__SF_EMPTY(%r15)		/* store clock */
	stckc	0x330(%r1)			/* store clock comparator */

	/* Update cputime accounting before going to sleep */
	lg	%r0,__LC_LAST_UPDATE_TIMER
	slg	%r0,0x328(%r1)
	alg	%r0,__LC_SYSTEM_TIMER
	stg	%r0,__LC_SYSTEM_TIMER
	mvc	__LC_LAST_UPDATE_TIMER(8),0x328(%r1)
	lg	%r0,__LC_LAST_UPDATE_CLOCK
	slg	%r0,__SF_EMPTY(%r15)
	alg	%r0,__LC_STEAL_TIMER
	stg	%r0,__LC_STEAL_TIMER
	mvc	__LC_LAST_UPDATE_CLOCK(8),__SF_EMPTY(%r15)

	/* Activate DAT */
	stosm	__SF_EMPTY(%r15),0x04

	/* Set prefix page to zero */
	xc	__SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	spx	__SF_EMPTY(%r15)

	/* Save absolute zero pages */
	larl	%r2,suspend_zero_pages
	lg	%r2,0(%r2)
	lghi	%r4,0
	lghi	%r3,2*PAGE_SIZE
	lghi	%r5,2*PAGE_SIZE
1:	mvcle	%r2,%r4,0
	jo	1b

	/* Copy lowcore to absolute zero lowcore */
	lghi	%r2,0
	lgr	%r4,%r10
	lghi	%r3,2*PAGE_SIZE
	lghi	%r5,2*PAGE_SIZE
1:	mvcle	%r2,%r4,0
	jo	1b

	/* Save image */
	brasl	%r14,swsusp_save

	/* Restore prefix register and return */
	lghi	%r1,0x1000
	spx	0x318(%r1)
	lmg	%r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	lghi	%r2,0
	BR_EX	%r14
ENDPROC(swsusp_arch_suspend)

/*
 * Restore saved memory image to correct place and restore register context.
 * Then we return to the function that called swsusp_arch_suspend().
 * swsusp_arch_resume() runs with disabled interrupts.
 */
ENTRY(swsusp_arch_resume)
	stmg	%r6,%r15,__SF_GPRS(%r15)
	lgr	%r1,%r15
	aghi	%r15,-STACK_FRAME_OVERHEAD
	stg	%r1,__SF_BACKCHAIN(%r15)

	/* Make all free pages stable */
	lghi	%r2,1
	brasl	%r14,arch_set_page_states

	/* Set prefix page to zero */
	xc	__SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	spx	__SF_EMPTY(%r15)

	/* Deactivate DAT */
	stnsm	__SF_EMPTY(%r15),0xfb

	/* Restore saved image */
	larl	%r1,restore_pblist
	lg	%r1,0(%r1)
	ltgr	%r1,%r1
	jz	2f
0:
	lg	%r2,8(%r1)
	lg	%r4,0(%r1)
	iske	%r0,%r4
	lghi	%r3,PAGE_SIZE
	lghi	%r5,PAGE_SIZE
1:
	mvcle	%r2,%r4,0
	jo	1b
	lg	%r2,8(%r1)
	sske	%r0,%r2
	lg	%r1,16(%r1)
	ltgr	%r1,%r1
	jnz	0b
2:
	ptlb				/* flush tlb */

	/* Reset System */
	larl	%r1,.Lnew_pgm_check_psw
	epsw	%r2,%r3
	stm	%r2,%r3,0(%r1)
	mvc	__LC_PGM_NEW_PSW(16,%r0),0(%r1)
	larl	%r1,__swsusp_reset_dma
	lg	%r1,0(%r1)
	BASR_EX	%r14,%r1
	larl	%r1,smp_cpu_mt_shift
	icm	%r1,15,0(%r1)
	jz	smt_done
	llgfr	%r1,%r1
smt_loop:
	sigp	%r1,%r0,SIGP_SET_MULTI_THREADING
	brc	8,smt_done			/* accepted */
	brc	2,smt_loop			/* busy, try again */
smt_done:
	larl	%r1,.Lnew_pgm_check_psw
	lpswe	0(%r1)
pgm_check_entry:

	/* Switch to original suspend CPU */
	larl	%r1,.Lresume_cpu		/* Resume CPU address: r2 */
	stap	0(%r1)
	llgh	%r2,0(%r1)
	llgh	%r1,__LC_EXT_CPU_ADDR(%r0)	/* Suspend CPU address: r1 */
	cgr	%r1,%r2
	je	restore_registers		/* r1 = r2 -> nothing to do */
	larl	%r4,.Lrestart_suspend_psw	/* Set new restart PSW */
	mvc	__LC_RST_NEW_PSW(16,%r0),0(%r4)
3:
	sigp	%r9,%r1,SIGP_INITIAL_CPU_RESET	/* sigp initial cpu reset */
	brc	8,4f				/* accepted */
	brc	2,3b				/* busy, try again */

	/* Suspend CPU not available -> panic */
	larl	%r15,init_thread_union+THREAD_SIZE-STACK_FRAME_OVERHEAD
	larl	%r2,.Lpanic_string
	brasl	%r14,sclp_early_printk_force
	larl	%r3,.Ldisabled_wait_31
	lpsw	0(%r3)
4:
	/* Switch to suspend CPU */
	sigp	%r9,%r1,SIGP_RESTART	/* sigp restart to suspend CPU */
	brc	2,4b			/* busy, try again */
5:
	sigp	%r9,%r2,SIGP_STOP	/* sigp stop to current resume CPU */
	brc	2,5b			/* busy, try again */
6:	j	6b

restart_suspend:
	larl	%r1,.Lresume_cpu
	llgh	%r2,0(%r1)
7:
	sigp	%r9,%r2,SIGP_SENSE	/* sigp sense, wait for resume CPU */
	brc	8,7b			/* accepted, status 0, still running */
	brc	2,7b			/* busy, try again */
	tmll	%r9,0x40		/* Test if resume CPU is stopped */
	jz	7b

restore_registers:
	/* Restore registers */
	lghi	%r13,0x1000		/* %r1 = pointer to save area */

	/* Ignore time spent in suspended state. */
	llgf	%r1,0x318(%r13)
	stck	__LC_LAST_UPDATE_CLOCK(%r1)
	spt	0x328(%r13)		/* reprogram timer */
	//sckc	0x330(%r13)		/* set clock comparator */

	lctlg	%c0,%c15,0x380(%r13)	/* load control registers */
	lam	%a0,%a15,0x340(%r13)	/* load access registers */

	/* Load old stack */
	lg	%r15,0x2f8(%r13)

	/* Save prefix register */
	mvc __SF_EMPTY(4,%r15),0x318(%r13)

	/* Restore absolute zero pages */
	lghi	%r2,0
	larl	%r4,suspend_zero_pages
	lg	%r4,0(%r4)
	lghi	%r3,2*PAGE_SIZE
	lghi	%r5,2*PAGE_SIZE
1:	mvcle	%r2,%r4,0
	jo	1b

	/* Restore prefix register */
	spx	__SF_EMPTY(%r15)

	/* Activate DAT */
	stosm	__SF_EMPTY(%r15),0x04

	/* Make all free pages unstable */
	lghi	%r2,0
	brasl	%r14,arch_set_page_states

	/* Call arch specific early resume code */
	brasl	%r14,s390_early_resume

	/* Return 0 */
	lmg	%r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	lghi	%r2,0
	BR_EX	%r14
ENDPROC(swsusp_arch_resume)

	.section .data..nosave,"aw",@progbits
	.align	8
.Ldisabled_wait_31:
	.long  0x000a0000,0x00000000
.Lpanic_string:
	.asciz	"Resume not possible because suspend CPU is no longer available\n"
	.align	8
.Lrestart_suspend_psw:
	.quad	0x0000000180000000,restart_suspend
.Lnew_pgm_check_psw:
	.quad	0,pgm_check_entry
.Lresume_cpu:
	.byte	0,0
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
155af2f9 HJP	2	/*
	3	* S390 64-bit swsusp implementation
	4	*
	5	* Copyright IBM Corp. 2009
	6	*
	7	* Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
	8	* Michael Holzheu <holzheu@linux.vnet.ibm.com>
	9	*/
	10
144d634a	11	#include <linux/linkage.h>
155af2f9 HJP	12	#include <asm/page.h>
155af2f9 HJP	13	#include <asm/ptrace.h>
1aaf179d	14	#include <asm/thread_info.h>
155af2f9	15	#include <asm/asm-offsets.h>
c50c84c3	16	#include <asm/nospec-insn.h>
eb546195	17	#include <asm/sigp.h>
155af2f9 HJP	18
	19	/*
	20	* Save register context in absolute 0 lowcore and call swsusp_save() to
	21	* create in-memory kernel image. The context is saved in the designated
	22	* "store status" memory locations (see POP).
	23	* We return from this function twice. The first time during the suspend to
	24	* disk process. The second time via the swsusp_arch_resume() function
	25	* (see below) in the resume process.
	26	* This function runs with disabled interrupts.
	27	*/
c50c84c3 MS	28	GEN_BR_THUNK %r14
c50c84c3 MS	29
155af2f9	30	.section .text
144d634a	31	ENTRY(swsusp_arch_suspend)
ce3dc447	32	lg %r1,__LC_NODAT_STACK
ce3dc447	33	stmg %r6,%r15,__SF_GPRS(%r1)
634692ab	34	aghi %r1,-STACK_FRAME_OVERHEAD
ce3dc447	35	stg %r15,__SF_BACKCHAIN(%r1)
634692ab	36	lgr %r15,%r1
155af2f9	37
88d64253 MS	38	/* Store FPU registers */
	39	brasl %r14,save_fpu_regs
	40
155af2f9 HJP	41	/* Deactivate DAT */
	42	stnsm __SF_EMPTY(%r15),0xfb
	43
155af2f9 HJP	44	/* Store prefix register on stack */
	45	stpx __SF_EMPTY(%r15)
	46
91c15a95 MH	47	/* Save prefix register contents for lowcore copy */
91c15a95 MH	48	llgf %r10,__SF_EMPTY(%r15)
155af2f9 HJP	49
155af2f9 HJP	50	/* Get pointer to save area */
5f954c34	51	lghi %r1,0x1000
155af2f9	52
1aaf179d	53	/* Save CPU address */
7e180bd8	54	stap __LC_EXT_CPU_ADDR(%r0)
1aaf179d	55
155af2f9 HJP	56	/* Store registers */
155af2f9 HJP	57	mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
155af2f9 HJP	58	stam %a0,%a15,0x340(%r1) /* store access registers */
	59	stctg %c0,%c15,0x380(%r1) /* store control registers */
	60	stmg %r0,%r15,0x280(%r1) /* store general registers */
	61
	62	stpt 0x328(%r1) /* store timer */
623c08e4	63	stck __SF_EMPTY(%r15) /* store clock */
155af2f9 HJP	64	stckc 0x330(%r1) /* store clock comparator */
155af2f9 HJP	65
623c08e4 MS	66	/* Update cputime accounting before going to sleep */
	67	lg %r0,__LC_LAST_UPDATE_TIMER
	68	slg %r0,0x328(%r1)
	69	alg %r0,__LC_SYSTEM_TIMER
	70	stg %r0,__LC_SYSTEM_TIMER
	71	mvc __LC_LAST_UPDATE_TIMER(8),0x328(%r1)
	72	lg %r0,__LC_LAST_UPDATE_CLOCK
	73	slg %r0,__SF_EMPTY(%r15)
	74	alg %r0,__LC_STEAL_TIMER
	75	stg %r0,__LC_STEAL_TIMER
	76	mvc __LC_LAST_UPDATE_CLOCK(8),__SF_EMPTY(%r15)
	77
155af2f9 HJP	78	/* Activate DAT */
	79	stosm __SF_EMPTY(%r15),0x04
	80
	81	/* Set prefix page to zero */
	82	xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	83	spx __SF_EMPTY(%r15)
	84
91c15a95 MH	85	/* Save absolute zero pages */
	86	larl %r2,suspend_zero_pages
	87	lg %r2,0(%r2)
	88	lghi %r4,0
	89	lghi %r3,2*PAGE_SIZE
	90	lghi %r5,2*PAGE_SIZE
	91	1: mvcle %r2,%r4,0
	92	jo 1b
	93
	94	/* Copy lowcore to absolute zero lowcore */
5f954c34	95	lghi %r2,0
91c15a95	96	lgr %r4,%r10
5f954c34 HC	97	lghi %r3,2*PAGE_SIZE
	98	lghi %r5,2*PAGE_SIZE
	99	1: mvcle %r2,%r4,0
	100	jo 1b
155af2f9 HJP	101
	102	/* Save image */
	103	brasl %r14,swsusp_save
	104
155af2f9 HJP	105	/* Restore prefix register and return */
	106	lghi %r1,0x1000
	107	spx 0x318(%r1)
	108	lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	109	lghi %r2,0
c50c84c3	110	BR_EX %r14
26a374ae	111	ENDPROC(swsusp_arch_suspend)
155af2f9 HJP	112
	113	/*
	114	* Restore saved memory image to correct place and restore register context.
	115	* Then we return to the function that called swsusp_arch_suspend().
	116	* swsusp_arch_resume() runs with disabled interrupts.
	117	*/
144d634a	118	ENTRY(swsusp_arch_resume)
155af2f9 HJP	119	stmg %r6,%r15,__SF_GPRS(%r15)
	120	lgr %r1,%r15
	121	aghi %r15,-STACK_FRAME_OVERHEAD
	122	stg %r1,__SF_BACKCHAIN(%r15)
	123
846955c8 HC	124	/* Make all free pages stable */
	125	lghi %r2,1
	126	brasl %r14,arch_set_page_states
1aaf179d	127
155af2f9 HJP	128	/* Set prefix page to zero */
	129	xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	130	spx __SF_EMPTY(%r15)
	131
c8e8ed38 MS	132	/* Deactivate DAT */
	133	stnsm __SF_EMPTY(%r15),0xfb
	134
155af2f9 HJP	135	/* Restore saved image */
	136	larl %r1,restore_pblist
	137	lg %r1,0(%r1)
	138	ltgr %r1,%r1
	139	jz 2f
	140	0:
	141	lg %r2,8(%r1)
	142	lg %r4,0(%r1)
85055dd8	143	iske %r0,%r4
155af2f9 HJP	144	lghi %r3,PAGE_SIZE
	145	lghi %r5,PAGE_SIZE
	146	1:
	147	mvcle %r2,%r4,0
	148	jo 1b
85055dd8 MS	149	lg %r2,8(%r1)
85055dd8 MS	150	sske %r0,%r2
155af2f9 HJP	151	lg %r1,16(%r1)
	152	ltgr %r1,%r1
	153	jnz 0b
	154	2:
	155	ptlb /* flush tlb */
	156
2583d1ef	157	/* Reset System */
1aaf179d	158	larl %r1,.Lnew_pgm_check_psw
2583d1ef HC	159	epsw %r2,%r3
	160	stm %r2,%r3,0(%r1)
	161	mvc __LC_PGM_NEW_PSW(16,%r0),0(%r1)
a80313ff GS	162	larl %r1,__swsusp_reset_dma
	163	lg %r1,0(%r1)
	164	BASR_EX %r14,%r1
1833c9f6 HC	165	larl %r1,smp_cpu_mt_shift
	166	icm %r1,15,0(%r1)
	167	jz smt_done
	168	llgfr %r1,%r1
	169	smt_loop:
	170	sigp %r1,%r0,SIGP_SET_MULTI_THREADING
	171	brc 8,smt_done /* accepted */
	172	brc 2,smt_loop /* busy, try again */
	173	smt_done:
1aaf179d	174	larl %r1,.Lnew_pgm_check_psw
2583d1ef HC	175	lpswe 0(%r1)
2583d1ef HC	176	pgm_check_entry:
2583d1ef	177
1aaf179d MH	178	/* Switch to original suspend CPU */
	179	larl %r1,.Lresume_cpu /* Resume CPU address: r2 */
	180	stap 0(%r1)
	181	llgh %r2,0(%r1)
7e180bd8	182	llgh %r1,__LC_EXT_CPU_ADDR(%r0) /* Suspend CPU address: r1 */
1aaf179d MH	183	cgr %r1,%r2
	184	je restore_registers /* r1 = r2 -> nothing to do */
	185	larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */
abd1ecf2	186	mvc __LC_RST_NEW_PSW(16,%r0),0(%r4)
1aaf179d	187	3:
eb546195	188	sigp %r9,%r1,SIGP_INITIAL_CPU_RESET /* sigp initial cpu reset */
8b646bd7 MS	189	brc 8,4f /* accepted */
8b646bd7 MS	190	brc 2,3b /* busy, try again */
1aaf179d MH	191
1aaf179d MH	192	/* Suspend CPU not available -> panic */
4e62d458	193	larl %r15,init_thread_union+THREAD_SIZE-STACK_FRAME_OVERHEAD
1aaf179d	194	larl %r2,.Lpanic_string
55a5542a	195	brasl %r14,sclp_early_printk_force
1aaf179d MH	196	larl %r3,.Ldisabled_wait_31
	197	lpsw 0(%r3)
	198	4:
	199	/* Switch to suspend CPU */
eb546195	200	sigp %r9,%r1,SIGP_RESTART /* sigp restart to suspend CPU */
1aaf179d MH	201	brc 2,4b /* busy, try again */
1aaf179d MH	202	5:
eb546195	203	sigp %r9,%r2,SIGP_STOP /* sigp stop to current resume CPU */
f8501ba7	204	brc 2,5b /* busy, try again */
1aaf179d MH	205	6: j 6b
	206
	207	restart_suspend:
	208	larl %r1,.Lresume_cpu
	209	llgh %r2,0(%r1)
	210	7:
eb546195	211	sigp %r9,%r2,SIGP_SENSE /* sigp sense, wait for resume CPU */
b3dcf3de	212	brc 8,7b /* accepted, status 0, still running */
1aaf179d MH	213	brc 2,7b /* busy, try again */
	214	tmll %r9,0x40 /* Test if resume CPU is stopped */
	215	jz 7b
	216
	217	restore_registers:
155af2f9	218	/* Restore registers */
623c08e4	219	lghi %r13,0x1000 /* %r1 = pointer to save area */
155af2f9	220
623c08e4 MS	221	/* Ignore time spent in suspended state. */
	222	llgf %r1,0x318(%r13)
	223	stck __LC_LAST_UPDATE_CLOCK(%r1)
155af2f9 HJP	224	spt 0x328(%r13) /* reprogram timer */
	225	//sckc 0x330(%r13) /* set clock comparator */
	226
	227	lctlg %c0,%c15,0x380(%r13) /* load control registers */
	228	lam %a0,%a15,0x340(%r13) /* load access registers */
	229
155af2f9 HJP	230	/* Load old stack */
	231	lg %r15,0x2f8(%r13)
	232
91c15a95 MH	233	/* Save prefix register */
	234	mvc __SF_EMPTY(4,%r15),0x318(%r13)
	235
	236	/* Restore absolute zero pages */
	237	lghi %r2,0
	238	larl %r4,suspend_zero_pages
	239	lg %r4,0(%r4)
	240	lghi %r3,2*PAGE_SIZE
	241	lghi %r5,2*PAGE_SIZE
	242	1: mvcle %r2,%r4,0
	243	jo 1b
	244
155af2f9	245	/* Restore prefix register */
91c15a95	246	spx __SF_EMPTY(%r15)
155af2f9	247
155af2f9 HJP	248	/* Activate DAT */
	249	stosm __SF_EMPTY(%r15),0x04
	250
846955c8 HC	251	/* Make all free pages unstable */
	252	lghi %r2,0
	253	brasl %r14,arch_set_page_states
	254
77e844b9 SO	255	/* Call arch specific early resume code */
77e844b9 SO	256	brasl %r14,s390_early_resume
889ee955	257
155af2f9 HJP	258	/* Return 0 */
	259	lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	260	lghi %r2,0
c50c84c3	261	BR_EX %r14
26a374ae	262	ENDPROC(swsusp_arch_resume)
2583d1ef	263
07b3bb1e	264	.section .data..nosave,"aw",@progbits
2583d1ef	265	.align 8
1aaf179d MH	266	.Ldisabled_wait_31:
	267	.long 0x000a0000,0x00000000
	268	.Lpanic_string:
02407baa	269	.asciz "Resume not possible because suspend CPU is no longer available\n"
1aaf179d	270	.align 8
1aaf179d MH	271	.Lrestart_suspend_psw:
	272	.quad 0x0000000180000000,restart_suspend
	273	.Lnew_pgm_check_psw:
2583d1ef	274	.quad 0,pgm_check_entry
1aaf179d MH	275	.Lresume_cpu:
1aaf179d MH	276	.byte 0,0