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Commit | Line | Data |
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a17ae4c3 | 1 | // SPDX-License-Identifier: GPL-2.0 |
dbd70fb4 | 2 | /* |
a53c8fab | 3 | * Copyright IBM Corp. 2007, 2011 |
dbd70fb4 HC |
4 | * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> |
5 | */ | |
6 | ||
395d31d4 MS |
7 | #define KMSG_COMPONENT "cpu" |
8 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
9 | ||
83a24e32 | 10 | #include <linux/workqueue.h> |
57c8a661 | 11 | #include <linux/memblock.h> |
51dce386 HC |
12 | #include <linux/uaccess.h> |
13 | #include <linux/sysctl.h> | |
83a24e32 HC |
14 | #include <linux/cpuset.h> |
15 | #include <linux/device.h> | |
80020fbd | 16 | #include <linux/export.h> |
83a24e32 | 17 | #include <linux/kernel.h> |
dbd70fb4 | 18 | #include <linux/sched.h> |
105ab3d8 | 19 | #include <linux/sched/topology.h> |
83a24e32 | 20 | #include <linux/delay.h> |
d05d15da HC |
21 | #include <linux/init.h> |
22 | #include <linux/slab.h> | |
dbd70fb4 HC |
23 | #include <linux/cpu.h> |
24 | #include <linux/smp.h> | |
83a24e32 | 25 | #include <linux/mm.h> |
3a368f74 PH |
26 | #include <linux/nodemask.h> |
27 | #include <linux/node.h> | |
78609132 | 28 | #include <asm/sysinfo.h> |
3a368f74 | 29 | #include <asm/numa.h> |
dbd70fb4 | 30 | |
c10fde0d HC |
31 | #define PTF_HORIZONTAL (0UL) |
32 | #define PTF_VERTICAL (1UL) | |
33 | #define PTF_CHECK (2UL) | |
dbd70fb4 | 34 | |
1b25fda0 HC |
35 | enum { |
36 | TOPOLOGY_MODE_HW, | |
37 | TOPOLOGY_MODE_SINGLE, | |
38 | TOPOLOGY_MODE_PACKAGE, | |
39 | TOPOLOGY_MODE_UNINITIALIZED | |
40 | }; | |
41 | ||
4cb14bc8 HC |
42 | struct mask_info { |
43 | struct mask_info *next; | |
10d38589 | 44 | unsigned char id; |
dbd70fb4 HC |
45 | cpumask_t mask; |
46 | }; | |
47 | ||
1b25fda0 | 48 | static int topology_mode = TOPOLOGY_MODE_UNINITIALIZED; |
d1e57508 | 49 | static void set_topology_timer(void); |
dbd70fb4 | 50 | static void topology_work_fn(struct work_struct *work); |
c30f91b6 | 51 | static struct sysinfo_15_1_x *tl_info; |
dbd70fb4 | 52 | |
d1e57508 | 53 | static DECLARE_WORK(topology_work, topology_work_fn); |
d00aa4e7 | 54 | |
3a3814c2 | 55 | /* |
30fc4ca2 | 56 | * Socket/Book linked lists and cpu_topology updates are |
3a3814c2 MH |
57 | * protected by "sched_domains_mutex". |
58 | */ | |
d1e57508 | 59 | static struct mask_info socket_info; |
4cb14bc8 | 60 | static struct mask_info book_info; |
adac0f1e | 61 | static struct mask_info drawer_info; |
d1e57508 | 62 | |
30fc4ca2 HC |
63 | struct cpu_topology_s390 cpu_topology[NR_CPUS]; |
64 | EXPORT_SYMBOL_GPL(cpu_topology); | |
83a24e32 | 65 | |
8c910580 HC |
66 | cpumask_t cpus_with_topology; |
67 | ||
4cb14bc8 | 68 | static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu) |
dbd70fb4 | 69 | { |
dbd70fb4 HC |
70 | cpumask_t mask; |
71 | ||
d1e57508 | 72 | cpumask_copy(&mask, cpumask_of(cpu)); |
1b25fda0 HC |
73 | switch (topology_mode) { |
74 | case TOPOLOGY_MODE_HW: | |
75 | while (info) { | |
76 | if (cpumask_test_cpu(cpu, &info->mask)) { | |
77 | mask = info->mask; | |
78 | break; | |
79 | } | |
80 | info = info->next; | |
81 | } | |
82 | if (cpumask_empty(&mask)) | |
83 | cpumask_copy(&mask, cpumask_of(cpu)); | |
84 | break; | |
85 | case TOPOLOGY_MODE_PACKAGE: | |
86 | cpumask_copy(&mask, cpu_present_mask); | |
87 | break; | |
88 | default: | |
89 | /* fallthrough */ | |
90 | case TOPOLOGY_MODE_SINGLE: | |
91 | cpumask_copy(&mask, cpumask_of(cpu)); | |
92 | break; | |
0b52783d | 93 | } |
dbd70fb4 HC |
94 | return mask; |
95 | } | |
96 | ||
10ad34bc MS |
97 | static cpumask_t cpu_thread_map(unsigned int cpu) |
98 | { | |
99 | cpumask_t mask; | |
100 | int i; | |
101 | ||
102 | cpumask_copy(&mask, cpumask_of(cpu)); | |
1b25fda0 | 103 | if (topology_mode != TOPOLOGY_MODE_HW) |
10ad34bc MS |
104 | return mask; |
105 | cpu -= cpu % (smp_cpu_mtid + 1); | |
106 | for (i = 0; i <= smp_cpu_mtid; i++) | |
107 | if (cpu_present(cpu + i)) | |
108 | cpumask_set_cpu(cpu + i, &mask); | |
109 | return mask; | |
110 | } | |
111 | ||
251ea0ca HC |
112 | #define TOPOLOGY_CORE_BITS 64 |
113 | ||
86d18a55 HC |
114 | static void add_cpus_to_mask(struct topology_core *tl_core, |
115 | struct mask_info *drawer, | |
116 | struct mask_info *book, | |
117 | struct mask_info *socket) | |
dbd70fb4 | 118 | { |
439eb131 | 119 | struct cpu_topology_s390 *topo; |
10ad34bc | 120 | unsigned int core; |
dbd70fb4 | 121 | |
251ea0ca | 122 | for_each_set_bit(core, &tl_core->mask, TOPOLOGY_CORE_BITS) { |
10ad34bc MS |
123 | unsigned int rcore; |
124 | int lcpu, i; | |
dbd70fb4 | 125 | |
10ad34bc MS |
126 | rcore = TOPOLOGY_CORE_BITS - 1 - core + tl_core->origin; |
127 | lcpu = smp_find_processor_id(rcore << smp_cpu_mt_shift); | |
d1e57508 HC |
128 | if (lcpu < 0) |
129 | continue; | |
10ad34bc | 130 | for (i = 0; i <= smp_cpu_mtid; i++) { |
30fc4ca2 | 131 | topo = &cpu_topology[lcpu + i]; |
adac0f1e | 132 | topo->drawer_id = drawer->id; |
439eb131 | 133 | topo->book_id = book->id; |
86d18a55 | 134 | topo->socket_id = socket->id; |
439eb131 HC |
135 | topo->core_id = rcore; |
136 | topo->thread_id = lcpu + i; | |
1887aa07 | 137 | topo->dedicated = tl_core->d; |
adac0f1e | 138 | cpumask_set_cpu(lcpu + i, &drawer->mask); |
10ad34bc MS |
139 | cpumask_set_cpu(lcpu + i, &book->mask); |
140 | cpumask_set_cpu(lcpu + i, &socket->mask); | |
8c910580 | 141 | cpumask_set_cpu(lcpu + i, &cpus_with_topology); |
10ad34bc | 142 | smp_cpu_set_polarization(lcpu + i, tl_core->pp); |
dbd70fb4 HC |
143 | } |
144 | } | |
145 | } | |
146 | ||
4cb14bc8 | 147 | static void clear_masks(void) |
dbd70fb4 | 148 | { |
4cb14bc8 | 149 | struct mask_info *info; |
dbd70fb4 | 150 | |
d1e57508 | 151 | info = &socket_info; |
4cb14bc8 | 152 | while (info) { |
0f1959f5 | 153 | cpumask_clear(&info->mask); |
4cb14bc8 HC |
154 | info = info->next; |
155 | } | |
4cb14bc8 HC |
156 | info = &book_info; |
157 | while (info) { | |
0f1959f5 | 158 | cpumask_clear(&info->mask); |
4cb14bc8 | 159 | info = info->next; |
dbd70fb4 | 160 | } |
adac0f1e HC |
161 | info = &drawer_info; |
162 | while (info) { | |
163 | cpumask_clear(&info->mask); | |
164 | info = info->next; | |
165 | } | |
dbd70fb4 HC |
166 | } |
167 | ||
c30f91b6 | 168 | static union topology_entry *next_tle(union topology_entry *tle) |
dbd70fb4 | 169 | { |
c30f91b6 | 170 | if (!tle->nl) |
10ad34bc | 171 | return (union topology_entry *)((struct topology_core *)tle + 1); |
c30f91b6 | 172 | return (union topology_entry *)((struct topology_container *)tle + 1); |
dbd70fb4 HC |
173 | } |
174 | ||
86d18a55 | 175 | static void tl_to_masks(struct sysinfo_15_1_x *info) |
dbd70fb4 | 176 | { |
d1e57508 | 177 | struct mask_info *socket = &socket_info; |
83a24e32 | 178 | struct mask_info *book = &book_info; |
adac0f1e | 179 | struct mask_info *drawer = &drawer_info; |
c30f91b6 | 180 | union topology_entry *tle, *end; |
4cb14bc8 | 181 | |
86d18a55 | 182 | clear_masks(); |
c10fde0d | 183 | tle = info->tle; |
c30f91b6 | 184 | end = (union topology_entry *)((unsigned long)info + info->length); |
dbd70fb4 HC |
185 | while (tle < end) { |
186 | switch (tle->nl) { | |
adac0f1e HC |
187 | case 3: |
188 | drawer = drawer->next; | |
189 | drawer->id = tle->container.id; | |
190 | break; | |
dbd70fb4 | 191 | case 2: |
4cb14bc8 HC |
192 | book = book->next; |
193 | book->id = tle->container.id; | |
dbd70fb4 HC |
194 | break; |
195 | case 1: | |
d1e57508 HC |
196 | socket = socket->next; |
197 | socket->id = tle->container.id; | |
dbd70fb4 HC |
198 | break; |
199 | case 0: | |
86d18a55 | 200 | add_cpus_to_mask(&tle->cpu, drawer, book, socket); |
4baeb964 HC |
201 | break; |
202 | default: | |
203 | clear_masks(); | |
204 | return; | |
205 | } | |
206 | tle = next_tle(tle); | |
207 | } | |
208 | } | |
209 | ||
c10fde0d HC |
210 | static void topology_update_polarization_simple(void) |
211 | { | |
212 | int cpu; | |
213 | ||
5439050f | 214 | for_each_possible_cpu(cpu) |
50ab9a9a | 215 | smp_cpu_set_polarization(cpu, POLARIZATION_HRZ); |
c10fde0d HC |
216 | } |
217 | ||
218 | static int ptf(unsigned long fc) | |
dbd70fb4 HC |
219 | { |
220 | int rc; | |
221 | ||
222 | asm volatile( | |
223 | " .insn rre,0xb9a20000,%1,%1\n" | |
224 | " ipm %0\n" | |
225 | " srl %0,28\n" | |
226 | : "=d" (rc) | |
c10fde0d HC |
227 | : "d" (fc) : "cc"); |
228 | return rc; | |
229 | } | |
230 | ||
231 | int topology_set_cpu_management(int fc) | |
232 | { | |
83a24e32 | 233 | int cpu, rc; |
c10fde0d | 234 | |
9186d7a9 | 235 | if (!MACHINE_HAS_TOPOLOGY) |
c10fde0d HC |
236 | return -EOPNOTSUPP; |
237 | if (fc) | |
238 | rc = ptf(PTF_VERTICAL); | |
239 | else | |
240 | rc = ptf(PTF_HORIZONTAL); | |
241 | if (rc) | |
242 | return -EBUSY; | |
5439050f | 243 | for_each_possible_cpu(cpu) |
50ab9a9a | 244 | smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); |
dbd70fb4 HC |
245 | return rc; |
246 | } | |
247 | ||
d1e57508 | 248 | static void update_cpu_masks(void) |
d00aa4e7 | 249 | { |
439eb131 | 250 | struct cpu_topology_s390 *topo; |
1b25fda0 | 251 | int cpu, id; |
d00aa4e7 | 252 | |
4cb14bc8 | 253 | for_each_possible_cpu(cpu) { |
30fc4ca2 | 254 | topo = &cpu_topology[cpu]; |
439eb131 HC |
255 | topo->thread_mask = cpu_thread_map(cpu); |
256 | topo->core_mask = cpu_group_map(&socket_info, cpu); | |
257 | topo->book_mask = cpu_group_map(&book_info, cpu); | |
adac0f1e | 258 | topo->drawer_mask = cpu_group_map(&drawer_info, cpu); |
1b25fda0 HC |
259 | if (topology_mode != TOPOLOGY_MODE_HW) { |
260 | id = topology_mode == TOPOLOGY_MODE_PACKAGE ? 0 : cpu; | |
439eb131 HC |
261 | topo->thread_id = cpu; |
262 | topo->core_id = cpu; | |
1b25fda0 HC |
263 | topo->socket_id = id; |
264 | topo->book_id = id; | |
265 | topo->drawer_id = id; | |
8c910580 HC |
266 | if (cpu_present(cpu)) |
267 | cpumask_set_cpu(cpu, &cpus_with_topology); | |
d1e57508 | 268 | } |
4cb14bc8 | 269 | } |
3a368f74 | 270 | numa_update_cpu_topology(); |
4cb14bc8 HC |
271 | } |
272 | ||
96f4a70d | 273 | void store_topology(struct sysinfo_15_1_x *info) |
4cb14bc8 | 274 | { |
ae5ca67a | 275 | stsi(info, 15, 1, topology_mnest_limit()); |
d00aa4e7 HC |
276 | } |
277 | ||
1887aa07 MS |
278 | static void __arch_update_dedicated_flag(void *arg) |
279 | { | |
280 | if (topology_cpu_dedicated(smp_processor_id())) | |
281 | set_cpu_flag(CIF_DEDICATED_CPU); | |
282 | else | |
283 | clear_cpu_flag(CIF_DEDICATED_CPU); | |
284 | } | |
285 | ||
8c910580 | 286 | static int __arch_update_cpu_topology(void) |
dbd70fb4 | 287 | { |
c30f91b6 | 288 | struct sysinfo_15_1_x *info = tl_info; |
8c910580 | 289 | int rc = 0; |
dbd70fb4 | 290 | |
51dce386 | 291 | mutex_lock(&smp_cpu_state_mutex); |
8c910580 | 292 | cpumask_clear(&cpus_with_topology); |
3a368f74 PH |
293 | if (MACHINE_HAS_TOPOLOGY) { |
294 | rc = 1; | |
295 | store_topology(info); | |
296 | tl_to_masks(info); | |
c10fde0d | 297 | } |
d1e57508 | 298 | update_cpu_masks(); |
3a368f74 PH |
299 | if (!MACHINE_HAS_TOPOLOGY) |
300 | topology_update_polarization_simple(); | |
51dce386 | 301 | mutex_unlock(&smp_cpu_state_mutex); |
8c910580 HC |
302 | return rc; |
303 | } | |
304 | ||
305 | int arch_update_cpu_topology(void) | |
306 | { | |
307 | struct device *dev; | |
308 | int cpu, rc; | |
309 | ||
310 | rc = __arch_update_cpu_topology(); | |
1887aa07 | 311 | on_each_cpu(__arch_update_dedicated_flag, NULL, 0); |
dbd70fb4 | 312 | for_each_online_cpu(cpu) { |
8a25a2fd KS |
313 | dev = get_cpu_device(cpu); |
314 | kobject_uevent(&dev->kobj, KOBJ_CHANGE); | |
dbd70fb4 | 315 | } |
3a368f74 | 316 | return rc; |
dbd70fb4 HC |
317 | } |
318 | ||
fd781fa2 HC |
319 | static void topology_work_fn(struct work_struct *work) |
320 | { | |
f414f5f1 | 321 | rebuild_sched_domains(); |
dbd70fb4 HC |
322 | } |
323 | ||
c10fde0d HC |
324 | void topology_schedule_update(void) |
325 | { | |
326 | schedule_work(&topology_work); | |
327 | } | |
328 | ||
51dce386 HC |
329 | static void topology_flush_work(void) |
330 | { | |
331 | flush_work(&topology_work); | |
332 | } | |
333 | ||
5cd79d6a | 334 | static void topology_timer_fn(struct timer_list *unused) |
dbd70fb4 | 335 | { |
c10fde0d HC |
336 | if (ptf(PTF_CHECK)) |
337 | topology_schedule_update(); | |
dbd70fb4 HC |
338 | set_topology_timer(); |
339 | } | |
340 | ||
5cd79d6a | 341 | static struct timer_list topology_timer; |
d68bddb7 HC |
342 | |
343 | static atomic_t topology_poll = ATOMIC_INIT(0); | |
344 | ||
dbd70fb4 HC |
345 | static void set_topology_timer(void) |
346 | { | |
d68bddb7 HC |
347 | if (atomic_add_unless(&topology_poll, -1, 0)) |
348 | mod_timer(&topology_timer, jiffies + HZ / 10); | |
349 | else | |
350 | mod_timer(&topology_timer, jiffies + HZ * 60); | |
351 | } | |
352 | ||
353 | void topology_expect_change(void) | |
354 | { | |
355 | if (!MACHINE_HAS_TOPOLOGY) | |
356 | return; | |
357 | /* This is racy, but it doesn't matter since it is just a heuristic. | |
358 | * Worst case is that we poll in a higher frequency for a bit longer. | |
359 | */ | |
360 | if (atomic_read(&topology_poll) > 60) | |
361 | return; | |
362 | atomic_add(60, &topology_poll); | |
363 | set_topology_timer(); | |
dbd70fb4 HC |
364 | } |
365 | ||
83a24e32 HC |
366 | static int cpu_management; |
367 | ||
72f31889 LT |
368 | static ssize_t dispatching_show(struct device *dev, |
369 | struct device_attribute *attr, | |
83a24e32 HC |
370 | char *buf) |
371 | { | |
372 | ssize_t count; | |
373 | ||
374 | mutex_lock(&smp_cpu_state_mutex); | |
375 | count = sprintf(buf, "%d\n", cpu_management); | |
376 | mutex_unlock(&smp_cpu_state_mutex); | |
377 | return count; | |
378 | } | |
379 | ||
72f31889 LT |
380 | static ssize_t dispatching_store(struct device *dev, |
381 | struct device_attribute *attr, | |
83a24e32 HC |
382 | const char *buf, |
383 | size_t count) | |
384 | { | |
385 | int val, rc; | |
386 | char delim; | |
387 | ||
388 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
389 | return -EINVAL; | |
390 | if (val != 0 && val != 1) | |
391 | return -EINVAL; | |
392 | rc = 0; | |
393 | get_online_cpus(); | |
394 | mutex_lock(&smp_cpu_state_mutex); | |
395 | if (cpu_management == val) | |
396 | goto out; | |
397 | rc = topology_set_cpu_management(val); | |
d68bddb7 HC |
398 | if (rc) |
399 | goto out; | |
400 | cpu_management = val; | |
401 | topology_expect_change(); | |
83a24e32 HC |
402 | out: |
403 | mutex_unlock(&smp_cpu_state_mutex); | |
404 | put_online_cpus(); | |
405 | return rc ? rc : count; | |
406 | } | |
b6b996b6 | 407 | static DEVICE_ATTR_RW(dispatching); |
83a24e32 | 408 | |
72f31889 LT |
409 | static ssize_t cpu_polarization_show(struct device *dev, |
410 | struct device_attribute *attr, char *buf) | |
83a24e32 HC |
411 | { |
412 | int cpu = dev->id; | |
413 | ssize_t count; | |
414 | ||
415 | mutex_lock(&smp_cpu_state_mutex); | |
50ab9a9a | 416 | switch (smp_cpu_get_polarization(cpu)) { |
83a24e32 HC |
417 | case POLARIZATION_HRZ: |
418 | count = sprintf(buf, "horizontal\n"); | |
419 | break; | |
420 | case POLARIZATION_VL: | |
421 | count = sprintf(buf, "vertical:low\n"); | |
422 | break; | |
423 | case POLARIZATION_VM: | |
424 | count = sprintf(buf, "vertical:medium\n"); | |
425 | break; | |
426 | case POLARIZATION_VH: | |
427 | count = sprintf(buf, "vertical:high\n"); | |
428 | break; | |
429 | default: | |
430 | count = sprintf(buf, "unknown\n"); | |
431 | break; | |
432 | } | |
433 | mutex_unlock(&smp_cpu_state_mutex); | |
434 | return count; | |
435 | } | |
72f31889 | 436 | static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL); |
83a24e32 HC |
437 | |
438 | static struct attribute *topology_cpu_attrs[] = { | |
72f31889 | 439 | &dev_attr_polarization.attr, |
83a24e32 HC |
440 | NULL, |
441 | }; | |
442 | ||
443 | static struct attribute_group topology_cpu_attr_group = { | |
444 | .attrs = topology_cpu_attrs, | |
445 | }; | |
446 | ||
1887aa07 MS |
447 | static ssize_t cpu_dedicated_show(struct device *dev, |
448 | struct device_attribute *attr, char *buf) | |
449 | { | |
450 | int cpu = dev->id; | |
451 | ssize_t count; | |
452 | ||
453 | mutex_lock(&smp_cpu_state_mutex); | |
454 | count = sprintf(buf, "%d\n", topology_cpu_dedicated(cpu)); | |
455 | mutex_unlock(&smp_cpu_state_mutex); | |
456 | return count; | |
457 | } | |
458 | static DEVICE_ATTR(dedicated, 0444, cpu_dedicated_show, NULL); | |
459 | ||
460 | static struct attribute *topology_extra_cpu_attrs[] = { | |
461 | &dev_attr_dedicated.attr, | |
462 | NULL, | |
463 | }; | |
464 | ||
465 | static struct attribute_group topology_extra_cpu_attr_group = { | |
466 | .attrs = topology_extra_cpu_attrs, | |
467 | }; | |
468 | ||
83a24e32 HC |
469 | int topology_cpu_init(struct cpu *cpu) |
470 | { | |
1887aa07 MS |
471 | int rc; |
472 | ||
473 | rc = sysfs_create_group(&cpu->dev.kobj, &topology_cpu_attr_group); | |
474 | if (rc || !MACHINE_HAS_TOPOLOGY) | |
475 | return rc; | |
476 | rc = sysfs_create_group(&cpu->dev.kobj, &topology_extra_cpu_attr_group); | |
477 | if (rc) | |
478 | sysfs_remove_group(&cpu->dev.kobj, &topology_cpu_attr_group); | |
479 | return rc; | |
83a24e32 HC |
480 | } |
481 | ||
3ddb1b75 | 482 | static const struct cpumask *cpu_thread_mask(int cpu) |
10ad34bc | 483 | { |
30fc4ca2 | 484 | return &cpu_topology[cpu].thread_mask; |
10ad34bc MS |
485 | } |
486 | ||
487 | ||
2dfd7476 VG |
488 | const struct cpumask *cpu_coregroup_mask(int cpu) |
489 | { | |
30fc4ca2 | 490 | return &cpu_topology[cpu].core_mask; |
2dfd7476 VG |
491 | } |
492 | ||
493 | static const struct cpumask *cpu_book_mask(int cpu) | |
494 | { | |
30fc4ca2 | 495 | return &cpu_topology[cpu].book_mask; |
2dfd7476 VG |
496 | } |
497 | ||
adac0f1e HC |
498 | static const struct cpumask *cpu_drawer_mask(int cpu) |
499 | { | |
30fc4ca2 | 500 | return &cpu_topology[cpu].drawer_mask; |
adac0f1e HC |
501 | } |
502 | ||
2dfd7476 | 503 | static struct sched_domain_topology_level s390_topology[] = { |
10ad34bc | 504 | { cpu_thread_mask, cpu_smt_flags, SD_INIT_NAME(SMT) }, |
2dfd7476 VG |
505 | { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) }, |
506 | { cpu_book_mask, SD_INIT_NAME(BOOK) }, | |
adac0f1e | 507 | { cpu_drawer_mask, SD_INIT_NAME(DRAWER) }, |
c0e5ddab | 508 | { cpu_cpu_mask, SD_INIT_NAME(DIE) }, |
2dfd7476 VG |
509 | { NULL, }, |
510 | }; | |
511 | ||
d05d15da HC |
512 | static void __init alloc_masks(struct sysinfo_15_1_x *info, |
513 | struct mask_info *mask, int offset) | |
514 | { | |
515 | int i, nr_masks; | |
516 | ||
517 | nr_masks = info->mag[TOPOLOGY_NR_MAG - offset]; | |
518 | for (i = 0; i < info->mnest - offset; i++) | |
519 | nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i]; | |
520 | nr_masks = max(nr_masks, 1); | |
521 | for (i = 0; i < nr_masks; i++) { | |
eb31d559 | 522 | mask->next = memblock_alloc(sizeof(*mask->next), 8); |
8a7f97b9 MR |
523 | if (!mask->next) |
524 | panic("%s: Failed to allocate %zu bytes align=0x%x\n", | |
525 | __func__, sizeof(*mask->next), 8); | |
d05d15da HC |
526 | mask = mask->next; |
527 | } | |
528 | } | |
529 | ||
8c910580 | 530 | void __init topology_init_early(void) |
d05d15da HC |
531 | { |
532 | struct sysinfo_15_1_x *info; | |
d05d15da | 533 | |
ebb299a5 | 534 | set_sched_topology(s390_topology); |
1b25fda0 HC |
535 | if (topology_mode == TOPOLOGY_MODE_UNINITIALIZED) { |
536 | if (MACHINE_HAS_TOPOLOGY) | |
537 | topology_mode = TOPOLOGY_MODE_HW; | |
538 | else | |
539 | topology_mode = TOPOLOGY_MODE_SINGLE; | |
540 | } | |
d05d15da | 541 | if (!MACHINE_HAS_TOPOLOGY) |
8c910580 | 542 | goto out; |
eb31d559 | 543 | tl_info = memblock_alloc(PAGE_SIZE, PAGE_SIZE); |
8a7f97b9 MR |
544 | if (!tl_info) |
545 | panic("%s: Failed to allocate %lu bytes align=0x%lx\n", | |
546 | __func__, PAGE_SIZE, PAGE_SIZE); | |
d05d15da HC |
547 | info = tl_info; |
548 | store_topology(info); | |
496e59cc HC |
549 | pr_info("The CPU configuration topology of the machine is: %d %d %d %d %d %d / %d\n", |
550 | info->mag[0], info->mag[1], info->mag[2], info->mag[3], | |
551 | info->mag[4], info->mag[5], info->mnest); | |
d05d15da HC |
552 | alloc_masks(info, &socket_info, 1); |
553 | alloc_masks(info, &book_info, 2); | |
adac0f1e | 554 | alloc_masks(info, &drawer_info, 3); |
8c910580 HC |
555 | out: |
556 | __arch_update_cpu_topology(); | |
1887aa07 | 557 | __arch_update_dedicated_flag(NULL); |
d05d15da | 558 | } |
d05d15da | 559 | |
1b25fda0 HC |
560 | static inline int topology_get_mode(int enabled) |
561 | { | |
562 | if (!enabled) | |
563 | return TOPOLOGY_MODE_SINGLE; | |
564 | return MACHINE_HAS_TOPOLOGY ? TOPOLOGY_MODE_HW : TOPOLOGY_MODE_PACKAGE; | |
565 | } | |
566 | ||
51dce386 HC |
567 | static inline int topology_is_enabled(void) |
568 | { | |
569 | return topology_mode != TOPOLOGY_MODE_SINGLE; | |
570 | } | |
571 | ||
1b25fda0 HC |
572 | static int __init topology_setup(char *str) |
573 | { | |
574 | bool enabled; | |
575 | int rc; | |
576 | ||
577 | rc = kstrtobool(str, &enabled); | |
578 | if (rc) | |
579 | return rc; | |
580 | topology_mode = topology_get_mode(enabled); | |
581 | return 0; | |
582 | } | |
583 | early_param("topology", topology_setup); | |
584 | ||
51dce386 HC |
585 | static int topology_ctl_handler(struct ctl_table *ctl, int write, |
586 | void __user *buffer, size_t *lenp, loff_t *ppos) | |
587 | { | |
196851be | 588 | int enabled = topology_is_enabled(); |
51dce386 | 589 | int new_mode; |
196851be VG |
590 | int rc; |
591 | struct ctl_table ctl_entry = { | |
592 | .procname = ctl->procname, | |
593 | .data = &enabled, | |
594 | .maxlen = sizeof(int), | |
eec4844f MC |
595 | .extra1 = SYSCTL_ZERO, |
596 | .extra2 = SYSCTL_ONE, | |
196851be VG |
597 | }; |
598 | ||
599 | rc = proc_douintvec_minmax(&ctl_entry, write, buffer, lenp, ppos); | |
600 | if (rc < 0 || !write) | |
601 | return rc; | |
51dce386 | 602 | |
51dce386 | 603 | mutex_lock(&smp_cpu_state_mutex); |
196851be | 604 | new_mode = topology_get_mode(enabled); |
51dce386 HC |
605 | if (topology_mode != new_mode) { |
606 | topology_mode = new_mode; | |
607 | topology_schedule_update(); | |
608 | } | |
609 | mutex_unlock(&smp_cpu_state_mutex); | |
610 | topology_flush_work(); | |
196851be VG |
611 | |
612 | return rc; | |
51dce386 HC |
613 | } |
614 | ||
615 | static struct ctl_table topology_ctl_table[] = { | |
616 | { | |
617 | .procname = "topology", | |
618 | .mode = 0644, | |
619 | .proc_handler = topology_ctl_handler, | |
620 | }, | |
621 | { }, | |
622 | }; | |
623 | ||
624 | static struct ctl_table topology_dir_table[] = { | |
625 | { | |
626 | .procname = "s390", | |
627 | .maxlen = 0, | |
628 | .mode = 0555, | |
629 | .child = topology_ctl_table, | |
630 | }, | |
631 | { }, | |
632 | }; | |
633 | ||
83a24e32 HC |
634 | static int __init topology_init(void) |
635 | { | |
5cd79d6a | 636 | timer_setup(&topology_timer, topology_timer_fn, TIMER_DEFERRABLE); |
48e9a6c1 MS |
637 | if (MACHINE_HAS_TOPOLOGY) |
638 | set_topology_timer(); | |
639 | else | |
83a24e32 | 640 | topology_update_polarization_simple(); |
51dce386 | 641 | register_sysctl_table(topology_dir_table); |
72f31889 | 642 | return device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching); |
83a24e32 HC |
643 | } |
644 | device_initcall(topology_init); |