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Commit | Line | Data |
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dbd70fb4 | 1 | /* |
a53c8fab | 2 | * Copyright IBM Corp. 2007, 2011 |
dbd70fb4 HC |
3 | * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> |
4 | */ | |
5 | ||
395d31d4 MS |
6 | #define KMSG_COMPONENT "cpu" |
7 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
8 | ||
83a24e32 | 9 | #include <linux/workqueue.h> |
dbd70fb4 | 10 | #include <linux/bootmem.h> |
83a24e32 HC |
11 | #include <linux/cpuset.h> |
12 | #include <linux/device.h> | |
80020fbd | 13 | #include <linux/export.h> |
83a24e32 | 14 | #include <linux/kernel.h> |
dbd70fb4 | 15 | #include <linux/sched.h> |
83a24e32 HC |
16 | #include <linux/init.h> |
17 | #include <linux/delay.h> | |
dbd70fb4 HC |
18 | #include <linux/cpu.h> |
19 | #include <linux/smp.h> | |
83a24e32 | 20 | #include <linux/mm.h> |
78609132 | 21 | #include <asm/sysinfo.h> |
dbd70fb4 | 22 | |
c10fde0d HC |
23 | #define PTF_HORIZONTAL (0UL) |
24 | #define PTF_VERTICAL (1UL) | |
25 | #define PTF_CHECK (2UL) | |
dbd70fb4 | 26 | |
4cb14bc8 HC |
27 | struct mask_info { |
28 | struct mask_info *next; | |
10d38589 | 29 | unsigned char id; |
dbd70fb4 HC |
30 | cpumask_t mask; |
31 | }; | |
32 | ||
d1e57508 | 33 | static void set_topology_timer(void); |
dbd70fb4 | 34 | static void topology_work_fn(struct work_struct *work); |
c30f91b6 | 35 | static struct sysinfo_15_1_x *tl_info; |
dbd70fb4 | 36 | |
d1e57508 HC |
37 | static int topology_enabled = 1; |
38 | static DECLARE_WORK(topology_work, topology_work_fn); | |
d00aa4e7 | 39 | |
d1e57508 HC |
40 | /* topology_lock protects the socket and book linked lists */ |
41 | static DEFINE_SPINLOCK(topology_lock); | |
42 | static struct mask_info socket_info; | |
4cb14bc8 | 43 | static struct mask_info book_info; |
d1e57508 HC |
44 | |
45 | struct cpu_topology_s390 cpu_topology[NR_CPUS]; | |
80020fbd | 46 | EXPORT_SYMBOL_GPL(cpu_topology); |
83a24e32 | 47 | |
4cb14bc8 | 48 | static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu) |
dbd70fb4 | 49 | { |
dbd70fb4 HC |
50 | cpumask_t mask; |
51 | ||
d1e57508 HC |
52 | cpumask_copy(&mask, cpumask_of(cpu)); |
53 | if (!topology_enabled || !MACHINE_HAS_TOPOLOGY) | |
0b52783d | 54 | return mask; |
d1e57508 HC |
55 | for (; info; info = info->next) { |
56 | if (cpumask_test_cpu(cpu, &info->mask)) | |
57 | return info->mask; | |
0b52783d | 58 | } |
dbd70fb4 HC |
59 | return mask; |
60 | } | |
61 | ||
f6bf1a8a HC |
62 | static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu, |
63 | struct mask_info *book, | |
d1e57508 HC |
64 | struct mask_info *socket, |
65 | int one_socket_per_cpu) | |
dbd70fb4 HC |
66 | { |
67 | unsigned int cpu; | |
68 | ||
0327dab0 | 69 | for_each_set_bit(cpu, &tl_cpu->mask[0], TOPOLOGY_CPU_BITS) { |
8b646bd7 MS |
70 | unsigned int rcpu; |
71 | int lcpu; | |
dbd70fb4 | 72 | |
c30f91b6 | 73 | rcpu = TOPOLOGY_CPU_BITS - 1 - cpu + tl_cpu->origin; |
8b646bd7 | 74 | lcpu = smp_find_processor_id(rcpu); |
d1e57508 HC |
75 | if (lcpu < 0) |
76 | continue; | |
77 | cpumask_set_cpu(lcpu, &book->mask); | |
78 | cpu_topology[lcpu].book_id = book->id; | |
79 | cpumask_set_cpu(lcpu, &socket->mask); | |
80 | cpu_topology[lcpu].core_id = rcpu; | |
81 | if (one_socket_per_cpu) { | |
82 | cpu_topology[lcpu].socket_id = rcpu; | |
83 | socket = socket->next; | |
84 | } else { | |
85 | cpu_topology[lcpu].socket_id = socket->id; | |
dbd70fb4 | 86 | } |
d1e57508 | 87 | smp_cpu_set_polarization(lcpu, tl_cpu->pp); |
dbd70fb4 | 88 | } |
d1e57508 | 89 | return socket; |
dbd70fb4 HC |
90 | } |
91 | ||
4cb14bc8 | 92 | static void clear_masks(void) |
dbd70fb4 | 93 | { |
4cb14bc8 | 94 | struct mask_info *info; |
dbd70fb4 | 95 | |
d1e57508 | 96 | info = &socket_info; |
4cb14bc8 | 97 | while (info) { |
0f1959f5 | 98 | cpumask_clear(&info->mask); |
4cb14bc8 HC |
99 | info = info->next; |
100 | } | |
4cb14bc8 HC |
101 | info = &book_info; |
102 | while (info) { | |
0f1959f5 | 103 | cpumask_clear(&info->mask); |
4cb14bc8 | 104 | info = info->next; |
dbd70fb4 HC |
105 | } |
106 | } | |
107 | ||
c30f91b6 | 108 | static union topology_entry *next_tle(union topology_entry *tle) |
dbd70fb4 | 109 | { |
c30f91b6 HC |
110 | if (!tle->nl) |
111 | return (union topology_entry *)((struct topology_cpu *)tle + 1); | |
112 | return (union topology_entry *)((struct topology_container *)tle + 1); | |
dbd70fb4 HC |
113 | } |
114 | ||
d1e57508 | 115 | static void __tl_to_masks_generic(struct sysinfo_15_1_x *info) |
dbd70fb4 | 116 | { |
d1e57508 | 117 | struct mask_info *socket = &socket_info; |
83a24e32 | 118 | struct mask_info *book = &book_info; |
c30f91b6 | 119 | union topology_entry *tle, *end; |
4cb14bc8 | 120 | |
c10fde0d | 121 | tle = info->tle; |
c30f91b6 | 122 | end = (union topology_entry *)((unsigned long)info + info->length); |
dbd70fb4 HC |
123 | while (tle < end) { |
124 | switch (tle->nl) { | |
dbd70fb4 | 125 | case 2: |
4cb14bc8 HC |
126 | book = book->next; |
127 | book->id = tle->container.id; | |
dbd70fb4 HC |
128 | break; |
129 | case 1: | |
d1e57508 HC |
130 | socket = socket->next; |
131 | socket->id = tle->container.id; | |
dbd70fb4 HC |
132 | break; |
133 | case 0: | |
d1e57508 | 134 | add_cpus_to_mask(&tle->cpu, book, socket, 0); |
dbd70fb4 HC |
135 | break; |
136 | default: | |
4cb14bc8 | 137 | clear_masks(); |
4baeb964 | 138 | return; |
dbd70fb4 HC |
139 | } |
140 | tle = next_tle(tle); | |
141 | } | |
4baeb964 HC |
142 | } |
143 | ||
d1e57508 | 144 | static void __tl_to_masks_z10(struct sysinfo_15_1_x *info) |
4baeb964 | 145 | { |
d1e57508 | 146 | struct mask_info *socket = &socket_info; |
4baeb964 HC |
147 | struct mask_info *book = &book_info; |
148 | union topology_entry *tle, *end; | |
149 | ||
150 | tle = info->tle; | |
151 | end = (union topology_entry *)((unsigned long)info + info->length); | |
152 | while (tle < end) { | |
153 | switch (tle->nl) { | |
154 | case 1: | |
155 | book = book->next; | |
156 | book->id = tle->container.id; | |
157 | break; | |
158 | case 0: | |
d1e57508 | 159 | socket = add_cpus_to_mask(&tle->cpu, book, socket, 1); |
4baeb964 HC |
160 | break; |
161 | default: | |
162 | clear_masks(); | |
163 | return; | |
164 | } | |
165 | tle = next_tle(tle); | |
166 | } | |
167 | } | |
168 | ||
d1e57508 | 169 | static void tl_to_masks(struct sysinfo_15_1_x *info) |
4baeb964 HC |
170 | { |
171 | struct cpuid cpu_id; | |
172 | ||
4baeb964 | 173 | spin_lock_irq(&topology_lock); |
d1e57508 | 174 | get_cpu_id(&cpu_id); |
4baeb964 HC |
175 | clear_masks(); |
176 | switch (cpu_id.machine) { | |
177 | case 0x2097: | |
178 | case 0x2098: | |
d1e57508 | 179 | __tl_to_masks_z10(info); |
4baeb964 HC |
180 | break; |
181 | default: | |
d1e57508 | 182 | __tl_to_masks_generic(info); |
4baeb964 | 183 | } |
74af2831 | 184 | spin_unlock_irq(&topology_lock); |
dbd70fb4 HC |
185 | } |
186 | ||
c10fde0d HC |
187 | static void topology_update_polarization_simple(void) |
188 | { | |
189 | int cpu; | |
190 | ||
191 | mutex_lock(&smp_cpu_state_mutex); | |
5439050f | 192 | for_each_possible_cpu(cpu) |
50ab9a9a | 193 | smp_cpu_set_polarization(cpu, POLARIZATION_HRZ); |
c10fde0d HC |
194 | mutex_unlock(&smp_cpu_state_mutex); |
195 | } | |
196 | ||
197 | static int ptf(unsigned long fc) | |
dbd70fb4 HC |
198 | { |
199 | int rc; | |
200 | ||
201 | asm volatile( | |
202 | " .insn rre,0xb9a20000,%1,%1\n" | |
203 | " ipm %0\n" | |
204 | " srl %0,28\n" | |
205 | : "=d" (rc) | |
c10fde0d HC |
206 | : "d" (fc) : "cc"); |
207 | return rc; | |
208 | } | |
209 | ||
210 | int topology_set_cpu_management(int fc) | |
211 | { | |
83a24e32 | 212 | int cpu, rc; |
c10fde0d | 213 | |
9186d7a9 | 214 | if (!MACHINE_HAS_TOPOLOGY) |
c10fde0d HC |
215 | return -EOPNOTSUPP; |
216 | if (fc) | |
217 | rc = ptf(PTF_VERTICAL); | |
218 | else | |
219 | rc = ptf(PTF_HORIZONTAL); | |
220 | if (rc) | |
221 | return -EBUSY; | |
5439050f | 222 | for_each_possible_cpu(cpu) |
50ab9a9a | 223 | smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); |
dbd70fb4 HC |
224 | return rc; |
225 | } | |
226 | ||
d1e57508 | 227 | static void update_cpu_masks(void) |
d00aa4e7 | 228 | { |
4cb14bc8 | 229 | unsigned long flags; |
d00aa4e7 HC |
230 | int cpu; |
231 | ||
4cb14bc8 HC |
232 | spin_lock_irqsave(&topology_lock, flags); |
233 | for_each_possible_cpu(cpu) { | |
d1e57508 HC |
234 | cpu_topology[cpu].core_mask = cpu_group_map(&socket_info, cpu); |
235 | cpu_topology[cpu].book_mask = cpu_group_map(&book_info, cpu); | |
236 | if (!MACHINE_HAS_TOPOLOGY) { | |
237 | cpu_topology[cpu].core_id = cpu; | |
238 | cpu_topology[cpu].socket_id = cpu; | |
239 | cpu_topology[cpu].book_id = cpu; | |
240 | } | |
4cb14bc8 HC |
241 | } |
242 | spin_unlock_irqrestore(&topology_lock, flags); | |
243 | } | |
244 | ||
96f4a70d | 245 | void store_topology(struct sysinfo_15_1_x *info) |
4cb14bc8 | 246 | { |
fade4dc4 HC |
247 | if (topology_max_mnest >= 3) |
248 | stsi(info, 15, 1, 3); | |
249 | else | |
250 | stsi(info, 15, 1, 2); | |
d00aa4e7 HC |
251 | } |
252 | ||
ee79d1bd | 253 | int arch_update_cpu_topology(void) |
dbd70fb4 | 254 | { |
c30f91b6 | 255 | struct sysinfo_15_1_x *info = tl_info; |
8a25a2fd | 256 | struct device *dev; |
dbd70fb4 HC |
257 | int cpu; |
258 | ||
9186d7a9 | 259 | if (!MACHINE_HAS_TOPOLOGY) { |
d1e57508 | 260 | update_cpu_masks(); |
c10fde0d | 261 | topology_update_polarization_simple(); |
ee79d1bd | 262 | return 0; |
c10fde0d | 263 | } |
4cb14bc8 | 264 | store_topology(info); |
d1e57508 HC |
265 | tl_to_masks(info); |
266 | update_cpu_masks(); | |
dbd70fb4 | 267 | for_each_online_cpu(cpu) { |
8a25a2fd KS |
268 | dev = get_cpu_device(cpu); |
269 | kobject_uevent(&dev->kobj, KOBJ_CHANGE); | |
dbd70fb4 | 270 | } |
ee79d1bd | 271 | return 1; |
dbd70fb4 HC |
272 | } |
273 | ||
fd781fa2 HC |
274 | static void topology_work_fn(struct work_struct *work) |
275 | { | |
f414f5f1 | 276 | rebuild_sched_domains(); |
dbd70fb4 HC |
277 | } |
278 | ||
c10fde0d HC |
279 | void topology_schedule_update(void) |
280 | { | |
281 | schedule_work(&topology_work); | |
282 | } | |
283 | ||
dbd70fb4 HC |
284 | static void topology_timer_fn(unsigned long ignored) |
285 | { | |
c10fde0d HC |
286 | if (ptf(PTF_CHECK)) |
287 | topology_schedule_update(); | |
dbd70fb4 HC |
288 | set_topology_timer(); |
289 | } | |
290 | ||
d68bddb7 HC |
291 | static struct timer_list topology_timer = |
292 | TIMER_DEFERRED_INITIALIZER(topology_timer_fn, 0, 0); | |
293 | ||
294 | static atomic_t topology_poll = ATOMIC_INIT(0); | |
295 | ||
dbd70fb4 HC |
296 | static void set_topology_timer(void) |
297 | { | |
d68bddb7 HC |
298 | if (atomic_add_unless(&topology_poll, -1, 0)) |
299 | mod_timer(&topology_timer, jiffies + HZ / 10); | |
300 | else | |
301 | mod_timer(&topology_timer, jiffies + HZ * 60); | |
302 | } | |
303 | ||
304 | void topology_expect_change(void) | |
305 | { | |
306 | if (!MACHINE_HAS_TOPOLOGY) | |
307 | return; | |
308 | /* This is racy, but it doesn't matter since it is just a heuristic. | |
309 | * Worst case is that we poll in a higher frequency for a bit longer. | |
310 | */ | |
311 | if (atomic_read(&topology_poll) > 60) | |
312 | return; | |
313 | atomic_add(60, &topology_poll); | |
314 | set_topology_timer(); | |
dbd70fb4 HC |
315 | } |
316 | ||
2b1a61f0 | 317 | static int __init early_parse_topology(char *p) |
dbd70fb4 | 318 | { |
c9af3fa9 | 319 | if (strncmp(p, "off", 3)) |
2b1a61f0 | 320 | return 0; |
c9af3fa9 | 321 | topology_enabled = 0; |
2b1a61f0 | 322 | return 0; |
dbd70fb4 | 323 | } |
2b1a61f0 | 324 | early_param("topology", early_parse_topology); |
dbd70fb4 | 325 | |
caa04f69 SO |
326 | static void __init alloc_masks(struct sysinfo_15_1_x *info, |
327 | struct mask_info *mask, int offset) | |
4cb14bc8 HC |
328 | { |
329 | int i, nr_masks; | |
330 | ||
c30f91b6 | 331 | nr_masks = info->mag[TOPOLOGY_NR_MAG - offset]; |
4cb14bc8 | 332 | for (i = 0; i < info->mnest - offset; i++) |
c30f91b6 | 333 | nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i]; |
4cb14bc8 HC |
334 | nr_masks = max(nr_masks, 1); |
335 | for (i = 0; i < nr_masks; i++) { | |
336 | mask->next = alloc_bootmem(sizeof(struct mask_info)); | |
337 | mask = mask->next; | |
338 | } | |
339 | } | |
340 | ||
dbd70fb4 HC |
341 | void __init s390_init_cpu_topology(void) |
342 | { | |
c30f91b6 | 343 | struct sysinfo_15_1_x *info; |
dbd70fb4 HC |
344 | int i; |
345 | ||
9186d7a9 | 346 | if (!MACHINE_HAS_TOPOLOGY) |
dbd70fb4 | 347 | return; |
dbd70fb4 | 348 | tl_info = alloc_bootmem_pages(PAGE_SIZE); |
dbd70fb4 | 349 | info = tl_info; |
4cb14bc8 | 350 | store_topology(info); |
395d31d4 | 351 | pr_info("The CPU configuration topology of the machine is:"); |
c30f91b6 | 352 | for (i = 0; i < TOPOLOGY_NR_MAG; i++) |
83a24e32 HC |
353 | printk(KERN_CONT " %d", info->mag[i]); |
354 | printk(KERN_CONT " / %d\n", info->mnest); | |
d1e57508 | 355 | alloc_masks(info, &socket_info, 1); |
f6bf1a8a | 356 | alloc_masks(info, &book_info, 2); |
dbd70fb4 | 357 | } |
83a24e32 HC |
358 | |
359 | static int cpu_management; | |
360 | ||
72f31889 LT |
361 | static ssize_t dispatching_show(struct device *dev, |
362 | struct device_attribute *attr, | |
83a24e32 HC |
363 | char *buf) |
364 | { | |
365 | ssize_t count; | |
366 | ||
367 | mutex_lock(&smp_cpu_state_mutex); | |
368 | count = sprintf(buf, "%d\n", cpu_management); | |
369 | mutex_unlock(&smp_cpu_state_mutex); | |
370 | return count; | |
371 | } | |
372 | ||
72f31889 LT |
373 | static ssize_t dispatching_store(struct device *dev, |
374 | struct device_attribute *attr, | |
83a24e32 HC |
375 | const char *buf, |
376 | size_t count) | |
377 | { | |
378 | int val, rc; | |
379 | char delim; | |
380 | ||
381 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
382 | return -EINVAL; | |
383 | if (val != 0 && val != 1) | |
384 | return -EINVAL; | |
385 | rc = 0; | |
386 | get_online_cpus(); | |
387 | mutex_lock(&smp_cpu_state_mutex); | |
388 | if (cpu_management == val) | |
389 | goto out; | |
390 | rc = topology_set_cpu_management(val); | |
d68bddb7 HC |
391 | if (rc) |
392 | goto out; | |
393 | cpu_management = val; | |
394 | topology_expect_change(); | |
83a24e32 HC |
395 | out: |
396 | mutex_unlock(&smp_cpu_state_mutex); | |
397 | put_online_cpus(); | |
398 | return rc ? rc : count; | |
399 | } | |
72f31889 | 400 | static DEVICE_ATTR(dispatching, 0644, dispatching_show, |
83a24e32 HC |
401 | dispatching_store); |
402 | ||
72f31889 LT |
403 | static ssize_t cpu_polarization_show(struct device *dev, |
404 | struct device_attribute *attr, char *buf) | |
83a24e32 HC |
405 | { |
406 | int cpu = dev->id; | |
407 | ssize_t count; | |
408 | ||
409 | mutex_lock(&smp_cpu_state_mutex); | |
50ab9a9a | 410 | switch (smp_cpu_get_polarization(cpu)) { |
83a24e32 HC |
411 | case POLARIZATION_HRZ: |
412 | count = sprintf(buf, "horizontal\n"); | |
413 | break; | |
414 | case POLARIZATION_VL: | |
415 | count = sprintf(buf, "vertical:low\n"); | |
416 | break; | |
417 | case POLARIZATION_VM: | |
418 | count = sprintf(buf, "vertical:medium\n"); | |
419 | break; | |
420 | case POLARIZATION_VH: | |
421 | count = sprintf(buf, "vertical:high\n"); | |
422 | break; | |
423 | default: | |
424 | count = sprintf(buf, "unknown\n"); | |
425 | break; | |
426 | } | |
427 | mutex_unlock(&smp_cpu_state_mutex); | |
428 | return count; | |
429 | } | |
72f31889 | 430 | static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL); |
83a24e32 HC |
431 | |
432 | static struct attribute *topology_cpu_attrs[] = { | |
72f31889 | 433 | &dev_attr_polarization.attr, |
83a24e32 HC |
434 | NULL, |
435 | }; | |
436 | ||
437 | static struct attribute_group topology_cpu_attr_group = { | |
438 | .attrs = topology_cpu_attrs, | |
439 | }; | |
440 | ||
441 | int topology_cpu_init(struct cpu *cpu) | |
442 | { | |
72f31889 | 443 | return sysfs_create_group(&cpu->dev.kobj, &topology_cpu_attr_group); |
83a24e32 HC |
444 | } |
445 | ||
446 | static int __init topology_init(void) | |
447 | { | |
448 | if (!MACHINE_HAS_TOPOLOGY) { | |
449 | topology_update_polarization_simple(); | |
450 | goto out; | |
451 | } | |
83a24e32 HC |
452 | set_topology_timer(); |
453 | out: | |
d1e57508 | 454 | update_cpu_masks(); |
72f31889 | 455 | return device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching); |
83a24e32 HC |
456 | } |
457 | device_initcall(topology_init); |