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Commit | Line | Data |
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22938978 HC |
1 | /* |
2 | * guest access functions | |
3 | * | |
4 | * Copyright IBM Corp. 2014 | |
5 | * | |
6 | */ | |
7 | ||
8 | #include <linux/vmalloc.h> | |
589ee628 | 9 | #include <linux/mm_types.h> |
22938978 | 10 | #include <linux/err.h> |
589ee628 | 11 | |
22938978 | 12 | #include <asm/pgtable.h> |
aa17aa57 | 13 | #include <asm/gmap.h> |
22938978 HC |
14 | #include "kvm-s390.h" |
15 | #include "gaccess.h" | |
664b4973 | 16 | #include <asm/switch_to.h> |
22938978 HC |
17 | |
18 | union asce { | |
19 | unsigned long val; | |
20 | struct { | |
21 | unsigned long origin : 52; /* Region- or Segment-Table Origin */ | |
22 | unsigned long : 2; | |
23 | unsigned long g : 1; /* Subspace Group Control */ | |
24 | unsigned long p : 1; /* Private Space Control */ | |
25 | unsigned long s : 1; /* Storage-Alteration-Event Control */ | |
26 | unsigned long x : 1; /* Space-Switch-Event Control */ | |
27 | unsigned long r : 1; /* Real-Space Control */ | |
28 | unsigned long : 1; | |
29 | unsigned long dt : 2; /* Designation-Type Control */ | |
30 | unsigned long tl : 2; /* Region- or Segment-Table Length */ | |
31 | }; | |
32 | }; | |
33 | ||
34 | enum { | |
35 | ASCE_TYPE_SEGMENT = 0, | |
36 | ASCE_TYPE_REGION3 = 1, | |
37 | ASCE_TYPE_REGION2 = 2, | |
38 | ASCE_TYPE_REGION1 = 3 | |
39 | }; | |
40 | ||
41 | union region1_table_entry { | |
42 | unsigned long val; | |
43 | struct { | |
44 | unsigned long rto: 52;/* Region-Table Origin */ | |
45 | unsigned long : 2; | |
46 | unsigned long p : 1; /* DAT-Protection Bit */ | |
47 | unsigned long : 1; | |
48 | unsigned long tf : 2; /* Region-Second-Table Offset */ | |
49 | unsigned long i : 1; /* Region-Invalid Bit */ | |
50 | unsigned long : 1; | |
51 | unsigned long tt : 2; /* Table-Type Bits */ | |
52 | unsigned long tl : 2; /* Region-Second-Table Length */ | |
53 | }; | |
54 | }; | |
55 | ||
56 | union region2_table_entry { | |
57 | unsigned long val; | |
58 | struct { | |
59 | unsigned long rto: 52;/* Region-Table Origin */ | |
60 | unsigned long : 2; | |
61 | unsigned long p : 1; /* DAT-Protection Bit */ | |
62 | unsigned long : 1; | |
63 | unsigned long tf : 2; /* Region-Third-Table Offset */ | |
64 | unsigned long i : 1; /* Region-Invalid Bit */ | |
65 | unsigned long : 1; | |
66 | unsigned long tt : 2; /* Table-Type Bits */ | |
67 | unsigned long tl : 2; /* Region-Third-Table Length */ | |
68 | }; | |
69 | }; | |
70 | ||
71 | struct region3_table_entry_fc0 { | |
72 | unsigned long sto: 52;/* Segment-Table Origin */ | |
73 | unsigned long : 1; | |
74 | unsigned long fc : 1; /* Format-Control */ | |
75 | unsigned long p : 1; /* DAT-Protection Bit */ | |
76 | unsigned long : 1; | |
77 | unsigned long tf : 2; /* Segment-Table Offset */ | |
78 | unsigned long i : 1; /* Region-Invalid Bit */ | |
79 | unsigned long cr : 1; /* Common-Region Bit */ | |
80 | unsigned long tt : 2; /* Table-Type Bits */ | |
81 | unsigned long tl : 2; /* Segment-Table Length */ | |
82 | }; | |
83 | ||
84 | struct region3_table_entry_fc1 { | |
85 | unsigned long rfaa : 33; /* Region-Frame Absolute Address */ | |
86 | unsigned long : 14; | |
87 | unsigned long av : 1; /* ACCF-Validity Control */ | |
88 | unsigned long acc: 4; /* Access-Control Bits */ | |
89 | unsigned long f : 1; /* Fetch-Protection Bit */ | |
90 | unsigned long fc : 1; /* Format-Control */ | |
91 | unsigned long p : 1; /* DAT-Protection Bit */ | |
92 | unsigned long co : 1; /* Change-Recording Override */ | |
93 | unsigned long : 2; | |
94 | unsigned long i : 1; /* Region-Invalid Bit */ | |
95 | unsigned long cr : 1; /* Common-Region Bit */ | |
96 | unsigned long tt : 2; /* Table-Type Bits */ | |
97 | unsigned long : 2; | |
98 | }; | |
99 | ||
100 | union region3_table_entry { | |
101 | unsigned long val; | |
102 | struct region3_table_entry_fc0 fc0; | |
103 | struct region3_table_entry_fc1 fc1; | |
104 | struct { | |
105 | unsigned long : 53; | |
106 | unsigned long fc : 1; /* Format-Control */ | |
107 | unsigned long : 4; | |
108 | unsigned long i : 1; /* Region-Invalid Bit */ | |
109 | unsigned long cr : 1; /* Common-Region Bit */ | |
110 | unsigned long tt : 2; /* Table-Type Bits */ | |
111 | unsigned long : 2; | |
112 | }; | |
113 | }; | |
114 | ||
115 | struct segment_entry_fc0 { | |
116 | unsigned long pto: 53;/* Page-Table Origin */ | |
117 | unsigned long fc : 1; /* Format-Control */ | |
118 | unsigned long p : 1; /* DAT-Protection Bit */ | |
119 | unsigned long : 3; | |
120 | unsigned long i : 1; /* Segment-Invalid Bit */ | |
121 | unsigned long cs : 1; /* Common-Segment Bit */ | |
122 | unsigned long tt : 2; /* Table-Type Bits */ | |
123 | unsigned long : 2; | |
124 | }; | |
125 | ||
126 | struct segment_entry_fc1 { | |
127 | unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ | |
128 | unsigned long : 3; | |
129 | unsigned long av : 1; /* ACCF-Validity Control */ | |
130 | unsigned long acc: 4; /* Access-Control Bits */ | |
131 | unsigned long f : 1; /* Fetch-Protection Bit */ | |
132 | unsigned long fc : 1; /* Format-Control */ | |
133 | unsigned long p : 1; /* DAT-Protection Bit */ | |
134 | unsigned long co : 1; /* Change-Recording Override */ | |
135 | unsigned long : 2; | |
136 | unsigned long i : 1; /* Segment-Invalid Bit */ | |
137 | unsigned long cs : 1; /* Common-Segment Bit */ | |
138 | unsigned long tt : 2; /* Table-Type Bits */ | |
139 | unsigned long : 2; | |
140 | }; | |
141 | ||
142 | union segment_table_entry { | |
143 | unsigned long val; | |
144 | struct segment_entry_fc0 fc0; | |
145 | struct segment_entry_fc1 fc1; | |
146 | struct { | |
147 | unsigned long : 53; | |
148 | unsigned long fc : 1; /* Format-Control */ | |
149 | unsigned long : 4; | |
150 | unsigned long i : 1; /* Segment-Invalid Bit */ | |
151 | unsigned long cs : 1; /* Common-Segment Bit */ | |
152 | unsigned long tt : 2; /* Table-Type Bits */ | |
153 | unsigned long : 2; | |
154 | }; | |
155 | }; | |
156 | ||
157 | enum { | |
158 | TABLE_TYPE_SEGMENT = 0, | |
159 | TABLE_TYPE_REGION3 = 1, | |
160 | TABLE_TYPE_REGION2 = 2, | |
161 | TABLE_TYPE_REGION1 = 3 | |
162 | }; | |
163 | ||
164 | union page_table_entry { | |
165 | unsigned long val; | |
166 | struct { | |
167 | unsigned long pfra : 52; /* Page-Frame Real Address */ | |
168 | unsigned long z : 1; /* Zero Bit */ | |
169 | unsigned long i : 1; /* Page-Invalid Bit */ | |
170 | unsigned long p : 1; /* DAT-Protection Bit */ | |
171 | unsigned long co : 1; /* Change-Recording Override */ | |
172 | unsigned long : 8; | |
173 | }; | |
174 | }; | |
175 | ||
176 | /* | |
177 | * vaddress union in order to easily decode a virtual address into its | |
178 | * region first index, region second index etc. parts. | |
179 | */ | |
180 | union vaddress { | |
181 | unsigned long addr; | |
182 | struct { | |
183 | unsigned long rfx : 11; | |
184 | unsigned long rsx : 11; | |
185 | unsigned long rtx : 11; | |
186 | unsigned long sx : 11; | |
187 | unsigned long px : 8; | |
188 | unsigned long bx : 12; | |
189 | }; | |
190 | struct { | |
191 | unsigned long rfx01 : 2; | |
192 | unsigned long : 9; | |
193 | unsigned long rsx01 : 2; | |
194 | unsigned long : 9; | |
195 | unsigned long rtx01 : 2; | |
196 | unsigned long : 9; | |
197 | unsigned long sx01 : 2; | |
198 | unsigned long : 29; | |
199 | }; | |
200 | }; | |
201 | ||
202 | /* | |
203 | * raddress union which will contain the result (real or absolute address) | |
204 | * after a page table walk. The rfaa, sfaa and pfra members are used to | |
205 | * simply assign them the value of a region, segment or page table entry. | |
206 | */ | |
207 | union raddress { | |
208 | unsigned long addr; | |
209 | unsigned long rfaa : 33; /* Region-Frame Absolute Address */ | |
210 | unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ | |
211 | unsigned long pfra : 52; /* Page-Frame Real Address */ | |
212 | }; | |
213 | ||
664b4973 AY |
214 | union alet { |
215 | u32 val; | |
216 | struct { | |
217 | u32 reserved : 7; | |
218 | u32 p : 1; | |
219 | u32 alesn : 8; | |
220 | u32 alen : 16; | |
221 | }; | |
222 | }; | |
223 | ||
224 | union ald { | |
225 | u32 val; | |
226 | struct { | |
227 | u32 : 1; | |
228 | u32 alo : 24; | |
229 | u32 all : 7; | |
230 | }; | |
231 | }; | |
232 | ||
233 | struct ale { | |
234 | unsigned long i : 1; /* ALEN-Invalid Bit */ | |
235 | unsigned long : 5; | |
236 | unsigned long fo : 1; /* Fetch-Only Bit */ | |
237 | unsigned long p : 1; /* Private Bit */ | |
238 | unsigned long alesn : 8; /* Access-List-Entry Sequence Number */ | |
239 | unsigned long aleax : 16; /* Access-List-Entry Authorization Index */ | |
240 | unsigned long : 32; | |
241 | unsigned long : 1; | |
242 | unsigned long asteo : 25; /* ASN-Second-Table-Entry Origin */ | |
243 | unsigned long : 6; | |
244 | unsigned long astesn : 32; /* ASTE Sequence Number */ | |
245 | } __packed; | |
246 | ||
247 | struct aste { | |
248 | unsigned long i : 1; /* ASX-Invalid Bit */ | |
249 | unsigned long ato : 29; /* Authority-Table Origin */ | |
250 | unsigned long : 1; | |
251 | unsigned long b : 1; /* Base-Space Bit */ | |
252 | unsigned long ax : 16; /* Authorization Index */ | |
253 | unsigned long atl : 12; /* Authority-Table Length */ | |
254 | unsigned long : 2; | |
255 | unsigned long ca : 1; /* Controlled-ASN Bit */ | |
256 | unsigned long ra : 1; /* Reusable-ASN Bit */ | |
257 | unsigned long asce : 64; /* Address-Space-Control Element */ | |
258 | unsigned long ald : 32; | |
259 | unsigned long astesn : 32; | |
260 | /* .. more fields there */ | |
261 | } __packed; | |
8a242234 HC |
262 | |
263 | int ipte_lock_held(struct kvm_vcpu *vcpu) | |
264 | { | |
0c9d8683 | 265 | if (vcpu->arch.sie_block->eca & ECA_SII) { |
5e044315 ED |
266 | int rc; |
267 | ||
268 | read_lock(&vcpu->kvm->arch.sca_lock); | |
269 | rc = kvm_s390_get_ipte_control(vcpu->kvm)->kh != 0; | |
270 | read_unlock(&vcpu->kvm->arch.sca_lock); | |
271 | return rc; | |
272 | } | |
a6b7e459 | 273 | return vcpu->kvm->arch.ipte_lock_count != 0; |
8a242234 HC |
274 | } |
275 | ||
276 | static void ipte_lock_simple(struct kvm_vcpu *vcpu) | |
277 | { | |
278 | union ipte_control old, new, *ic; | |
279 | ||
a6b7e459 TH |
280 | mutex_lock(&vcpu->kvm->arch.ipte_mutex); |
281 | vcpu->kvm->arch.ipte_lock_count++; | |
282 | if (vcpu->kvm->arch.ipte_lock_count > 1) | |
8a242234 | 283 | goto out; |
5e044315 ED |
284 | retry: |
285 | read_lock(&vcpu->kvm->arch.sca_lock); | |
60514510 | 286 | ic = kvm_s390_get_ipte_control(vcpu->kvm); |
8a242234 | 287 | do { |
5de72a22 | 288 | old = READ_ONCE(*ic); |
5e044315 ED |
289 | if (old.k) { |
290 | read_unlock(&vcpu->kvm->arch.sca_lock); | |
8a242234 | 291 | cond_resched(); |
5e044315 | 292 | goto retry; |
8a242234 HC |
293 | } |
294 | new = old; | |
295 | new.k = 1; | |
296 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
5e044315 | 297 | read_unlock(&vcpu->kvm->arch.sca_lock); |
8a242234 | 298 | out: |
a6b7e459 | 299 | mutex_unlock(&vcpu->kvm->arch.ipte_mutex); |
8a242234 HC |
300 | } |
301 | ||
302 | static void ipte_unlock_simple(struct kvm_vcpu *vcpu) | |
303 | { | |
304 | union ipte_control old, new, *ic; | |
305 | ||
a6b7e459 TH |
306 | mutex_lock(&vcpu->kvm->arch.ipte_mutex); |
307 | vcpu->kvm->arch.ipte_lock_count--; | |
308 | if (vcpu->kvm->arch.ipte_lock_count) | |
8a242234 | 309 | goto out; |
5e044315 | 310 | read_lock(&vcpu->kvm->arch.sca_lock); |
60514510 | 311 | ic = kvm_s390_get_ipte_control(vcpu->kvm); |
8a242234 | 312 | do { |
5de72a22 | 313 | old = READ_ONCE(*ic); |
1365039d | 314 | new = old; |
8a242234 HC |
315 | new.k = 0; |
316 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
5e044315 | 317 | read_unlock(&vcpu->kvm->arch.sca_lock); |
6b331952 | 318 | wake_up(&vcpu->kvm->arch.ipte_wq); |
8a242234 | 319 | out: |
a6b7e459 | 320 | mutex_unlock(&vcpu->kvm->arch.ipte_mutex); |
8a242234 HC |
321 | } |
322 | ||
323 | static void ipte_lock_siif(struct kvm_vcpu *vcpu) | |
324 | { | |
325 | union ipte_control old, new, *ic; | |
326 | ||
5e044315 ED |
327 | retry: |
328 | read_lock(&vcpu->kvm->arch.sca_lock); | |
60514510 | 329 | ic = kvm_s390_get_ipte_control(vcpu->kvm); |
8a242234 | 330 | do { |
5de72a22 | 331 | old = READ_ONCE(*ic); |
5e044315 ED |
332 | if (old.kg) { |
333 | read_unlock(&vcpu->kvm->arch.sca_lock); | |
8a242234 | 334 | cond_resched(); |
5e044315 | 335 | goto retry; |
8a242234 HC |
336 | } |
337 | new = old; | |
338 | new.k = 1; | |
339 | new.kh++; | |
340 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
5e044315 | 341 | read_unlock(&vcpu->kvm->arch.sca_lock); |
8a242234 HC |
342 | } |
343 | ||
344 | static void ipte_unlock_siif(struct kvm_vcpu *vcpu) | |
345 | { | |
346 | union ipte_control old, new, *ic; | |
347 | ||
5e044315 | 348 | read_lock(&vcpu->kvm->arch.sca_lock); |
60514510 | 349 | ic = kvm_s390_get_ipte_control(vcpu->kvm); |
8a242234 | 350 | do { |
5de72a22 | 351 | old = READ_ONCE(*ic); |
1365039d | 352 | new = old; |
8a242234 HC |
353 | new.kh--; |
354 | if (!new.kh) | |
355 | new.k = 0; | |
356 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
5e044315 | 357 | read_unlock(&vcpu->kvm->arch.sca_lock); |
8a242234 HC |
358 | if (!new.kh) |
359 | wake_up(&vcpu->kvm->arch.ipte_wq); | |
360 | } | |
361 | ||
a0465f9a | 362 | void ipte_lock(struct kvm_vcpu *vcpu) |
8a242234 | 363 | { |
0c9d8683 | 364 | if (vcpu->arch.sie_block->eca & ECA_SII) |
8a242234 HC |
365 | ipte_lock_siif(vcpu); |
366 | else | |
367 | ipte_lock_simple(vcpu); | |
368 | } | |
369 | ||
a0465f9a | 370 | void ipte_unlock(struct kvm_vcpu *vcpu) |
8a242234 | 371 | { |
0c9d8683 | 372 | if (vcpu->arch.sie_block->eca & ECA_SII) |
8a242234 HC |
373 | ipte_unlock_siif(vcpu); |
374 | else | |
375 | ipte_unlock_simple(vcpu); | |
376 | } | |
377 | ||
27f67f87 | 378 | static int ar_translation(struct kvm_vcpu *vcpu, union asce *asce, u8 ar, |
92c96321 | 379 | enum gacc_mode mode) |
664b4973 AY |
380 | { |
381 | union alet alet; | |
382 | struct ale ale; | |
383 | struct aste aste; | |
384 | unsigned long ald_addr, authority_table_addr; | |
385 | union ald ald; | |
386 | int eax, rc; | |
387 | u8 authority_table; | |
388 | ||
389 | if (ar >= NUM_ACRS) | |
390 | return -EINVAL; | |
391 | ||
392 | save_access_regs(vcpu->run->s.regs.acrs); | |
393 | alet.val = vcpu->run->s.regs.acrs[ar]; | |
394 | ||
395 | if (ar == 0 || alet.val == 0) { | |
396 | asce->val = vcpu->arch.sie_block->gcr[1]; | |
397 | return 0; | |
398 | } else if (alet.val == 1) { | |
399 | asce->val = vcpu->arch.sie_block->gcr[7]; | |
400 | return 0; | |
401 | } | |
402 | ||
403 | if (alet.reserved) | |
404 | return PGM_ALET_SPECIFICATION; | |
405 | ||
406 | if (alet.p) | |
407 | ald_addr = vcpu->arch.sie_block->gcr[5]; | |
408 | else | |
409 | ald_addr = vcpu->arch.sie_block->gcr[2]; | |
410 | ald_addr &= 0x7fffffc0; | |
411 | ||
412 | rc = read_guest_real(vcpu, ald_addr + 16, &ald.val, sizeof(union ald)); | |
413 | if (rc) | |
414 | return rc; | |
415 | ||
416 | if (alet.alen / 8 > ald.all) | |
417 | return PGM_ALEN_TRANSLATION; | |
418 | ||
419 | if (0x7fffffff - ald.alo * 128 < alet.alen * 16) | |
420 | return PGM_ADDRESSING; | |
421 | ||
422 | rc = read_guest_real(vcpu, ald.alo * 128 + alet.alen * 16, &ale, | |
423 | sizeof(struct ale)); | |
424 | if (rc) | |
425 | return rc; | |
426 | ||
427 | if (ale.i == 1) | |
428 | return PGM_ALEN_TRANSLATION; | |
429 | if (ale.alesn != alet.alesn) | |
430 | return PGM_ALE_SEQUENCE; | |
431 | ||
432 | rc = read_guest_real(vcpu, ale.asteo * 64, &aste, sizeof(struct aste)); | |
433 | if (rc) | |
434 | return rc; | |
435 | ||
436 | if (aste.i) | |
437 | return PGM_ASTE_VALIDITY; | |
438 | if (aste.astesn != ale.astesn) | |
439 | return PGM_ASTE_SEQUENCE; | |
440 | ||
441 | if (ale.p == 1) { | |
442 | eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff; | |
443 | if (ale.aleax != eax) { | |
444 | if (eax / 16 > aste.atl) | |
445 | return PGM_EXTENDED_AUTHORITY; | |
446 | ||
447 | authority_table_addr = aste.ato * 4 + eax / 4; | |
448 | ||
449 | rc = read_guest_real(vcpu, authority_table_addr, | |
450 | &authority_table, | |
451 | sizeof(u8)); | |
452 | if (rc) | |
453 | return rc; | |
454 | ||
455 | if ((authority_table & (0x40 >> ((eax & 3) * 2))) == 0) | |
456 | return PGM_EXTENDED_AUTHORITY; | |
457 | } | |
458 | } | |
459 | ||
92c96321 | 460 | if (ale.fo == 1 && mode == GACC_STORE) |
664b4973 AY |
461 | return PGM_PROTECTION; |
462 | ||
463 | asce->val = aste.asce; | |
464 | return 0; | |
465 | } | |
466 | ||
467 | struct trans_exc_code_bits { | |
468 | unsigned long addr : 52; /* Translation-exception Address */ | |
469 | unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */ | |
a679c547 CB |
470 | unsigned long : 2; |
471 | unsigned long b56 : 1; | |
472 | unsigned long : 3; | |
664b4973 AY |
473 | unsigned long b60 : 1; |
474 | unsigned long b61 : 1; | |
475 | unsigned long as : 2; /* ASCE Identifier */ | |
476 | }; | |
477 | ||
478 | enum { | |
479 | FSI_UNKNOWN = 0, /* Unknown wether fetch or store */ | |
480 | FSI_STORE = 1, /* Exception was due to store operation */ | |
481 | FSI_FETCH = 2 /* Exception was due to fetch operation */ | |
482 | }; | |
483 | ||
d03193de DH |
484 | enum prot_type { |
485 | PROT_TYPE_LA = 0, | |
486 | PROT_TYPE_KEYC = 1, | |
487 | PROT_TYPE_ALC = 2, | |
488 | PROT_TYPE_DAT = 3, | |
489 | }; | |
490 | ||
491 | static int trans_exc(struct kvm_vcpu *vcpu, int code, unsigned long gva, | |
27f67f87 | 492 | u8 ar, enum gacc_mode mode, enum prot_type prot) |
d03193de DH |
493 | { |
494 | struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm; | |
495 | struct trans_exc_code_bits *tec; | |
496 | ||
497 | memset(pgm, 0, sizeof(*pgm)); | |
498 | pgm->code = code; | |
499 | tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code; | |
500 | ||
501 | switch (code) { | |
c14b88d7 JF |
502 | case PGM_PROTECTION: |
503 | switch (prot) { | |
a679c547 CB |
504 | case PROT_TYPE_LA: |
505 | tec->b56 = 1; | |
506 | break; | |
507 | case PROT_TYPE_KEYC: | |
508 | tec->b60 = 1; | |
509 | break; | |
c14b88d7 JF |
510 | case PROT_TYPE_ALC: |
511 | tec->b60 = 1; | |
512 | /* FALL THROUGH */ | |
513 | case PROT_TYPE_DAT: | |
514 | tec->b61 = 1; | |
515 | break; | |
c14b88d7 JF |
516 | } |
517 | /* FALL THROUGH */ | |
d03193de DH |
518 | case PGM_ASCE_TYPE: |
519 | case PGM_PAGE_TRANSLATION: | |
520 | case PGM_REGION_FIRST_TRANS: | |
521 | case PGM_REGION_SECOND_TRANS: | |
522 | case PGM_REGION_THIRD_TRANS: | |
523 | case PGM_SEGMENT_TRANSLATION: | |
524 | /* | |
525 | * op_access_id only applies to MOVE_PAGE -> set bit 61 | |
526 | * exc_access_id has to be set to 0 for some instructions. Both | |
c14b88d7 | 527 | * cases have to be handled by the caller. |
d03193de DH |
528 | */ |
529 | tec->addr = gva >> PAGE_SHIFT; | |
530 | tec->fsi = mode == GACC_STORE ? FSI_STORE : FSI_FETCH; | |
531 | tec->as = psw_bits(vcpu->arch.sie_block->gpsw).as; | |
532 | /* FALL THROUGH */ | |
533 | case PGM_ALEN_TRANSLATION: | |
534 | case PGM_ALE_SEQUENCE: | |
535 | case PGM_ASTE_VALIDITY: | |
536 | case PGM_ASTE_SEQUENCE: | |
537 | case PGM_EXTENDED_AUTHORITY: | |
c14b88d7 JF |
538 | /* |
539 | * We can always store exc_access_id, as it is | |
540 | * undefined for non-ar cases. It is undefined for | |
541 | * most DAT protection exceptions. | |
542 | */ | |
d03193de DH |
543 | pgm->exc_access_id = ar; |
544 | break; | |
d03193de DH |
545 | } |
546 | return code; | |
547 | } | |
548 | ||
664b4973 | 549 | static int get_vcpu_asce(struct kvm_vcpu *vcpu, union asce *asce, |
27f67f87 | 550 | unsigned long ga, u8 ar, enum gacc_mode mode) |
22938978 | 551 | { |
664b4973 | 552 | int rc; |
34346b9a | 553 | struct psw_bits psw = psw_bits(vcpu->arch.sie_block->gpsw); |
664b4973 | 554 | |
34346b9a | 555 | if (!psw.t) { |
664b4973 AY |
556 | asce->val = 0; |
557 | asce->r = 1; | |
558 | return 0; | |
559 | } | |
560 | ||
34346b9a DH |
561 | if (mode == GACC_IFETCH) |
562 | psw.as = psw.as == PSW_AS_HOME ? PSW_AS_HOME : PSW_AS_PRIMARY; | |
563 | ||
564 | switch (psw.as) { | |
22938978 | 565 | case PSW_AS_PRIMARY: |
664b4973 AY |
566 | asce->val = vcpu->arch.sie_block->gcr[1]; |
567 | return 0; | |
22938978 | 568 | case PSW_AS_SECONDARY: |
664b4973 AY |
569 | asce->val = vcpu->arch.sie_block->gcr[7]; |
570 | return 0; | |
22938978 | 571 | case PSW_AS_HOME: |
664b4973 AY |
572 | asce->val = vcpu->arch.sie_block->gcr[13]; |
573 | return 0; | |
574 | case PSW_AS_ACCREG: | |
92c96321 | 575 | rc = ar_translation(vcpu, asce, ar, mode); |
664b4973 | 576 | if (rc > 0) |
bcfa01d7 | 577 | return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_ALC); |
664b4973 | 578 | return rc; |
22938978 HC |
579 | } |
580 | return 0; | |
581 | } | |
582 | ||
583 | static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val) | |
584 | { | |
585 | return kvm_read_guest(kvm, gpa, val, sizeof(*val)); | |
586 | } | |
587 | ||
588 | /** | |
589 | * guest_translate - translate a guest virtual into a guest absolute address | |
590 | * @vcpu: virtual cpu | |
591 | * @gva: guest virtual address | |
592 | * @gpa: points to where guest physical (absolute) address should be stored | |
75a18122 | 593 | * @asce: effective asce |
92c96321 | 594 | * @mode: indicates the access mode to be used |
22938978 HC |
595 | * |
596 | * Translate a guest virtual address into a guest absolute address by means | |
16b0fc13 | 597 | * of dynamic address translation as specified by the architecture. |
22938978 HC |
598 | * If the resulting absolute address is not available in the configuration |
599 | * an addressing exception is indicated and @gpa will not be changed. | |
600 | * | |
601 | * Returns: - zero on success; @gpa contains the resulting absolute address | |
602 | * - a negative value if guest access failed due to e.g. broken | |
603 | * guest mapping | |
604 | * - a positve value if an access exception happened. In this case | |
605 | * the returned value is the program interruption code as defined | |
606 | * by the architecture | |
607 | */ | |
608 | static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva, | |
75a18122 | 609 | unsigned long *gpa, const union asce asce, |
92c96321 | 610 | enum gacc_mode mode) |
22938978 HC |
611 | { |
612 | union vaddress vaddr = {.addr = gva}; | |
613 | union raddress raddr = {.addr = gva}; | |
614 | union page_table_entry pte; | |
615 | int dat_protection = 0; | |
616 | union ctlreg0 ctlreg0; | |
617 | unsigned long ptr; | |
618 | int edat1, edat2; | |
22938978 HC |
619 | |
620 | ctlreg0.val = vcpu->arch.sie_block->gcr[0]; | |
9d8d5786 MM |
621 | edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8); |
622 | edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78); | |
22938978 HC |
623 | if (asce.r) |
624 | goto real_address; | |
625 | ptr = asce.origin * 4096; | |
626 | switch (asce.dt) { | |
627 | case ASCE_TYPE_REGION1: | |
628 | if (vaddr.rfx01 > asce.tl) | |
629 | return PGM_REGION_FIRST_TRANS; | |
630 | ptr += vaddr.rfx * 8; | |
631 | break; | |
632 | case ASCE_TYPE_REGION2: | |
633 | if (vaddr.rfx) | |
634 | return PGM_ASCE_TYPE; | |
635 | if (vaddr.rsx01 > asce.tl) | |
636 | return PGM_REGION_SECOND_TRANS; | |
637 | ptr += vaddr.rsx * 8; | |
638 | break; | |
639 | case ASCE_TYPE_REGION3: | |
640 | if (vaddr.rfx || vaddr.rsx) | |
641 | return PGM_ASCE_TYPE; | |
642 | if (vaddr.rtx01 > asce.tl) | |
643 | return PGM_REGION_THIRD_TRANS; | |
644 | ptr += vaddr.rtx * 8; | |
645 | break; | |
646 | case ASCE_TYPE_SEGMENT: | |
647 | if (vaddr.rfx || vaddr.rsx || vaddr.rtx) | |
648 | return PGM_ASCE_TYPE; | |
649 | if (vaddr.sx01 > asce.tl) | |
650 | return PGM_SEGMENT_TRANSLATION; | |
651 | ptr += vaddr.sx * 8; | |
652 | break; | |
653 | } | |
654 | switch (asce.dt) { | |
655 | case ASCE_TYPE_REGION1: { | |
656 | union region1_table_entry rfte; | |
657 | ||
658 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
659 | return PGM_ADDRESSING; | |
660 | if (deref_table(vcpu->kvm, ptr, &rfte.val)) | |
661 | return -EFAULT; | |
662 | if (rfte.i) | |
663 | return PGM_REGION_FIRST_TRANS; | |
664 | if (rfte.tt != TABLE_TYPE_REGION1) | |
665 | return PGM_TRANSLATION_SPEC; | |
666 | if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl) | |
667 | return PGM_REGION_SECOND_TRANS; | |
668 | if (edat1) | |
669 | dat_protection |= rfte.p; | |
670 | ptr = rfte.rto * 4096 + vaddr.rsx * 8; | |
671 | } | |
672 | /* fallthrough */ | |
673 | case ASCE_TYPE_REGION2: { | |
674 | union region2_table_entry rste; | |
675 | ||
676 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
677 | return PGM_ADDRESSING; | |
678 | if (deref_table(vcpu->kvm, ptr, &rste.val)) | |
679 | return -EFAULT; | |
680 | if (rste.i) | |
681 | return PGM_REGION_SECOND_TRANS; | |
682 | if (rste.tt != TABLE_TYPE_REGION2) | |
683 | return PGM_TRANSLATION_SPEC; | |
684 | if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl) | |
685 | return PGM_REGION_THIRD_TRANS; | |
686 | if (edat1) | |
687 | dat_protection |= rste.p; | |
688 | ptr = rste.rto * 4096 + vaddr.rtx * 8; | |
689 | } | |
690 | /* fallthrough */ | |
691 | case ASCE_TYPE_REGION3: { | |
692 | union region3_table_entry rtte; | |
693 | ||
694 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
695 | return PGM_ADDRESSING; | |
696 | if (deref_table(vcpu->kvm, ptr, &rtte.val)) | |
697 | return -EFAULT; | |
698 | if (rtte.i) | |
699 | return PGM_REGION_THIRD_TRANS; | |
700 | if (rtte.tt != TABLE_TYPE_REGION3) | |
701 | return PGM_TRANSLATION_SPEC; | |
702 | if (rtte.cr && asce.p && edat2) | |
703 | return PGM_TRANSLATION_SPEC; | |
704 | if (rtte.fc && edat2) { | |
705 | dat_protection |= rtte.fc1.p; | |
706 | raddr.rfaa = rtte.fc1.rfaa; | |
707 | goto absolute_address; | |
708 | } | |
709 | if (vaddr.sx01 < rtte.fc0.tf) | |
710 | return PGM_SEGMENT_TRANSLATION; | |
711 | if (vaddr.sx01 > rtte.fc0.tl) | |
712 | return PGM_SEGMENT_TRANSLATION; | |
713 | if (edat1) | |
714 | dat_protection |= rtte.fc0.p; | |
715 | ptr = rtte.fc0.sto * 4096 + vaddr.sx * 8; | |
716 | } | |
717 | /* fallthrough */ | |
718 | case ASCE_TYPE_SEGMENT: { | |
719 | union segment_table_entry ste; | |
720 | ||
721 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
722 | return PGM_ADDRESSING; | |
723 | if (deref_table(vcpu->kvm, ptr, &ste.val)) | |
724 | return -EFAULT; | |
725 | if (ste.i) | |
726 | return PGM_SEGMENT_TRANSLATION; | |
727 | if (ste.tt != TABLE_TYPE_SEGMENT) | |
728 | return PGM_TRANSLATION_SPEC; | |
729 | if (ste.cs && asce.p) | |
730 | return PGM_TRANSLATION_SPEC; | |
731 | if (ste.fc && edat1) { | |
732 | dat_protection |= ste.fc1.p; | |
733 | raddr.sfaa = ste.fc1.sfaa; | |
734 | goto absolute_address; | |
735 | } | |
736 | dat_protection |= ste.fc0.p; | |
737 | ptr = ste.fc0.pto * 2048 + vaddr.px * 8; | |
738 | } | |
739 | } | |
740 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
741 | return PGM_ADDRESSING; | |
742 | if (deref_table(vcpu->kvm, ptr, &pte.val)) | |
743 | return -EFAULT; | |
744 | if (pte.i) | |
745 | return PGM_PAGE_TRANSLATION; | |
746 | if (pte.z) | |
747 | return PGM_TRANSLATION_SPEC; | |
748 | if (pte.co && !edat1) | |
749 | return PGM_TRANSLATION_SPEC; | |
750 | dat_protection |= pte.p; | |
751 | raddr.pfra = pte.pfra; | |
752 | real_address: | |
753 | raddr.addr = kvm_s390_real_to_abs(vcpu, raddr.addr); | |
754 | absolute_address: | |
92c96321 | 755 | if (mode == GACC_STORE && dat_protection) |
22938978 HC |
756 | return PGM_PROTECTION; |
757 | if (kvm_is_error_gpa(vcpu->kvm, raddr.addr)) | |
758 | return PGM_ADDRESSING; | |
759 | *gpa = raddr.addr; | |
760 | return 0; | |
761 | } | |
762 | ||
763 | static inline int is_low_address(unsigned long ga) | |
764 | { | |
765 | /* Check for address ranges 0..511 and 4096..4607 */ | |
766 | return (ga & ~0x11fful) == 0; | |
767 | } | |
768 | ||
75a18122 AY |
769 | static int low_address_protection_enabled(struct kvm_vcpu *vcpu, |
770 | const union asce asce) | |
22938978 HC |
771 | { |
772 | union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; | |
773 | psw_t *psw = &vcpu->arch.sie_block->gpsw; | |
22938978 HC |
774 | |
775 | if (!ctlreg0.lap) | |
776 | return 0; | |
22938978 HC |
777 | if (psw_bits(*psw).t && asce.p) |
778 | return 0; | |
779 | return 1; | |
780 | } | |
781 | ||
27f67f87 | 782 | static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar, |
22938978 | 783 | unsigned long *pages, unsigned long nr_pages, |
92c96321 | 784 | const union asce asce, enum gacc_mode mode) |
22938978 | 785 | { |
22938978 | 786 | psw_t *psw = &vcpu->arch.sie_block->gpsw; |
cde0dcfb | 787 | int lap_enabled, rc = 0; |
22938978 | 788 | |
75a18122 | 789 | lap_enabled = low_address_protection_enabled(vcpu, asce); |
22938978 HC |
790 | while (nr_pages) { |
791 | ga = kvm_s390_logical_to_effective(vcpu, ga); | |
cde0dcfb DH |
792 | if (mode == GACC_STORE && lap_enabled && is_low_address(ga)) |
793 | return trans_exc(vcpu, PGM_PROTECTION, ga, ar, mode, | |
794 | PROT_TYPE_LA); | |
22938978 HC |
795 | ga &= PAGE_MASK; |
796 | if (psw_bits(*psw).t) { | |
92c96321 | 797 | rc = guest_translate(vcpu, ga, pages, asce, mode); |
22938978 HC |
798 | if (rc < 0) |
799 | return rc; | |
22938978 HC |
800 | } else { |
801 | *pages = kvm_s390_real_to_abs(vcpu, ga); | |
802 | if (kvm_is_error_gpa(vcpu->kvm, *pages)) | |
cde0dcfb | 803 | rc = PGM_ADDRESSING; |
22938978 | 804 | } |
cde0dcfb DH |
805 | if (rc) |
806 | return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_DAT); | |
22938978 HC |
807 | ga += PAGE_SIZE; |
808 | pages++; | |
809 | nr_pages--; | |
810 | } | |
811 | return 0; | |
812 | } | |
813 | ||
27f67f87 | 814 | int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar, void *data, |
92c96321 | 815 | unsigned long len, enum gacc_mode mode) |
22938978 HC |
816 | { |
817 | psw_t *psw = &vcpu->arch.sie_block->gpsw; | |
818 | unsigned long _len, nr_pages, gpa, idx; | |
819 | unsigned long pages_array[2]; | |
820 | unsigned long *pages; | |
8a242234 HC |
821 | int need_ipte_lock; |
822 | union asce asce; | |
22938978 HC |
823 | int rc; |
824 | ||
825 | if (!len) | |
826 | return 0; | |
6167375b DH |
827 | ga = kvm_s390_logical_to_effective(vcpu, ga); |
828 | rc = get_vcpu_asce(vcpu, &asce, ga, ar, mode); | |
664b4973 AY |
829 | if (rc) |
830 | return rc; | |
22938978 HC |
831 | nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1; |
832 | pages = pages_array; | |
833 | if (nr_pages > ARRAY_SIZE(pages_array)) | |
834 | pages = vmalloc(nr_pages * sizeof(unsigned long)); | |
835 | if (!pages) | |
836 | return -ENOMEM; | |
8a242234 HC |
837 | need_ipte_lock = psw_bits(*psw).t && !asce.r; |
838 | if (need_ipte_lock) | |
839 | ipte_lock(vcpu); | |
cde0dcfb | 840 | rc = guest_page_range(vcpu, ga, ar, pages, nr_pages, asce, mode); |
22938978 HC |
841 | for (idx = 0; idx < nr_pages && !rc; idx++) { |
842 | gpa = *(pages + idx) + (ga & ~PAGE_MASK); | |
843 | _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); | |
92c96321 | 844 | if (mode == GACC_STORE) |
22938978 HC |
845 | rc = kvm_write_guest(vcpu->kvm, gpa, data, _len); |
846 | else | |
847 | rc = kvm_read_guest(vcpu->kvm, gpa, data, _len); | |
848 | len -= _len; | |
849 | ga += _len; | |
850 | data += _len; | |
851 | } | |
8a242234 HC |
852 | if (need_ipte_lock) |
853 | ipte_unlock(vcpu); | |
22938978 HC |
854 | if (nr_pages > ARRAY_SIZE(pages_array)) |
855 | vfree(pages); | |
856 | return rc; | |
857 | } | |
858 | ||
859 | int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra, | |
92c96321 | 860 | void *data, unsigned long len, enum gacc_mode mode) |
22938978 HC |
861 | { |
862 | unsigned long _len, gpa; | |
863 | int rc = 0; | |
864 | ||
865 | while (len && !rc) { | |
866 | gpa = kvm_s390_real_to_abs(vcpu, gra); | |
867 | _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); | |
92c96321 | 868 | if (mode) |
22938978 HC |
869 | rc = write_guest_abs(vcpu, gpa, data, _len); |
870 | else | |
871 | rc = read_guest_abs(vcpu, gpa, data, _len); | |
872 | len -= _len; | |
873 | gra += _len; | |
874 | data += _len; | |
875 | } | |
876 | return rc; | |
877 | } | |
f8232c8c | 878 | |
9fbc0276 TH |
879 | /** |
880 | * guest_translate_address - translate guest logical into guest absolute address | |
881 | * | |
882 | * Parameter semantics are the same as the ones from guest_translate. | |
883 | * The memory contents at the guest address are not changed. | |
884 | * | |
885 | * Note: The IPTE lock is not taken during this function, so the caller | |
886 | * has to take care of this. | |
887 | */ | |
27f67f87 | 888 | int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, u8 ar, |
92c96321 | 889 | unsigned long *gpa, enum gacc_mode mode) |
9fbc0276 | 890 | { |
9fbc0276 | 891 | psw_t *psw = &vcpu->arch.sie_block->gpsw; |
9fbc0276 TH |
892 | union asce asce; |
893 | int rc; | |
894 | ||
9fbc0276 | 895 | gva = kvm_s390_logical_to_effective(vcpu, gva); |
6167375b | 896 | rc = get_vcpu_asce(vcpu, &asce, gva, ar, mode); |
664b4973 AY |
897 | if (rc) |
898 | return rc; | |
75a18122 | 899 | if (is_low_address(gva) && low_address_protection_enabled(vcpu, asce)) { |
fbcb7d51 DH |
900 | if (mode == GACC_STORE) |
901 | return trans_exc(vcpu, PGM_PROTECTION, gva, 0, | |
902 | mode, PROT_TYPE_LA); | |
9fbc0276 TH |
903 | } |
904 | ||
9fbc0276 | 905 | if (psw_bits(*psw).t && !asce.r) { /* Use DAT? */ |
92c96321 | 906 | rc = guest_translate(vcpu, gva, gpa, asce, mode); |
fbcb7d51 DH |
907 | if (rc > 0) |
908 | return trans_exc(vcpu, rc, gva, 0, mode, PROT_TYPE_DAT); | |
9fbc0276 | 909 | } else { |
9fbc0276 TH |
910 | *gpa = kvm_s390_real_to_abs(vcpu, gva); |
911 | if (kvm_is_error_gpa(vcpu->kvm, *gpa)) | |
fbcb7d51 | 912 | return trans_exc(vcpu, rc, gva, PGM_ADDRESSING, mode, 0); |
9fbc0276 TH |
913 | } |
914 | ||
915 | return rc; | |
916 | } | |
917 | ||
41408c28 TH |
918 | /** |
919 | * check_gva_range - test a range of guest virtual addresses for accessibility | |
920 | */ | |
27f67f87 | 921 | int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, u8 ar, |
92c96321 | 922 | unsigned long length, enum gacc_mode mode) |
41408c28 TH |
923 | { |
924 | unsigned long gpa; | |
925 | unsigned long currlen; | |
926 | int rc = 0; | |
927 | ||
928 | ipte_lock(vcpu); | |
929 | while (length > 0 && !rc) { | |
930 | currlen = min(length, PAGE_SIZE - (gva % PAGE_SIZE)); | |
92c96321 | 931 | rc = guest_translate_address(vcpu, gva, ar, &gpa, mode); |
41408c28 TH |
932 | gva += currlen; |
933 | length -= currlen; | |
934 | } | |
935 | ipte_unlock(vcpu); | |
936 | ||
937 | return rc; | |
938 | } | |
939 | ||
f8232c8c | 940 | /** |
dd9e5b7b AY |
941 | * kvm_s390_check_low_addr_prot_real - check for low-address protection |
942 | * @gra: Guest real address | |
f8232c8c TH |
943 | * |
944 | * Checks whether an address is subject to low-address protection and set | |
945 | * up vcpu->arch.pgm accordingly if necessary. | |
946 | * | |
947 | * Return: 0 if no protection exception, or PGM_PROTECTION if protected. | |
948 | */ | |
dd9e5b7b | 949 | int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra) |
f8232c8c | 950 | { |
dd9e5b7b | 951 | union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; |
f8232c8c | 952 | |
dd9e5b7b | 953 | if (!ctlreg0.lap || !is_low_address(gra)) |
f8232c8c | 954 | return 0; |
3e3c67f6 | 955 | return trans_exc(vcpu, PGM_PROTECTION, gra, 0, GACC_STORE, PROT_TYPE_LA); |
f8232c8c | 956 | } |
aa17aa57 MS |
957 | |
958 | /** | |
959 | * kvm_s390_shadow_tables - walk the guest page table and create shadow tables | |
960 | * @sg: pointer to the shadow guest address space structure | |
961 | * @saddr: faulting address in the shadow gmap | |
962 | * @pgt: pointer to the page table address result | |
fd8d4e3a | 963 | * @fake: pgt references contiguous guest memory block, not a pgtable |
aa17aa57 MS |
964 | */ |
965 | static int kvm_s390_shadow_tables(struct gmap *sg, unsigned long saddr, | |
fd8d4e3a DH |
966 | unsigned long *pgt, int *dat_protection, |
967 | int *fake) | |
aa17aa57 MS |
968 | { |
969 | struct gmap *parent; | |
970 | union asce asce; | |
971 | union vaddress vaddr; | |
972 | unsigned long ptr; | |
973 | int rc; | |
974 | ||
fd8d4e3a | 975 | *fake = 0; |
1c65781b | 976 | *dat_protection = 0; |
aa17aa57 MS |
977 | parent = sg->parent; |
978 | vaddr.addr = saddr; | |
979 | asce.val = sg->orig_asce; | |
980 | ptr = asce.origin * 4096; | |
3218f709 DH |
981 | if (asce.r) { |
982 | *fake = 1; | |
983 | asce.dt = ASCE_TYPE_REGION1; | |
984 | } | |
aa17aa57 MS |
985 | switch (asce.dt) { |
986 | case ASCE_TYPE_REGION1: | |
3218f709 | 987 | if (vaddr.rfx01 > asce.tl && !asce.r) |
aa17aa57 MS |
988 | return PGM_REGION_FIRST_TRANS; |
989 | break; | |
990 | case ASCE_TYPE_REGION2: | |
991 | if (vaddr.rfx) | |
992 | return PGM_ASCE_TYPE; | |
993 | if (vaddr.rsx01 > asce.tl) | |
994 | return PGM_REGION_SECOND_TRANS; | |
995 | break; | |
996 | case ASCE_TYPE_REGION3: | |
997 | if (vaddr.rfx || vaddr.rsx) | |
998 | return PGM_ASCE_TYPE; | |
999 | if (vaddr.rtx01 > asce.tl) | |
1000 | return PGM_REGION_THIRD_TRANS; | |
1001 | break; | |
1002 | case ASCE_TYPE_SEGMENT: | |
1003 | if (vaddr.rfx || vaddr.rsx || vaddr.rtx) | |
1004 | return PGM_ASCE_TYPE; | |
1005 | if (vaddr.sx01 > asce.tl) | |
1006 | return PGM_SEGMENT_TRANSLATION; | |
1007 | break; | |
1008 | } | |
1009 | ||
1010 | switch (asce.dt) { | |
1011 | case ASCE_TYPE_REGION1: { | |
1012 | union region1_table_entry rfte; | |
1013 | ||
3218f709 DH |
1014 | if (*fake) { |
1015 | /* offset in 16EB guest memory block */ | |
1016 | ptr = ptr + ((unsigned long) vaddr.rsx << 53UL); | |
1017 | rfte.val = ptr; | |
1018 | goto shadow_r2t; | |
1019 | } | |
aa17aa57 MS |
1020 | rc = gmap_read_table(parent, ptr + vaddr.rfx * 8, &rfte.val); |
1021 | if (rc) | |
1022 | return rc; | |
1023 | if (rfte.i) | |
1024 | return PGM_REGION_FIRST_TRANS; | |
1025 | if (rfte.tt != TABLE_TYPE_REGION1) | |
1026 | return PGM_TRANSLATION_SPEC; | |
1027 | if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl) | |
1028 | return PGM_REGION_SECOND_TRANS; | |
1c65781b DH |
1029 | if (sg->edat_level >= 1) |
1030 | *dat_protection |= rfte.p; | |
3218f709 DH |
1031 | ptr = rfte.rto << 12UL; |
1032 | shadow_r2t: | |
1033 | rc = gmap_shadow_r2t(sg, saddr, rfte.val, *fake); | |
aa17aa57 MS |
1034 | if (rc) |
1035 | return rc; | |
aa17aa57 MS |
1036 | /* fallthrough */ |
1037 | } | |
1038 | case ASCE_TYPE_REGION2: { | |
1039 | union region2_table_entry rste; | |
1040 | ||
3218f709 DH |
1041 | if (*fake) { |
1042 | /* offset in 8PB guest memory block */ | |
1043 | ptr = ptr + ((unsigned long) vaddr.rtx << 42UL); | |
1044 | rste.val = ptr; | |
1045 | goto shadow_r3t; | |
1046 | } | |
aa17aa57 MS |
1047 | rc = gmap_read_table(parent, ptr + vaddr.rsx * 8, &rste.val); |
1048 | if (rc) | |
1049 | return rc; | |
1050 | if (rste.i) | |
1051 | return PGM_REGION_SECOND_TRANS; | |
1052 | if (rste.tt != TABLE_TYPE_REGION2) | |
1053 | return PGM_TRANSLATION_SPEC; | |
1054 | if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl) | |
1055 | return PGM_REGION_THIRD_TRANS; | |
1c65781b DH |
1056 | if (sg->edat_level >= 1) |
1057 | *dat_protection |= rste.p; | |
3218f709 DH |
1058 | ptr = rste.rto << 12UL; |
1059 | shadow_r3t: | |
1c65781b | 1060 | rste.p |= *dat_protection; |
3218f709 | 1061 | rc = gmap_shadow_r3t(sg, saddr, rste.val, *fake); |
aa17aa57 MS |
1062 | if (rc) |
1063 | return rc; | |
aa17aa57 MS |
1064 | /* fallthrough */ |
1065 | } | |
1066 | case ASCE_TYPE_REGION3: { | |
1067 | union region3_table_entry rtte; | |
1068 | ||
3218f709 DH |
1069 | if (*fake) { |
1070 | /* offset in 4TB guest memory block */ | |
1071 | ptr = ptr + ((unsigned long) vaddr.sx << 31UL); | |
1072 | rtte.val = ptr; | |
1073 | goto shadow_sgt; | |
1074 | } | |
aa17aa57 MS |
1075 | rc = gmap_read_table(parent, ptr + vaddr.rtx * 8, &rtte.val); |
1076 | if (rc) | |
1077 | return rc; | |
1078 | if (rtte.i) | |
1079 | return PGM_REGION_THIRD_TRANS; | |
1080 | if (rtte.tt != TABLE_TYPE_REGION3) | |
1081 | return PGM_TRANSLATION_SPEC; | |
18b89809 DH |
1082 | if (rtte.cr && asce.p && sg->edat_level >= 2) |
1083 | return PGM_TRANSLATION_SPEC; | |
1084 | if (rtte.fc && sg->edat_level >= 2) { | |
1c65781b | 1085 | *dat_protection |= rtte.fc0.p; |
18b89809 DH |
1086 | *fake = 1; |
1087 | ptr = rtte.fc1.rfaa << 31UL; | |
1088 | rtte.val = ptr; | |
18b89809 DH |
1089 | goto shadow_sgt; |
1090 | } | |
aa17aa57 MS |
1091 | if (vaddr.sx01 < rtte.fc0.tf || vaddr.sx01 > rtte.fc0.tl) |
1092 | return PGM_SEGMENT_TRANSLATION; | |
1c65781b DH |
1093 | if (sg->edat_level >= 1) |
1094 | *dat_protection |= rtte.fc0.p; | |
18b89809 DH |
1095 | ptr = rtte.fc0.sto << 12UL; |
1096 | shadow_sgt: | |
1c65781b | 1097 | rtte.fc0.p |= *dat_protection; |
18b89809 | 1098 | rc = gmap_shadow_sgt(sg, saddr, rtte.val, *fake); |
aa17aa57 MS |
1099 | if (rc) |
1100 | return rc; | |
aa17aa57 MS |
1101 | /* fallthrough */ |
1102 | } | |
1103 | case ASCE_TYPE_SEGMENT: { | |
1104 | union segment_table_entry ste; | |
1105 | ||
18b89809 DH |
1106 | if (*fake) { |
1107 | /* offset in 2G guest memory block */ | |
1108 | ptr = ptr + ((unsigned long) vaddr.sx << 20UL); | |
1109 | ste.val = ptr; | |
1110 | goto shadow_pgt; | |
1111 | } | |
aa17aa57 MS |
1112 | rc = gmap_read_table(parent, ptr + vaddr.sx * 8, &ste.val); |
1113 | if (rc) | |
1114 | return rc; | |
1115 | if (ste.i) | |
1116 | return PGM_SEGMENT_TRANSLATION; | |
1117 | if (ste.tt != TABLE_TYPE_SEGMENT) | |
1118 | return PGM_TRANSLATION_SPEC; | |
1119 | if (ste.cs && asce.p) | |
1120 | return PGM_TRANSLATION_SPEC; | |
1c65781b | 1121 | *dat_protection |= ste.fc0.p; |
fd8d4e3a | 1122 | if (ste.fc && sg->edat_level >= 1) { |
fd8d4e3a DH |
1123 | *fake = 1; |
1124 | ptr = ste.fc1.sfaa << 20UL; | |
1125 | ste.val = ptr; | |
fd8d4e3a DH |
1126 | goto shadow_pgt; |
1127 | } | |
1128 | ptr = ste.fc0.pto << 11UL; | |
1129 | shadow_pgt: | |
1c65781b | 1130 | ste.fc0.p |= *dat_protection; |
fd8d4e3a | 1131 | rc = gmap_shadow_pgt(sg, saddr, ste.val, *fake); |
aa17aa57 MS |
1132 | if (rc) |
1133 | return rc; | |
aa17aa57 MS |
1134 | } |
1135 | } | |
1136 | /* Return the parent address of the page table */ | |
1137 | *pgt = ptr; | |
1138 | return 0; | |
1139 | } | |
1140 | ||
1141 | /** | |
1142 | * kvm_s390_shadow_fault - handle fault on a shadow page table | |
f4debb40 | 1143 | * @vcpu: virtual cpu |
aa17aa57 MS |
1144 | * @sg: pointer to the shadow guest address space structure |
1145 | * @saddr: faulting address in the shadow gmap | |
aa17aa57 MS |
1146 | * |
1147 | * Returns: - 0 if the shadow fault was successfully resolved | |
1148 | * - > 0 (pgm exception code) on exceptions while faulting | |
1149 | * - -EAGAIN if the caller can retry immediately | |
1150 | * - -EFAULT when accessing invalid guest addresses | |
1151 | * - -ENOMEM if out of memory | |
1152 | */ | |
f4debb40 DH |
1153 | int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *sg, |
1154 | unsigned long saddr) | |
aa17aa57 MS |
1155 | { |
1156 | union vaddress vaddr; | |
1157 | union page_table_entry pte; | |
1158 | unsigned long pgt; | |
fd8d4e3a | 1159 | int dat_protection, fake; |
aa17aa57 MS |
1160 | int rc; |
1161 | ||
e52f8b61 | 1162 | down_read(&sg->mm->mmap_sem); |
f4debb40 DH |
1163 | /* |
1164 | * We don't want any guest-2 tables to change - so the parent | |
1165 | * tables/pointers we read stay valid - unshadowing is however | |
1166 | * always possible - only guest_table_lock protects us. | |
1167 | */ | |
1168 | ipte_lock(vcpu); | |
e52f8b61 | 1169 | |
fd8d4e3a | 1170 | rc = gmap_shadow_pgt_lookup(sg, saddr, &pgt, &dat_protection, &fake); |
e52f8b61 | 1171 | if (rc) |
fd8d4e3a DH |
1172 | rc = kvm_s390_shadow_tables(sg, saddr, &pgt, &dat_protection, |
1173 | &fake); | |
aa17aa57 MS |
1174 | |
1175 | vaddr.addr = saddr; | |
fd8d4e3a DH |
1176 | if (fake) { |
1177 | /* offset in 1MB guest memory block */ | |
1178 | pte.val = pgt + ((unsigned long) vaddr.px << 12UL); | |
1179 | goto shadow_page; | |
1180 | } | |
e52f8b61 DH |
1181 | if (!rc) |
1182 | rc = gmap_read_table(sg->parent, pgt + vaddr.px * 8, &pte.val); | |
1183 | if (!rc && pte.i) | |
1184 | rc = PGM_PAGE_TRANSLATION; | |
fd8d4e3a | 1185 | if (!rc && (pte.z || (pte.co && sg->edat_level < 1))) |
e52f8b61 | 1186 | rc = PGM_TRANSLATION_SPEC; |
fd8d4e3a | 1187 | shadow_page: |
00fc062d | 1188 | pte.p |= dat_protection; |
e52f8b61 DH |
1189 | if (!rc) |
1190 | rc = gmap_shadow_page(sg, saddr, __pte(pte.val)); | |
f4debb40 | 1191 | ipte_unlock(vcpu); |
e52f8b61 DH |
1192 | up_read(&sg->mm->mmap_sem); |
1193 | return rc; | |
aa17aa57 | 1194 | } |