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Commit | Line | Data |
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22938978 HC |
1 | /* |
2 | * guest access functions | |
3 | * | |
4 | * Copyright IBM Corp. 2014 | |
5 | * | |
6 | */ | |
7 | ||
8 | #include <linux/vmalloc.h> | |
9 | #include <linux/err.h> | |
10 | #include <asm/pgtable.h> | |
aa17aa57 | 11 | #include <asm/gmap.h> |
22938978 HC |
12 | #include "kvm-s390.h" |
13 | #include "gaccess.h" | |
664b4973 | 14 | #include <asm/switch_to.h> |
22938978 HC |
15 | |
16 | union asce { | |
17 | unsigned long val; | |
18 | struct { | |
19 | unsigned long origin : 52; /* Region- or Segment-Table Origin */ | |
20 | unsigned long : 2; | |
21 | unsigned long g : 1; /* Subspace Group Control */ | |
22 | unsigned long p : 1; /* Private Space Control */ | |
23 | unsigned long s : 1; /* Storage-Alteration-Event Control */ | |
24 | unsigned long x : 1; /* Space-Switch-Event Control */ | |
25 | unsigned long r : 1; /* Real-Space Control */ | |
26 | unsigned long : 1; | |
27 | unsigned long dt : 2; /* Designation-Type Control */ | |
28 | unsigned long tl : 2; /* Region- or Segment-Table Length */ | |
29 | }; | |
30 | }; | |
31 | ||
32 | enum { | |
33 | ASCE_TYPE_SEGMENT = 0, | |
34 | ASCE_TYPE_REGION3 = 1, | |
35 | ASCE_TYPE_REGION2 = 2, | |
36 | ASCE_TYPE_REGION1 = 3 | |
37 | }; | |
38 | ||
39 | union region1_table_entry { | |
40 | unsigned long val; | |
41 | struct { | |
42 | unsigned long rto: 52;/* Region-Table Origin */ | |
43 | unsigned long : 2; | |
44 | unsigned long p : 1; /* DAT-Protection Bit */ | |
45 | unsigned long : 1; | |
46 | unsigned long tf : 2; /* Region-Second-Table Offset */ | |
47 | unsigned long i : 1; /* Region-Invalid Bit */ | |
48 | unsigned long : 1; | |
49 | unsigned long tt : 2; /* Table-Type Bits */ | |
50 | unsigned long tl : 2; /* Region-Second-Table Length */ | |
51 | }; | |
52 | }; | |
53 | ||
54 | union region2_table_entry { | |
55 | unsigned long val; | |
56 | struct { | |
57 | unsigned long rto: 52;/* Region-Table Origin */ | |
58 | unsigned long : 2; | |
59 | unsigned long p : 1; /* DAT-Protection Bit */ | |
60 | unsigned long : 1; | |
61 | unsigned long tf : 2; /* Region-Third-Table Offset */ | |
62 | unsigned long i : 1; /* Region-Invalid Bit */ | |
63 | unsigned long : 1; | |
64 | unsigned long tt : 2; /* Table-Type Bits */ | |
65 | unsigned long tl : 2; /* Region-Third-Table Length */ | |
66 | }; | |
67 | }; | |
68 | ||
69 | struct region3_table_entry_fc0 { | |
70 | unsigned long sto: 52;/* Segment-Table Origin */ | |
71 | unsigned long : 1; | |
72 | unsigned long fc : 1; /* Format-Control */ | |
73 | unsigned long p : 1; /* DAT-Protection Bit */ | |
74 | unsigned long : 1; | |
75 | unsigned long tf : 2; /* Segment-Table Offset */ | |
76 | unsigned long i : 1; /* Region-Invalid Bit */ | |
77 | unsigned long cr : 1; /* Common-Region Bit */ | |
78 | unsigned long tt : 2; /* Table-Type Bits */ | |
79 | unsigned long tl : 2; /* Segment-Table Length */ | |
80 | }; | |
81 | ||
82 | struct region3_table_entry_fc1 { | |
83 | unsigned long rfaa : 33; /* Region-Frame Absolute Address */ | |
84 | unsigned long : 14; | |
85 | unsigned long av : 1; /* ACCF-Validity Control */ | |
86 | unsigned long acc: 4; /* Access-Control Bits */ | |
87 | unsigned long f : 1; /* Fetch-Protection Bit */ | |
88 | unsigned long fc : 1; /* Format-Control */ | |
89 | unsigned long p : 1; /* DAT-Protection Bit */ | |
90 | unsigned long co : 1; /* Change-Recording Override */ | |
91 | unsigned long : 2; | |
92 | unsigned long i : 1; /* Region-Invalid Bit */ | |
93 | unsigned long cr : 1; /* Common-Region Bit */ | |
94 | unsigned long tt : 2; /* Table-Type Bits */ | |
95 | unsigned long : 2; | |
96 | }; | |
97 | ||
98 | union region3_table_entry { | |
99 | unsigned long val; | |
100 | struct region3_table_entry_fc0 fc0; | |
101 | struct region3_table_entry_fc1 fc1; | |
102 | struct { | |
103 | unsigned long : 53; | |
104 | unsigned long fc : 1; /* Format-Control */ | |
105 | unsigned long : 4; | |
106 | unsigned long i : 1; /* Region-Invalid Bit */ | |
107 | unsigned long cr : 1; /* Common-Region Bit */ | |
108 | unsigned long tt : 2; /* Table-Type Bits */ | |
109 | unsigned long : 2; | |
110 | }; | |
111 | }; | |
112 | ||
113 | struct segment_entry_fc0 { | |
114 | unsigned long pto: 53;/* Page-Table Origin */ | |
115 | unsigned long fc : 1; /* Format-Control */ | |
116 | unsigned long p : 1; /* DAT-Protection Bit */ | |
117 | unsigned long : 3; | |
118 | unsigned long i : 1; /* Segment-Invalid Bit */ | |
119 | unsigned long cs : 1; /* Common-Segment Bit */ | |
120 | unsigned long tt : 2; /* Table-Type Bits */ | |
121 | unsigned long : 2; | |
122 | }; | |
123 | ||
124 | struct segment_entry_fc1 { | |
125 | unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ | |
126 | unsigned long : 3; | |
127 | unsigned long av : 1; /* ACCF-Validity Control */ | |
128 | unsigned long acc: 4; /* Access-Control Bits */ | |
129 | unsigned long f : 1; /* Fetch-Protection Bit */ | |
130 | unsigned long fc : 1; /* Format-Control */ | |
131 | unsigned long p : 1; /* DAT-Protection Bit */ | |
132 | unsigned long co : 1; /* Change-Recording Override */ | |
133 | unsigned long : 2; | |
134 | unsigned long i : 1; /* Segment-Invalid Bit */ | |
135 | unsigned long cs : 1; /* Common-Segment Bit */ | |
136 | unsigned long tt : 2; /* Table-Type Bits */ | |
137 | unsigned long : 2; | |
138 | }; | |
139 | ||
140 | union segment_table_entry { | |
141 | unsigned long val; | |
142 | struct segment_entry_fc0 fc0; | |
143 | struct segment_entry_fc1 fc1; | |
144 | struct { | |
145 | unsigned long : 53; | |
146 | unsigned long fc : 1; /* Format-Control */ | |
147 | unsigned long : 4; | |
148 | unsigned long i : 1; /* Segment-Invalid Bit */ | |
149 | unsigned long cs : 1; /* Common-Segment Bit */ | |
150 | unsigned long tt : 2; /* Table-Type Bits */ | |
151 | unsigned long : 2; | |
152 | }; | |
153 | }; | |
154 | ||
155 | enum { | |
156 | TABLE_TYPE_SEGMENT = 0, | |
157 | TABLE_TYPE_REGION3 = 1, | |
158 | TABLE_TYPE_REGION2 = 2, | |
159 | TABLE_TYPE_REGION1 = 3 | |
160 | }; | |
161 | ||
162 | union page_table_entry { | |
163 | unsigned long val; | |
164 | struct { | |
165 | unsigned long pfra : 52; /* Page-Frame Real Address */ | |
166 | unsigned long z : 1; /* Zero Bit */ | |
167 | unsigned long i : 1; /* Page-Invalid Bit */ | |
168 | unsigned long p : 1; /* DAT-Protection Bit */ | |
169 | unsigned long co : 1; /* Change-Recording Override */ | |
170 | unsigned long : 8; | |
171 | }; | |
172 | }; | |
173 | ||
174 | /* | |
175 | * vaddress union in order to easily decode a virtual address into its | |
176 | * region first index, region second index etc. parts. | |
177 | */ | |
178 | union vaddress { | |
179 | unsigned long addr; | |
180 | struct { | |
181 | unsigned long rfx : 11; | |
182 | unsigned long rsx : 11; | |
183 | unsigned long rtx : 11; | |
184 | unsigned long sx : 11; | |
185 | unsigned long px : 8; | |
186 | unsigned long bx : 12; | |
187 | }; | |
188 | struct { | |
189 | unsigned long rfx01 : 2; | |
190 | unsigned long : 9; | |
191 | unsigned long rsx01 : 2; | |
192 | unsigned long : 9; | |
193 | unsigned long rtx01 : 2; | |
194 | unsigned long : 9; | |
195 | unsigned long sx01 : 2; | |
196 | unsigned long : 29; | |
197 | }; | |
198 | }; | |
199 | ||
200 | /* | |
201 | * raddress union which will contain the result (real or absolute address) | |
202 | * after a page table walk. The rfaa, sfaa and pfra members are used to | |
203 | * simply assign them the value of a region, segment or page table entry. | |
204 | */ | |
205 | union raddress { | |
206 | unsigned long addr; | |
207 | unsigned long rfaa : 33; /* Region-Frame Absolute Address */ | |
208 | unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ | |
209 | unsigned long pfra : 52; /* Page-Frame Real Address */ | |
210 | }; | |
211 | ||
664b4973 AY |
212 | union alet { |
213 | u32 val; | |
214 | struct { | |
215 | u32 reserved : 7; | |
216 | u32 p : 1; | |
217 | u32 alesn : 8; | |
218 | u32 alen : 16; | |
219 | }; | |
220 | }; | |
221 | ||
222 | union ald { | |
223 | u32 val; | |
224 | struct { | |
225 | u32 : 1; | |
226 | u32 alo : 24; | |
227 | u32 all : 7; | |
228 | }; | |
229 | }; | |
230 | ||
231 | struct ale { | |
232 | unsigned long i : 1; /* ALEN-Invalid Bit */ | |
233 | unsigned long : 5; | |
234 | unsigned long fo : 1; /* Fetch-Only Bit */ | |
235 | unsigned long p : 1; /* Private Bit */ | |
236 | unsigned long alesn : 8; /* Access-List-Entry Sequence Number */ | |
237 | unsigned long aleax : 16; /* Access-List-Entry Authorization Index */ | |
238 | unsigned long : 32; | |
239 | unsigned long : 1; | |
240 | unsigned long asteo : 25; /* ASN-Second-Table-Entry Origin */ | |
241 | unsigned long : 6; | |
242 | unsigned long astesn : 32; /* ASTE Sequence Number */ | |
243 | } __packed; | |
244 | ||
245 | struct aste { | |
246 | unsigned long i : 1; /* ASX-Invalid Bit */ | |
247 | unsigned long ato : 29; /* Authority-Table Origin */ | |
248 | unsigned long : 1; | |
249 | unsigned long b : 1; /* Base-Space Bit */ | |
250 | unsigned long ax : 16; /* Authorization Index */ | |
251 | unsigned long atl : 12; /* Authority-Table Length */ | |
252 | unsigned long : 2; | |
253 | unsigned long ca : 1; /* Controlled-ASN Bit */ | |
254 | unsigned long ra : 1; /* Reusable-ASN Bit */ | |
255 | unsigned long asce : 64; /* Address-Space-Control Element */ | |
256 | unsigned long ald : 32; | |
257 | unsigned long astesn : 32; | |
258 | /* .. more fields there */ | |
259 | } __packed; | |
8a242234 HC |
260 | |
261 | int ipte_lock_held(struct kvm_vcpu *vcpu) | |
262 | { | |
5e044315 ED |
263 | if (vcpu->arch.sie_block->eca & 1) { |
264 | int rc; | |
265 | ||
266 | read_lock(&vcpu->kvm->arch.sca_lock); | |
267 | rc = kvm_s390_get_ipte_control(vcpu->kvm)->kh != 0; | |
268 | read_unlock(&vcpu->kvm->arch.sca_lock); | |
269 | return rc; | |
270 | } | |
a6b7e459 | 271 | return vcpu->kvm->arch.ipte_lock_count != 0; |
8a242234 HC |
272 | } |
273 | ||
274 | static void ipte_lock_simple(struct kvm_vcpu *vcpu) | |
275 | { | |
276 | union ipte_control old, new, *ic; | |
277 | ||
a6b7e459 TH |
278 | mutex_lock(&vcpu->kvm->arch.ipte_mutex); |
279 | vcpu->kvm->arch.ipte_lock_count++; | |
280 | if (vcpu->kvm->arch.ipte_lock_count > 1) | |
8a242234 | 281 | goto out; |
5e044315 ED |
282 | retry: |
283 | read_lock(&vcpu->kvm->arch.sca_lock); | |
60514510 | 284 | ic = kvm_s390_get_ipte_control(vcpu->kvm); |
8a242234 | 285 | do { |
5de72a22 | 286 | old = READ_ONCE(*ic); |
5e044315 ED |
287 | if (old.k) { |
288 | read_unlock(&vcpu->kvm->arch.sca_lock); | |
8a242234 | 289 | cond_resched(); |
5e044315 | 290 | goto retry; |
8a242234 HC |
291 | } |
292 | new = old; | |
293 | new.k = 1; | |
294 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
5e044315 | 295 | read_unlock(&vcpu->kvm->arch.sca_lock); |
8a242234 | 296 | out: |
a6b7e459 | 297 | mutex_unlock(&vcpu->kvm->arch.ipte_mutex); |
8a242234 HC |
298 | } |
299 | ||
300 | static void ipte_unlock_simple(struct kvm_vcpu *vcpu) | |
301 | { | |
302 | union ipte_control old, new, *ic; | |
303 | ||
a6b7e459 TH |
304 | mutex_lock(&vcpu->kvm->arch.ipte_mutex); |
305 | vcpu->kvm->arch.ipte_lock_count--; | |
306 | if (vcpu->kvm->arch.ipte_lock_count) | |
8a242234 | 307 | goto out; |
5e044315 | 308 | read_lock(&vcpu->kvm->arch.sca_lock); |
60514510 | 309 | ic = kvm_s390_get_ipte_control(vcpu->kvm); |
8a242234 | 310 | do { |
5de72a22 | 311 | old = READ_ONCE(*ic); |
1365039d | 312 | new = old; |
8a242234 HC |
313 | new.k = 0; |
314 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
5e044315 | 315 | read_unlock(&vcpu->kvm->arch.sca_lock); |
6b331952 | 316 | wake_up(&vcpu->kvm->arch.ipte_wq); |
8a242234 | 317 | out: |
a6b7e459 | 318 | mutex_unlock(&vcpu->kvm->arch.ipte_mutex); |
8a242234 HC |
319 | } |
320 | ||
321 | static void ipte_lock_siif(struct kvm_vcpu *vcpu) | |
322 | { | |
323 | union ipte_control old, new, *ic; | |
324 | ||
5e044315 ED |
325 | retry: |
326 | read_lock(&vcpu->kvm->arch.sca_lock); | |
60514510 | 327 | ic = kvm_s390_get_ipte_control(vcpu->kvm); |
8a242234 | 328 | do { |
5de72a22 | 329 | old = READ_ONCE(*ic); |
5e044315 ED |
330 | if (old.kg) { |
331 | read_unlock(&vcpu->kvm->arch.sca_lock); | |
8a242234 | 332 | cond_resched(); |
5e044315 | 333 | goto retry; |
8a242234 HC |
334 | } |
335 | new = old; | |
336 | new.k = 1; | |
337 | new.kh++; | |
338 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
5e044315 | 339 | read_unlock(&vcpu->kvm->arch.sca_lock); |
8a242234 HC |
340 | } |
341 | ||
342 | static void ipte_unlock_siif(struct kvm_vcpu *vcpu) | |
343 | { | |
344 | union ipte_control old, new, *ic; | |
345 | ||
5e044315 | 346 | read_lock(&vcpu->kvm->arch.sca_lock); |
60514510 | 347 | ic = kvm_s390_get_ipte_control(vcpu->kvm); |
8a242234 | 348 | do { |
5de72a22 | 349 | old = READ_ONCE(*ic); |
1365039d | 350 | new = old; |
8a242234 HC |
351 | new.kh--; |
352 | if (!new.kh) | |
353 | new.k = 0; | |
354 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
5e044315 | 355 | read_unlock(&vcpu->kvm->arch.sca_lock); |
8a242234 HC |
356 | if (!new.kh) |
357 | wake_up(&vcpu->kvm->arch.ipte_wq); | |
358 | } | |
359 | ||
a0465f9a | 360 | void ipte_lock(struct kvm_vcpu *vcpu) |
8a242234 HC |
361 | { |
362 | if (vcpu->arch.sie_block->eca & 1) | |
363 | ipte_lock_siif(vcpu); | |
364 | else | |
365 | ipte_lock_simple(vcpu); | |
366 | } | |
367 | ||
a0465f9a | 368 | void ipte_unlock(struct kvm_vcpu *vcpu) |
8a242234 HC |
369 | { |
370 | if (vcpu->arch.sie_block->eca & 1) | |
371 | ipte_unlock_siif(vcpu); | |
372 | else | |
373 | ipte_unlock_simple(vcpu); | |
374 | } | |
375 | ||
664b4973 | 376 | static int ar_translation(struct kvm_vcpu *vcpu, union asce *asce, ar_t ar, |
92c96321 | 377 | enum gacc_mode mode) |
664b4973 AY |
378 | { |
379 | union alet alet; | |
380 | struct ale ale; | |
381 | struct aste aste; | |
382 | unsigned long ald_addr, authority_table_addr; | |
383 | union ald ald; | |
384 | int eax, rc; | |
385 | u8 authority_table; | |
386 | ||
387 | if (ar >= NUM_ACRS) | |
388 | return -EINVAL; | |
389 | ||
390 | save_access_regs(vcpu->run->s.regs.acrs); | |
391 | alet.val = vcpu->run->s.regs.acrs[ar]; | |
392 | ||
393 | if (ar == 0 || alet.val == 0) { | |
394 | asce->val = vcpu->arch.sie_block->gcr[1]; | |
395 | return 0; | |
396 | } else if (alet.val == 1) { | |
397 | asce->val = vcpu->arch.sie_block->gcr[7]; | |
398 | return 0; | |
399 | } | |
400 | ||
401 | if (alet.reserved) | |
402 | return PGM_ALET_SPECIFICATION; | |
403 | ||
404 | if (alet.p) | |
405 | ald_addr = vcpu->arch.sie_block->gcr[5]; | |
406 | else | |
407 | ald_addr = vcpu->arch.sie_block->gcr[2]; | |
408 | ald_addr &= 0x7fffffc0; | |
409 | ||
410 | rc = read_guest_real(vcpu, ald_addr + 16, &ald.val, sizeof(union ald)); | |
411 | if (rc) | |
412 | return rc; | |
413 | ||
414 | if (alet.alen / 8 > ald.all) | |
415 | return PGM_ALEN_TRANSLATION; | |
416 | ||
417 | if (0x7fffffff - ald.alo * 128 < alet.alen * 16) | |
418 | return PGM_ADDRESSING; | |
419 | ||
420 | rc = read_guest_real(vcpu, ald.alo * 128 + alet.alen * 16, &ale, | |
421 | sizeof(struct ale)); | |
422 | if (rc) | |
423 | return rc; | |
424 | ||
425 | if (ale.i == 1) | |
426 | return PGM_ALEN_TRANSLATION; | |
427 | if (ale.alesn != alet.alesn) | |
428 | return PGM_ALE_SEQUENCE; | |
429 | ||
430 | rc = read_guest_real(vcpu, ale.asteo * 64, &aste, sizeof(struct aste)); | |
431 | if (rc) | |
432 | return rc; | |
433 | ||
434 | if (aste.i) | |
435 | return PGM_ASTE_VALIDITY; | |
436 | if (aste.astesn != ale.astesn) | |
437 | return PGM_ASTE_SEQUENCE; | |
438 | ||
439 | if (ale.p == 1) { | |
440 | eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff; | |
441 | if (ale.aleax != eax) { | |
442 | if (eax / 16 > aste.atl) | |
443 | return PGM_EXTENDED_AUTHORITY; | |
444 | ||
445 | authority_table_addr = aste.ato * 4 + eax / 4; | |
446 | ||
447 | rc = read_guest_real(vcpu, authority_table_addr, | |
448 | &authority_table, | |
449 | sizeof(u8)); | |
450 | if (rc) | |
451 | return rc; | |
452 | ||
453 | if ((authority_table & (0x40 >> ((eax & 3) * 2))) == 0) | |
454 | return PGM_EXTENDED_AUTHORITY; | |
455 | } | |
456 | } | |
457 | ||
92c96321 | 458 | if (ale.fo == 1 && mode == GACC_STORE) |
664b4973 AY |
459 | return PGM_PROTECTION; |
460 | ||
461 | asce->val = aste.asce; | |
462 | return 0; | |
463 | } | |
464 | ||
465 | struct trans_exc_code_bits { | |
466 | unsigned long addr : 52; /* Translation-exception Address */ | |
467 | unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */ | |
468 | unsigned long : 6; | |
469 | unsigned long b60 : 1; | |
470 | unsigned long b61 : 1; | |
471 | unsigned long as : 2; /* ASCE Identifier */ | |
472 | }; | |
473 | ||
474 | enum { | |
475 | FSI_UNKNOWN = 0, /* Unknown wether fetch or store */ | |
476 | FSI_STORE = 1, /* Exception was due to store operation */ | |
477 | FSI_FETCH = 2 /* Exception was due to fetch operation */ | |
478 | }; | |
479 | ||
d03193de DH |
480 | enum prot_type { |
481 | PROT_TYPE_LA = 0, | |
482 | PROT_TYPE_KEYC = 1, | |
483 | PROT_TYPE_ALC = 2, | |
484 | PROT_TYPE_DAT = 3, | |
485 | }; | |
486 | ||
487 | static int trans_exc(struct kvm_vcpu *vcpu, int code, unsigned long gva, | |
488 | ar_t ar, enum gacc_mode mode, enum prot_type prot) | |
489 | { | |
490 | struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm; | |
491 | struct trans_exc_code_bits *tec; | |
492 | ||
493 | memset(pgm, 0, sizeof(*pgm)); | |
494 | pgm->code = code; | |
495 | tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code; | |
496 | ||
497 | switch (code) { | |
498 | case PGM_ASCE_TYPE: | |
499 | case PGM_PAGE_TRANSLATION: | |
500 | case PGM_REGION_FIRST_TRANS: | |
501 | case PGM_REGION_SECOND_TRANS: | |
502 | case PGM_REGION_THIRD_TRANS: | |
503 | case PGM_SEGMENT_TRANSLATION: | |
504 | /* | |
505 | * op_access_id only applies to MOVE_PAGE -> set bit 61 | |
506 | * exc_access_id has to be set to 0 for some instructions. Both | |
507 | * cases have to be handled by the caller. We can always store | |
508 | * exc_access_id, as it is undefined for non-ar cases. | |
509 | */ | |
510 | tec->addr = gva >> PAGE_SHIFT; | |
511 | tec->fsi = mode == GACC_STORE ? FSI_STORE : FSI_FETCH; | |
512 | tec->as = psw_bits(vcpu->arch.sie_block->gpsw).as; | |
513 | /* FALL THROUGH */ | |
514 | case PGM_ALEN_TRANSLATION: | |
515 | case PGM_ALE_SEQUENCE: | |
516 | case PGM_ASTE_VALIDITY: | |
517 | case PGM_ASTE_SEQUENCE: | |
518 | case PGM_EXTENDED_AUTHORITY: | |
519 | pgm->exc_access_id = ar; | |
520 | break; | |
521 | case PGM_PROTECTION: | |
522 | switch (prot) { | |
523 | case PROT_TYPE_ALC: | |
524 | tec->b60 = 1; | |
525 | /* FALL THROUGH */ | |
526 | case PROT_TYPE_DAT: | |
527 | tec->b61 = 1; | |
528 | tec->addr = gva >> PAGE_SHIFT; | |
529 | tec->fsi = mode == GACC_STORE ? FSI_STORE : FSI_FETCH; | |
530 | tec->as = psw_bits(vcpu->arch.sie_block->gpsw).as; | |
531 | /* exc_access_id is undefined for most cases */ | |
532 | pgm->exc_access_id = ar; | |
533 | break; | |
534 | default: /* LA and KEYC set b61 to 0, other params undefined */ | |
535 | break; | |
536 | } | |
537 | break; | |
538 | } | |
539 | return code; | |
540 | } | |
541 | ||
664b4973 | 542 | static int get_vcpu_asce(struct kvm_vcpu *vcpu, union asce *asce, |
6167375b | 543 | unsigned long ga, ar_t ar, enum gacc_mode mode) |
22938978 | 544 | { |
664b4973 | 545 | int rc; |
34346b9a | 546 | struct psw_bits psw = psw_bits(vcpu->arch.sie_block->gpsw); |
664b4973 | 547 | |
34346b9a | 548 | if (!psw.t) { |
664b4973 AY |
549 | asce->val = 0; |
550 | asce->r = 1; | |
551 | return 0; | |
552 | } | |
553 | ||
34346b9a DH |
554 | if (mode == GACC_IFETCH) |
555 | psw.as = psw.as == PSW_AS_HOME ? PSW_AS_HOME : PSW_AS_PRIMARY; | |
556 | ||
557 | switch (psw.as) { | |
22938978 | 558 | case PSW_AS_PRIMARY: |
664b4973 AY |
559 | asce->val = vcpu->arch.sie_block->gcr[1]; |
560 | return 0; | |
22938978 | 561 | case PSW_AS_SECONDARY: |
664b4973 AY |
562 | asce->val = vcpu->arch.sie_block->gcr[7]; |
563 | return 0; | |
22938978 | 564 | case PSW_AS_HOME: |
664b4973 AY |
565 | asce->val = vcpu->arch.sie_block->gcr[13]; |
566 | return 0; | |
567 | case PSW_AS_ACCREG: | |
92c96321 | 568 | rc = ar_translation(vcpu, asce, ar, mode); |
664b4973 | 569 | if (rc > 0) |
bcfa01d7 | 570 | return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_ALC); |
664b4973 | 571 | return rc; |
22938978 HC |
572 | } |
573 | return 0; | |
574 | } | |
575 | ||
576 | static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val) | |
577 | { | |
578 | return kvm_read_guest(kvm, gpa, val, sizeof(*val)); | |
579 | } | |
580 | ||
581 | /** | |
582 | * guest_translate - translate a guest virtual into a guest absolute address | |
583 | * @vcpu: virtual cpu | |
584 | * @gva: guest virtual address | |
585 | * @gpa: points to where guest physical (absolute) address should be stored | |
75a18122 | 586 | * @asce: effective asce |
92c96321 | 587 | * @mode: indicates the access mode to be used |
22938978 HC |
588 | * |
589 | * Translate a guest virtual address into a guest absolute address by means | |
16b0fc13 | 590 | * of dynamic address translation as specified by the architecture. |
22938978 HC |
591 | * If the resulting absolute address is not available in the configuration |
592 | * an addressing exception is indicated and @gpa will not be changed. | |
593 | * | |
594 | * Returns: - zero on success; @gpa contains the resulting absolute address | |
595 | * - a negative value if guest access failed due to e.g. broken | |
596 | * guest mapping | |
597 | * - a positve value if an access exception happened. In this case | |
598 | * the returned value is the program interruption code as defined | |
599 | * by the architecture | |
600 | */ | |
601 | static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva, | |
75a18122 | 602 | unsigned long *gpa, const union asce asce, |
92c96321 | 603 | enum gacc_mode mode) |
22938978 HC |
604 | { |
605 | union vaddress vaddr = {.addr = gva}; | |
606 | union raddress raddr = {.addr = gva}; | |
607 | union page_table_entry pte; | |
608 | int dat_protection = 0; | |
609 | union ctlreg0 ctlreg0; | |
610 | unsigned long ptr; | |
611 | int edat1, edat2; | |
22938978 HC |
612 | |
613 | ctlreg0.val = vcpu->arch.sie_block->gcr[0]; | |
9d8d5786 MM |
614 | edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8); |
615 | edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78); | |
22938978 HC |
616 | if (asce.r) |
617 | goto real_address; | |
618 | ptr = asce.origin * 4096; | |
619 | switch (asce.dt) { | |
620 | case ASCE_TYPE_REGION1: | |
621 | if (vaddr.rfx01 > asce.tl) | |
622 | return PGM_REGION_FIRST_TRANS; | |
623 | ptr += vaddr.rfx * 8; | |
624 | break; | |
625 | case ASCE_TYPE_REGION2: | |
626 | if (vaddr.rfx) | |
627 | return PGM_ASCE_TYPE; | |
628 | if (vaddr.rsx01 > asce.tl) | |
629 | return PGM_REGION_SECOND_TRANS; | |
630 | ptr += vaddr.rsx * 8; | |
631 | break; | |
632 | case ASCE_TYPE_REGION3: | |
633 | if (vaddr.rfx || vaddr.rsx) | |
634 | return PGM_ASCE_TYPE; | |
635 | if (vaddr.rtx01 > asce.tl) | |
636 | return PGM_REGION_THIRD_TRANS; | |
637 | ptr += vaddr.rtx * 8; | |
638 | break; | |
639 | case ASCE_TYPE_SEGMENT: | |
640 | if (vaddr.rfx || vaddr.rsx || vaddr.rtx) | |
641 | return PGM_ASCE_TYPE; | |
642 | if (vaddr.sx01 > asce.tl) | |
643 | return PGM_SEGMENT_TRANSLATION; | |
644 | ptr += vaddr.sx * 8; | |
645 | break; | |
646 | } | |
647 | switch (asce.dt) { | |
648 | case ASCE_TYPE_REGION1: { | |
649 | union region1_table_entry rfte; | |
650 | ||
651 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
652 | return PGM_ADDRESSING; | |
653 | if (deref_table(vcpu->kvm, ptr, &rfte.val)) | |
654 | return -EFAULT; | |
655 | if (rfte.i) | |
656 | return PGM_REGION_FIRST_TRANS; | |
657 | if (rfte.tt != TABLE_TYPE_REGION1) | |
658 | return PGM_TRANSLATION_SPEC; | |
659 | if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl) | |
660 | return PGM_REGION_SECOND_TRANS; | |
661 | if (edat1) | |
662 | dat_protection |= rfte.p; | |
663 | ptr = rfte.rto * 4096 + vaddr.rsx * 8; | |
664 | } | |
665 | /* fallthrough */ | |
666 | case ASCE_TYPE_REGION2: { | |
667 | union region2_table_entry rste; | |
668 | ||
669 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
670 | return PGM_ADDRESSING; | |
671 | if (deref_table(vcpu->kvm, ptr, &rste.val)) | |
672 | return -EFAULT; | |
673 | if (rste.i) | |
674 | return PGM_REGION_SECOND_TRANS; | |
675 | if (rste.tt != TABLE_TYPE_REGION2) | |
676 | return PGM_TRANSLATION_SPEC; | |
677 | if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl) | |
678 | return PGM_REGION_THIRD_TRANS; | |
679 | if (edat1) | |
680 | dat_protection |= rste.p; | |
681 | ptr = rste.rto * 4096 + vaddr.rtx * 8; | |
682 | } | |
683 | /* fallthrough */ | |
684 | case ASCE_TYPE_REGION3: { | |
685 | union region3_table_entry rtte; | |
686 | ||
687 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
688 | return PGM_ADDRESSING; | |
689 | if (deref_table(vcpu->kvm, ptr, &rtte.val)) | |
690 | return -EFAULT; | |
691 | if (rtte.i) | |
692 | return PGM_REGION_THIRD_TRANS; | |
693 | if (rtte.tt != TABLE_TYPE_REGION3) | |
694 | return PGM_TRANSLATION_SPEC; | |
695 | if (rtte.cr && asce.p && edat2) | |
696 | return PGM_TRANSLATION_SPEC; | |
697 | if (rtte.fc && edat2) { | |
698 | dat_protection |= rtte.fc1.p; | |
699 | raddr.rfaa = rtte.fc1.rfaa; | |
700 | goto absolute_address; | |
701 | } | |
702 | if (vaddr.sx01 < rtte.fc0.tf) | |
703 | return PGM_SEGMENT_TRANSLATION; | |
704 | if (vaddr.sx01 > rtte.fc0.tl) | |
705 | return PGM_SEGMENT_TRANSLATION; | |
706 | if (edat1) | |
707 | dat_protection |= rtte.fc0.p; | |
708 | ptr = rtte.fc0.sto * 4096 + vaddr.sx * 8; | |
709 | } | |
710 | /* fallthrough */ | |
711 | case ASCE_TYPE_SEGMENT: { | |
712 | union segment_table_entry ste; | |
713 | ||
714 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
715 | return PGM_ADDRESSING; | |
716 | if (deref_table(vcpu->kvm, ptr, &ste.val)) | |
717 | return -EFAULT; | |
718 | if (ste.i) | |
719 | return PGM_SEGMENT_TRANSLATION; | |
720 | if (ste.tt != TABLE_TYPE_SEGMENT) | |
721 | return PGM_TRANSLATION_SPEC; | |
722 | if (ste.cs && asce.p) | |
723 | return PGM_TRANSLATION_SPEC; | |
724 | if (ste.fc && edat1) { | |
725 | dat_protection |= ste.fc1.p; | |
726 | raddr.sfaa = ste.fc1.sfaa; | |
727 | goto absolute_address; | |
728 | } | |
729 | dat_protection |= ste.fc0.p; | |
730 | ptr = ste.fc0.pto * 2048 + vaddr.px * 8; | |
731 | } | |
732 | } | |
733 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
734 | return PGM_ADDRESSING; | |
735 | if (deref_table(vcpu->kvm, ptr, &pte.val)) | |
736 | return -EFAULT; | |
737 | if (pte.i) | |
738 | return PGM_PAGE_TRANSLATION; | |
739 | if (pte.z) | |
740 | return PGM_TRANSLATION_SPEC; | |
741 | if (pte.co && !edat1) | |
742 | return PGM_TRANSLATION_SPEC; | |
743 | dat_protection |= pte.p; | |
744 | raddr.pfra = pte.pfra; | |
745 | real_address: | |
746 | raddr.addr = kvm_s390_real_to_abs(vcpu, raddr.addr); | |
747 | absolute_address: | |
92c96321 | 748 | if (mode == GACC_STORE && dat_protection) |
22938978 HC |
749 | return PGM_PROTECTION; |
750 | if (kvm_is_error_gpa(vcpu->kvm, raddr.addr)) | |
751 | return PGM_ADDRESSING; | |
752 | *gpa = raddr.addr; | |
753 | return 0; | |
754 | } | |
755 | ||
756 | static inline int is_low_address(unsigned long ga) | |
757 | { | |
758 | /* Check for address ranges 0..511 and 4096..4607 */ | |
759 | return (ga & ~0x11fful) == 0; | |
760 | } | |
761 | ||
75a18122 AY |
762 | static int low_address_protection_enabled(struct kvm_vcpu *vcpu, |
763 | const union asce asce) | |
22938978 HC |
764 | { |
765 | union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; | |
766 | psw_t *psw = &vcpu->arch.sie_block->gpsw; | |
22938978 HC |
767 | |
768 | if (!ctlreg0.lap) | |
769 | return 0; | |
22938978 HC |
770 | if (psw_bits(*psw).t && asce.p) |
771 | return 0; | |
772 | return 1; | |
773 | } | |
774 | ||
cde0dcfb | 775 | static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, |
22938978 | 776 | unsigned long *pages, unsigned long nr_pages, |
92c96321 | 777 | const union asce asce, enum gacc_mode mode) |
22938978 | 778 | { |
22938978 | 779 | psw_t *psw = &vcpu->arch.sie_block->gpsw; |
cde0dcfb | 780 | int lap_enabled, rc = 0; |
22938978 | 781 | |
75a18122 | 782 | lap_enabled = low_address_protection_enabled(vcpu, asce); |
22938978 HC |
783 | while (nr_pages) { |
784 | ga = kvm_s390_logical_to_effective(vcpu, ga); | |
cde0dcfb DH |
785 | if (mode == GACC_STORE && lap_enabled && is_low_address(ga)) |
786 | return trans_exc(vcpu, PGM_PROTECTION, ga, ar, mode, | |
787 | PROT_TYPE_LA); | |
22938978 HC |
788 | ga &= PAGE_MASK; |
789 | if (psw_bits(*psw).t) { | |
92c96321 | 790 | rc = guest_translate(vcpu, ga, pages, asce, mode); |
22938978 HC |
791 | if (rc < 0) |
792 | return rc; | |
22938978 HC |
793 | } else { |
794 | *pages = kvm_s390_real_to_abs(vcpu, ga); | |
795 | if (kvm_is_error_gpa(vcpu->kvm, *pages)) | |
cde0dcfb | 796 | rc = PGM_ADDRESSING; |
22938978 | 797 | } |
cde0dcfb DH |
798 | if (rc) |
799 | return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_DAT); | |
22938978 HC |
800 | ga += PAGE_SIZE; |
801 | pages++; | |
802 | nr_pages--; | |
803 | } | |
804 | return 0; | |
805 | } | |
806 | ||
8ae04b8f | 807 | int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, void *data, |
92c96321 | 808 | unsigned long len, enum gacc_mode mode) |
22938978 HC |
809 | { |
810 | psw_t *psw = &vcpu->arch.sie_block->gpsw; | |
811 | unsigned long _len, nr_pages, gpa, idx; | |
812 | unsigned long pages_array[2]; | |
813 | unsigned long *pages; | |
8a242234 HC |
814 | int need_ipte_lock; |
815 | union asce asce; | |
22938978 HC |
816 | int rc; |
817 | ||
818 | if (!len) | |
819 | return 0; | |
6167375b DH |
820 | ga = kvm_s390_logical_to_effective(vcpu, ga); |
821 | rc = get_vcpu_asce(vcpu, &asce, ga, ar, mode); | |
664b4973 AY |
822 | if (rc) |
823 | return rc; | |
22938978 HC |
824 | nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1; |
825 | pages = pages_array; | |
826 | if (nr_pages > ARRAY_SIZE(pages_array)) | |
827 | pages = vmalloc(nr_pages * sizeof(unsigned long)); | |
828 | if (!pages) | |
829 | return -ENOMEM; | |
8a242234 HC |
830 | need_ipte_lock = psw_bits(*psw).t && !asce.r; |
831 | if (need_ipte_lock) | |
832 | ipte_lock(vcpu); | |
cde0dcfb | 833 | rc = guest_page_range(vcpu, ga, ar, pages, nr_pages, asce, mode); |
22938978 HC |
834 | for (idx = 0; idx < nr_pages && !rc; idx++) { |
835 | gpa = *(pages + idx) + (ga & ~PAGE_MASK); | |
836 | _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); | |
92c96321 | 837 | if (mode == GACC_STORE) |
22938978 HC |
838 | rc = kvm_write_guest(vcpu->kvm, gpa, data, _len); |
839 | else | |
840 | rc = kvm_read_guest(vcpu->kvm, gpa, data, _len); | |
841 | len -= _len; | |
842 | ga += _len; | |
843 | data += _len; | |
844 | } | |
8a242234 HC |
845 | if (need_ipte_lock) |
846 | ipte_unlock(vcpu); | |
22938978 HC |
847 | if (nr_pages > ARRAY_SIZE(pages_array)) |
848 | vfree(pages); | |
849 | return rc; | |
850 | } | |
851 | ||
852 | int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra, | |
92c96321 | 853 | void *data, unsigned long len, enum gacc_mode mode) |
22938978 HC |
854 | { |
855 | unsigned long _len, gpa; | |
856 | int rc = 0; | |
857 | ||
858 | while (len && !rc) { | |
859 | gpa = kvm_s390_real_to_abs(vcpu, gra); | |
860 | _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); | |
92c96321 | 861 | if (mode) |
22938978 HC |
862 | rc = write_guest_abs(vcpu, gpa, data, _len); |
863 | else | |
864 | rc = read_guest_abs(vcpu, gpa, data, _len); | |
865 | len -= _len; | |
866 | gra += _len; | |
867 | data += _len; | |
868 | } | |
869 | return rc; | |
870 | } | |
f8232c8c | 871 | |
9fbc0276 TH |
872 | /** |
873 | * guest_translate_address - translate guest logical into guest absolute address | |
874 | * | |
875 | * Parameter semantics are the same as the ones from guest_translate. | |
876 | * The memory contents at the guest address are not changed. | |
877 | * | |
878 | * Note: The IPTE lock is not taken during this function, so the caller | |
879 | * has to take care of this. | |
880 | */ | |
8ae04b8f | 881 | int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar, |
92c96321 | 882 | unsigned long *gpa, enum gacc_mode mode) |
9fbc0276 | 883 | { |
9fbc0276 | 884 | psw_t *psw = &vcpu->arch.sie_block->gpsw; |
9fbc0276 TH |
885 | union asce asce; |
886 | int rc; | |
887 | ||
9fbc0276 | 888 | gva = kvm_s390_logical_to_effective(vcpu, gva); |
6167375b | 889 | rc = get_vcpu_asce(vcpu, &asce, gva, ar, mode); |
664b4973 AY |
890 | if (rc) |
891 | return rc; | |
75a18122 | 892 | if (is_low_address(gva) && low_address_protection_enabled(vcpu, asce)) { |
fbcb7d51 DH |
893 | if (mode == GACC_STORE) |
894 | return trans_exc(vcpu, PGM_PROTECTION, gva, 0, | |
895 | mode, PROT_TYPE_LA); | |
9fbc0276 TH |
896 | } |
897 | ||
9fbc0276 | 898 | if (psw_bits(*psw).t && !asce.r) { /* Use DAT? */ |
92c96321 | 899 | rc = guest_translate(vcpu, gva, gpa, asce, mode); |
fbcb7d51 DH |
900 | if (rc > 0) |
901 | return trans_exc(vcpu, rc, gva, 0, mode, PROT_TYPE_DAT); | |
9fbc0276 | 902 | } else { |
9fbc0276 TH |
903 | *gpa = kvm_s390_real_to_abs(vcpu, gva); |
904 | if (kvm_is_error_gpa(vcpu->kvm, *gpa)) | |
fbcb7d51 | 905 | return trans_exc(vcpu, rc, gva, PGM_ADDRESSING, mode, 0); |
9fbc0276 TH |
906 | } |
907 | ||
908 | return rc; | |
909 | } | |
910 | ||
41408c28 TH |
911 | /** |
912 | * check_gva_range - test a range of guest virtual addresses for accessibility | |
913 | */ | |
914 | int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar, | |
92c96321 | 915 | unsigned long length, enum gacc_mode mode) |
41408c28 TH |
916 | { |
917 | unsigned long gpa; | |
918 | unsigned long currlen; | |
919 | int rc = 0; | |
920 | ||
921 | ipte_lock(vcpu); | |
922 | while (length > 0 && !rc) { | |
923 | currlen = min(length, PAGE_SIZE - (gva % PAGE_SIZE)); | |
92c96321 | 924 | rc = guest_translate_address(vcpu, gva, ar, &gpa, mode); |
41408c28 TH |
925 | gva += currlen; |
926 | length -= currlen; | |
927 | } | |
928 | ipte_unlock(vcpu); | |
929 | ||
930 | return rc; | |
931 | } | |
932 | ||
f8232c8c | 933 | /** |
dd9e5b7b AY |
934 | * kvm_s390_check_low_addr_prot_real - check for low-address protection |
935 | * @gra: Guest real address | |
f8232c8c TH |
936 | * |
937 | * Checks whether an address is subject to low-address protection and set | |
938 | * up vcpu->arch.pgm accordingly if necessary. | |
939 | * | |
940 | * Return: 0 if no protection exception, or PGM_PROTECTION if protected. | |
941 | */ | |
dd9e5b7b | 942 | int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra) |
f8232c8c | 943 | { |
dd9e5b7b | 944 | union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; |
f8232c8c | 945 | |
dd9e5b7b | 946 | if (!ctlreg0.lap || !is_low_address(gra)) |
f8232c8c | 947 | return 0; |
3e3c67f6 | 948 | return trans_exc(vcpu, PGM_PROTECTION, gra, 0, GACC_STORE, PROT_TYPE_LA); |
f8232c8c | 949 | } |
aa17aa57 MS |
950 | |
951 | /** | |
952 | * kvm_s390_shadow_tables - walk the guest page table and create shadow tables | |
953 | * @sg: pointer to the shadow guest address space structure | |
954 | * @saddr: faulting address in the shadow gmap | |
955 | * @pgt: pointer to the page table address result | |
fd8d4e3a | 956 | * @fake: pgt references contiguous guest memory block, not a pgtable |
aa17aa57 MS |
957 | */ |
958 | static int kvm_s390_shadow_tables(struct gmap *sg, unsigned long saddr, | |
fd8d4e3a DH |
959 | unsigned long *pgt, int *dat_protection, |
960 | int *fake) | |
aa17aa57 MS |
961 | { |
962 | struct gmap *parent; | |
963 | union asce asce; | |
964 | union vaddress vaddr; | |
965 | unsigned long ptr; | |
966 | int rc; | |
967 | ||
fd8d4e3a | 968 | *fake = 0; |
1c65781b | 969 | *dat_protection = 0; |
aa17aa57 MS |
970 | parent = sg->parent; |
971 | vaddr.addr = saddr; | |
972 | asce.val = sg->orig_asce; | |
973 | ptr = asce.origin * 4096; | |
974 | switch (asce.dt) { | |
975 | case ASCE_TYPE_REGION1: | |
976 | if (vaddr.rfx01 > asce.tl) | |
977 | return PGM_REGION_FIRST_TRANS; | |
978 | break; | |
979 | case ASCE_TYPE_REGION2: | |
980 | if (vaddr.rfx) | |
981 | return PGM_ASCE_TYPE; | |
982 | if (vaddr.rsx01 > asce.tl) | |
983 | return PGM_REGION_SECOND_TRANS; | |
984 | break; | |
985 | case ASCE_TYPE_REGION3: | |
986 | if (vaddr.rfx || vaddr.rsx) | |
987 | return PGM_ASCE_TYPE; | |
988 | if (vaddr.rtx01 > asce.tl) | |
989 | return PGM_REGION_THIRD_TRANS; | |
990 | break; | |
991 | case ASCE_TYPE_SEGMENT: | |
992 | if (vaddr.rfx || vaddr.rsx || vaddr.rtx) | |
993 | return PGM_ASCE_TYPE; | |
994 | if (vaddr.sx01 > asce.tl) | |
995 | return PGM_SEGMENT_TRANSLATION; | |
996 | break; | |
997 | } | |
998 | ||
999 | switch (asce.dt) { | |
1000 | case ASCE_TYPE_REGION1: { | |
1001 | union region1_table_entry rfte; | |
1002 | ||
1003 | rc = gmap_read_table(parent, ptr + vaddr.rfx * 8, &rfte.val); | |
1004 | if (rc) | |
1005 | return rc; | |
1006 | if (rfte.i) | |
1007 | return PGM_REGION_FIRST_TRANS; | |
1008 | if (rfte.tt != TABLE_TYPE_REGION1) | |
1009 | return PGM_TRANSLATION_SPEC; | |
1010 | if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl) | |
1011 | return PGM_REGION_SECOND_TRANS; | |
1c65781b DH |
1012 | if (sg->edat_level >= 1) |
1013 | *dat_protection |= rfte.p; | |
aa17aa57 MS |
1014 | rc = gmap_shadow_r2t(sg, saddr, rfte.val); |
1015 | if (rc) | |
1016 | return rc; | |
1017 | ptr = rfte.rto * 4096; | |
1018 | /* fallthrough */ | |
1019 | } | |
1020 | case ASCE_TYPE_REGION2: { | |
1021 | union region2_table_entry rste; | |
1022 | ||
1023 | rc = gmap_read_table(parent, ptr + vaddr.rsx * 8, &rste.val); | |
1024 | if (rc) | |
1025 | return rc; | |
1026 | if (rste.i) | |
1027 | return PGM_REGION_SECOND_TRANS; | |
1028 | if (rste.tt != TABLE_TYPE_REGION2) | |
1029 | return PGM_TRANSLATION_SPEC; | |
1030 | if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl) | |
1031 | return PGM_REGION_THIRD_TRANS; | |
1c65781b DH |
1032 | if (sg->edat_level >= 1) |
1033 | *dat_protection |= rste.p; | |
1034 | rste.p |= *dat_protection; | |
aa17aa57 MS |
1035 | rc = gmap_shadow_r3t(sg, saddr, rste.val); |
1036 | if (rc) | |
1037 | return rc; | |
1038 | ptr = rste.rto * 4096; | |
1039 | /* fallthrough */ | |
1040 | } | |
1041 | case ASCE_TYPE_REGION3: { | |
1042 | union region3_table_entry rtte; | |
1043 | ||
1044 | rc = gmap_read_table(parent, ptr + vaddr.rtx * 8, &rtte.val); | |
1045 | if (rc) | |
1046 | return rc; | |
1047 | if (rtte.i) | |
1048 | return PGM_REGION_THIRD_TRANS; | |
1049 | if (rtte.tt != TABLE_TYPE_REGION3) | |
1050 | return PGM_TRANSLATION_SPEC; | |
18b89809 DH |
1051 | if (rtte.cr && asce.p && sg->edat_level >= 2) |
1052 | return PGM_TRANSLATION_SPEC; | |
1053 | if (rtte.fc && sg->edat_level >= 2) { | |
1c65781b | 1054 | *dat_protection |= rtte.fc0.p; |
18b89809 DH |
1055 | *fake = 1; |
1056 | ptr = rtte.fc1.rfaa << 31UL; | |
1057 | rtte.val = ptr; | |
18b89809 DH |
1058 | goto shadow_sgt; |
1059 | } | |
aa17aa57 MS |
1060 | if (vaddr.sx01 < rtte.fc0.tf || vaddr.sx01 > rtte.fc0.tl) |
1061 | return PGM_SEGMENT_TRANSLATION; | |
1c65781b DH |
1062 | if (sg->edat_level >= 1) |
1063 | *dat_protection |= rtte.fc0.p; | |
18b89809 DH |
1064 | ptr = rtte.fc0.sto << 12UL; |
1065 | shadow_sgt: | |
1c65781b | 1066 | rtte.fc0.p |= *dat_protection; |
18b89809 | 1067 | rc = gmap_shadow_sgt(sg, saddr, rtte.val, *fake); |
aa17aa57 MS |
1068 | if (rc) |
1069 | return rc; | |
aa17aa57 MS |
1070 | /* fallthrough */ |
1071 | } | |
1072 | case ASCE_TYPE_SEGMENT: { | |
1073 | union segment_table_entry ste; | |
1074 | ||
18b89809 DH |
1075 | if (*fake) { |
1076 | /* offset in 2G guest memory block */ | |
1077 | ptr = ptr + ((unsigned long) vaddr.sx << 20UL); | |
1078 | ste.val = ptr; | |
1079 | goto shadow_pgt; | |
1080 | } | |
aa17aa57 MS |
1081 | rc = gmap_read_table(parent, ptr + vaddr.sx * 8, &ste.val); |
1082 | if (rc) | |
1083 | return rc; | |
1084 | if (ste.i) | |
1085 | return PGM_SEGMENT_TRANSLATION; | |
1086 | if (ste.tt != TABLE_TYPE_SEGMENT) | |
1087 | return PGM_TRANSLATION_SPEC; | |
1088 | if (ste.cs && asce.p) | |
1089 | return PGM_TRANSLATION_SPEC; | |
1c65781b | 1090 | *dat_protection |= ste.fc0.p; |
fd8d4e3a | 1091 | if (ste.fc && sg->edat_level >= 1) { |
fd8d4e3a DH |
1092 | *fake = 1; |
1093 | ptr = ste.fc1.sfaa << 20UL; | |
1094 | ste.val = ptr; | |
fd8d4e3a DH |
1095 | goto shadow_pgt; |
1096 | } | |
1097 | ptr = ste.fc0.pto << 11UL; | |
1098 | shadow_pgt: | |
1c65781b | 1099 | ste.fc0.p |= *dat_protection; |
fd8d4e3a | 1100 | rc = gmap_shadow_pgt(sg, saddr, ste.val, *fake); |
aa17aa57 MS |
1101 | if (rc) |
1102 | return rc; | |
aa17aa57 MS |
1103 | } |
1104 | } | |
1105 | /* Return the parent address of the page table */ | |
1106 | *pgt = ptr; | |
1107 | return 0; | |
1108 | } | |
1109 | ||
1110 | /** | |
1111 | * kvm_s390_shadow_fault - handle fault on a shadow page table | |
f4debb40 | 1112 | * @vcpu: virtual cpu |
aa17aa57 MS |
1113 | * @sg: pointer to the shadow guest address space structure |
1114 | * @saddr: faulting address in the shadow gmap | |
aa17aa57 MS |
1115 | * |
1116 | * Returns: - 0 if the shadow fault was successfully resolved | |
1117 | * - > 0 (pgm exception code) on exceptions while faulting | |
1118 | * - -EAGAIN if the caller can retry immediately | |
1119 | * - -EFAULT when accessing invalid guest addresses | |
1120 | * - -ENOMEM if out of memory | |
1121 | */ | |
f4debb40 DH |
1122 | int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *sg, |
1123 | unsigned long saddr) | |
aa17aa57 MS |
1124 | { |
1125 | union vaddress vaddr; | |
1126 | union page_table_entry pte; | |
1127 | unsigned long pgt; | |
fd8d4e3a | 1128 | int dat_protection, fake; |
aa17aa57 MS |
1129 | int rc; |
1130 | ||
e52f8b61 | 1131 | down_read(&sg->mm->mmap_sem); |
f4debb40 DH |
1132 | /* |
1133 | * We don't want any guest-2 tables to change - so the parent | |
1134 | * tables/pointers we read stay valid - unshadowing is however | |
1135 | * always possible - only guest_table_lock protects us. | |
1136 | */ | |
1137 | ipte_lock(vcpu); | |
e52f8b61 | 1138 | |
fd8d4e3a | 1139 | rc = gmap_shadow_pgt_lookup(sg, saddr, &pgt, &dat_protection, &fake); |
e52f8b61 | 1140 | if (rc) |
fd8d4e3a DH |
1141 | rc = kvm_s390_shadow_tables(sg, saddr, &pgt, &dat_protection, |
1142 | &fake); | |
aa17aa57 MS |
1143 | |
1144 | vaddr.addr = saddr; | |
fd8d4e3a DH |
1145 | if (fake) { |
1146 | /* offset in 1MB guest memory block */ | |
1147 | pte.val = pgt + ((unsigned long) vaddr.px << 12UL); | |
1148 | goto shadow_page; | |
1149 | } | |
e52f8b61 DH |
1150 | if (!rc) |
1151 | rc = gmap_read_table(sg->parent, pgt + vaddr.px * 8, &pte.val); | |
1152 | if (!rc && pte.i) | |
1153 | rc = PGM_PAGE_TRANSLATION; | |
fd8d4e3a | 1154 | if (!rc && (pte.z || (pte.co && sg->edat_level < 1))) |
e52f8b61 | 1155 | rc = PGM_TRANSLATION_SPEC; |
fd8d4e3a | 1156 | shadow_page: |
00fc062d | 1157 | pte.p |= dat_protection; |
e52f8b61 DH |
1158 | if (!rc) |
1159 | rc = gmap_shadow_page(sg, saddr, __pte(pte.val)); | |
f4debb40 | 1160 | ipte_unlock(vcpu); |
e52f8b61 DH |
1161 | up_read(&sg->mm->mmap_sem); |
1162 | return rc; | |
aa17aa57 | 1163 | } |