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Commit | Line | Data |
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22938978 HC |
1 | /* |
2 | * guest access functions | |
3 | * | |
4 | * Copyright IBM Corp. 2014 | |
5 | * | |
6 | */ | |
7 | ||
8 | #include <linux/vmalloc.h> | |
9 | #include <linux/err.h> | |
10 | #include <asm/pgtable.h> | |
11 | #include "kvm-s390.h" | |
12 | #include "gaccess.h" | |
13 | ||
14 | union asce { | |
15 | unsigned long val; | |
16 | struct { | |
17 | unsigned long origin : 52; /* Region- or Segment-Table Origin */ | |
18 | unsigned long : 2; | |
19 | unsigned long g : 1; /* Subspace Group Control */ | |
20 | unsigned long p : 1; /* Private Space Control */ | |
21 | unsigned long s : 1; /* Storage-Alteration-Event Control */ | |
22 | unsigned long x : 1; /* Space-Switch-Event Control */ | |
23 | unsigned long r : 1; /* Real-Space Control */ | |
24 | unsigned long : 1; | |
25 | unsigned long dt : 2; /* Designation-Type Control */ | |
26 | unsigned long tl : 2; /* Region- or Segment-Table Length */ | |
27 | }; | |
28 | }; | |
29 | ||
30 | enum { | |
31 | ASCE_TYPE_SEGMENT = 0, | |
32 | ASCE_TYPE_REGION3 = 1, | |
33 | ASCE_TYPE_REGION2 = 2, | |
34 | ASCE_TYPE_REGION1 = 3 | |
35 | }; | |
36 | ||
37 | union region1_table_entry { | |
38 | unsigned long val; | |
39 | struct { | |
40 | unsigned long rto: 52;/* Region-Table Origin */ | |
41 | unsigned long : 2; | |
42 | unsigned long p : 1; /* DAT-Protection Bit */ | |
43 | unsigned long : 1; | |
44 | unsigned long tf : 2; /* Region-Second-Table Offset */ | |
45 | unsigned long i : 1; /* Region-Invalid Bit */ | |
46 | unsigned long : 1; | |
47 | unsigned long tt : 2; /* Table-Type Bits */ | |
48 | unsigned long tl : 2; /* Region-Second-Table Length */ | |
49 | }; | |
50 | }; | |
51 | ||
52 | union region2_table_entry { | |
53 | unsigned long val; | |
54 | struct { | |
55 | unsigned long rto: 52;/* Region-Table Origin */ | |
56 | unsigned long : 2; | |
57 | unsigned long p : 1; /* DAT-Protection Bit */ | |
58 | unsigned long : 1; | |
59 | unsigned long tf : 2; /* Region-Third-Table Offset */ | |
60 | unsigned long i : 1; /* Region-Invalid Bit */ | |
61 | unsigned long : 1; | |
62 | unsigned long tt : 2; /* Table-Type Bits */ | |
63 | unsigned long tl : 2; /* Region-Third-Table Length */ | |
64 | }; | |
65 | }; | |
66 | ||
67 | struct region3_table_entry_fc0 { | |
68 | unsigned long sto: 52;/* Segment-Table Origin */ | |
69 | unsigned long : 1; | |
70 | unsigned long fc : 1; /* Format-Control */ | |
71 | unsigned long p : 1; /* DAT-Protection Bit */ | |
72 | unsigned long : 1; | |
73 | unsigned long tf : 2; /* Segment-Table Offset */ | |
74 | unsigned long i : 1; /* Region-Invalid Bit */ | |
75 | unsigned long cr : 1; /* Common-Region Bit */ | |
76 | unsigned long tt : 2; /* Table-Type Bits */ | |
77 | unsigned long tl : 2; /* Segment-Table Length */ | |
78 | }; | |
79 | ||
80 | struct region3_table_entry_fc1 { | |
81 | unsigned long rfaa : 33; /* Region-Frame Absolute Address */ | |
82 | unsigned long : 14; | |
83 | unsigned long av : 1; /* ACCF-Validity Control */ | |
84 | unsigned long acc: 4; /* Access-Control Bits */ | |
85 | unsigned long f : 1; /* Fetch-Protection Bit */ | |
86 | unsigned long fc : 1; /* Format-Control */ | |
87 | unsigned long p : 1; /* DAT-Protection Bit */ | |
88 | unsigned long co : 1; /* Change-Recording Override */ | |
89 | unsigned long : 2; | |
90 | unsigned long i : 1; /* Region-Invalid Bit */ | |
91 | unsigned long cr : 1; /* Common-Region Bit */ | |
92 | unsigned long tt : 2; /* Table-Type Bits */ | |
93 | unsigned long : 2; | |
94 | }; | |
95 | ||
96 | union region3_table_entry { | |
97 | unsigned long val; | |
98 | struct region3_table_entry_fc0 fc0; | |
99 | struct region3_table_entry_fc1 fc1; | |
100 | struct { | |
101 | unsigned long : 53; | |
102 | unsigned long fc : 1; /* Format-Control */ | |
103 | unsigned long : 4; | |
104 | unsigned long i : 1; /* Region-Invalid Bit */ | |
105 | unsigned long cr : 1; /* Common-Region Bit */ | |
106 | unsigned long tt : 2; /* Table-Type Bits */ | |
107 | unsigned long : 2; | |
108 | }; | |
109 | }; | |
110 | ||
111 | struct segment_entry_fc0 { | |
112 | unsigned long pto: 53;/* Page-Table Origin */ | |
113 | unsigned long fc : 1; /* Format-Control */ | |
114 | unsigned long p : 1; /* DAT-Protection Bit */ | |
115 | unsigned long : 3; | |
116 | unsigned long i : 1; /* Segment-Invalid Bit */ | |
117 | unsigned long cs : 1; /* Common-Segment Bit */ | |
118 | unsigned long tt : 2; /* Table-Type Bits */ | |
119 | unsigned long : 2; | |
120 | }; | |
121 | ||
122 | struct segment_entry_fc1 { | |
123 | unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ | |
124 | unsigned long : 3; | |
125 | unsigned long av : 1; /* ACCF-Validity Control */ | |
126 | unsigned long acc: 4; /* Access-Control Bits */ | |
127 | unsigned long f : 1; /* Fetch-Protection Bit */ | |
128 | unsigned long fc : 1; /* Format-Control */ | |
129 | unsigned long p : 1; /* DAT-Protection Bit */ | |
130 | unsigned long co : 1; /* Change-Recording Override */ | |
131 | unsigned long : 2; | |
132 | unsigned long i : 1; /* Segment-Invalid Bit */ | |
133 | unsigned long cs : 1; /* Common-Segment Bit */ | |
134 | unsigned long tt : 2; /* Table-Type Bits */ | |
135 | unsigned long : 2; | |
136 | }; | |
137 | ||
138 | union segment_table_entry { | |
139 | unsigned long val; | |
140 | struct segment_entry_fc0 fc0; | |
141 | struct segment_entry_fc1 fc1; | |
142 | struct { | |
143 | unsigned long : 53; | |
144 | unsigned long fc : 1; /* Format-Control */ | |
145 | unsigned long : 4; | |
146 | unsigned long i : 1; /* Segment-Invalid Bit */ | |
147 | unsigned long cs : 1; /* Common-Segment Bit */ | |
148 | unsigned long tt : 2; /* Table-Type Bits */ | |
149 | unsigned long : 2; | |
150 | }; | |
151 | }; | |
152 | ||
153 | enum { | |
154 | TABLE_TYPE_SEGMENT = 0, | |
155 | TABLE_TYPE_REGION3 = 1, | |
156 | TABLE_TYPE_REGION2 = 2, | |
157 | TABLE_TYPE_REGION1 = 3 | |
158 | }; | |
159 | ||
160 | union page_table_entry { | |
161 | unsigned long val; | |
162 | struct { | |
163 | unsigned long pfra : 52; /* Page-Frame Real Address */ | |
164 | unsigned long z : 1; /* Zero Bit */ | |
165 | unsigned long i : 1; /* Page-Invalid Bit */ | |
166 | unsigned long p : 1; /* DAT-Protection Bit */ | |
167 | unsigned long co : 1; /* Change-Recording Override */ | |
168 | unsigned long : 8; | |
169 | }; | |
170 | }; | |
171 | ||
172 | /* | |
173 | * vaddress union in order to easily decode a virtual address into its | |
174 | * region first index, region second index etc. parts. | |
175 | */ | |
176 | union vaddress { | |
177 | unsigned long addr; | |
178 | struct { | |
179 | unsigned long rfx : 11; | |
180 | unsigned long rsx : 11; | |
181 | unsigned long rtx : 11; | |
182 | unsigned long sx : 11; | |
183 | unsigned long px : 8; | |
184 | unsigned long bx : 12; | |
185 | }; | |
186 | struct { | |
187 | unsigned long rfx01 : 2; | |
188 | unsigned long : 9; | |
189 | unsigned long rsx01 : 2; | |
190 | unsigned long : 9; | |
191 | unsigned long rtx01 : 2; | |
192 | unsigned long : 9; | |
193 | unsigned long sx01 : 2; | |
194 | unsigned long : 29; | |
195 | }; | |
196 | }; | |
197 | ||
198 | /* | |
199 | * raddress union which will contain the result (real or absolute address) | |
200 | * after a page table walk. The rfaa, sfaa and pfra members are used to | |
201 | * simply assign them the value of a region, segment or page table entry. | |
202 | */ | |
203 | union raddress { | |
204 | unsigned long addr; | |
205 | unsigned long rfaa : 33; /* Region-Frame Absolute Address */ | |
206 | unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ | |
207 | unsigned long pfra : 52; /* Page-Frame Real Address */ | |
208 | }; | |
209 | ||
8a242234 HC |
210 | static int ipte_lock_count; |
211 | static DEFINE_MUTEX(ipte_mutex); | |
212 | ||
213 | int ipte_lock_held(struct kvm_vcpu *vcpu) | |
214 | { | |
215 | union ipte_control *ic = &vcpu->kvm->arch.sca->ipte_control; | |
216 | ||
217 | if (vcpu->arch.sie_block->eca & 1) | |
218 | return ic->kh != 0; | |
219 | return ipte_lock_count != 0; | |
220 | } | |
221 | ||
222 | static void ipte_lock_simple(struct kvm_vcpu *vcpu) | |
223 | { | |
224 | union ipte_control old, new, *ic; | |
225 | ||
226 | mutex_lock(&ipte_mutex); | |
227 | ipte_lock_count++; | |
228 | if (ipte_lock_count > 1) | |
229 | goto out; | |
230 | ic = &vcpu->kvm->arch.sca->ipte_control; | |
231 | do { | |
1365039d CB |
232 | old = *ic; |
233 | barrier(); | |
8a242234 HC |
234 | while (old.k) { |
235 | cond_resched(); | |
1365039d CB |
236 | old = *ic; |
237 | barrier(); | |
8a242234 HC |
238 | } |
239 | new = old; | |
240 | new.k = 1; | |
241 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
242 | out: | |
243 | mutex_unlock(&ipte_mutex); | |
244 | } | |
245 | ||
246 | static void ipte_unlock_simple(struct kvm_vcpu *vcpu) | |
247 | { | |
248 | union ipte_control old, new, *ic; | |
249 | ||
250 | mutex_lock(&ipte_mutex); | |
251 | ipte_lock_count--; | |
252 | if (ipte_lock_count) | |
253 | goto out; | |
254 | ic = &vcpu->kvm->arch.sca->ipte_control; | |
255 | do { | |
1365039d CB |
256 | old = *ic; |
257 | barrier(); | |
258 | new = old; | |
8a242234 HC |
259 | new.k = 0; |
260 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
6b331952 | 261 | wake_up(&vcpu->kvm->arch.ipte_wq); |
8a242234 HC |
262 | out: |
263 | mutex_unlock(&ipte_mutex); | |
264 | } | |
265 | ||
266 | static void ipte_lock_siif(struct kvm_vcpu *vcpu) | |
267 | { | |
268 | union ipte_control old, new, *ic; | |
269 | ||
270 | ic = &vcpu->kvm->arch.sca->ipte_control; | |
271 | do { | |
1365039d CB |
272 | old = *ic; |
273 | barrier(); | |
8a242234 HC |
274 | while (old.kg) { |
275 | cond_resched(); | |
1365039d CB |
276 | old = *ic; |
277 | barrier(); | |
8a242234 HC |
278 | } |
279 | new = old; | |
280 | new.k = 1; | |
281 | new.kh++; | |
282 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
283 | } | |
284 | ||
285 | static void ipte_unlock_siif(struct kvm_vcpu *vcpu) | |
286 | { | |
287 | union ipte_control old, new, *ic; | |
288 | ||
289 | ic = &vcpu->kvm->arch.sca->ipte_control; | |
290 | do { | |
1365039d CB |
291 | old = *ic; |
292 | barrier(); | |
293 | new = old; | |
8a242234 HC |
294 | new.kh--; |
295 | if (!new.kh) | |
296 | new.k = 0; | |
297 | } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
298 | if (!new.kh) | |
299 | wake_up(&vcpu->kvm->arch.ipte_wq); | |
300 | } | |
301 | ||
a0465f9a | 302 | void ipte_lock(struct kvm_vcpu *vcpu) |
8a242234 HC |
303 | { |
304 | if (vcpu->arch.sie_block->eca & 1) | |
305 | ipte_lock_siif(vcpu); | |
306 | else | |
307 | ipte_lock_simple(vcpu); | |
308 | } | |
309 | ||
a0465f9a | 310 | void ipte_unlock(struct kvm_vcpu *vcpu) |
8a242234 HC |
311 | { |
312 | if (vcpu->arch.sie_block->eca & 1) | |
313 | ipte_unlock_siif(vcpu); | |
314 | else | |
315 | ipte_unlock_simple(vcpu); | |
316 | } | |
317 | ||
22938978 HC |
318 | static unsigned long get_vcpu_asce(struct kvm_vcpu *vcpu) |
319 | { | |
320 | switch (psw_bits(vcpu->arch.sie_block->gpsw).as) { | |
321 | case PSW_AS_PRIMARY: | |
322 | return vcpu->arch.sie_block->gcr[1]; | |
323 | case PSW_AS_SECONDARY: | |
324 | return vcpu->arch.sie_block->gcr[7]; | |
325 | case PSW_AS_HOME: | |
326 | return vcpu->arch.sie_block->gcr[13]; | |
327 | } | |
328 | return 0; | |
329 | } | |
330 | ||
331 | static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val) | |
332 | { | |
333 | return kvm_read_guest(kvm, gpa, val, sizeof(*val)); | |
334 | } | |
335 | ||
336 | /** | |
337 | * guest_translate - translate a guest virtual into a guest absolute address | |
338 | * @vcpu: virtual cpu | |
339 | * @gva: guest virtual address | |
340 | * @gpa: points to where guest physical (absolute) address should be stored | |
341 | * @write: indicates if access is a write access | |
342 | * | |
343 | * Translate a guest virtual address into a guest absolute address by means | |
344 | * of dynamic address translation as specified by the architecuture. | |
345 | * If the resulting absolute address is not available in the configuration | |
346 | * an addressing exception is indicated and @gpa will not be changed. | |
347 | * | |
348 | * Returns: - zero on success; @gpa contains the resulting absolute address | |
349 | * - a negative value if guest access failed due to e.g. broken | |
350 | * guest mapping | |
351 | * - a positve value if an access exception happened. In this case | |
352 | * the returned value is the program interruption code as defined | |
353 | * by the architecture | |
354 | */ | |
355 | static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva, | |
356 | unsigned long *gpa, int write) | |
357 | { | |
358 | union vaddress vaddr = {.addr = gva}; | |
359 | union raddress raddr = {.addr = gva}; | |
360 | union page_table_entry pte; | |
361 | int dat_protection = 0; | |
362 | union ctlreg0 ctlreg0; | |
363 | unsigned long ptr; | |
364 | int edat1, edat2; | |
365 | union asce asce; | |
366 | ||
367 | ctlreg0.val = vcpu->arch.sie_block->gcr[0]; | |
368 | edat1 = ctlreg0.edat && test_vfacility(8); | |
369 | edat2 = edat1 && test_vfacility(78); | |
370 | asce.val = get_vcpu_asce(vcpu); | |
371 | if (asce.r) | |
372 | goto real_address; | |
373 | ptr = asce.origin * 4096; | |
374 | switch (asce.dt) { | |
375 | case ASCE_TYPE_REGION1: | |
376 | if (vaddr.rfx01 > asce.tl) | |
377 | return PGM_REGION_FIRST_TRANS; | |
378 | ptr += vaddr.rfx * 8; | |
379 | break; | |
380 | case ASCE_TYPE_REGION2: | |
381 | if (vaddr.rfx) | |
382 | return PGM_ASCE_TYPE; | |
383 | if (vaddr.rsx01 > asce.tl) | |
384 | return PGM_REGION_SECOND_TRANS; | |
385 | ptr += vaddr.rsx * 8; | |
386 | break; | |
387 | case ASCE_TYPE_REGION3: | |
388 | if (vaddr.rfx || vaddr.rsx) | |
389 | return PGM_ASCE_TYPE; | |
390 | if (vaddr.rtx01 > asce.tl) | |
391 | return PGM_REGION_THIRD_TRANS; | |
392 | ptr += vaddr.rtx * 8; | |
393 | break; | |
394 | case ASCE_TYPE_SEGMENT: | |
395 | if (vaddr.rfx || vaddr.rsx || vaddr.rtx) | |
396 | return PGM_ASCE_TYPE; | |
397 | if (vaddr.sx01 > asce.tl) | |
398 | return PGM_SEGMENT_TRANSLATION; | |
399 | ptr += vaddr.sx * 8; | |
400 | break; | |
401 | } | |
402 | switch (asce.dt) { | |
403 | case ASCE_TYPE_REGION1: { | |
404 | union region1_table_entry rfte; | |
405 | ||
406 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
407 | return PGM_ADDRESSING; | |
408 | if (deref_table(vcpu->kvm, ptr, &rfte.val)) | |
409 | return -EFAULT; | |
410 | if (rfte.i) | |
411 | return PGM_REGION_FIRST_TRANS; | |
412 | if (rfte.tt != TABLE_TYPE_REGION1) | |
413 | return PGM_TRANSLATION_SPEC; | |
414 | if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl) | |
415 | return PGM_REGION_SECOND_TRANS; | |
416 | if (edat1) | |
417 | dat_protection |= rfte.p; | |
418 | ptr = rfte.rto * 4096 + vaddr.rsx * 8; | |
419 | } | |
420 | /* fallthrough */ | |
421 | case ASCE_TYPE_REGION2: { | |
422 | union region2_table_entry rste; | |
423 | ||
424 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
425 | return PGM_ADDRESSING; | |
426 | if (deref_table(vcpu->kvm, ptr, &rste.val)) | |
427 | return -EFAULT; | |
428 | if (rste.i) | |
429 | return PGM_REGION_SECOND_TRANS; | |
430 | if (rste.tt != TABLE_TYPE_REGION2) | |
431 | return PGM_TRANSLATION_SPEC; | |
432 | if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl) | |
433 | return PGM_REGION_THIRD_TRANS; | |
434 | if (edat1) | |
435 | dat_protection |= rste.p; | |
436 | ptr = rste.rto * 4096 + vaddr.rtx * 8; | |
437 | } | |
438 | /* fallthrough */ | |
439 | case ASCE_TYPE_REGION3: { | |
440 | union region3_table_entry rtte; | |
441 | ||
442 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
443 | return PGM_ADDRESSING; | |
444 | if (deref_table(vcpu->kvm, ptr, &rtte.val)) | |
445 | return -EFAULT; | |
446 | if (rtte.i) | |
447 | return PGM_REGION_THIRD_TRANS; | |
448 | if (rtte.tt != TABLE_TYPE_REGION3) | |
449 | return PGM_TRANSLATION_SPEC; | |
450 | if (rtte.cr && asce.p && edat2) | |
451 | return PGM_TRANSLATION_SPEC; | |
452 | if (rtte.fc && edat2) { | |
453 | dat_protection |= rtte.fc1.p; | |
454 | raddr.rfaa = rtte.fc1.rfaa; | |
455 | goto absolute_address; | |
456 | } | |
457 | if (vaddr.sx01 < rtte.fc0.tf) | |
458 | return PGM_SEGMENT_TRANSLATION; | |
459 | if (vaddr.sx01 > rtte.fc0.tl) | |
460 | return PGM_SEGMENT_TRANSLATION; | |
461 | if (edat1) | |
462 | dat_protection |= rtte.fc0.p; | |
463 | ptr = rtte.fc0.sto * 4096 + vaddr.sx * 8; | |
464 | } | |
465 | /* fallthrough */ | |
466 | case ASCE_TYPE_SEGMENT: { | |
467 | union segment_table_entry ste; | |
468 | ||
469 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
470 | return PGM_ADDRESSING; | |
471 | if (deref_table(vcpu->kvm, ptr, &ste.val)) | |
472 | return -EFAULT; | |
473 | if (ste.i) | |
474 | return PGM_SEGMENT_TRANSLATION; | |
475 | if (ste.tt != TABLE_TYPE_SEGMENT) | |
476 | return PGM_TRANSLATION_SPEC; | |
477 | if (ste.cs && asce.p) | |
478 | return PGM_TRANSLATION_SPEC; | |
479 | if (ste.fc && edat1) { | |
480 | dat_protection |= ste.fc1.p; | |
481 | raddr.sfaa = ste.fc1.sfaa; | |
482 | goto absolute_address; | |
483 | } | |
484 | dat_protection |= ste.fc0.p; | |
485 | ptr = ste.fc0.pto * 2048 + vaddr.px * 8; | |
486 | } | |
487 | } | |
488 | if (kvm_is_error_gpa(vcpu->kvm, ptr)) | |
489 | return PGM_ADDRESSING; | |
490 | if (deref_table(vcpu->kvm, ptr, &pte.val)) | |
491 | return -EFAULT; | |
492 | if (pte.i) | |
493 | return PGM_PAGE_TRANSLATION; | |
494 | if (pte.z) | |
495 | return PGM_TRANSLATION_SPEC; | |
496 | if (pte.co && !edat1) | |
497 | return PGM_TRANSLATION_SPEC; | |
498 | dat_protection |= pte.p; | |
499 | raddr.pfra = pte.pfra; | |
500 | real_address: | |
501 | raddr.addr = kvm_s390_real_to_abs(vcpu, raddr.addr); | |
502 | absolute_address: | |
503 | if (write && dat_protection) | |
504 | return PGM_PROTECTION; | |
505 | if (kvm_is_error_gpa(vcpu->kvm, raddr.addr)) | |
506 | return PGM_ADDRESSING; | |
507 | *gpa = raddr.addr; | |
508 | return 0; | |
509 | } | |
510 | ||
511 | static inline int is_low_address(unsigned long ga) | |
512 | { | |
513 | /* Check for address ranges 0..511 and 4096..4607 */ | |
514 | return (ga & ~0x11fful) == 0; | |
515 | } | |
516 | ||
517 | static int low_address_protection_enabled(struct kvm_vcpu *vcpu) | |
518 | { | |
519 | union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; | |
520 | psw_t *psw = &vcpu->arch.sie_block->gpsw; | |
521 | union asce asce; | |
522 | ||
523 | if (!ctlreg0.lap) | |
524 | return 0; | |
525 | asce.val = get_vcpu_asce(vcpu); | |
526 | if (psw_bits(*psw).t && asce.p) | |
527 | return 0; | |
528 | return 1; | |
529 | } | |
530 | ||
531 | struct trans_exc_code_bits { | |
532 | unsigned long addr : 52; /* Translation-exception Address */ | |
533 | unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */ | |
534 | unsigned long : 7; | |
535 | unsigned long b61 : 1; | |
536 | unsigned long as : 2; /* ASCE Identifier */ | |
537 | }; | |
538 | ||
539 | enum { | |
540 | FSI_UNKNOWN = 0, /* Unknown wether fetch or store */ | |
541 | FSI_STORE = 1, /* Exception was due to store operation */ | |
542 | FSI_FETCH = 2 /* Exception was due to fetch operation */ | |
543 | }; | |
544 | ||
545 | static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga, | |
546 | unsigned long *pages, unsigned long nr_pages, | |
547 | int write) | |
548 | { | |
549 | struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm; | |
550 | psw_t *psw = &vcpu->arch.sie_block->gpsw; | |
551 | struct trans_exc_code_bits *tec_bits; | |
552 | int lap_enabled, rc; | |
553 | ||
554 | memset(pgm, 0, sizeof(*pgm)); | |
555 | tec_bits = (struct trans_exc_code_bits *)&pgm->trans_exc_code; | |
556 | tec_bits->fsi = write ? FSI_STORE : FSI_FETCH; | |
557 | tec_bits->as = psw_bits(*psw).as; | |
558 | lap_enabled = low_address_protection_enabled(vcpu); | |
559 | while (nr_pages) { | |
560 | ga = kvm_s390_logical_to_effective(vcpu, ga); | |
561 | tec_bits->addr = ga >> PAGE_SHIFT; | |
562 | if (write && lap_enabled && is_low_address(ga)) { | |
563 | pgm->code = PGM_PROTECTION; | |
564 | return pgm->code; | |
565 | } | |
566 | ga &= PAGE_MASK; | |
567 | if (psw_bits(*psw).t) { | |
568 | rc = guest_translate(vcpu, ga, pages, write); | |
569 | if (rc < 0) | |
570 | return rc; | |
571 | if (rc == PGM_PROTECTION) | |
572 | tec_bits->b61 = 1; | |
573 | if (rc) | |
574 | pgm->code = rc; | |
575 | } else { | |
576 | *pages = kvm_s390_real_to_abs(vcpu, ga); | |
577 | if (kvm_is_error_gpa(vcpu->kvm, *pages)) | |
578 | pgm->code = PGM_ADDRESSING; | |
579 | } | |
580 | if (pgm->code) | |
581 | return pgm->code; | |
582 | ga += PAGE_SIZE; | |
583 | pages++; | |
584 | nr_pages--; | |
585 | } | |
586 | return 0; | |
587 | } | |
588 | ||
589 | int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, void *data, | |
590 | unsigned long len, int write) | |
591 | { | |
592 | psw_t *psw = &vcpu->arch.sie_block->gpsw; | |
593 | unsigned long _len, nr_pages, gpa, idx; | |
594 | unsigned long pages_array[2]; | |
595 | unsigned long *pages; | |
8a242234 HC |
596 | int need_ipte_lock; |
597 | union asce asce; | |
22938978 HC |
598 | int rc; |
599 | ||
600 | if (!len) | |
601 | return 0; | |
602 | /* Access register mode is not supported yet. */ | |
603 | if (psw_bits(*psw).t && psw_bits(*psw).as == PSW_AS_ACCREG) | |
604 | return -EOPNOTSUPP; | |
605 | nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1; | |
606 | pages = pages_array; | |
607 | if (nr_pages > ARRAY_SIZE(pages_array)) | |
608 | pages = vmalloc(nr_pages * sizeof(unsigned long)); | |
609 | if (!pages) | |
610 | return -ENOMEM; | |
8a242234 HC |
611 | asce.val = get_vcpu_asce(vcpu); |
612 | need_ipte_lock = psw_bits(*psw).t && !asce.r; | |
613 | if (need_ipte_lock) | |
614 | ipte_lock(vcpu); | |
22938978 HC |
615 | rc = guest_page_range(vcpu, ga, pages, nr_pages, write); |
616 | for (idx = 0; idx < nr_pages && !rc; idx++) { | |
617 | gpa = *(pages + idx) + (ga & ~PAGE_MASK); | |
618 | _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); | |
619 | if (write) | |
620 | rc = kvm_write_guest(vcpu->kvm, gpa, data, _len); | |
621 | else | |
622 | rc = kvm_read_guest(vcpu->kvm, gpa, data, _len); | |
623 | len -= _len; | |
624 | ga += _len; | |
625 | data += _len; | |
626 | } | |
8a242234 HC |
627 | if (need_ipte_lock) |
628 | ipte_unlock(vcpu); | |
22938978 HC |
629 | if (nr_pages > ARRAY_SIZE(pages_array)) |
630 | vfree(pages); | |
631 | return rc; | |
632 | } | |
633 | ||
634 | int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra, | |
635 | void *data, unsigned long len, int write) | |
636 | { | |
637 | unsigned long _len, gpa; | |
638 | int rc = 0; | |
639 | ||
640 | while (len && !rc) { | |
641 | gpa = kvm_s390_real_to_abs(vcpu, gra); | |
642 | _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); | |
643 | if (write) | |
644 | rc = write_guest_abs(vcpu, gpa, data, _len); | |
645 | else | |
646 | rc = read_guest_abs(vcpu, gpa, data, _len); | |
647 | len -= _len; | |
648 | gra += _len; | |
649 | data += _len; | |
650 | } | |
651 | return rc; | |
652 | } | |
f8232c8c | 653 | |
9fbc0276 TH |
654 | /** |
655 | * guest_translate_address - translate guest logical into guest absolute address | |
656 | * | |
657 | * Parameter semantics are the same as the ones from guest_translate. | |
658 | * The memory contents at the guest address are not changed. | |
659 | * | |
660 | * Note: The IPTE lock is not taken during this function, so the caller | |
661 | * has to take care of this. | |
662 | */ | |
663 | int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, | |
664 | unsigned long *gpa, int write) | |
665 | { | |
666 | struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm; | |
667 | psw_t *psw = &vcpu->arch.sie_block->gpsw; | |
668 | struct trans_exc_code_bits *tec; | |
669 | union asce asce; | |
670 | int rc; | |
671 | ||
672 | /* Access register mode is not supported yet. */ | |
673 | if (psw_bits(*psw).t && psw_bits(*psw).as == PSW_AS_ACCREG) | |
674 | return -EOPNOTSUPP; | |
675 | ||
676 | gva = kvm_s390_logical_to_effective(vcpu, gva); | |
677 | memset(pgm, 0, sizeof(*pgm)); | |
678 | tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code; | |
679 | tec->as = psw_bits(*psw).as; | |
680 | tec->fsi = write ? FSI_STORE : FSI_FETCH; | |
681 | tec->addr = gva >> PAGE_SHIFT; | |
682 | if (is_low_address(gva) && low_address_protection_enabled(vcpu)) { | |
683 | if (write) { | |
684 | rc = pgm->code = PGM_PROTECTION; | |
685 | return rc; | |
686 | } | |
687 | } | |
688 | ||
689 | asce.val = get_vcpu_asce(vcpu); | |
690 | if (psw_bits(*psw).t && !asce.r) { /* Use DAT? */ | |
691 | rc = guest_translate(vcpu, gva, gpa, write); | |
692 | if (rc > 0) { | |
693 | if (rc == PGM_PROTECTION) | |
694 | tec->b61 = 1; | |
695 | pgm->code = rc; | |
696 | } | |
697 | } else { | |
698 | rc = 0; | |
699 | *gpa = kvm_s390_real_to_abs(vcpu, gva); | |
700 | if (kvm_is_error_gpa(vcpu->kvm, *gpa)) | |
701 | rc = pgm->code = PGM_ADDRESSING; | |
702 | } | |
703 | ||
704 | return rc; | |
705 | } | |
706 | ||
f8232c8c TH |
707 | /** |
708 | * kvm_s390_check_low_addr_protection - check for low-address protection | |
709 | * @ga: Guest address | |
710 | * | |
711 | * Checks whether an address is subject to low-address protection and set | |
712 | * up vcpu->arch.pgm accordingly if necessary. | |
713 | * | |
714 | * Return: 0 if no protection exception, or PGM_PROTECTION if protected. | |
715 | */ | |
716 | int kvm_s390_check_low_addr_protection(struct kvm_vcpu *vcpu, unsigned long ga) | |
717 | { | |
718 | struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm; | |
719 | psw_t *psw = &vcpu->arch.sie_block->gpsw; | |
720 | struct trans_exc_code_bits *tec_bits; | |
721 | ||
722 | if (!is_low_address(ga) || !low_address_protection_enabled(vcpu)) | |
723 | return 0; | |
724 | ||
725 | memset(pgm, 0, sizeof(*pgm)); | |
726 | tec_bits = (struct trans_exc_code_bits *)&pgm->trans_exc_code; | |
727 | tec_bits->fsi = FSI_STORE; | |
728 | tec_bits->as = psw_bits(*psw).as; | |
729 | tec_bits->addr = ga >> PAGE_SHIFT; | |
730 | pgm->code = PGM_PROTECTION; | |
731 | ||
732 | return pgm->code; | |
733 | } |