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Commit | Line | Data |
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453423dc | 1 | /* |
a53c8fab | 2 | * handling privileged instructions |
453423dc | 3 | * |
69d0d3a3 | 4 | * Copyright IBM Corp. 2008, 2013 |
453423dc CB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License (version 2 only) | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * Author(s): Carsten Otte <cotte@de.ibm.com> | |
11 | * Christian Borntraeger <borntraeger@de.ibm.com> | |
12 | */ | |
13 | ||
14 | #include <linux/kvm.h> | |
5a0e3ad6 | 15 | #include <linux/gfp.h> |
453423dc | 16 | #include <linux/errno.h> |
b13b5dc7 | 17 | #include <linux/compat.h> |
589ee628 IM |
18 | #include <linux/mm_types.h> |
19 | ||
7c959e82 | 20 | #include <asm/asm-offsets.h> |
e769ece3 | 21 | #include <asm/facility.h> |
453423dc CB |
22 | #include <asm/current.h> |
23 | #include <asm/debug.h> | |
24 | #include <asm/ebcdic.h> | |
25 | #include <asm/sysinfo.h> | |
69d0d3a3 CB |
26 | #include <asm/pgtable.h> |
27 | #include <asm/pgalloc.h> | |
1e133ab2 | 28 | #include <asm/gmap.h> |
69d0d3a3 | 29 | #include <asm/io.h> |
48a3e950 CH |
30 | #include <asm/ptrace.h> |
31 | #include <asm/compat.h> | |
a7e19ab5 | 32 | #include <asm/sclp.h> |
453423dc CB |
33 | #include "gaccess.h" |
34 | #include "kvm-s390.h" | |
5786fffa | 35 | #include "trace.h" |
453423dc | 36 | |
80cd8763 FZ |
37 | static int handle_ri(struct kvm_vcpu *vcpu) |
38 | { | |
39 | if (test_kvm_facility(vcpu->kvm, 64)) { | |
40 | vcpu->arch.sie_block->ecb3 |= 0x01; | |
41 | kvm_s390_retry_instr(vcpu); | |
42 | return 0; | |
43 | } else | |
44 | return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); | |
45 | } | |
46 | ||
47 | int kvm_s390_handle_aa(struct kvm_vcpu *vcpu) | |
48 | { | |
49 | if ((vcpu->arch.sie_block->ipa & 0xf) <= 4) | |
50 | return handle_ri(vcpu); | |
51 | else | |
52 | return -EOPNOTSUPP; | |
53 | } | |
54 | ||
6a3f95a6 TH |
55 | /* Handle SCK (SET CLOCK) interception */ |
56 | static int handle_set_clock(struct kvm_vcpu *vcpu) | |
57 | { | |
25ed1675 | 58 | int rc; |
27f67f87 | 59 | u8 ar; |
25ed1675 | 60 | u64 op2, val; |
6a3f95a6 TH |
61 | |
62 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
63 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
64 | ||
8ae04b8f | 65 | op2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
6a3f95a6 TH |
66 | if (op2 & 7) /* Operand must be on a doubleword boundary */ |
67 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
8ae04b8f | 68 | rc = read_guest(vcpu, op2, ar, &val, sizeof(val)); |
0e7a3f94 HC |
69 | if (rc) |
70 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
6a3f95a6 | 71 | |
7cbde76b | 72 | VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", val); |
25ed1675 | 73 | kvm_s390_set_tod_clock(vcpu->kvm, val); |
6a3f95a6 TH |
74 | |
75 | kvm_s390_set_psw_cc(vcpu, 0); | |
76 | return 0; | |
77 | } | |
78 | ||
453423dc CB |
79 | static int handle_set_prefix(struct kvm_vcpu *vcpu) |
80 | { | |
453423dc | 81 | u64 operand2; |
665170cb HC |
82 | u32 address; |
83 | int rc; | |
27f67f87 | 84 | u8 ar; |
453423dc CB |
85 | |
86 | vcpu->stat.instruction_spx++; | |
87 | ||
5087dfa6 TH |
88 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
89 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
90 | ||
8ae04b8f | 91 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc CB |
92 | |
93 | /* must be word boundary */ | |
db4a29cb HC |
94 | if (operand2 & 3) |
95 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
453423dc CB |
96 | |
97 | /* get the value */ | |
8ae04b8f | 98 | rc = read_guest(vcpu, operand2, ar, &address, sizeof(address)); |
665170cb HC |
99 | if (rc) |
100 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
101 | ||
102 | address &= 0x7fffe000u; | |
103 | ||
104 | /* | |
105 | * Make sure the new value is valid memory. We only need to check the | |
106 | * first page, since address is 8k aligned and memory pieces are always | |
107 | * at least 1MB aligned and have at least a size of 1MB. | |
108 | */ | |
109 | if (kvm_is_error_gpa(vcpu->kvm, address)) | |
db4a29cb | 110 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
453423dc | 111 | |
8d26cf7b | 112 | kvm_s390_set_prefix(vcpu, address); |
5786fffa | 113 | trace_kvm_s390_handle_prefix(vcpu, 1, address); |
453423dc CB |
114 | return 0; |
115 | } | |
116 | ||
117 | static int handle_store_prefix(struct kvm_vcpu *vcpu) | |
118 | { | |
453423dc CB |
119 | u64 operand2; |
120 | u32 address; | |
f748f4a7 | 121 | int rc; |
27f67f87 | 122 | u8 ar; |
453423dc CB |
123 | |
124 | vcpu->stat.instruction_stpx++; | |
b1c571a5 | 125 | |
5087dfa6 TH |
126 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
127 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
128 | ||
8ae04b8f | 129 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc CB |
130 | |
131 | /* must be word boundary */ | |
db4a29cb HC |
132 | if (operand2 & 3) |
133 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
453423dc | 134 | |
fda902cb | 135 | address = kvm_s390_get_prefix(vcpu); |
453423dc CB |
136 | |
137 | /* get the value */ | |
8ae04b8f | 138 | rc = write_guest(vcpu, operand2, ar, &address, sizeof(address)); |
f748f4a7 HC |
139 | if (rc) |
140 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
453423dc | 141 | |
7cbde76b | 142 | VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2); |
5786fffa | 143 | trace_kvm_s390_handle_prefix(vcpu, 0, address); |
453423dc CB |
144 | return 0; |
145 | } | |
146 | ||
147 | static int handle_store_cpu_address(struct kvm_vcpu *vcpu) | |
148 | { | |
8b96de0e HC |
149 | u16 vcpu_id = vcpu->vcpu_id; |
150 | u64 ga; | |
151 | int rc; | |
27f67f87 | 152 | u8 ar; |
453423dc CB |
153 | |
154 | vcpu->stat.instruction_stap++; | |
b1c571a5 | 155 | |
5087dfa6 TH |
156 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
157 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
158 | ||
8ae04b8f | 159 | ga = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc | 160 | |
8b96de0e | 161 | if (ga & 1) |
db4a29cb | 162 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
453423dc | 163 | |
8ae04b8f | 164 | rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id)); |
8b96de0e HC |
165 | if (rc) |
166 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
453423dc | 167 | |
7cbde76b | 168 | VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga); |
8b96de0e | 169 | trace_kvm_s390_handle_stap(vcpu, ga); |
453423dc CB |
170 | return 0; |
171 | } | |
172 | ||
3ac8e380 | 173 | static int __skey_check_enable(struct kvm_vcpu *vcpu) |
693ffc08 | 174 | { |
3ac8e380 | 175 | int rc = 0; |
11ddcd41 DH |
176 | |
177 | trace_kvm_s390_skey_related_inst(vcpu); | |
693ffc08 | 178 | if (!(vcpu->arch.sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE))) |
3ac8e380 | 179 | return rc; |
693ffc08 | 180 | |
3ac8e380 | 181 | rc = s390_enable_skey(); |
11ddcd41 DH |
182 | VCPU_EVENT(vcpu, 3, "enabling storage keys for guest: %d", rc); |
183 | if (!rc) | |
184 | vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE); | |
3ac8e380 | 185 | return rc; |
693ffc08 DD |
186 | } |
187 | ||
a7e19ab5 | 188 | static int try_handle_skey(struct kvm_vcpu *vcpu) |
453423dc | 189 | { |
11ddcd41 | 190 | int rc; |
693ffc08 | 191 | |
11ddcd41 DH |
192 | vcpu->stat.instruction_storage_key++; |
193 | rc = __skey_check_enable(vcpu); | |
3ac8e380 DD |
194 | if (rc) |
195 | return rc; | |
a7e19ab5 DH |
196 | if (sclp.has_skey) { |
197 | /* with storage-key facility, SIE interprets it for us */ | |
198 | kvm_s390_retry_instr(vcpu); | |
199 | VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation"); | |
200 | return -EAGAIN; | |
201 | } | |
5087dfa6 TH |
202 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
203 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
a7e19ab5 DH |
204 | return 0; |
205 | } | |
5087dfa6 | 206 | |
a7e19ab5 DH |
207 | static int handle_iske(struct kvm_vcpu *vcpu) |
208 | { | |
209 | unsigned long addr; | |
210 | unsigned char key; | |
211 | int reg1, reg2; | |
212 | int rc; | |
213 | ||
214 | rc = try_handle_skey(vcpu); | |
215 | if (rc) | |
216 | return rc != -EAGAIN ? rc : 0; | |
217 | ||
218 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); | |
219 | ||
220 | addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
221 | addr = kvm_s390_logical_to_effective(vcpu, addr); | |
222 | addr = kvm_s390_real_to_abs(vcpu, addr); | |
223 | addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr)); | |
224 | if (kvm_is_error_hva(addr)) | |
225 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
226 | ||
227 | down_read(¤t->mm->mmap_sem); | |
228 | rc = get_guest_storage_key(current->mm, addr, &key); | |
229 | up_read(¤t->mm->mmap_sem); | |
230 | if (rc) | |
231 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
232 | vcpu->run->s.regs.gprs[reg1] &= ~0xff; | |
233 | vcpu->run->s.regs.gprs[reg1] |= key; | |
234 | return 0; | |
235 | } | |
236 | ||
237 | static int handle_rrbe(struct kvm_vcpu *vcpu) | |
238 | { | |
239 | unsigned long addr; | |
240 | int reg1, reg2; | |
241 | int rc; | |
242 | ||
243 | rc = try_handle_skey(vcpu); | |
244 | if (rc) | |
245 | return rc != -EAGAIN ? rc : 0; | |
246 | ||
247 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); | |
248 | ||
249 | addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
250 | addr = kvm_s390_logical_to_effective(vcpu, addr); | |
251 | addr = kvm_s390_real_to_abs(vcpu, addr); | |
252 | addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr)); | |
253 | if (kvm_is_error_hva(addr)) | |
254 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
255 | ||
256 | down_read(¤t->mm->mmap_sem); | |
257 | rc = reset_guest_reference_bit(current->mm, addr); | |
258 | up_read(¤t->mm->mmap_sem); | |
259 | if (rc < 0) | |
260 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
261 | ||
262 | kvm_s390_set_psw_cc(vcpu, rc); | |
263 | return 0; | |
264 | } | |
265 | ||
266 | #define SSKE_NQ 0x8 | |
267 | #define SSKE_MR 0x4 | |
268 | #define SSKE_MC 0x2 | |
269 | #define SSKE_MB 0x1 | |
270 | static int handle_sske(struct kvm_vcpu *vcpu) | |
271 | { | |
272 | unsigned char m3 = vcpu->arch.sie_block->ipb >> 28; | |
273 | unsigned long start, end; | |
274 | unsigned char key, oldkey; | |
275 | int reg1, reg2; | |
276 | int rc; | |
277 | ||
278 | rc = try_handle_skey(vcpu); | |
279 | if (rc) | |
280 | return rc != -EAGAIN ? rc : 0; | |
281 | ||
282 | if (!test_kvm_facility(vcpu->kvm, 8)) | |
283 | m3 &= ~SSKE_MB; | |
284 | if (!test_kvm_facility(vcpu->kvm, 10)) | |
285 | m3 &= ~(SSKE_MC | SSKE_MR); | |
286 | if (!test_kvm_facility(vcpu->kvm, 14)) | |
287 | m3 &= ~SSKE_NQ; | |
288 | ||
289 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); | |
290 | ||
291 | key = vcpu->run->s.regs.gprs[reg1] & 0xfe; | |
292 | start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
293 | start = kvm_s390_logical_to_effective(vcpu, start); | |
294 | if (m3 & SSKE_MB) { | |
295 | /* start already designates an absolute address */ | |
296 | end = (start + (1UL << 20)) & ~((1UL << 20) - 1); | |
297 | } else { | |
298 | start = kvm_s390_real_to_abs(vcpu, start); | |
299 | end = start + PAGE_SIZE; | |
300 | } | |
301 | ||
302 | while (start != end) { | |
303 | unsigned long addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start)); | |
304 | ||
305 | if (kvm_is_error_hva(addr)) | |
306 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
307 | ||
308 | down_read(¤t->mm->mmap_sem); | |
309 | rc = cond_set_guest_storage_key(current->mm, addr, key, &oldkey, | |
310 | m3 & SSKE_NQ, m3 & SSKE_MR, | |
311 | m3 & SSKE_MC); | |
312 | up_read(¤t->mm->mmap_sem); | |
313 | if (rc < 0) | |
314 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
315 | start += PAGE_SIZE; | |
0b925159 | 316 | } |
a7e19ab5 DH |
317 | |
318 | if (m3 & (SSKE_MC | SSKE_MR)) { | |
319 | if (m3 & SSKE_MB) { | |
320 | /* skey in reg1 is unpredictable */ | |
321 | kvm_s390_set_psw_cc(vcpu, 3); | |
322 | } else { | |
323 | kvm_s390_set_psw_cc(vcpu, rc); | |
324 | vcpu->run->s.regs.gprs[reg1] &= ~0xff00UL; | |
325 | vcpu->run->s.regs.gprs[reg1] |= (u64) oldkey << 8; | |
326 | } | |
327 | } | |
328 | if (m3 & SSKE_MB) { | |
329 | if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_AMODE_64BIT) | |
330 | vcpu->run->s.regs.gprs[reg2] &= ~PAGE_MASK; | |
331 | else | |
332 | vcpu->run->s.regs.gprs[reg2] &= ~0xfffff000UL; | |
333 | end = kvm_s390_logical_to_effective(vcpu, end); | |
334 | vcpu->run->s.regs.gprs[reg2] |= end; | |
335 | } | |
453423dc CB |
336 | return 0; |
337 | } | |
338 | ||
8a242234 HC |
339 | static int handle_ipte_interlock(struct kvm_vcpu *vcpu) |
340 | { | |
8a242234 | 341 | vcpu->stat.instruction_ipte_interlock++; |
04b41acd | 342 | if (psw_bits(vcpu->arch.sie_block->gpsw).p) |
8a242234 HC |
343 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
344 | wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu)); | |
0e8bc06a | 345 | kvm_s390_retry_instr(vcpu); |
8a242234 HC |
346 | VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation"); |
347 | return 0; | |
348 | } | |
349 | ||
aca84241 TH |
350 | static int handle_test_block(struct kvm_vcpu *vcpu) |
351 | { | |
aca84241 TH |
352 | gpa_t addr; |
353 | int reg2; | |
354 | ||
355 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
356 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
357 | ||
358 | kvm_s390_get_regs_rre(vcpu, NULL, ®2); | |
359 | addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
e45efa28 | 360 | addr = kvm_s390_logical_to_effective(vcpu, addr); |
dd9e5b7b | 361 | if (kvm_s390_check_low_addr_prot_real(vcpu, addr)) |
e45efa28 | 362 | return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm); |
aca84241 TH |
363 | addr = kvm_s390_real_to_abs(vcpu, addr); |
364 | ||
ef23e779 | 365 | if (kvm_is_error_gpa(vcpu->kvm, addr)) |
aca84241 TH |
366 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
367 | /* | |
368 | * We don't expect errors on modern systems, and do not care | |
369 | * about storage keys (yet), so let's just clear the page. | |
370 | */ | |
ef23e779 | 371 | if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE)) |
aca84241 TH |
372 | return -EFAULT; |
373 | kvm_s390_set_psw_cc(vcpu, 0); | |
374 | vcpu->run->s.regs.gprs[0] = 0; | |
375 | return 0; | |
376 | } | |
377 | ||
fa6b7fe9 | 378 | static int handle_tpi(struct kvm_vcpu *vcpu) |
453423dc | 379 | { |
fa6b7fe9 | 380 | struct kvm_s390_interrupt_info *inti; |
4799b557 HC |
381 | unsigned long len; |
382 | u32 tpi_data[3]; | |
261520dc | 383 | int rc; |
7c959e82 | 384 | u64 addr; |
27f67f87 | 385 | u8 ar; |
fa6b7fe9 | 386 | |
8ae04b8f | 387 | addr = kvm_s390_get_base_disp_s(vcpu, &ar); |
db4a29cb HC |
388 | if (addr & 3) |
389 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
261520dc | 390 | |
f092669e | 391 | inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0); |
261520dc DH |
392 | if (!inti) { |
393 | kvm_s390_set_psw_cc(vcpu, 0); | |
394 | return 0; | |
395 | } | |
396 | ||
4799b557 HC |
397 | tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr; |
398 | tpi_data[1] = inti->io.io_int_parm; | |
399 | tpi_data[2] = inti->io.io_int_word; | |
7c959e82 HC |
400 | if (addr) { |
401 | /* | |
402 | * Store the two-word I/O interruption code into the | |
403 | * provided area. | |
404 | */ | |
4799b557 | 405 | len = sizeof(tpi_data) - 4; |
8ae04b8f | 406 | rc = write_guest(vcpu, addr, ar, &tpi_data, len); |
261520dc DH |
407 | if (rc) { |
408 | rc = kvm_s390_inject_prog_cond(vcpu, rc); | |
409 | goto reinject_interrupt; | |
410 | } | |
7c959e82 HC |
411 | } else { |
412 | /* | |
413 | * Store the three-word I/O interruption code into | |
414 | * the appropriate lowcore area. | |
415 | */ | |
4799b557 | 416 | len = sizeof(tpi_data); |
261520dc DH |
417 | if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) { |
418 | /* failed writes to the low core are not recoverable */ | |
4799b557 | 419 | rc = -EFAULT; |
261520dc DH |
420 | goto reinject_interrupt; |
421 | } | |
7c959e82 | 422 | } |
261520dc DH |
423 | |
424 | /* irq was successfully handed to the guest */ | |
425 | kfree(inti); | |
426 | kvm_s390_set_psw_cc(vcpu, 1); | |
427 | return 0; | |
428 | reinject_interrupt: | |
2f32d4ea CH |
429 | /* |
430 | * If we encounter a problem storing the interruption code, the | |
431 | * instruction is suppressed from the guest's view: reinject the | |
432 | * interrupt. | |
433 | */ | |
15462e37 DH |
434 | if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) { |
435 | kfree(inti); | |
436 | rc = -EFAULT; | |
437 | } | |
261520dc | 438 | /* don't set the cc, a pgm irq was injected or we drop to user space */ |
4799b557 | 439 | return rc ? -EFAULT : 0; |
453423dc CB |
440 | } |
441 | ||
fa6b7fe9 CH |
442 | static int handle_tsch(struct kvm_vcpu *vcpu) |
443 | { | |
6d3da241 JF |
444 | struct kvm_s390_interrupt_info *inti = NULL; |
445 | const u64 isc_mask = 0xffUL << 24; /* all iscs set */ | |
fa6b7fe9 | 446 | |
6d3da241 JF |
447 | /* a valid schid has at least one bit set */ |
448 | if (vcpu->run->s.regs.gprs[1]) | |
449 | inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask, | |
450 | vcpu->run->s.regs.gprs[1]); | |
fa6b7fe9 CH |
451 | |
452 | /* | |
453 | * Prepare exit to userspace. | |
454 | * We indicate whether we dequeued a pending I/O interrupt | |
455 | * so that userspace can re-inject it if the instruction gets | |
456 | * a program check. While this may re-order the pending I/O | |
457 | * interrupts, this is no problem since the priority is kept | |
458 | * intact. | |
459 | */ | |
460 | vcpu->run->exit_reason = KVM_EXIT_S390_TSCH; | |
461 | vcpu->run->s390_tsch.dequeued = !!inti; | |
462 | if (inti) { | |
463 | vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id; | |
464 | vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr; | |
465 | vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm; | |
466 | vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word; | |
467 | } | |
468 | vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb; | |
469 | kfree(inti); | |
470 | return -EREMOTE; | |
471 | } | |
472 | ||
473 | static int handle_io_inst(struct kvm_vcpu *vcpu) | |
474 | { | |
475 | VCPU_EVENT(vcpu, 4, "%s", "I/O instruction"); | |
476 | ||
5087dfa6 TH |
477 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
478 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
479 | ||
fa6b7fe9 CH |
480 | if (vcpu->kvm->arch.css_support) { |
481 | /* | |
482 | * Most I/O instructions will be handled by userspace. | |
483 | * Exceptions are tpi and the interrupt portion of tsch. | |
484 | */ | |
485 | if (vcpu->arch.sie_block->ipa == 0xb236) | |
486 | return handle_tpi(vcpu); | |
487 | if (vcpu->arch.sie_block->ipa == 0xb235) | |
488 | return handle_tsch(vcpu); | |
489 | /* Handle in userspace. */ | |
490 | return -EOPNOTSUPP; | |
491 | } else { | |
492 | /* | |
b4a96015 | 493 | * Set condition code 3 to stop the guest from issuing channel |
fa6b7fe9 CH |
494 | * I/O instructions. |
495 | */ | |
ea828ebf | 496 | kvm_s390_set_psw_cc(vcpu, 3); |
fa6b7fe9 CH |
497 | return 0; |
498 | } | |
499 | } | |
500 | ||
453423dc CB |
501 | static int handle_stfl(struct kvm_vcpu *vcpu) |
502 | { | |
453423dc | 503 | int rc; |
9d8d5786 | 504 | unsigned int fac; |
453423dc CB |
505 | |
506 | vcpu->stat.instruction_stfl++; | |
5087dfa6 TH |
507 | |
508 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
509 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
510 | ||
9d8d5786 MM |
511 | /* |
512 | * We need to shift the lower 32 facility bits (bit 0-31) from a u64 | |
513 | * into a u32 memory representation. They will remain bits 0-31. | |
514 | */ | |
c54f0d6a | 515 | fac = *vcpu->kvm->arch.model.fac_list >> 32; |
c667aeac | 516 | rc = write_guest_lc(vcpu, offsetof(struct lowcore, stfl_fac_list), |
9d8d5786 | 517 | &fac, sizeof(fac)); |
dc5008b9 | 518 | if (rc) |
0f9701c6 | 519 | return rc; |
7cbde76b | 520 | VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac); |
9d8d5786 | 521 | trace_kvm_s390_handle_stfl(vcpu, fac); |
453423dc CB |
522 | return 0; |
523 | } | |
524 | ||
48a3e950 CH |
525 | #define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA) |
526 | #define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL | |
d21683ea | 527 | #define PSW_ADDR_24 0x0000000000ffffffUL |
48a3e950 CH |
528 | #define PSW_ADDR_31 0x000000007fffffffUL |
529 | ||
a3fb577e TH |
530 | int is_valid_psw(psw_t *psw) |
531 | { | |
3736b874 HC |
532 | if (psw->mask & PSW_MASK_UNASSIGNED) |
533 | return 0; | |
534 | if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) { | |
535 | if (psw->addr & ~PSW_ADDR_31) | |
536 | return 0; | |
537 | } | |
538 | if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24)) | |
539 | return 0; | |
540 | if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA) | |
541 | return 0; | |
a3fb577e TH |
542 | if (psw->addr & 1) |
543 | return 0; | |
3736b874 HC |
544 | return 1; |
545 | } | |
546 | ||
48a3e950 CH |
547 | int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu) |
548 | { | |
3736b874 | 549 | psw_t *gpsw = &vcpu->arch.sie_block->gpsw; |
48a3e950 | 550 | psw_compat_t new_psw; |
3736b874 | 551 | u64 addr; |
2d8bcaed | 552 | int rc; |
27f67f87 | 553 | u8 ar; |
48a3e950 | 554 | |
3736b874 | 555 | if (gpsw->mask & PSW_MASK_PSTATE) |
208dd756 TH |
556 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
557 | ||
8ae04b8f | 558 | addr = kvm_s390_get_base_disp_s(vcpu, &ar); |
6fd0fcc9 HC |
559 | if (addr & 7) |
560 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
2d8bcaed | 561 | |
8ae04b8f | 562 | rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); |
2d8bcaed HC |
563 | if (rc) |
564 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
6fd0fcc9 HC |
565 | if (!(new_psw.mask & PSW32_MASK_BASE)) |
566 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
3736b874 HC |
567 | gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32; |
568 | gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE; | |
569 | gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE; | |
570 | if (!is_valid_psw(gpsw)) | |
6fd0fcc9 | 571 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
48a3e950 CH |
572 | return 0; |
573 | } | |
574 | ||
575 | static int handle_lpswe(struct kvm_vcpu *vcpu) | |
576 | { | |
48a3e950 | 577 | psw_t new_psw; |
3736b874 | 578 | u64 addr; |
2d8bcaed | 579 | int rc; |
27f67f87 | 580 | u8 ar; |
48a3e950 | 581 | |
5087dfa6 TH |
582 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
583 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
584 | ||
8ae04b8f | 585 | addr = kvm_s390_get_base_disp_s(vcpu, &ar); |
6fd0fcc9 HC |
586 | if (addr & 7) |
587 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
8ae04b8f | 588 | rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); |
2d8bcaed HC |
589 | if (rc) |
590 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
3736b874 HC |
591 | vcpu->arch.sie_block->gpsw = new_psw; |
592 | if (!is_valid_psw(&vcpu->arch.sie_block->gpsw)) | |
6fd0fcc9 | 593 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
48a3e950 CH |
594 | return 0; |
595 | } | |
596 | ||
453423dc CB |
597 | static int handle_stidp(struct kvm_vcpu *vcpu) |
598 | { | |
9bb0ec09 | 599 | u64 stidp_data = vcpu->kvm->arch.model.cpuid; |
453423dc | 600 | u64 operand2; |
7d777d78 | 601 | int rc; |
27f67f87 | 602 | u8 ar; |
453423dc CB |
603 | |
604 | vcpu->stat.instruction_stidp++; | |
b1c571a5 | 605 | |
5087dfa6 TH |
606 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
607 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
608 | ||
8ae04b8f | 609 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc | 610 | |
db4a29cb HC |
611 | if (operand2 & 7) |
612 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
453423dc | 613 | |
8ae04b8f | 614 | rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data)); |
7d777d78 HC |
615 | if (rc) |
616 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
453423dc | 617 | |
7cbde76b | 618 | VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data); |
453423dc CB |
619 | return 0; |
620 | } | |
621 | ||
622 | static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem) | |
623 | { | |
453423dc CB |
624 | int cpus = 0; |
625 | int n; | |
626 | ||
ff520a63 | 627 | cpus = atomic_read(&vcpu->kvm->online_vcpus); |
453423dc CB |
628 | |
629 | /* deal with other level 3 hypervisors */ | |
caf757c6 | 630 | if (stsi(mem, 3, 2, 2)) |
453423dc CB |
631 | mem->count = 0; |
632 | if (mem->count < 8) | |
633 | mem->count++; | |
634 | for (n = mem->count - 1; n > 0 ; n--) | |
635 | memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0])); | |
636 | ||
b75f4c9a | 637 | memset(&mem->vm[0], 0, sizeof(mem->vm[0])); |
453423dc CB |
638 | mem->vm[0].cpus_total = cpus; |
639 | mem->vm[0].cpus_configured = cpus; | |
640 | mem->vm[0].cpus_standby = 0; | |
641 | mem->vm[0].cpus_reserved = 0; | |
642 | mem->vm[0].caf = 1000; | |
643 | memcpy(mem->vm[0].name, "KVMguest", 8); | |
644 | ASCEBC(mem->vm[0].name, 8); | |
645 | memcpy(mem->vm[0].cpi, "KVM/Linux ", 16); | |
646 | ASCEBC(mem->vm[0].cpi, 16); | |
647 | } | |
648 | ||
27f67f87 | 649 | static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, u8 ar, |
e44fc8c9 ET |
650 | u8 fc, u8 sel1, u16 sel2) |
651 | { | |
652 | vcpu->run->exit_reason = KVM_EXIT_S390_STSI; | |
653 | vcpu->run->s390_stsi.addr = addr; | |
654 | vcpu->run->s390_stsi.ar = ar; | |
655 | vcpu->run->s390_stsi.fc = fc; | |
656 | vcpu->run->s390_stsi.sel1 = sel1; | |
657 | vcpu->run->s390_stsi.sel2 = sel2; | |
658 | } | |
659 | ||
453423dc CB |
660 | static int handle_stsi(struct kvm_vcpu *vcpu) |
661 | { | |
5a32c1af CB |
662 | int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28; |
663 | int sel1 = vcpu->run->s.regs.gprs[0] & 0xff; | |
664 | int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff; | |
c51f068c | 665 | unsigned long mem = 0; |
453423dc | 666 | u64 operand2; |
db4a29cb | 667 | int rc = 0; |
27f67f87 | 668 | u8 ar; |
453423dc CB |
669 | |
670 | vcpu->stat.instruction_stsi++; | |
7cbde76b | 671 | VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2); |
453423dc | 672 | |
5087dfa6 TH |
673 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
674 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
675 | ||
87d41fb4 | 676 | if (fc > 3) { |
ea828ebf | 677 | kvm_s390_set_psw_cc(vcpu, 3); |
87d41fb4 TH |
678 | return 0; |
679 | } | |
453423dc | 680 | |
87d41fb4 TH |
681 | if (vcpu->run->s.regs.gprs[0] & 0x0fffff00 |
682 | || vcpu->run->s.regs.gprs[1] & 0xffff0000) | |
453423dc CB |
683 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
684 | ||
87d41fb4 | 685 | if (fc == 0) { |
5a32c1af | 686 | vcpu->run->s.regs.gprs[0] = 3 << 28; |
ea828ebf | 687 | kvm_s390_set_psw_cc(vcpu, 0); |
453423dc | 688 | return 0; |
87d41fb4 TH |
689 | } |
690 | ||
8ae04b8f | 691 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
87d41fb4 TH |
692 | |
693 | if (operand2 & 0xfff) | |
694 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
695 | ||
696 | switch (fc) { | |
453423dc CB |
697 | case 1: /* same handling for 1 and 2 */ |
698 | case 2: | |
699 | mem = get_zeroed_page(GFP_KERNEL); | |
700 | if (!mem) | |
c51f068c | 701 | goto out_no_data; |
caf757c6 | 702 | if (stsi((void *) mem, fc, sel1, sel2)) |
c51f068c | 703 | goto out_no_data; |
453423dc CB |
704 | break; |
705 | case 3: | |
706 | if (sel1 != 2 || sel2 != 2) | |
c51f068c | 707 | goto out_no_data; |
453423dc CB |
708 | mem = get_zeroed_page(GFP_KERNEL); |
709 | if (!mem) | |
c51f068c | 710 | goto out_no_data; |
453423dc CB |
711 | handle_stsi_3_2_2(vcpu, (void *) mem); |
712 | break; | |
453423dc CB |
713 | } |
714 | ||
8ae04b8f | 715 | rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE); |
645c5bc1 HC |
716 | if (rc) { |
717 | rc = kvm_s390_inject_prog_cond(vcpu, rc); | |
718 | goto out; | |
453423dc | 719 | } |
e44fc8c9 ET |
720 | if (vcpu->kvm->arch.user_stsi) { |
721 | insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2); | |
722 | rc = -EREMOTE; | |
723 | } | |
5786fffa | 724 | trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2); |
453423dc | 725 | free_page(mem); |
ea828ebf | 726 | kvm_s390_set_psw_cc(vcpu, 0); |
5a32c1af | 727 | vcpu->run->s.regs.gprs[0] = 0; |
e44fc8c9 | 728 | return rc; |
c51f068c | 729 | out_no_data: |
ea828ebf | 730 | kvm_s390_set_psw_cc(vcpu, 3); |
645c5bc1 | 731 | out: |
c51f068c | 732 | free_page(mem); |
db4a29cb | 733 | return rc; |
453423dc CB |
734 | } |
735 | ||
f379aae5 | 736 | static const intercept_handler_t b2_handlers[256] = { |
453423dc | 737 | [0x02] = handle_stidp, |
6a3f95a6 | 738 | [0x04] = handle_set_clock, |
453423dc CB |
739 | [0x10] = handle_set_prefix, |
740 | [0x11] = handle_store_prefix, | |
741 | [0x12] = handle_store_cpu_address, | |
a3508fbe | 742 | [0x14] = kvm_s390_handle_vsie, |
8a242234 | 743 | [0x21] = handle_ipte_interlock, |
a7e19ab5 DH |
744 | [0x29] = handle_iske, |
745 | [0x2a] = handle_rrbe, | |
746 | [0x2b] = handle_sske, | |
aca84241 | 747 | [0x2c] = handle_test_block, |
f379aae5 CH |
748 | [0x30] = handle_io_inst, |
749 | [0x31] = handle_io_inst, | |
750 | [0x32] = handle_io_inst, | |
751 | [0x33] = handle_io_inst, | |
752 | [0x34] = handle_io_inst, | |
753 | [0x35] = handle_io_inst, | |
754 | [0x36] = handle_io_inst, | |
755 | [0x37] = handle_io_inst, | |
756 | [0x38] = handle_io_inst, | |
757 | [0x39] = handle_io_inst, | |
758 | [0x3a] = handle_io_inst, | |
759 | [0x3b] = handle_io_inst, | |
760 | [0x3c] = handle_io_inst, | |
8a242234 | 761 | [0x50] = handle_ipte_interlock, |
f379aae5 CH |
762 | [0x5f] = handle_io_inst, |
763 | [0x74] = handle_io_inst, | |
764 | [0x76] = handle_io_inst, | |
453423dc CB |
765 | [0x7d] = handle_stsi, |
766 | [0xb1] = handle_stfl, | |
48a3e950 | 767 | [0xb2] = handle_lpswe, |
453423dc CB |
768 | }; |
769 | ||
70455a36 | 770 | int kvm_s390_handle_b2(struct kvm_vcpu *vcpu) |
453423dc CB |
771 | { |
772 | intercept_handler_t handler; | |
773 | ||
70455a36 | 774 | /* |
5087dfa6 TH |
775 | * A lot of B2 instructions are priviledged. Here we check for |
776 | * the privileged ones, that we can handle in the kernel. | |
777 | * Anything else goes to userspace. | |
778 | */ | |
f379aae5 | 779 | handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff]; |
5087dfa6 TH |
780 | if (handler) |
781 | return handler(vcpu); | |
782 | ||
b8e660b8 | 783 | return -EOPNOTSUPP; |
453423dc | 784 | } |
bb25b9ba | 785 | |
48a3e950 CH |
786 | static int handle_epsw(struct kvm_vcpu *vcpu) |
787 | { | |
788 | int reg1, reg2; | |
789 | ||
aeb87c3c | 790 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); |
48a3e950 CH |
791 | |
792 | /* This basically extracts the mask half of the psw. */ | |
843200e7 | 793 | vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL; |
48a3e950 CH |
794 | vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32; |
795 | if (reg2) { | |
843200e7 | 796 | vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL; |
48a3e950 | 797 | vcpu->run->s.regs.gprs[reg2] |= |
843200e7 | 798 | vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL; |
48a3e950 CH |
799 | } |
800 | return 0; | |
801 | } | |
802 | ||
69d0d3a3 CB |
803 | #define PFMF_RESERVED 0xfffc0101UL |
804 | #define PFMF_SK 0x00020000UL | |
805 | #define PFMF_CF 0x00010000UL | |
806 | #define PFMF_UI 0x00008000UL | |
807 | #define PFMF_FSC 0x00007000UL | |
808 | #define PFMF_NQ 0x00000800UL | |
809 | #define PFMF_MR 0x00000400UL | |
810 | #define PFMF_MC 0x00000200UL | |
811 | #define PFMF_KEY 0x000000feUL | |
812 | ||
813 | static int handle_pfmf(struct kvm_vcpu *vcpu) | |
814 | { | |
1824c723 | 815 | bool mr = false, mc = false, nq; |
69d0d3a3 CB |
816 | int reg1, reg2; |
817 | unsigned long start, end; | |
1824c723 | 818 | unsigned char key; |
69d0d3a3 CB |
819 | |
820 | vcpu->stat.instruction_pfmf++; | |
821 | ||
822 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); | |
823 | ||
03c02807 | 824 | if (!test_kvm_facility(vcpu->kvm, 8)) |
69d0d3a3 CB |
825 | return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); |
826 | ||
827 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
208dd756 | 828 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
69d0d3a3 CB |
829 | |
830 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED) | |
831 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
832 | ||
edc5b055 DH |
833 | /* Only provide non-quiescing support if enabled for the guest */ |
834 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && | |
835 | !test_kvm_facility(vcpu->kvm, 14)) | |
69d0d3a3 CB |
836 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
837 | ||
1824c723 DH |
838 | /* Only provide conditional-SSKE support if enabled for the guest */ |
839 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK && | |
840 | test_kvm_facility(vcpu->kvm, 10)) { | |
841 | mr = vcpu->run->s.regs.gprs[reg1] & PFMF_MR; | |
842 | mc = vcpu->run->s.regs.gprs[reg1] & PFMF_MC; | |
843 | } | |
844 | ||
845 | nq = vcpu->run->s.regs.gprs[reg1] & PFMF_NQ; | |
846 | key = vcpu->run->s.regs.gprs[reg1] & PFMF_KEY; | |
69d0d3a3 | 847 | start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; |
a02689fe | 848 | start = kvm_s390_logical_to_effective(vcpu, start); |
fb34c603 | 849 | |
6164a2e9 DH |
850 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) { |
851 | if (kvm_s390_check_low_addr_prot_real(vcpu, start)) | |
852 | return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm); | |
853 | } | |
854 | ||
69d0d3a3 CB |
855 | switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) { |
856 | case 0x00000000: | |
6164a2e9 DH |
857 | /* only 4k frames specify a real address */ |
858 | start = kvm_s390_real_to_abs(vcpu, start); | |
69d0d3a3 CB |
859 | end = (start + (1UL << 12)) & ~((1UL << 12) - 1); |
860 | break; | |
861 | case 0x00001000: | |
862 | end = (start + (1UL << 20)) & ~((1UL << 20) - 1); | |
863 | break; | |
69d0d3a3 | 864 | case 0x00002000: |
53df84f8 GH |
865 | /* only support 2G frame size if EDAT2 is available and we are |
866 | not in 24-bit addressing mode */ | |
867 | if (!test_kvm_facility(vcpu->kvm, 78) || | |
868 | psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_AMODE_24BIT) | |
869 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
69d0d3a3 | 870 | end = (start + (1UL << 31)) & ~((1UL << 31) - 1); |
53df84f8 | 871 | break; |
69d0d3a3 CB |
872 | default: |
873 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
874 | } | |
a02689fe | 875 | |
695be0e7 | 876 | while (start != end) { |
6164a2e9 | 877 | unsigned long useraddr; |
fb34c603 TH |
878 | |
879 | /* Translate guest address to host address */ | |
6164a2e9 | 880 | useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start)); |
fb34c603 | 881 | if (kvm_is_error_hva(useraddr)) |
69d0d3a3 CB |
882 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
883 | ||
884 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) { | |
885 | if (clear_user((void __user *)useraddr, PAGE_SIZE)) | |
886 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
887 | } | |
888 | ||
889 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) { | |
3ac8e380 DD |
890 | int rc = __skey_check_enable(vcpu); |
891 | ||
892 | if (rc) | |
893 | return rc; | |
d3ed1cee | 894 | down_read(¤t->mm->mmap_sem); |
1824c723 DH |
895 | rc = cond_set_guest_storage_key(current->mm, useraddr, |
896 | key, NULL, nq, mr, mc); | |
d3ed1cee | 897 | up_read(¤t->mm->mmap_sem); |
1824c723 | 898 | if (rc < 0) |
69d0d3a3 CB |
899 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
900 | } | |
901 | ||
902 | start += PAGE_SIZE; | |
903 | } | |
2c26d1d2 DH |
904 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) { |
905 | if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_AMODE_64BIT) { | |
906 | vcpu->run->s.regs.gprs[reg2] = end; | |
907 | } else { | |
908 | vcpu->run->s.regs.gprs[reg2] &= ~0xffffffffUL; | |
909 | end = kvm_s390_logical_to_effective(vcpu, end); | |
910 | vcpu->run->s.regs.gprs[reg2] |= end; | |
911 | } | |
912 | } | |
69d0d3a3 CB |
913 | return 0; |
914 | } | |
915 | ||
b31288fa KW |
916 | static int handle_essa(struct kvm_vcpu *vcpu) |
917 | { | |
918 | /* entries expected to be 1FF */ | |
919 | int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3; | |
4a5e7e38 | 920 | unsigned long *cbrlo; |
b31288fa KW |
921 | struct gmap *gmap; |
922 | int i; | |
923 | ||
7cbde76b | 924 | VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries); |
b31288fa KW |
925 | gmap = vcpu->arch.gmap; |
926 | vcpu->stat.instruction_essa++; | |
e6db1d61 | 927 | if (!vcpu->kvm->arch.use_cmma) |
b31288fa KW |
928 | return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); |
929 | ||
930 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
931 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
932 | ||
933 | if (((vcpu->arch.sie_block->ipb & 0xf0000000) >> 28) > 6) | |
934 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
935 | ||
0e8bc06a DH |
936 | /* Retry the ESSA instruction */ |
937 | kvm_s390_retry_instr(vcpu); | |
b31288fa KW |
938 | vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */ |
939 | cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo); | |
940 | down_read(&gmap->mm->mmap_sem); | |
4a5e7e38 DH |
941 | for (i = 0; i < entries; ++i) |
942 | __gmap_zap(gmap, cbrlo[i]); | |
b31288fa | 943 | up_read(&gmap->mm->mmap_sem); |
b31288fa KW |
944 | return 0; |
945 | } | |
946 | ||
48a3e950 | 947 | static const intercept_handler_t b9_handlers[256] = { |
8a242234 | 948 | [0x8a] = handle_ipte_interlock, |
48a3e950 | 949 | [0x8d] = handle_epsw, |
8a242234 HC |
950 | [0x8e] = handle_ipte_interlock, |
951 | [0x8f] = handle_ipte_interlock, | |
b31288fa | 952 | [0xab] = handle_essa, |
69d0d3a3 | 953 | [0xaf] = handle_pfmf, |
48a3e950 CH |
954 | }; |
955 | ||
956 | int kvm_s390_handle_b9(struct kvm_vcpu *vcpu) | |
957 | { | |
958 | intercept_handler_t handler; | |
959 | ||
960 | /* This is handled just as for the B2 instructions. */ | |
961 | handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff]; | |
5087dfa6 TH |
962 | if (handler) |
963 | return handler(vcpu); | |
964 | ||
48a3e950 CH |
965 | return -EOPNOTSUPP; |
966 | } | |
967 | ||
953ed88d TH |
968 | int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu) |
969 | { | |
970 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
971 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
972 | int reg, rc, nr_regs; |
973 | u32 ctl_array[16]; | |
f987a3ee | 974 | u64 ga; |
27f67f87 | 975 | u8 ar; |
953ed88d TH |
976 | |
977 | vcpu->stat.instruction_lctl++; | |
978 | ||
979 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
980 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
981 | ||
8ae04b8f | 982 | ga = kvm_s390_get_base_disp_rs(vcpu, &ar); |
953ed88d | 983 | |
f987a3ee | 984 | if (ga & 3) |
953ed88d TH |
985 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
986 | ||
7cbde76b | 987 | VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
f987a3ee | 988 | trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga); |
953ed88d | 989 | |
fc56eb66 | 990 | nr_regs = ((reg3 - reg1) & 0xf) + 1; |
8ae04b8f | 991 | rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32)); |
fc56eb66 HC |
992 | if (rc) |
993 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
953ed88d | 994 | reg = reg1; |
fc56eb66 | 995 | nr_regs = 0; |
953ed88d | 996 | do { |
953ed88d | 997 | vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul; |
fc56eb66 | 998 | vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++]; |
953ed88d TH |
999 | if (reg == reg3) |
1000 | break; | |
1001 | reg = (reg + 1) % 16; | |
1002 | } while (1); | |
2dca485f | 1003 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
953ed88d TH |
1004 | return 0; |
1005 | } | |
1006 | ||
aba07508 DH |
1007 | int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu) |
1008 | { | |
1009 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
1010 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
1011 | int reg, rc, nr_regs; |
1012 | u32 ctl_array[16]; | |
aba07508 | 1013 | u64 ga; |
27f67f87 | 1014 | u8 ar; |
aba07508 DH |
1015 | |
1016 | vcpu->stat.instruction_stctl++; | |
1017 | ||
1018 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
1019 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
1020 | ||
8ae04b8f | 1021 | ga = kvm_s390_get_base_disp_rs(vcpu, &ar); |
aba07508 DH |
1022 | |
1023 | if (ga & 3) | |
1024 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
1025 | ||
7cbde76b | 1026 | VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
aba07508 DH |
1027 | trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga); |
1028 | ||
1029 | reg = reg1; | |
fc56eb66 | 1030 | nr_regs = 0; |
aba07508 | 1031 | do { |
fc56eb66 | 1032 | ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg]; |
aba07508 DH |
1033 | if (reg == reg3) |
1034 | break; | |
1035 | reg = (reg + 1) % 16; | |
1036 | } while (1); | |
8ae04b8f | 1037 | rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32)); |
fc56eb66 | 1038 | return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0; |
aba07508 DH |
1039 | } |
1040 | ||
953ed88d TH |
1041 | static int handle_lctlg(struct kvm_vcpu *vcpu) |
1042 | { | |
1043 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
1044 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
1045 | int reg, rc, nr_regs; |
1046 | u64 ctl_array[16]; | |
1047 | u64 ga; | |
27f67f87 | 1048 | u8 ar; |
953ed88d TH |
1049 | |
1050 | vcpu->stat.instruction_lctlg++; | |
1051 | ||
1052 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
1053 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
1054 | ||
8ae04b8f | 1055 | ga = kvm_s390_get_base_disp_rsy(vcpu, &ar); |
953ed88d | 1056 | |
f987a3ee | 1057 | if (ga & 7) |
953ed88d TH |
1058 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
1059 | ||
7cbde76b | 1060 | VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
f987a3ee | 1061 | trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga); |
953ed88d | 1062 | |
fc56eb66 | 1063 | nr_regs = ((reg3 - reg1) & 0xf) + 1; |
8ae04b8f | 1064 | rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64)); |
fc56eb66 HC |
1065 | if (rc) |
1066 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
1067 | reg = reg1; | |
1068 | nr_regs = 0; | |
953ed88d | 1069 | do { |
fc56eb66 | 1070 | vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++]; |
953ed88d TH |
1071 | if (reg == reg3) |
1072 | break; | |
1073 | reg = (reg + 1) % 16; | |
1074 | } while (1); | |
2dca485f | 1075 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
953ed88d TH |
1076 | return 0; |
1077 | } | |
1078 | ||
aba07508 DH |
1079 | static int handle_stctg(struct kvm_vcpu *vcpu) |
1080 | { | |
1081 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
1082 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
1083 | int reg, rc, nr_regs; |
1084 | u64 ctl_array[16]; | |
1085 | u64 ga; | |
27f67f87 | 1086 | u8 ar; |
aba07508 DH |
1087 | |
1088 | vcpu->stat.instruction_stctg++; | |
1089 | ||
1090 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
1091 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
1092 | ||
8ae04b8f | 1093 | ga = kvm_s390_get_base_disp_rsy(vcpu, &ar); |
aba07508 DH |
1094 | |
1095 | if (ga & 7) | |
1096 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
1097 | ||
7cbde76b | 1098 | VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
aba07508 DH |
1099 | trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga); |
1100 | ||
fc56eb66 HC |
1101 | reg = reg1; |
1102 | nr_regs = 0; | |
aba07508 | 1103 | do { |
fc56eb66 | 1104 | ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg]; |
aba07508 DH |
1105 | if (reg == reg3) |
1106 | break; | |
1107 | reg = (reg + 1) % 16; | |
1108 | } while (1); | |
8ae04b8f | 1109 | rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64)); |
fc56eb66 | 1110 | return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0; |
aba07508 DH |
1111 | } |
1112 | ||
f379aae5 | 1113 | static const intercept_handler_t eb_handlers[256] = { |
953ed88d | 1114 | [0x2f] = handle_lctlg, |
aba07508 | 1115 | [0x25] = handle_stctg, |
80cd8763 FZ |
1116 | [0x60] = handle_ri, |
1117 | [0x61] = handle_ri, | |
1118 | [0x62] = handle_ri, | |
f379aae5 CH |
1119 | }; |
1120 | ||
953ed88d | 1121 | int kvm_s390_handle_eb(struct kvm_vcpu *vcpu) |
f379aae5 CH |
1122 | { |
1123 | intercept_handler_t handler; | |
1124 | ||
f379aae5 CH |
1125 | handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff]; |
1126 | if (handler) | |
1127 | return handler(vcpu); | |
1128 | return -EOPNOTSUPP; | |
1129 | } | |
1130 | ||
bb25b9ba CB |
1131 | static int handle_tprot(struct kvm_vcpu *vcpu) |
1132 | { | |
b1c571a5 | 1133 | u64 address1, address2; |
a0465f9a TH |
1134 | unsigned long hva, gpa; |
1135 | int ret = 0, cc = 0; | |
1136 | bool writable; | |
27f67f87 | 1137 | u8 ar; |
bb25b9ba CB |
1138 | |
1139 | vcpu->stat.instruction_tprot++; | |
1140 | ||
f9f6bbc6 TH |
1141 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
1142 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
1143 | ||
8ae04b8f | 1144 | kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL); |
b1c571a5 | 1145 | |
bb25b9ba CB |
1146 | /* we only handle the Linux memory detection case: |
1147 | * access key == 0 | |
bb25b9ba CB |
1148 | * everything else goes to userspace. */ |
1149 | if (address2 & 0xf0) | |
1150 | return -EOPNOTSUPP; | |
1151 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT) | |
a0465f9a | 1152 | ipte_lock(vcpu); |
92c96321 | 1153 | ret = guest_translate_address(vcpu, address1, ar, &gpa, GACC_STORE); |
a0465f9a TH |
1154 | if (ret == PGM_PROTECTION) { |
1155 | /* Write protected? Try again with read-only... */ | |
1156 | cc = 1; | |
92c96321 DH |
1157 | ret = guest_translate_address(vcpu, address1, ar, &gpa, |
1158 | GACC_FETCH); | |
a0465f9a TH |
1159 | } |
1160 | if (ret) { | |
1161 | if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) { | |
1162 | ret = kvm_s390_inject_program_int(vcpu, ret); | |
1163 | } else if (ret > 0) { | |
1164 | /* Translation not available */ | |
1165 | kvm_s390_set_psw_cc(vcpu, 3); | |
1166 | ret = 0; | |
1167 | } | |
1168 | goto out_unlock; | |
1169 | } | |
59a1fa2d | 1170 | |
a0465f9a TH |
1171 | hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable); |
1172 | if (kvm_is_error_hva(hva)) { | |
1173 | ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
1174 | } else { | |
1175 | if (!writable) | |
1176 | cc = 1; /* Write not permitted ==> read-only */ | |
1177 | kvm_s390_set_psw_cc(vcpu, cc); | |
1178 | /* Note: CC2 only occurs for storage keys (not supported yet) */ | |
1179 | } | |
1180 | out_unlock: | |
1181 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT) | |
1182 | ipte_unlock(vcpu); | |
1183 | return ret; | |
bb25b9ba CB |
1184 | } |
1185 | ||
1186 | int kvm_s390_handle_e5(struct kvm_vcpu *vcpu) | |
1187 | { | |
1188 | /* For e5xx... instructions we only handle TPROT */ | |
1189 | if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01) | |
1190 | return handle_tprot(vcpu); | |
1191 | return -EOPNOTSUPP; | |
1192 | } | |
1193 | ||
8c3f61e2 CH |
1194 | static int handle_sckpf(struct kvm_vcpu *vcpu) |
1195 | { | |
1196 | u32 value; | |
1197 | ||
1198 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
208dd756 | 1199 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
8c3f61e2 CH |
1200 | |
1201 | if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000) | |
1202 | return kvm_s390_inject_program_int(vcpu, | |
1203 | PGM_SPECIFICATION); | |
1204 | ||
1205 | value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff; | |
1206 | vcpu->arch.sie_block->todpr = value; | |
1207 | ||
1208 | return 0; | |
1209 | } | |
1210 | ||
9acc317b DH |
1211 | static int handle_ptff(struct kvm_vcpu *vcpu) |
1212 | { | |
1213 | /* we don't emulate any control instructions yet */ | |
1214 | kvm_s390_set_psw_cc(vcpu, 3); | |
1215 | return 0; | |
1216 | } | |
1217 | ||
77975357 | 1218 | static const intercept_handler_t x01_handlers[256] = { |
9acc317b | 1219 | [0x04] = handle_ptff, |
8c3f61e2 CH |
1220 | [0x07] = handle_sckpf, |
1221 | }; | |
1222 | ||
1223 | int kvm_s390_handle_01(struct kvm_vcpu *vcpu) | |
1224 | { | |
1225 | intercept_handler_t handler; | |
1226 | ||
1227 | handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff]; | |
1228 | if (handler) | |
1229 | return handler(vcpu); | |
1230 | return -EOPNOTSUPP; | |
1231 | } |