]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - arch/s390/kvm/priv.c
projects / mirror_ubuntu-jammy-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge back PM core material for v4.16.
[mirror_ubuntu-jammy-kernel.git] / arch / s390 / kvm / priv.c
CommitLineData
d809aa23 1// SPDX-License-Identifier: GPL-2.0
453423dc 2/*
a53c8fab 3 * handling privileged instructions
453423dc 4 *
69d0d3a3 5 * Copyright IBM Corp. 2008, 2013
453423dc 6 *
453423dc
CB		 7 * Author(s): Carsten Otte <cotte@de.ibm.com>
8 * Christian Borntraeger <borntraeger@de.ibm.com>
9 */
10
11#include <linux/kvm.h>
5a0e3ad6 12#include <linux/gfp.h>
453423dc 13#include <linux/errno.h>
b13b5dc7 14#include <linux/compat.h>
589ee628
IM		 15#include <linux/mm_types.h>
16
7c959e82 17#include <asm/asm-offsets.h>
e769ece3 18#include <asm/facility.h>
453423dc
CB		 19#include <asm/current.h>
20#include <asm/debug.h>
21#include <asm/ebcdic.h>
22#include <asm/sysinfo.h>
69d0d3a3 23#include <asm/pgtable.h>
190df4a2 24#include <asm/page-states.h>
69d0d3a3 25#include <asm/pgalloc.h>
1e133ab2 26#include <asm/gmap.h>
69d0d3a3 27#include <asm/io.h>
48a3e950
CH		 28#include <asm/ptrace.h>
29#include <asm/compat.h>
a7e19ab5 30#include <asm/sclp.h>
453423dc
CB		 31#include "gaccess.h"
32#include "kvm-s390.h"
5786fffa 33#include "trace.h"
453423dc 34
80cd8763
FZ		 35static int handle_ri(struct kvm_vcpu *vcpu)
36{
37 if (test_kvm_facility(vcpu->kvm, 64)) {
4d5f2c04 38 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: RI (lazy)");
0c9d8683 39 vcpu->arch.sie_block->ecb3 |= ECB3_RI;
80cd8763
FZ		 40 kvm_s390_retry_instr(vcpu);
41 return 0;
42 } else
43 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
44}
45
46int kvm_s390_handle_aa(struct kvm_vcpu *vcpu)
47{
48 if ((vcpu->arch.sie_block->ipa & 0xf) <= 4)
49 return handle_ri(vcpu);
50 else
51 return -EOPNOTSUPP;
52}
53
4e0b1ab7
FZ		 54static int handle_gs(struct kvm_vcpu *vcpu)
55{
56 if (test_kvm_facility(vcpu->kvm, 133)) {
57 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: GS (lazy)");
58 preempt_disable();
59 __ctl_set_bit(2, 4);
60 current->thread.gs_cb = (struct gs_cb *)&vcpu->run->s.regs.gscb;
61 restore_gs_cb(current->thread.gs_cb);
62 preempt_enable();
63 vcpu->arch.sie_block->ecb |= ECB_GS;
64 vcpu->arch.sie_block->ecd |= ECD_HOSTREGMGMT;
65 vcpu->arch.gs_enabled = 1;
66 kvm_s390_retry_instr(vcpu);
67 return 0;
68 } else
69 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
70}
71
72int kvm_s390_handle_e3(struct kvm_vcpu *vcpu)
73{
74 int code = vcpu->arch.sie_block->ipb & 0xff;
75
76 if (code == 0x49 || code == 0x4d)
77 return handle_gs(vcpu);
78 else
79 return -EOPNOTSUPP;
80}
6a3f95a6
TH		 81/* Handle SCK (SET CLOCK) interception */
82static int handle_set_clock(struct kvm_vcpu *vcpu)
83{
25ed1675 84 int rc;
27f67f87 85 u8 ar;
25ed1675 86 u64 op2, val;
6a3f95a6
TH		 87
88 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
89 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
90
8ae04b8f 91 op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
6a3f95a6
TH		 92 if (op2 & 7) /* Operand must be on a doubleword boundary */
93 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
8ae04b8f 94 rc = read_guest(vcpu, op2, ar, &val, sizeof(val));
0e7a3f94
HC		 95 if (rc)
96 return kvm_s390_inject_prog_cond(vcpu, rc);
6a3f95a6 97
7cbde76b 98 VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", val);
25ed1675 99 kvm_s390_set_tod_clock(vcpu->kvm, val);
6a3f95a6
TH		 100
101 kvm_s390_set_psw_cc(vcpu, 0);
102 return 0;
103}
104
453423dc
CB		 105static int handle_set_prefix(struct kvm_vcpu *vcpu)
106{
453423dc 107 u64 operand2;
665170cb
HC		 108 u32 address;
109 int rc;
27f67f87 110 u8 ar;
453423dc
CB		 111
112 vcpu->stat.instruction_spx++;
113
5087dfa6
TH		 114 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
115 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
116
8ae04b8f 117 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB		 118
119 /* must be word boundary */
db4a29cb
HC		 120 if (operand2 & 3)
121 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc
CB		 122
123 /* get the value */
8ae04b8f 124 rc = read_guest(vcpu, operand2, ar, &address, sizeof(address));
665170cb
HC		 125 if (rc)
126 return kvm_s390_inject_prog_cond(vcpu, rc);
127
128 address &= 0x7fffe000u;
129
130 /*
131 * Make sure the new value is valid memory. We only need to check the
132 * first page, since address is 8k aligned and memory pieces are always
133 * at least 1MB aligned and have at least a size of 1MB.
134 */
135 if (kvm_is_error_gpa(vcpu->kvm, address))
db4a29cb 136 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
453423dc 137
8d26cf7b 138 kvm_s390_set_prefix(vcpu, address);
5786fffa 139 trace_kvm_s390_handle_prefix(vcpu, 1, address);
453423dc
CB		 140 return 0;
141}
142
143static int handle_store_prefix(struct kvm_vcpu *vcpu)
144{
453423dc
CB		 145 u64 operand2;
146 u32 address;
f748f4a7 147 int rc;
27f67f87 148 u8 ar;
453423dc
CB		 149
150 vcpu->stat.instruction_stpx++;
b1c571a5 151
5087dfa6
TH		 152 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
153 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
154
8ae04b8f 155 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB		 156
157 /* must be word boundary */
db4a29cb
HC		 158 if (operand2 & 3)
159 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 160
fda902cb 161 address = kvm_s390_get_prefix(vcpu);
453423dc
CB		 162
163 /* get the value */
8ae04b8f 164 rc = write_guest(vcpu, operand2, ar, &address, sizeof(address));
f748f4a7
HC		 165 if (rc)
166 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 167
7cbde76b 168 VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2);
5786fffa 169 trace_kvm_s390_handle_prefix(vcpu, 0, address);
453423dc
CB		 170 return 0;
171}
172
173static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
174{
8b96de0e
HC		 175 u16 vcpu_id = vcpu->vcpu_id;
176 u64 ga;
177 int rc;
27f67f87 178 u8 ar;
453423dc
CB		 179
180 vcpu->stat.instruction_stap++;
b1c571a5 181
5087dfa6
TH		 182 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
183 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
184
8ae04b8f 185 ga = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 186
8b96de0e 187 if (ga & 1)
db4a29cb 188 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 189
8ae04b8f 190 rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id));
8b96de0e
HC		 191 if (rc)
192 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 193
7cbde76b 194 VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga);
8b96de0e 195 trace_kvm_s390_handle_stap(vcpu, ga);
453423dc
CB		 196 return 0;
197}
198
730cd632 199int kvm_s390_skey_check_enable(struct kvm_vcpu *vcpu)
693ffc08 200{
3ac8e380 201 int rc = 0;
730cd632 202 struct kvm_s390_sie_block *sie_block = vcpu->arch.sie_block;
11ddcd41
DH		 203
204 trace_kvm_s390_skey_related_inst(vcpu);
730cd632
FA		 205 if (!(sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE)) &&
206 !(atomic_read(&sie_block->cpuflags) & CPUSTAT_KSS))
3ac8e380 207 return rc;
693ffc08 208
3ac8e380 209 rc = s390_enable_skey();
11ddcd41 210 VCPU_EVENT(vcpu, 3, "enabling storage keys for guest: %d", rc);
730cd632
FA		 211 if (!rc) {
212 if (atomic_read(&sie_block->cpuflags) & CPUSTAT_KSS)
213 atomic_andnot(CPUSTAT_KSS, &sie_block->cpuflags);
214 else
215 sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE |
216 ICTL_RRBE);
217 }
3ac8e380 218 return rc;
693ffc08
DD		 219}
220
a7e19ab5 221static int try_handle_skey(struct kvm_vcpu *vcpu)
453423dc 222{
11ddcd41 223 int rc;
693ffc08 224
11ddcd41 225 vcpu->stat.instruction_storage_key++;
730cd632 226 rc = kvm_s390_skey_check_enable(vcpu);
3ac8e380
DD		 227 if (rc)
228 return rc;
a7e19ab5
DH		 229 if (sclp.has_skey) {
230 /* with storage-key facility, SIE interprets it for us */
231 kvm_s390_retry_instr(vcpu);
232 VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
233 return -EAGAIN;
234 }
a7e19ab5
DH		 235 return 0;
236}
5087dfa6 237
a7e19ab5
DH		 238static int handle_iske(struct kvm_vcpu *vcpu)
239{
240 unsigned long addr;
241 unsigned char key;
242 int reg1, reg2;
243 int rc;
244
ca76ec9c
JF		 245 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
246 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
247
a7e19ab5
DH		 248 rc = try_handle_skey(vcpu);
249 if (rc)
250 return rc != -EAGAIN ? rc : 0;
251
252 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
253
254 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
255 addr = kvm_s390_logical_to_effective(vcpu, addr);
256 addr = kvm_s390_real_to_abs(vcpu, addr);
257 addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr));
258 if (kvm_is_error_hva(addr))
259 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
260
261 down_read(&current->mm->mmap_sem);
262 rc = get_guest_storage_key(current->mm, addr, &key);
263 up_read(&current->mm->mmap_sem);
264 if (rc)
265 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
266 vcpu->run->s.regs.gprs[reg1] &= ~0xff;
267 vcpu->run->s.regs.gprs[reg1] |= key;
268 return 0;
269}
270
271static int handle_rrbe(struct kvm_vcpu *vcpu)
272{
273 unsigned long addr;
274 int reg1, reg2;
275 int rc;
276
ca76ec9c
JF		 277 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
278 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
279
a7e19ab5
DH		 280 rc = try_handle_skey(vcpu);
281 if (rc)
282 return rc != -EAGAIN ? rc : 0;
283
284 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
285
286 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
287 addr = kvm_s390_logical_to_effective(vcpu, addr);
288 addr = kvm_s390_real_to_abs(vcpu, addr);
289 addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr));
290 if (kvm_is_error_hva(addr))
291 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
292
293 down_read(&current->mm->mmap_sem);
294 rc = reset_guest_reference_bit(current->mm, addr);
295 up_read(&current->mm->mmap_sem);
296 if (rc < 0)
297 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
298
299 kvm_s390_set_psw_cc(vcpu, rc);
300 return 0;
301}
302
303#define SSKE_NQ 0x8
304#define SSKE_MR 0x4
305#define SSKE_MC 0x2
306#define SSKE_MB 0x1
307static int handle_sske(struct kvm_vcpu *vcpu)
308{
309 unsigned char m3 = vcpu->arch.sie_block->ipb >> 28;
310 unsigned long start, end;
311 unsigned char key, oldkey;
312 int reg1, reg2;
313 int rc;
314
ca76ec9c
JF		 315 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
316 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
317
a7e19ab5
DH		 318 rc = try_handle_skey(vcpu);
319 if (rc)
320 return rc != -EAGAIN ? rc : 0;
321
322 if (!test_kvm_facility(vcpu->kvm, 8))
323 m3 &= ~SSKE_MB;
324 if (!test_kvm_facility(vcpu->kvm, 10))
325 m3 &= ~(SSKE_MC | SSKE_MR);
326 if (!test_kvm_facility(vcpu->kvm, 14))
327 m3 &= ~SSKE_NQ;
328
329 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
330
331 key = vcpu->run->s.regs.gprs[reg1] & 0xfe;
332 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
333 start = kvm_s390_logical_to_effective(vcpu, start);
334 if (m3 & SSKE_MB) {
335 /* start already designates an absolute address */
58cdf5eb 336 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
a7e19ab5
DH		 337 } else {
338 start = kvm_s390_real_to_abs(vcpu, start);
339 end = start + PAGE_SIZE;
340 }
341
342 while (start != end) {
343 unsigned long addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));
344
345 if (kvm_is_error_hva(addr))
346 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
347
348 down_read(&current->mm->mmap_sem);
349 rc = cond_set_guest_storage_key(current->mm, addr, key, &oldkey,
350 m3 & SSKE_NQ, m3 & SSKE_MR,
351 m3 & SSKE_MC);
352 up_read(&current->mm->mmap_sem);
353 if (rc < 0)
354 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
355 start += PAGE_SIZE;
0b925159 356 }
a7e19ab5
DH		 357
358 if (m3 & (SSKE_MC | SSKE_MR)) {
359 if (m3 & SSKE_MB) {
360 /* skey in reg1 is unpredictable */
361 kvm_s390_set_psw_cc(vcpu, 3);
362 } else {
363 kvm_s390_set_psw_cc(vcpu, rc);
364 vcpu->run->s.regs.gprs[reg1] &= ~0xff00UL;
365 vcpu->run->s.regs.gprs[reg1] |= (u64) oldkey << 8;
366 }
367 }
368 if (m3 & SSKE_MB) {
8bb3fdd6 369 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT)
a7e19ab5
DH		 370 vcpu->run->s.regs.gprs[reg2] &= ~PAGE_MASK;
371 else
372 vcpu->run->s.regs.gprs[reg2] &= ~0xfffff000UL;
373 end = kvm_s390_logical_to_effective(vcpu, end);
374 vcpu->run->s.regs.gprs[reg2] |= end;
375 }
453423dc
CB		 376 return 0;
377}
378
8a242234
HC		 379static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
380{
8a242234 381 vcpu->stat.instruction_ipte_interlock++;
a7525982 382 if (psw_bits(vcpu->arch.sie_block->gpsw).pstate)
8a242234
HC		 383 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
384 wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
0e8bc06a 385 kvm_s390_retry_instr(vcpu);
8a242234
HC		 386 VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
387 return 0;
388}
389
aca84241
TH		 390static int handle_test_block(struct kvm_vcpu *vcpu)
391{
aca84241
TH		 392 gpa_t addr;
393 int reg2;
394
395 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
396 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
397
398 kvm_s390_get_regs_rre(vcpu, NULL, &reg2);
399 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
e45efa28 400 addr = kvm_s390_logical_to_effective(vcpu, addr);
dd9e5b7b 401 if (kvm_s390_check_low_addr_prot_real(vcpu, addr))
e45efa28 402 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
aca84241
TH		 403 addr = kvm_s390_real_to_abs(vcpu, addr);
404
ef23e779 405 if (kvm_is_error_gpa(vcpu->kvm, addr))
aca84241
TH		 406 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
407 /*
408 * We don't expect errors on modern systems, and do not care
409 * about storage keys (yet), so let's just clear the page.
410 */
ef23e779 411 if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
aca84241
TH		 412 return -EFAULT;
413 kvm_s390_set_psw_cc(vcpu, 0);
414 vcpu->run->s.regs.gprs[0] = 0;
415 return 0;
416}
417
fa6b7fe9 418static int handle_tpi(struct kvm_vcpu *vcpu)
453423dc 419{
fa6b7fe9 420 struct kvm_s390_interrupt_info *inti;
4799b557
HC		 421 unsigned long len;
422 u32 tpi_data[3];
261520dc 423 int rc;
7c959e82 424 u64 addr;
27f67f87 425 u8 ar;
fa6b7fe9 426
8ae04b8f 427 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
db4a29cb
HC		 428 if (addr & 3)
429 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
261520dc 430
f092669e 431 inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
261520dc
DH		 432 if (!inti) {
433 kvm_s390_set_psw_cc(vcpu, 0);
434 return 0;
435 }
436
4799b557
HC		 437 tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
438 tpi_data[1] = inti->io.io_int_parm;
439 tpi_data[2] = inti->io.io_int_word;
7c959e82
HC		 440 if (addr) {
441 /*
442 * Store the two-word I/O interruption code into the
443 * provided area.
444 */
4799b557 445 len = sizeof(tpi_data) - 4;
8ae04b8f 446 rc = write_guest(vcpu, addr, ar, &tpi_data, len);
261520dc
DH		 447 if (rc) {
448 rc = kvm_s390_inject_prog_cond(vcpu, rc);
449 goto reinject_interrupt;
450 }
7c959e82
HC		 451 } else {
452 /*
453 * Store the three-word I/O interruption code into
454 * the appropriate lowcore area.
455 */
4799b557 456 len = sizeof(tpi_data);
261520dc
DH		 457 if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) {
458 /* failed writes to the low core are not recoverable */
4799b557 459 rc = -EFAULT;
261520dc
DH		 460 goto reinject_interrupt;
461 }
7c959e82 462 }
261520dc
DH		 463
464 /* irq was successfully handed to the guest */
465 kfree(inti);
466 kvm_s390_set_psw_cc(vcpu, 1);
467 return 0;
468reinject_interrupt:
2f32d4ea
CH		 469 /*
470 * If we encounter a problem storing the interruption code, the
471 * instruction is suppressed from the guest's view: reinject the
472 * interrupt.
473 */
15462e37
DH		 474 if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) {
475 kfree(inti);
476 rc = -EFAULT;
477 }
261520dc 478 /* don't set the cc, a pgm irq was injected or we drop to user space */
4799b557 479 return rc ? -EFAULT : 0;
453423dc
CB		 480}
481
fa6b7fe9
CH		 482static int handle_tsch(struct kvm_vcpu *vcpu)
483{
6d3da241
JF		 484 struct kvm_s390_interrupt_info *inti = NULL;
485 const u64 isc_mask = 0xffUL << 24; /* all iscs set */
fa6b7fe9 486
6d3da241
JF		 487 /* a valid schid has at least one bit set */
488 if (vcpu->run->s.regs.gprs[1])
489 inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask,
490 vcpu->run->s.regs.gprs[1]);
fa6b7fe9
CH		 491
492 /*
493 * Prepare exit to userspace.
494 * We indicate whether we dequeued a pending I/O interrupt
495 * so that userspace can re-inject it if the instruction gets
496 * a program check. While this may re-order the pending I/O
497 * interrupts, this is no problem since the priority is kept
498 * intact.
499 */
500 vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
501 vcpu->run->s390_tsch.dequeued = !!inti;
502 if (inti) {
503 vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
504 vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
505 vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
506 vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
507 }
508 vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
509 kfree(inti);
510 return -EREMOTE;
511}
512
513static int handle_io_inst(struct kvm_vcpu *vcpu)
514{
515 VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
516
5087dfa6
TH		 517 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
518 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
519
fa6b7fe9
CH		 520 if (vcpu->kvm->arch.css_support) {
521 /*
522 * Most I/O instructions will be handled by userspace.
523 * Exceptions are tpi and the interrupt portion of tsch.
524 */
525 if (vcpu->arch.sie_block->ipa == 0xb236)
526 return handle_tpi(vcpu);
527 if (vcpu->arch.sie_block->ipa == 0xb235)
528 return handle_tsch(vcpu);
529 /* Handle in userspace. */
530 return -EOPNOTSUPP;
531 } else {
532 /*
b4a96015 533 * Set condition code 3 to stop the guest from issuing channel
fa6b7fe9
CH		 534 * I/O instructions.
535 */
ea828ebf 536 kvm_s390_set_psw_cc(vcpu, 3);
fa6b7fe9
CH		 537 return 0;
538 }
539}
540
453423dc
CB		 541static int handle_stfl(struct kvm_vcpu *vcpu)
542{
453423dc 543 int rc;
9d8d5786 544 unsigned int fac;
453423dc
CB		 545
546 vcpu->stat.instruction_stfl++;
5087dfa6
TH		 547
548 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
549 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
550
9d8d5786
MM		 551 /*
552 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
553 * into a u32 memory representation. They will remain bits 0-31.
554 */
c54f0d6a 555 fac = *vcpu->kvm->arch.model.fac_list >> 32;
c667aeac 556 rc = write_guest_lc(vcpu, offsetof(struct lowcore, stfl_fac_list),
9d8d5786 557 &fac, sizeof(fac));
dc5008b9 558 if (rc)
0f9701c6 559 return rc;
7cbde76b 560 VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac);
9d8d5786 561 trace_kvm_s390_handle_stfl(vcpu, fac);
453423dc
CB		 562 return 0;
563}
564
48a3e950
CH		 565#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
566#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
d21683ea 567#define PSW_ADDR_24 0x0000000000ffffffUL
48a3e950
CH		 568#define PSW_ADDR_31 0x000000007fffffffUL
569
a3fb577e
TH		 570int is_valid_psw(psw_t *psw)
571{
3736b874
HC		 572 if (psw->mask & PSW_MASK_UNASSIGNED)
573 return 0;
574 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
575 if (psw->addr & ~PSW_ADDR_31)
576 return 0;
577 }
578 if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
579 return 0;
580 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
581 return 0;
a3fb577e
TH		 582 if (psw->addr & 1)
583 return 0;
3736b874
HC		 584 return 1;
585}
586
48a3e950
CH		 587int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
588{
3736b874 589 psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
48a3e950 590 psw_compat_t new_psw;
3736b874 591 u64 addr;
2d8bcaed 592 int rc;
27f67f87 593 u8 ar;
48a3e950 594
3736b874 595 if (gpsw->mask & PSW_MASK_PSTATE)
208dd756
TH		 596 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
597
8ae04b8f 598 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC		 599 if (addr & 7)
600 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
2d8bcaed 601
8ae04b8f 602 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC		 603 if (rc)
604 return kvm_s390_inject_prog_cond(vcpu, rc);
6fd0fcc9
HC		 605 if (!(new_psw.mask & PSW32_MASK_BASE))
606 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
3736b874
HC		 607 gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
608 gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
609 gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
610 if (!is_valid_psw(gpsw))
6fd0fcc9 611 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH		 612 return 0;
613}
614
615static int handle_lpswe(struct kvm_vcpu *vcpu)
616{
48a3e950 617 psw_t new_psw;
3736b874 618 u64 addr;
2d8bcaed 619 int rc;
27f67f87 620 u8 ar;
48a3e950 621
5087dfa6
TH		 622 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
623 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
624
8ae04b8f 625 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC		 626 if (addr & 7)
627 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
8ae04b8f 628 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC		 629 if (rc)
630 return kvm_s390_inject_prog_cond(vcpu, rc);
3736b874
HC		 631 vcpu->arch.sie_block->gpsw = new_psw;
632 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
6fd0fcc9 633 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH		 634 return 0;
635}
636
453423dc
CB		 637static int handle_stidp(struct kvm_vcpu *vcpu)
638{
9bb0ec09 639 u64 stidp_data = vcpu->kvm->arch.model.cpuid;
453423dc 640 u64 operand2;
7d777d78 641 int rc;
27f67f87 642 u8 ar;
453423dc
CB		 643
644 vcpu->stat.instruction_stidp++;
b1c571a5 645
5087dfa6
TH		 646 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
647 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
648
8ae04b8f 649 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 650
db4a29cb
HC		 651 if (operand2 & 7)
652 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 653
8ae04b8f 654 rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data));
7d777d78
HC		 655 if (rc)
656 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 657
7cbde76b 658 VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data);
453423dc
CB		 659 return 0;
660}
661
662static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
663{
453423dc
CB		 664 int cpus = 0;
665 int n;
666
ff520a63 667 cpus = atomic_read(&vcpu->kvm->online_vcpus);
453423dc
CB		 668
669 /* deal with other level 3 hypervisors */
caf757c6 670 if (stsi(mem, 3, 2, 2))
453423dc
CB		 671 mem->count = 0;
672 if (mem->count < 8)
673 mem->count++;
674 for (n = mem->count - 1; n > 0 ; n--)
675 memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
676
b75f4c9a 677 memset(&mem->vm[0], 0, sizeof(mem->vm[0]));
453423dc
CB		 678 mem->vm[0].cpus_total = cpus;
679 mem->vm[0].cpus_configured = cpus;
680 mem->vm[0].cpus_standby = 0;
681 mem->vm[0].cpus_reserved = 0;
682 mem->vm[0].caf = 1000;
683 memcpy(mem->vm[0].name, "KVMguest", 8);
684 ASCEBC(mem->vm[0].name, 8);
685 memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
686 ASCEBC(mem->vm[0].cpi, 16);
687}
688
27f67f87 689static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, u8 ar,
e44fc8c9
ET		 690 u8 fc, u8 sel1, u16 sel2)
691{
692 vcpu->run->exit_reason = KVM_EXIT_S390_STSI;
693 vcpu->run->s390_stsi.addr = addr;
694 vcpu->run->s390_stsi.ar = ar;
695 vcpu->run->s390_stsi.fc = fc;
696 vcpu->run->s390_stsi.sel1 = sel1;
697 vcpu->run->s390_stsi.sel2 = sel2;
698}
699
453423dc
CB		 700static int handle_stsi(struct kvm_vcpu *vcpu)
701{
5a32c1af
CB		 702 int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
703 int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
704 int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
c51f068c 705 unsigned long mem = 0;
453423dc 706 u64 operand2;
db4a29cb 707 int rc = 0;
27f67f87 708 u8 ar;
453423dc
CB		 709
710 vcpu->stat.instruction_stsi++;
7cbde76b 711 VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2);
453423dc 712
5087dfa6
TH		 713 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
714 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
715
87d41fb4 716 if (fc > 3) {
ea828ebf 717 kvm_s390_set_psw_cc(vcpu, 3);
87d41fb4
TH		 718 return 0;
719 }
453423dc 720
87d41fb4
TH		 721 if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
722 || vcpu->run->s.regs.gprs[1] & 0xffff0000)
453423dc
CB		 723 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
724
87d41fb4 725 if (fc == 0) {
5a32c1af 726 vcpu->run->s.regs.gprs[0] = 3 << 28;
ea828ebf 727 kvm_s390_set_psw_cc(vcpu, 0);
453423dc 728 return 0;
87d41fb4
TH		 729 }
730
8ae04b8f 731 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
87d41fb4
TH		 732
733 if (operand2 & 0xfff)
734 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
735
736 switch (fc) {
453423dc
CB		 737 case 1: /* same handling for 1 and 2 */
738 case 2:
739 mem = get_zeroed_page(GFP_KERNEL);
740 if (!mem)
c51f068c 741 goto out_no_data;
caf757c6 742 if (stsi((void *) mem, fc, sel1, sel2))
c51f068c 743 goto out_no_data;
453423dc
CB		 744 break;
745 case 3:
746 if (sel1 != 2 || sel2 != 2)
c51f068c 747 goto out_no_data;
453423dc
CB		 748 mem = get_zeroed_page(GFP_KERNEL);
749 if (!mem)
c51f068c 750 goto out_no_data;
453423dc
CB		 751 handle_stsi_3_2_2(vcpu, (void *) mem);
752 break;
453423dc
CB		 753 }
754
8ae04b8f 755 rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE);
645c5bc1
HC		 756 if (rc) {
757 rc = kvm_s390_inject_prog_cond(vcpu, rc);
758 goto out;
453423dc 759 }
e44fc8c9
ET		 760 if (vcpu->kvm->arch.user_stsi) {
761 insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2);
762 rc = -EREMOTE;
763 }
5786fffa 764 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
453423dc 765 free_page(mem);
ea828ebf 766 kvm_s390_set_psw_cc(vcpu, 0);
5a32c1af 767 vcpu->run->s.regs.gprs[0] = 0;
e44fc8c9 768 return rc;
c51f068c 769out_no_data:
ea828ebf 770 kvm_s390_set_psw_cc(vcpu, 3);
645c5bc1 771out:
c51f068c 772 free_page(mem);
db4a29cb 773 return rc;
453423dc
CB		 774}
775
f379aae5 776static const intercept_handler_t b2_handlers[256] = {
453423dc 777 [0x02] = handle_stidp,
6a3f95a6 778 [0x04] = handle_set_clock,
453423dc
CB		 779 [0x10] = handle_set_prefix,
780 [0x11] = handle_store_prefix,
781 [0x12] = handle_store_cpu_address,
a3508fbe 782 [0x14] = kvm_s390_handle_vsie,
8a242234 783 [0x21] = handle_ipte_interlock,
a7e19ab5
DH		 784 [0x29] = handle_iske,
785 [0x2a] = handle_rrbe,
786 [0x2b] = handle_sske,
aca84241 787 [0x2c] = handle_test_block,
f379aae5
CH		 788 [0x30] = handle_io_inst,
789 [0x31] = handle_io_inst,
790 [0x32] = handle_io_inst,
791 [0x33] = handle_io_inst,
792 [0x34] = handle_io_inst,
793 [0x35] = handle_io_inst,
794 [0x36] = handle_io_inst,
795 [0x37] = handle_io_inst,
796 [0x38] = handle_io_inst,
797 [0x39] = handle_io_inst,
798 [0x3a] = handle_io_inst,
799 [0x3b] = handle_io_inst,
800 [0x3c] = handle_io_inst,
8a242234 801 [0x50] = handle_ipte_interlock,
c0a6bfdc 802 [0x56] = handle_sthyi,
f379aae5
CH		 803 [0x5f] = handle_io_inst,
804 [0x74] = handle_io_inst,
805 [0x76] = handle_io_inst,
453423dc
CB		 806 [0x7d] = handle_stsi,
807 [0xb1] = handle_stfl,
48a3e950 808 [0xb2] = handle_lpswe,
453423dc
CB		 809};
810
70455a36 811int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
453423dc
CB		 812{
813 intercept_handler_t handler;
814
70455a36 815 /*
5087dfa6
TH		 816 * A lot of B2 instructions are priviledged. Here we check for
817 * the privileged ones, that we can handle in the kernel.
818 * Anything else goes to userspace.
819 */
f379aae5 820 handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH		 821 if (handler)
822 return handler(vcpu);
823
b8e660b8 824 return -EOPNOTSUPP;
453423dc 825}
bb25b9ba 826
48a3e950
CH		 827static int handle_epsw(struct kvm_vcpu *vcpu)
828{
829 int reg1, reg2;
830
aeb87c3c 831 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
48a3e950
CH		 832
833 /* This basically extracts the mask half of the psw. */
843200e7 834 vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
48a3e950
CH		 835 vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
836 if (reg2) {
843200e7 837 vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
48a3e950 838 vcpu->run->s.regs.gprs[reg2] |=
843200e7 839 vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
48a3e950
CH		 840 }
841 return 0;
842}
843
69d0d3a3
CB		 844#define PFMF_RESERVED 0xfffc0101UL
845#define PFMF_SK 0x00020000UL
846#define PFMF_CF 0x00010000UL
847#define PFMF_UI 0x00008000UL
848#define PFMF_FSC 0x00007000UL
849#define PFMF_NQ 0x00000800UL
850#define PFMF_MR 0x00000400UL
851#define PFMF_MC 0x00000200UL
852#define PFMF_KEY 0x000000feUL
853
854static int handle_pfmf(struct kvm_vcpu *vcpu)
855{
1824c723 856 bool mr = false, mc = false, nq;
69d0d3a3
CB		 857 int reg1, reg2;
858 unsigned long start, end;
1824c723 859 unsigned char key;
69d0d3a3
CB		 860
861 vcpu->stat.instruction_pfmf++;
862
863 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
864
03c02807 865 if (!test_kvm_facility(vcpu->kvm, 8))
69d0d3a3
CB		 866 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
867
868 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 869 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
69d0d3a3
CB		 870
871 if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
872 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
873
edc5b055
DH		 874 /* Only provide non-quiescing support if enabled for the guest */
875 if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ &&
876 !test_kvm_facility(vcpu->kvm, 14))
69d0d3a3
CB		 877 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
878
1824c723
DH		 879 /* Only provide conditional-SSKE support if enabled for the guest */
880 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK &&
881 test_kvm_facility(vcpu->kvm, 10)) {
882 mr = vcpu->run->s.regs.gprs[reg1] & PFMF_MR;
883 mc = vcpu->run->s.regs.gprs[reg1] & PFMF_MC;
884 }
885
886 nq = vcpu->run->s.regs.gprs[reg1] & PFMF_NQ;
887 key = vcpu->run->s.regs.gprs[reg1] & PFMF_KEY;
69d0d3a3 888 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
a02689fe 889 start = kvm_s390_logical_to_effective(vcpu, start);
fb34c603 890
6164a2e9
DH		 891 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
892 if (kvm_s390_check_low_addr_prot_real(vcpu, start))
893 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
894 }
895
69d0d3a3
CB		 896 switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
897 case 0x00000000:
6164a2e9
DH		 898 /* only 4k frames specify a real address */
899 start = kvm_s390_real_to_abs(vcpu, start);
58cdf5eb 900 end = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1);
69d0d3a3
CB		 901 break;
902 case 0x00001000:
58cdf5eb 903 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
69d0d3a3 904 break;
69d0d3a3 905 case 0x00002000:
53df84f8
GH		 906 /* only support 2G frame size if EDAT2 is available and we are
907 not in 24-bit addressing mode */
908 if (!test_kvm_facility(vcpu->kvm, 78) ||
8bb3fdd6 909 psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_24BIT)
53df84f8 910 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
58cdf5eb 911 end = (start + _REGION3_SIZE) & ~(_REGION3_SIZE - 1);
53df84f8 912 break;
69d0d3a3
CB		 913 default:
914 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
915 }
a02689fe 916
695be0e7 917 while (start != end) {
6164a2e9 918 unsigned long useraddr;
fb34c603
TH		 919
920 /* Translate guest address to host address */
6164a2e9 921 useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));
fb34c603 922 if (kvm_is_error_hva(useraddr))
69d0d3a3
CB		 923 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
924
925 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
926 if (clear_user((void __user *)useraddr, PAGE_SIZE))
927 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
928 }
929
930 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
730cd632 931 int rc = kvm_s390_skey_check_enable(vcpu);
3ac8e380
DD		 932
933 if (rc)
934 return rc;
d3ed1cee 935 down_read(&current->mm->mmap_sem);
1824c723
DH		 936 rc = cond_set_guest_storage_key(current->mm, useraddr,
937 key, NULL, nq, mr, mc);
d3ed1cee 938 up_read(&current->mm->mmap_sem);
1824c723 939 if (rc < 0)
69d0d3a3
CB		 940 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
941 }
942
943 start += PAGE_SIZE;
944 }
2c26d1d2 945 if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
8bb3fdd6 946 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT) {
2c26d1d2
DH		 947 vcpu->run->s.regs.gprs[reg2] = end;
948 } else {
949 vcpu->run->s.regs.gprs[reg2] &= ~0xffffffffUL;
950 end = kvm_s390_logical_to_effective(vcpu, end);
951 vcpu->run->s.regs.gprs[reg2] |= end;
952 }
953 }
69d0d3a3
CB		 954 return 0;
955}
956
190df4a2
CI		 957static inline int do_essa(struct kvm_vcpu *vcpu, const int orc)
958{
959 struct kvm_s390_migration_state *ms = vcpu->kvm->arch.migration_state;
960 int r1, r2, nappended, entries;
961 unsigned long gfn, hva, res, pgstev, ptev;
962 unsigned long *cbrlo;
963
964 /*
965 * We don't need to set SD.FPF.SK to 1 here, because if we have a
966 * machine check here we either handle it or crash
967 */
968
969 kvm_s390_get_regs_rre(vcpu, &r1, &r2);
970 gfn = vcpu->run->s.regs.gprs[r2] >> PAGE_SHIFT;
971 hva = gfn_to_hva(vcpu->kvm, gfn);
972 entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
973
974 if (kvm_is_error_hva(hva))
975 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
976
977 nappended = pgste_perform_essa(vcpu->kvm->mm, hva, orc, &ptev, &pgstev);
978 if (nappended < 0) {
979 res = orc ? 0x10 : 0;
980 vcpu->run->s.regs.gprs[r1] = res; /* Exception Indication */
981 return 0;
982 }
983 res = (pgstev & _PGSTE_GPS_USAGE_MASK) >> 22;
984 /*
985 * Set the block-content state part of the result. 0 means resident, so
986 * nothing to do if the page is valid. 2 is for preserved pages
987 * (non-present and non-zero), and 3 for zero pages (non-present and
988 * zero).
989 */
990 if (ptev & _PAGE_INVALID) {
991 res |= 2;
992 if (pgstev & _PGSTE_GPS_ZERO)
993 res |= 1;
994 }
1bab1c02
CI		 995 if (pgstev & _PGSTE_GPS_NODAT)
996 res |= 0x20;
190df4a2
CI		 997 vcpu->run->s.regs.gprs[r1] = res;
998 /*
999 * It is possible that all the normal 511 slots were full, in which case
1000 * we will now write in the 512th slot, which is reserved for host use.
1001 * In both cases we let the normal essa handling code process all the
1002 * slots, including the reserved one, if needed.
1003 */
1004 if (nappended > 0) {
1005 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo & PAGE_MASK);
1006 cbrlo[entries] = gfn << PAGE_SHIFT;
1007 }
1008
1009 if (orc) {
1010 /* increment only if we are really flipping the bit to 1 */
1011 if (!test_and_set_bit(gfn, ms->pgste_bitmap))
1012 atomic64_inc(&ms->dirty_pages);
1013 }
1014
1015 return nappended;
1016}
1017
b31288fa
KW		 1018static int handle_essa(struct kvm_vcpu *vcpu)
1019{
1020 /* entries expected to be 1FF */
1021 int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
4a5e7e38 1022 unsigned long *cbrlo;
b31288fa 1023 struct gmap *gmap;
190df4a2 1024 int i, orc;
b31288fa 1025
7cbde76b 1026 VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries);
b31288fa
KW		 1027 gmap = vcpu->arch.gmap;
1028 vcpu->stat.instruction_essa++;
e6db1d61 1029 if (!vcpu->kvm->arch.use_cmma)
b31288fa
KW		 1030 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
1031
1032 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1033 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
190df4a2
CI		 1034 /* Check for invalid operation request code */
1035 orc = (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28;
1bab1c02
CI		 1036 /* ORCs 0-6 are always valid */
1037 if (orc > (test_kvm_facility(vcpu->kvm, 147) ? ESSA_SET_STABLE_NODAT
1038 : ESSA_SET_STABLE_IF_RESIDENT))
b31288fa
KW		 1039 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1040
190df4a2
CI		 1041 if (likely(!vcpu->kvm->arch.migration_state)) {
1042 /*
1043 * CMMA is enabled in the KVM settings, but is disabled in
1044 * the SIE block and in the mm_context, and we are not doing
1045 * a migration. Enable CMMA in the mm_context.
1046 * Since we need to take a write lock to write to the context
1047 * to avoid races with storage keys handling, we check if the
1048 * value really needs to be written to; if the value is
1049 * already correct, we do nothing and avoid the lock.
1050 */
1051 if (vcpu->kvm->mm->context.use_cmma == 0) {
1052 down_write(&vcpu->kvm->mm->mmap_sem);
1053 vcpu->kvm->mm->context.use_cmma = 1;
1054 up_write(&vcpu->kvm->mm->mmap_sem);
1055 }
1056 /*
1057 * If we are here, we are supposed to have CMMA enabled in
1058 * the SIE block. Enabling CMMA works on a per-CPU basis,
1059 * while the context use_cmma flag is per process.
1060 * It's possible that the context flag is enabled and the
1061 * SIE flag is not, so we set the flag always; if it was
1062 * already set, nothing changes, otherwise we enable it
1063 * on this CPU too.
1064 */
1065 vcpu->arch.sie_block->ecb2 |= ECB2_CMMA;
1066 /* Retry the ESSA instruction */
1067 kvm_s390_retry_instr(vcpu);
1068 } else {
1069 /* Account for the possible extra cbrl entry */
1070 i = do_essa(vcpu, orc);
1071 if (i < 0)
1072 return i;
1073 entries += i;
1074 }
b31288fa
KW		 1075 vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */
1076 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
1077 down_read(&gmap->mm->mmap_sem);
4a5e7e38
DH		 1078 for (i = 0; i < entries; ++i)
1079 __gmap_zap(gmap, cbrlo[i]);
b31288fa 1080 up_read(&gmap->mm->mmap_sem);
b31288fa
KW		 1081 return 0;
1082}
1083
48a3e950 1084static const intercept_handler_t b9_handlers[256] = {
8a242234 1085 [0x8a] = handle_ipte_interlock,
48a3e950 1086 [0x8d] = handle_epsw,
8a242234
HC		 1087 [0x8e] = handle_ipte_interlock,
1088 [0x8f] = handle_ipte_interlock,
b31288fa 1089 [0xab] = handle_essa,
69d0d3a3 1090 [0xaf] = handle_pfmf,
48a3e950
CH		 1091};
1092
1093int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
1094{
1095 intercept_handler_t handler;
1096
1097 /* This is handled just as for the B2 instructions. */
1098 handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH		 1099 if (handler)
1100 return handler(vcpu);
1101
48a3e950
CH		 1102 return -EOPNOTSUPP;
1103}
1104
953ed88d
TH		 1105int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
1106{
1107 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1108 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 1109 int reg, rc, nr_regs;
1110 u32 ctl_array[16];
f987a3ee 1111 u64 ga;
27f67f87 1112 u8 ar;
953ed88d
TH		 1113
1114 vcpu->stat.instruction_lctl++;
1115
1116 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1117 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1118
8ae04b8f 1119 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
953ed88d 1120
f987a3ee 1121 if (ga & 3)
953ed88d
TH		 1122 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1123
7cbde76b 1124 VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
f987a3ee 1125 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
953ed88d 1126
fc56eb66 1127 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 1128 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66
HC		 1129 if (rc)
1130 return kvm_s390_inject_prog_cond(vcpu, rc);
953ed88d 1131 reg = reg1;
fc56eb66 1132 nr_regs = 0;
953ed88d 1133 do {
953ed88d 1134 vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
fc56eb66 1135 vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++];
953ed88d
TH		 1136 if (reg == reg3)
1137 break;
1138 reg = (reg + 1) % 16;
1139 } while (1);
2dca485f 1140 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH		 1141 return 0;
1142}
1143
aba07508
DH		 1144int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu)
1145{
1146 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1147 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 1148 int reg, rc, nr_regs;
1149 u32 ctl_array[16];
aba07508 1150 u64 ga;
27f67f87 1151 u8 ar;
aba07508
DH		 1152
1153 vcpu->stat.instruction_stctl++;
1154
1155 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1156 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1157
8ae04b8f 1158 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
aba07508
DH		 1159
1160 if (ga & 3)
1161 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1162
7cbde76b 1163 VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
aba07508
DH		 1164 trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga);
1165
1166 reg = reg1;
fc56eb66 1167 nr_regs = 0;
aba07508 1168 do {
fc56eb66 1169 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH		 1170 if (reg == reg3)
1171 break;
1172 reg = (reg + 1) % 16;
1173 } while (1);
8ae04b8f 1174 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66 1175 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH		 1176}
1177
953ed88d
TH		 1178static int handle_lctlg(struct kvm_vcpu *vcpu)
1179{
1180 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1181 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 1182 int reg, rc, nr_regs;
1183 u64 ctl_array[16];
1184 u64 ga;
27f67f87 1185 u8 ar;
953ed88d
TH		 1186
1187 vcpu->stat.instruction_lctlg++;
1188
1189 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1190 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1191
8ae04b8f 1192 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
953ed88d 1193
f987a3ee 1194 if (ga & 7)
953ed88d
TH		 1195 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1196
7cbde76b 1197 VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
f987a3ee 1198 trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
953ed88d 1199
fc56eb66 1200 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 1201 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66
HC		 1202 if (rc)
1203 return kvm_s390_inject_prog_cond(vcpu, rc);
1204 reg = reg1;
1205 nr_regs = 0;
953ed88d 1206 do {
fc56eb66 1207 vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++];
953ed88d
TH		 1208 if (reg == reg3)
1209 break;
1210 reg = (reg + 1) % 16;
1211 } while (1);
2dca485f 1212 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH		 1213 return 0;
1214}
1215
aba07508
DH		 1216static int handle_stctg(struct kvm_vcpu *vcpu)
1217{
1218 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1219 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 1220 int reg, rc, nr_regs;
1221 u64 ctl_array[16];
1222 u64 ga;
27f67f87 1223 u8 ar;
aba07508
DH		 1224
1225 vcpu->stat.instruction_stctg++;
1226
1227 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1228 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1229
8ae04b8f 1230 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
aba07508
DH		 1231
1232 if (ga & 7)
1233 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1234
7cbde76b 1235 VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
aba07508
DH		 1236 trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga);
1237
fc56eb66
HC		 1238 reg = reg1;
1239 nr_regs = 0;
aba07508 1240 do {
fc56eb66 1241 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH		 1242 if (reg == reg3)
1243 break;
1244 reg = (reg + 1) % 16;
1245 } while (1);
8ae04b8f 1246 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66 1247 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH		 1248}
1249
f379aae5 1250static const intercept_handler_t eb_handlers[256] = {
953ed88d 1251 [0x2f] = handle_lctlg,
aba07508 1252 [0x25] = handle_stctg,
80cd8763
FZ		 1253 [0x60] = handle_ri,
1254 [0x61] = handle_ri,
1255 [0x62] = handle_ri,
f379aae5
CH		 1256};
1257
953ed88d 1258int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
f379aae5
CH		 1259{
1260 intercept_handler_t handler;
1261
f379aae5
CH		 1262 handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
1263 if (handler)
1264 return handler(vcpu);
1265 return -EOPNOTSUPP;
1266}
1267
bb25b9ba
CB		 1268static int handle_tprot(struct kvm_vcpu *vcpu)
1269{
b1c571a5 1270 u64 address1, address2;
a0465f9a
TH		 1271 unsigned long hva, gpa;
1272 int ret = 0, cc = 0;
1273 bool writable;
27f67f87 1274 u8 ar;
bb25b9ba
CB		 1275
1276 vcpu->stat.instruction_tprot++;
1277
f9f6bbc6
TH		 1278 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1279 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1280
8ae04b8f 1281 kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL);
b1c571a5 1282
bb25b9ba
CB		 1283 /* we only handle the Linux memory detection case:
1284 * access key == 0
bb25b9ba
CB		 1285 * everything else goes to userspace. */
1286 if (address2 & 0xf0)
1287 return -EOPNOTSUPP;
1288 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
a0465f9a 1289 ipte_lock(vcpu);
92c96321 1290 ret = guest_translate_address(vcpu, address1, ar, &gpa, GACC_STORE);
a0465f9a
TH		 1291 if (ret == PGM_PROTECTION) {
1292 /* Write protected? Try again with read-only... */
1293 cc = 1;
92c96321
DH		 1294 ret = guest_translate_address(vcpu, address1, ar, &gpa,
1295 GACC_FETCH);
a0465f9a
TH		 1296 }
1297 if (ret) {
1298 if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
1299 ret = kvm_s390_inject_program_int(vcpu, ret);
1300 } else if (ret > 0) {
1301 /* Translation not available */
1302 kvm_s390_set_psw_cc(vcpu, 3);
1303 ret = 0;
1304 }
1305 goto out_unlock;
1306 }
59a1fa2d 1307
a0465f9a
TH		 1308 hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable);
1309 if (kvm_is_error_hva(hva)) {
1310 ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1311 } else {
1312 if (!writable)
1313 cc = 1; /* Write not permitted ==> read-only */
1314 kvm_s390_set_psw_cc(vcpu, cc);
1315 /* Note: CC2 only occurs for storage keys (not supported yet) */
1316 }
1317out_unlock:
1318 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
1319 ipte_unlock(vcpu);
1320 return ret;
bb25b9ba
CB		 1321}
1322
1323int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
1324{
1325 /* For e5xx... instructions we only handle TPROT */
1326 if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
1327 return handle_tprot(vcpu);
1328 return -EOPNOTSUPP;
1329}
1330
8c3f61e2
CH		 1331static int handle_sckpf(struct kvm_vcpu *vcpu)
1332{
1333 u32 value;
1334
1335 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 1336 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
8c3f61e2
CH		 1337
1338 if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
1339 return kvm_s390_inject_program_int(vcpu,
1340 PGM_SPECIFICATION);
1341
1342 value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
1343 vcpu->arch.sie_block->todpr = value;
1344
1345 return 0;
1346}
1347
9acc317b
DH		 1348static int handle_ptff(struct kvm_vcpu *vcpu)
1349{
1350 /* we don't emulate any control instructions yet */
1351 kvm_s390_set_psw_cc(vcpu, 3);
1352 return 0;
1353}
1354
77975357 1355static const intercept_handler_t x01_handlers[256] = {
9acc317b 1356 [0x04] = handle_ptff,
8c3f61e2
CH		 1357 [0x07] = handle_sckpf,
1358};
1359
1360int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
1361{
1362 intercept_handler_t handler;
1363
1364 handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
1365 if (handler)
1366 return handler(vcpu);
1367 return -EOPNOTSUPP;
1368}
Ubuntu Jammy Linux kernel mirror