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s390/bpf: Only clear A and X for converted BPF programs
[mirror_ubuntu-artful-kernel.git] / arch / s390 / net / bpf_jit_comp.c
CommitLineData
c10302ef
MS		 1/*
2 * BPF Jit compiler for s390.
3 *
05462310
MH		 4 * Minimum build requirements:
5 *
6 * - HAVE_MARCH_Z196_FEATURES: laal, laalg
7 * - HAVE_MARCH_Z10_FEATURES: msfi, cgrj, clgrj
8 * - HAVE_MARCH_Z9_109_FEATURES: alfi, llilf, clfi, oilf, nilf
9 * - PACK_STACK
10 * - 64BIT
11 *
12 * Copyright IBM Corp. 2012,2015
c10302ef
MS		 13 *
14 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
05462310 15 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
c10302ef 16 */
05462310
MH		 17
18#define KMSG_COMPONENT "bpf_jit"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
c10302ef
MS		 21#include <linux/netdevice.h>
22#include <linux/filter.h>
c9a7afa3 23#include <linux/init.h>
6651ee07 24#include <linux/bpf.h>
c10302ef 25#include <asm/cacheflush.h>
0f20822a 26#include <asm/dis.h>
05462310 27#include "bpf_jit.h"
c10302ef 28
c10302ef
MS		 29int bpf_jit_enable __read_mostly;
30
05462310
MH		 31struct bpf_jit {
32 u32 seen; /* Flags to remember seen eBPF instructions */
33 u32 seen_reg[16]; /* Array to remember which registers are used */
34 u32 *addrs; /* Array with relative instruction addresses */
35 u8 *prg_buf; /* Start of program */
36 int size; /* Size of program and literal pool */
37 int size_prg; /* Size of program */
38 int prg; /* Current position in program */
39 int lit_start; /* Start of literal pool */
40 int lit; /* Current position in literal pool */
41 int base_ip; /* Base address for literal pool */
42 int ret0_ip; /* Address of return 0 */
43 int exit_ip; /* Address of exit */
6651ee07
MH		 44 int tail_call_start; /* Tail call start offset */
45 int labels[1]; /* Labels for local jumps */
05462310
MH		 46};
47
ce2b6ad9 48#define BPF_SIZE_MAX 0x7ffff /* Max size for program (20 bit signed displ) */
05462310
MH		 49
50#define SEEN_SKB 1 /* skb access */
51#define SEEN_MEM 2 /* use mem[] for temporary storage */
52#define SEEN_RET0 4 /* ret0_ip points to a valid return 0 */
53#define SEEN_LITERAL 8 /* code uses literals */
54#define SEEN_FUNC 16 /* calls C functions */
6651ee07 55#define SEEN_TAIL_CALL 32 /* code uses tail calls */
05462310
MH		 56#define SEEN_STACK (SEEN_FUNC | SEEN_MEM | SEEN_SKB)
57
c10302ef 58/*
05462310 59 * s390 registers
c10302ef 60 */
05462310
MH		 61#define REG_W0 (__MAX_BPF_REG+0) /* Work register 1 (even) */
62#define REG_W1 (__MAX_BPF_REG+1) /* Work register 2 (odd) */
63#define REG_SKB_DATA (__MAX_BPF_REG+2) /* SKB data register */
64#define REG_L (__MAX_BPF_REG+3) /* Literal pool register */
65#define REG_15 (__MAX_BPF_REG+4) /* Register 15 */
66#define REG_0 REG_W0 /* Register 0 */
6651ee07 67#define REG_1 REG_W1 /* Register 1 */
05462310
MH		 68#define REG_2 BPF_REG_1 /* Register 2 */
69#define REG_14 BPF_REG_0 /* Register 14 */
c10302ef 70
05462310
MH		 71/*
72 * Mapping of BPF registers to s390 registers
73 */
74static const int reg2hex[] = {
75 /* Return code */
76 [BPF_REG_0] = 14,
77 /* Function parameters */
78 [BPF_REG_1] = 2,
79 [BPF_REG_2] = 3,
80 [BPF_REG_3] = 4,
81 [BPF_REG_4] = 5,
82 [BPF_REG_5] = 6,
83 /* Call saved registers */
84 [BPF_REG_6] = 7,
85 [BPF_REG_7] = 8,
86 [BPF_REG_8] = 9,
87 [BPF_REG_9] = 10,
88 /* BPF stack pointer */
89 [BPF_REG_FP] = 13,
90 /* SKB data pointer */
91 [REG_SKB_DATA] = 12,
92 /* Work registers for s390x backend */
93 [REG_W0] = 0,
94 [REG_W1] = 1,
95 [REG_L] = 11,
96 [REG_15] = 15,
c10302ef
MS		 97};
98
05462310
MH		 99static inline u32 reg(u32 dst_reg, u32 src_reg)
100{
101 return reg2hex[dst_reg] << 4 | reg2hex[src_reg];
102}
103
104static inline u32 reg_high(u32 reg)
105{
106 return reg2hex[reg] << 4;
107}
108
109static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
110{
111 u32 r1 = reg2hex[b1];
112
113 if (!jit->seen_reg[r1] && r1 >= 6 && r1 <= 15)
114 jit->seen_reg[r1] = 1;
115}
116
117#define REG_SET_SEEN(b1) \
118({ \
119 reg_set_seen(jit, b1); \
120})
121
122#define REG_SEEN(b1) jit->seen_reg[reg2hex[(b1)]]
123
124/*
125 * EMIT macros for code generation
126 */
127
128#define _EMIT2(op) \
129({ \
130 if (jit->prg_buf) \
131 *(u16 *) (jit->prg_buf + jit->prg) = op; \
132 jit->prg += 2; \
133})
c10302ef 134
05462310
MH		 135#define EMIT2(op, b1, b2) \
136({ \
137 _EMIT2(op | reg(b1, b2)); \
138 REG_SET_SEEN(b1); \
139 REG_SET_SEEN(b2); \
c10302ef
MS		 140})
141
05462310
MH		 142#define _EMIT4(op) \
143({ \
144 if (jit->prg_buf) \
145 *(u32 *) (jit->prg_buf + jit->prg) = op; \
146 jit->prg += 4; \
c10302ef
MS		 147})
148
05462310
MH		 149#define EMIT4(op, b1, b2) \
150({ \
151 _EMIT4(op | reg(b1, b2)); \
152 REG_SET_SEEN(b1); \
153 REG_SET_SEEN(b2); \
c10302ef
MS		 154})
155
05462310
MH		 156#define EMIT4_RRF(op, b1, b2, b3) \
157({ \
158 _EMIT4(op | reg_high(b3) << 8 | reg(b1, b2)); \
159 REG_SET_SEEN(b1); \
160 REG_SET_SEEN(b2); \
161 REG_SET_SEEN(b3); \
c10302ef
MS		 162})
163
05462310
MH		 164#define _EMIT4_DISP(op, disp) \
165({ \
166 unsigned int __disp = (disp) & 0xfff; \
167 _EMIT4(op | __disp); \
c10302ef
MS		 168})
169
05462310
MH		 170#define EMIT4_DISP(op, b1, b2, disp) \
171({ \
172 _EMIT4_DISP(op | reg_high(b1) << 16 | \
173 reg_high(b2) << 8, disp); \
174 REG_SET_SEEN(b1); \
175 REG_SET_SEEN(b2); \
c10302ef
MS		 176})
177
05462310
MH		 178#define EMIT4_IMM(op, b1, imm) \
179({ \
180 unsigned int __imm = (imm) & 0xffff; \
181 _EMIT4(op | reg_high(b1) << 16 | __imm); \
182 REG_SET_SEEN(b1); \
c10302ef
MS		 183})
184
05462310
MH		 185#define EMIT4_PCREL(op, pcrel) \
186({ \
187 long __pcrel = ((pcrel) >> 1) & 0xffff; \
188 _EMIT4(op | __pcrel); \
68d9884d
HC		 189})
190
05462310
MH		 191#define _EMIT6(op1, op2) \
192({ \
193 if (jit->prg_buf) { \
194 *(u32 *) (jit->prg_buf + jit->prg) = op1; \
195 *(u16 *) (jit->prg_buf + jit->prg + 4) = op2; \
196 } \
197 jit->prg += 6; \
c10302ef
MS		 198})
199
05462310
MH		 200#define _EMIT6_DISP(op1, op2, disp) \
201({ \
202 unsigned int __disp = (disp) & 0xfff; \
203 _EMIT6(op1 | __disp, op2); \
c10302ef
MS		 204})
205
05462310
MH		 206#define _EMIT6_DISP_LH(op1, op2, disp) \
207({ \
1df03ffd
MH		 208 u32 _disp = (u32) disp; \
209 unsigned int __disp_h = _disp & 0xff000; \
210 unsigned int __disp_l = _disp & 0x00fff; \
05462310
MH		 211 _EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \
212})
213
214#define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \
215({ \
216 _EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \
217 reg_high(b3) << 8, op2, disp); \
218 REG_SET_SEEN(b1); \
219 REG_SET_SEEN(b2); \
220 REG_SET_SEEN(b3); \
221})
222
6651ee07
MH		 223#define EMIT6_PCREL_LABEL(op1, op2, b1, b2, label, mask) \
224({ \
225 int rel = (jit->labels[label] - jit->prg) >> 1; \
226 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), \
227 op2 | mask << 12); \
228 REG_SET_SEEN(b1); \
229 REG_SET_SEEN(b2); \
230})
231
232#define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask) \
233({ \
234 int rel = (jit->labels[label] - jit->prg) >> 1; \
235 _EMIT6(op1 | (reg_high(b1) | mask) << 16 | \
236 (rel & 0xffff), op2 | (imm & 0xff) << 8); \
237 REG_SET_SEEN(b1); \
238 BUILD_BUG_ON(((unsigned long) imm) > 0xff); \
239})
240
05462310
MH		 241#define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \
242({ \
243 /* Branch instruction needs 6 bytes */ \
244 int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\
b035b60d 245 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), op2 | mask); \
05462310
MH		 246 REG_SET_SEEN(b1); \
247 REG_SET_SEEN(b2); \
248})
249
250#define _EMIT6_IMM(op, imm) \
251({ \
252 unsigned int __imm = (imm); \
253 _EMIT6(op | (__imm >> 16), __imm & 0xffff); \
254})
255
256#define EMIT6_IMM(op, b1, imm) \
257({ \
258 _EMIT6_IMM(op | reg_high(b1) << 16, imm); \
259 REG_SET_SEEN(b1); \
260})
261
262#define EMIT_CONST_U32(val) \
263({ \
264 unsigned int ret; \
265 ret = jit->lit - jit->base_ip; \
266 jit->seen |= SEEN_LITERAL; \
267 if (jit->prg_buf) \
268 *(u32 *) (jit->prg_buf + jit->lit) = (u32) val; \
269 jit->lit += 4; \
270 ret; \
271})
272
273#define EMIT_CONST_U64(val) \
274({ \
275 unsigned int ret; \
276 ret = jit->lit - jit->base_ip; \
277 jit->seen |= SEEN_LITERAL; \
278 if (jit->prg_buf) \
279 *(u64 *) (jit->prg_buf + jit->lit) = (u64) val; \
280 jit->lit += 8; \
281 ret; \
282})
283
284#define EMIT_ZERO(b1) \
285({ \
286 /* llgfr %dst,%dst (zero extend to 64 bit) */ \
287 EMIT4(0xb9160000, b1, b1); \
288 REG_SET_SEEN(b1); \
289})
290
291/*
292 * Fill whole space with illegal instructions
293 */
294static void jit_fill_hole(void *area, unsigned int size)
738cbe72 295{
738cbe72
DB		 296 memset(area, 0, size);
297}
298
05462310
MH		 299/*
300 * Save registers from "rs" (register start) to "re" (register end) on stack
301 */
302static void save_regs(struct bpf_jit *jit, u32 rs, u32 re)
303{
6651ee07 304 u32 off = STK_OFF_R6 + (rs - 6) * 8;
05462310
MH		 305
306 if (rs == re)
307 /* stg %rs,off(%r15) */
308 _EMIT6(0xe300f000 | rs << 20 | off, 0x0024);
309 else
310 /* stmg %rs,%re,off(%r15) */
311 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0024, off);
312}
313
314/*
315 * Restore registers from "rs" (register start) to "re" (register end) on stack
316 */
317static void restore_regs(struct bpf_jit *jit, u32 rs, u32 re)
c10302ef 318{
6651ee07 319 u32 off = STK_OFF_R6 + (rs - 6) * 8;
05462310
MH		 320
321 if (jit->seen & SEEN_STACK)
322 off += STK_OFF;
323
324 if (rs == re)
325 /* lg %rs,off(%r15) */
326 _EMIT6(0xe300f000 | rs << 20 | off, 0x0004);
327 else
328 /* lmg %rs,%re,off(%r15) */
329 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0004, off);
330}
c10302ef 331
05462310
MH		 332/*
333 * Return first seen register (from start)
334 */
335static int get_start(struct bpf_jit *jit, int start)
336{
337 int i;
338
339 for (i = start; i <= 15; i++) {
340 if (jit->seen_reg[i])
341 return i;
342 }
343 return 0;
344}
345
346/*
347 * Return last seen register (from start) (gap >= 2)
348 */
349static int get_end(struct bpf_jit *jit, int start)
350{
351 int i;
352
353 for (i = start; i < 15; i++) {
354 if (!jit->seen_reg[i] && !jit->seen_reg[i + 1])
355 return i - 1;
356 }
357 return jit->seen_reg[15] ? 15 : 14;
358}
359
360#define REGS_SAVE 1
361#define REGS_RESTORE 0
362/*
363 * Save and restore clobbered registers (6-15) on stack.
364 * We save/restore registers in chunks with gap >= 2 registers.
365 */
366static void save_restore_regs(struct bpf_jit *jit, int op)
367{
368
369 int re = 6, rs;
370
371 do {
372 rs = get_start(jit, re);
373 if (!rs)
374 break;
375 re = get_end(jit, rs + 1);
376 if (op == REGS_SAVE)
377 save_regs(jit, rs, re);
378 else
379 restore_regs(jit, rs, re);
380 re++;
381 } while (re <= 15);
382}
383
384/*
385 * Emit function prologue
386 *
387 * Save registers and create stack frame if necessary.
388 * See stack frame layout desription in "bpf_jit.h"!
389 */
cde66c2d 390static void bpf_jit_prologue(struct bpf_jit *jit, bool is_classic)
05462310 391{
6651ee07
MH		 392 if (jit->seen & SEEN_TAIL_CALL) {
393 /* xc STK_OFF_TCCNT(4,%r15),STK_OFF_TCCNT(%r15) */
394 _EMIT6(0xd703f000 | STK_OFF_TCCNT, 0xf000 | STK_OFF_TCCNT);
395 } else {
396 /* j tail_call_start: NOP if no tail calls are used */
397 EMIT4_PCREL(0xa7f40000, 6);
398 _EMIT2(0);
399 }
400 /* Tail calls have to skip above initialization */
401 jit->tail_call_start = jit->prg;
05462310
MH		 402 /* Save registers */
403 save_restore_regs(jit, REGS_SAVE);
c10302ef
MS		 404 /* Setup literal pool */
405 if (jit->seen & SEEN_LITERAL) {
406 /* basr %r13,0 */
05462310 407 EMIT2(0x0d00, REG_L, REG_0);
c10302ef
MS		 408 jit->base_ip = jit->prg;
409 }
05462310
MH		 410 /* Setup stack and backchain */
411 if (jit->seen & SEEN_STACK) {
88aeca15
MH		 412 if (jit->seen & SEEN_FUNC)
413 /* lgr %w1,%r15 (backchain) */
414 EMIT4(0xb9040000, REG_W1, REG_15);
415 /* la %bfp,STK_160_UNUSED(%r15) (BPF frame pointer) */
416 EMIT4_DISP(0x41000000, BPF_REG_FP, REG_15, STK_160_UNUSED);
05462310
MH		 417 /* aghi %r15,-STK_OFF */
418 EMIT4_IMM(0xa70b0000, REG_15, -STK_OFF);
419 if (jit->seen & SEEN_FUNC)
88aeca15
MH		 420 /* stg %w1,152(%r15) (backchain) */
421 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0,
05462310
MH		 422 REG_15, 152);
423 }
424 /*
425 * For SKB access %b1 contains the SKB pointer. For "bpf_jit.S"
426 * we store the SKB header length on the stack and the SKB data
427 * pointer in REG_SKB_DATA.
428 */
429 if (jit->seen & SEEN_SKB) {
430 /* Header length: llgf %w1,<len>(%b1) */
431 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_1,
432 offsetof(struct sk_buff, len));
433 /* s %w1,<data_len>(%b1) */
434 EMIT4_DISP(0x5b000000, REG_W1, BPF_REG_1,
435 offsetof(struct sk_buff, data_len));
436 /* stg %w1,ST_OFF_HLEN(%r0,%r15) */
437 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, REG_15,
438 STK_OFF_HLEN);
439 /* lg %skb_data,data_off(%b1) */
440 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0,
441 BPF_REG_1, offsetof(struct sk_buff, data));
c10302ef 442 }
cde66c2d
MH		 443 /* Clear A (%b0) and X (%b7) registers for converted BPF programs */
444 if (is_classic) {
445 if (REG_SEEN(BPF_REG_A))
446 /* lghi %ba,0 */
447 EMIT4_IMM(0xa7090000, BPF_REG_A, 0);
448 if (REG_SEEN(BPF_REG_X))
449 /* lghi %bx,0 */
450 EMIT4_IMM(0xa7090000, BPF_REG_X, 0);
451 }
c10302ef
MS		 452}
453
05462310
MH		 454/*
455 * Function epilogue
456 */
c10302ef
MS		 457static void bpf_jit_epilogue(struct bpf_jit *jit)
458{
459 /* Return 0 */
460 if (jit->seen & SEEN_RET0) {
461 jit->ret0_ip = jit->prg;
05462310
MH		 462 /* lghi %b0,0 */
463 EMIT4_IMM(0xa7090000, BPF_REG_0, 0);
c10302ef
MS		 464 }
465 jit->exit_ip = jit->prg;
05462310
MH		 466 /* Load exit code: lgr %r2,%b0 */
467 EMIT4(0xb9040000, REG_2, BPF_REG_0);
c10302ef 468 /* Restore registers */
05462310 469 save_restore_regs(jit, REGS_RESTORE);
c10302ef 470 /* br %r14 */
05462310 471 _EMIT2(0x07fe);
c10302ef
MS		 472}
473
474/*
05462310 475 * Compile one eBPF instruction into s390x code
b9b4b1ce
MH		 476 *
477 * NOTE: Use noinline because for gcov (-fprofile-arcs) gcc allocates a lot of
478 * stack space for the large switch statement.
c10302ef 479 */
b9b4b1ce 480static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
c10302ef 481{
05462310
MH		 482 struct bpf_insn *insn = &fp->insnsi[i];
483 int jmp_off, last, insn_count = 1;
484 unsigned int func_addr, mask;
485 u32 dst_reg = insn->dst_reg;
486 u32 src_reg = insn->src_reg;
487 u32 *addrs = jit->addrs;
488 s32 imm = insn->imm;
489 s16 off = insn->off;
c10302ef 490
05462310
MH		 491 switch (insn->code) {
492 /*
493 * BPF_MOV
494 */
495 case BPF_ALU | BPF_MOV | BPF_X: /* dst = (u32) src */
496 /* llgfr %dst,%src */
497 EMIT4(0xb9160000, dst_reg, src_reg);
498 break;
499 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
500 /* lgr %dst,%src */
501 EMIT4(0xb9040000, dst_reg, src_reg);
502 break;
503 case BPF_ALU | BPF_MOV | BPF_K: /* dst = (u32) imm */
504 /* llilf %dst,imm */
505 EMIT6_IMM(0xc00f0000, dst_reg, imm);
506 break;
507 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = imm */
508 /* lgfi %dst,imm */
509 EMIT6_IMM(0xc0010000, dst_reg, imm);
510 break;
511 /*
512 * BPF_LD 64
513 */
514 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
515 {
516 /* 16 byte instruction that uses two 'struct bpf_insn' */
517 u64 imm64;
518
519 imm64 = (u64)(u32) insn[0].imm | ((u64)(u32) insn[1].imm) << 32;
520 /* lg %dst,<d(imm)>(%l) */
521 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, REG_0, REG_L,
522 EMIT_CONST_U64(imm64));
523 insn_count = 2;
524 break;
525 }
526 /*
527 * BPF_ADD
528 */
529 case BPF_ALU | BPF_ADD | BPF_X: /* dst = (u32) dst + (u32) src */
530 /* ar %dst,%src */
531 EMIT2(0x1a00, dst_reg, src_reg);
532 EMIT_ZERO(dst_reg);
533 break;
534 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst = dst + src */
535 /* agr %dst,%src */
536 EMIT4(0xb9080000, dst_reg, src_reg);
537 break;
538 case BPF_ALU | BPF_ADD | BPF_K: /* dst = (u32) dst + (u32) imm */
539 if (!imm)
c10302ef 540 break;
05462310
MH		 541 /* alfi %dst,imm */
542 EMIT6_IMM(0xc20b0000, dst_reg, imm);
543 EMIT_ZERO(dst_reg);
544 break;
545 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst = dst + imm */
546 if (!imm)
547 break;
548 /* agfi %dst,imm */
549 EMIT6_IMM(0xc2080000, dst_reg, imm);
550 break;
551 /*
552 * BPF_SUB
553 */
554 case BPF_ALU | BPF_SUB | BPF_X: /* dst = (u32) dst - (u32) src */
555 /* sr %dst,%src */
556 EMIT2(0x1b00, dst_reg, src_reg);
557 EMIT_ZERO(dst_reg);
c10302ef 558 break;
05462310
MH		 559 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst = dst - src */
560 /* sgr %dst,%src */
561 EMIT4(0xb9090000, dst_reg, src_reg);
c10302ef 562 break;
05462310
MH		 563 case BPF_ALU | BPF_SUB | BPF_K: /* dst = (u32) dst - (u32) imm */
564 if (!imm)
c10302ef 565 break;
05462310
MH		 566 /* alfi %dst,-imm */
567 EMIT6_IMM(0xc20b0000, dst_reg, -imm);
568 EMIT_ZERO(dst_reg);
c10302ef 569 break;
05462310
MH		 570 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst = dst - imm */
571 if (!imm)
572 break;
573 /* agfi %dst,-imm */
574 EMIT6_IMM(0xc2080000, dst_reg, -imm);
575 break;
576 /*
577 * BPF_MUL
578 */
579 case BPF_ALU | BPF_MUL | BPF_X: /* dst = (u32) dst * (u32) src */
580 /* msr %dst,%src */
581 EMIT4(0xb2520000, dst_reg, src_reg);
582 EMIT_ZERO(dst_reg);
583 break;
584 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst = dst * src */
585 /* msgr %dst,%src */
586 EMIT4(0xb90c0000, dst_reg, src_reg);
587 break;
588 case BPF_ALU | BPF_MUL | BPF_K: /* dst = (u32) dst * (u32) imm */
589 if (imm == 1)
590 break;
591 /* msfi %r5,imm */
592 EMIT6_IMM(0xc2010000, dst_reg, imm);
593 EMIT_ZERO(dst_reg);
594 break;
595 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst = dst * imm */
596 if (imm == 1)
aee636c4 597 break;
05462310
MH		 598 /* msgfi %dst,imm */
599 EMIT6_IMM(0xc2000000, dst_reg, imm);
600 break;
601 /*
602 * BPF_DIV / BPF_MOD
603 */
604 case BPF_ALU | BPF_DIV | BPF_X: /* dst = (u32) dst / (u32) src */
605 case BPF_ALU | BPF_MOD | BPF_X: /* dst = (u32) dst % (u32) src */
606 {
607 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
608
609 jit->seen |= SEEN_RET0;
610 /* ltr %src,%src (if src == 0 goto fail) */
611 EMIT2(0x1200, src_reg, src_reg);
612 /* jz <ret0> */
613 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
614 /* lhi %w0,0 */
615 EMIT4_IMM(0xa7080000, REG_W0, 0);
616 /* lr %w1,%dst */
617 EMIT2(0x1800, REG_W1, dst_reg);
618 /* dlr %w0,%src */
619 EMIT4(0xb9970000, REG_W0, src_reg);
620 /* llgfr %dst,%rc */
621 EMIT4(0xb9160000, dst_reg, rc_reg);
622 break;
623 }
771aada9
MH		 624 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / src */
625 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % src */
05462310
MH		 626 {
627 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
628
629 jit->seen |= SEEN_RET0;
630 /* ltgr %src,%src (if src == 0 goto fail) */
631 EMIT4(0xb9020000, src_reg, src_reg);
32472745 632 /* jz <ret0> */
05462310
MH		 633 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
634 /* lghi %w0,0 */
635 EMIT4_IMM(0xa7090000, REG_W0, 0);
636 /* lgr %w1,%dst */
637 EMIT4(0xb9040000, REG_W1, dst_reg);
05462310 638 /* dlgr %w0,%dst */
771aada9 639 EMIT4(0xb9870000, REG_W0, src_reg);
05462310
MH		 640 /* lgr %dst,%rc */
641 EMIT4(0xb9040000, dst_reg, rc_reg);
642 break;
643 }
644 case BPF_ALU | BPF_DIV | BPF_K: /* dst = (u32) dst / (u32) imm */
645 case BPF_ALU | BPF_MOD | BPF_K: /* dst = (u32) dst % (u32) imm */
646 {
647 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
648
649 if (imm == 1) {
650 if (BPF_OP(insn->code) == BPF_MOD)
651 /* lhgi %dst,0 */
652 EMIT4_IMM(0xa7090000, dst_reg, 0);
aee636c4
ED		 653 break;
654 }
05462310
MH		 655 /* lhi %w0,0 */
656 EMIT4_IMM(0xa7080000, REG_W0, 0);
657 /* lr %w1,%dst */
658 EMIT2(0x1800, REG_W1, dst_reg);
659 /* dl %w0,<d(imm)>(%l) */
660 EMIT6_DISP_LH(0xe3000000, 0x0097, REG_W0, REG_0, REG_L,
661 EMIT_CONST_U32(imm));
662 /* llgfr %dst,%rc */
663 EMIT4(0xb9160000, dst_reg, rc_reg);
664 break;
665 }
771aada9
MH		 666 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / imm */
667 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % imm */
05462310
MH		 668 {
669 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
670
671 if (imm == 1) {
672 if (BPF_OP(insn->code) == BPF_MOD)
673 /* lhgi %dst,0 */
674 EMIT4_IMM(0xa7090000, dst_reg, 0);
675 break;
676 }
677 /* lghi %w0,0 */
678 EMIT4_IMM(0xa7090000, REG_W0, 0);
679 /* lgr %w1,%dst */
680 EMIT4(0xb9040000, REG_W1, dst_reg);
681 /* dlg %w0,<d(imm)>(%l) */
682 EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L,
771aada9 683 EMIT_CONST_U64(imm));
05462310
MH		 684 /* lgr %dst,%rc */
685 EMIT4(0xb9040000, dst_reg, rc_reg);
686 break;
687 }
688 /*
689 * BPF_AND
690 */
691 case BPF_ALU | BPF_AND | BPF_X: /* dst = (u32) dst & (u32) src */
692 /* nr %dst,%src */
693 EMIT2(0x1400, dst_reg, src_reg);
694 EMIT_ZERO(dst_reg);
695 break;
696 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
697 /* ngr %dst,%src */
698 EMIT4(0xb9800000, dst_reg, src_reg);
699 break;
700 case BPF_ALU | BPF_AND | BPF_K: /* dst = (u32) dst & (u32) imm */
701 /* nilf %dst,imm */
702 EMIT6_IMM(0xc00b0000, dst_reg, imm);
703 EMIT_ZERO(dst_reg);
c10302ef 704 break;
05462310
MH		 705 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
706 /* ng %dst,<d(imm)>(%l) */
707 EMIT6_DISP_LH(0xe3000000, 0x0080, dst_reg, REG_0, REG_L,
708 EMIT_CONST_U64(imm));
c59eed11 709 break;
05462310
MH		 710 /*
711 * BPF_OR
712 */
713 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
714 /* or %dst,%src */
715 EMIT2(0x1600, dst_reg, src_reg);
716 EMIT_ZERO(dst_reg);
717 break;
718 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
719 /* ogr %dst,%src */
720 EMIT4(0xb9810000, dst_reg, src_reg);
721 break;
722 case BPF_ALU | BPF_OR | BPF_K: /* dst = (u32) dst | (u32) imm */
723 /* oilf %dst,imm */
724 EMIT6_IMM(0xc00d0000, dst_reg, imm);
725 EMIT_ZERO(dst_reg);
726 break;
727 case BPF_ALU64 | BPF_OR | BPF_K: /* dst = dst | imm */
728 /* og %dst,<d(imm)>(%l) */
729 EMIT6_DISP_LH(0xe3000000, 0x0081, dst_reg, REG_0, REG_L,
730 EMIT_CONST_U64(imm));
731 break;
732 /*
733 * BPF_XOR
734 */
735 case BPF_ALU | BPF_XOR | BPF_X: /* dst = (u32) dst ^ (u32) src */
736 /* xr %dst,%src */
737 EMIT2(0x1700, dst_reg, src_reg);
738 EMIT_ZERO(dst_reg);
739 break;
740 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst = dst ^ src */
741 /* xgr %dst,%src */
742 EMIT4(0xb9820000, dst_reg, src_reg);
743 break;
744 case BPF_ALU | BPF_XOR | BPF_K: /* dst = (u32) dst ^ (u32) imm */
745 if (!imm)
916908df 746 break;
05462310
MH		 747 /* xilf %dst,imm */
748 EMIT6_IMM(0xc0070000, dst_reg, imm);
749 EMIT_ZERO(dst_reg);
750 break;
751 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst = dst ^ imm */
752 /* xg %dst,<d(imm)>(%l) */
753 EMIT6_DISP_LH(0xe3000000, 0x0082, dst_reg, REG_0, REG_L,
754 EMIT_CONST_U64(imm));
755 break;
756 /*
757 * BPF_LSH
758 */
759 case BPF_ALU | BPF_LSH | BPF_X: /* dst = (u32) dst << (u32) src */
760 /* sll %dst,0(%src) */
761 EMIT4_DISP(0x89000000, dst_reg, src_reg, 0);
762 EMIT_ZERO(dst_reg);
916908df 763 break;
05462310
MH		 764 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst = dst << src */
765 /* sllg %dst,%dst,0(%src) */
766 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, src_reg, 0);
c10302ef 767 break;
05462310
MH		 768 case BPF_ALU | BPF_LSH | BPF_K: /* dst = (u32) dst << (u32) imm */
769 if (imm == 0)
c10302ef 770 break;
05462310
MH		 771 /* sll %dst,imm(%r0) */
772 EMIT4_DISP(0x89000000, dst_reg, REG_0, imm);
773 EMIT_ZERO(dst_reg);
c10302ef 774 break;
05462310
MH		 775 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst = dst << imm */
776 if (imm == 0)
777 break;
778 /* sllg %dst,%dst,imm(%r0) */
779 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, REG_0, imm);
780 break;
781 /*
782 * BPF_RSH
783 */
784 case BPF_ALU | BPF_RSH | BPF_X: /* dst = (u32) dst >> (u32) src */
785 /* srl %dst,0(%src) */
786 EMIT4_DISP(0x88000000, dst_reg, src_reg, 0);
787 EMIT_ZERO(dst_reg);
c10302ef 788 break;
05462310
MH		 789 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst = dst >> src */
790 /* srlg %dst,%dst,0(%src) */
791 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, src_reg, 0);
792 break;
793 case BPF_ALU | BPF_RSH | BPF_K: /* dst = (u32) dst >> (u32) imm */
794 if (imm == 0)
c10302ef 795 break;
05462310
MH		 796 /* srl %dst,imm(%r0) */
797 EMIT4_DISP(0x88000000, dst_reg, REG_0, imm);
798 EMIT_ZERO(dst_reg);
799 break;
800 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst = dst >> imm */
801 if (imm == 0)
c10302ef 802 break;
05462310
MH		 803 /* srlg %dst,%dst,imm(%r0) */
804 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, REG_0, imm);
c10302ef 805 break;
05462310
MH		 806 /*
807 * BPF_ARSH
808 */
809 case BPF_ALU64 | BPF_ARSH | BPF_X: /* ((s64) dst) >>= src */
810 /* srag %dst,%dst,0(%src) */
811 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, src_reg, 0);
812 break;
813 case BPF_ALU64 | BPF_ARSH | BPF_K: /* ((s64) dst) >>= imm */
814 if (imm == 0)
815 break;
816 /* srag %dst,%dst,imm(%r0) */
817 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, REG_0, imm);
818 break;
819 /*
820 * BPF_NEG
821 */
822 case BPF_ALU | BPF_NEG: /* dst = (u32) -dst */
823 /* lcr %dst,%dst */
824 EMIT2(0x1300, dst_reg, dst_reg);
825 EMIT_ZERO(dst_reg);
826 break;
827 case BPF_ALU64 | BPF_NEG: /* dst = -dst */
828 /* lcgr %dst,%dst */
829 EMIT4(0xb9130000, dst_reg, dst_reg);
830 break;
831 /*
832 * BPF_FROM_BE/LE
833 */
834 case BPF_ALU | BPF_END | BPF_FROM_BE:
835 /* s390 is big endian, therefore only clear high order bytes */
836 switch (imm) {
837 case 16: /* dst = (u16) cpu_to_be16(dst) */
838 /* llghr %dst,%dst */
839 EMIT4(0xb9850000, dst_reg, dst_reg);
840 break;
841 case 32: /* dst = (u32) cpu_to_be32(dst) */
842 /* llgfr %dst,%dst */
843 EMIT4(0xb9160000, dst_reg, dst_reg);
844 break;
845 case 64: /* dst = (u64) cpu_to_be64(dst) */
846 break;
c10302ef 847 }
c10302ef 848 break;
05462310
MH		 849 case BPF_ALU | BPF_END | BPF_FROM_LE:
850 switch (imm) {
851 case 16: /* dst = (u16) cpu_to_le16(dst) */
852 /* lrvr %dst,%dst */
853 EMIT4(0xb91f0000, dst_reg, dst_reg);
854 /* srl %dst,16(%r0) */
855 EMIT4_DISP(0x88000000, dst_reg, REG_0, 16);
856 /* llghr %dst,%dst */
857 EMIT4(0xb9850000, dst_reg, dst_reg);
858 break;
859 case 32: /* dst = (u32) cpu_to_le32(dst) */
860 /* lrvr %dst,%dst */
861 EMIT4(0xb91f0000, dst_reg, dst_reg);
862 /* llgfr %dst,%dst */
863 EMIT4(0xb9160000, dst_reg, dst_reg);
864 break;
865 case 64: /* dst = (u64) cpu_to_le64(dst) */
866 /* lrvgr %dst,%dst */
867 EMIT4(0xb90f0000, dst_reg, dst_reg);
c10302ef
MS		 868 break;
869 }
c10302ef 870 break;
05462310
MH		 871 /*
872 * BPF_ST(X)
873 */
874 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src_reg */
875 /* stcy %src,off(%dst) */
876 EMIT6_DISP_LH(0xe3000000, 0x0072, src_reg, dst_reg, REG_0, off);
877 jit->seen |= SEEN_MEM;
878 break;
879 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
880 /* sthy %src,off(%dst) */
881 EMIT6_DISP_LH(0xe3000000, 0x0070, src_reg, dst_reg, REG_0, off);
882 jit->seen |= SEEN_MEM;
883 break;
884 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
885 /* sty %src,off(%dst) */
886 EMIT6_DISP_LH(0xe3000000, 0x0050, src_reg, dst_reg, REG_0, off);
887 jit->seen |= SEEN_MEM;
888 break;
889 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
890 /* stg %src,off(%dst) */
891 EMIT6_DISP_LH(0xe3000000, 0x0024, src_reg, dst_reg, REG_0, off);
892 jit->seen |= SEEN_MEM;
893 break;
894 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
895 /* lhi %w0,imm */
896 EMIT4_IMM(0xa7080000, REG_W0, (u8) imm);
897 /* stcy %w0,off(dst) */
898 EMIT6_DISP_LH(0xe3000000, 0x0072, REG_W0, dst_reg, REG_0, off);
899 jit->seen |= SEEN_MEM;
900 break;
901 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
902 /* lhi %w0,imm */
903 EMIT4_IMM(0xa7080000, REG_W0, (u16) imm);
904 /* sthy %w0,off(dst) */
905 EMIT6_DISP_LH(0xe3000000, 0x0070, REG_W0, dst_reg, REG_0, off);
c10302ef 906 jit->seen |= SEEN_MEM;
c10302ef 907 break;
05462310
MH		 908 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
909 /* llilf %w0,imm */
910 EMIT6_IMM(0xc00f0000, REG_W0, (u32) imm);
911 /* sty %w0,off(%dst) */
912 EMIT6_DISP_LH(0xe3000000, 0x0050, REG_W0, dst_reg, REG_0, off);
913 jit->seen |= SEEN_MEM;
914 break;
915 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
916 /* lgfi %w0,imm */
917 EMIT6_IMM(0xc0010000, REG_W0, imm);
918 /* stg %w0,off(%dst) */
919 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W0, dst_reg, REG_0, off);
920 jit->seen |= SEEN_MEM;
921 break;
922 /*
923 * BPF_STX XADD (atomic_add)
924 */
925 case BPF_STX | BPF_XADD | BPF_W: /* *(u32 *)(dst + off) += src */
926 /* laal %w0,%src,off(%dst) */
927 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W0, src_reg,
928 dst_reg, off);
929 jit->seen |= SEEN_MEM;
930 break;
931 case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */
932 /* laalg %w0,%src,off(%dst) */
933 EMIT6_DISP_LH(0xeb000000, 0x00ea, REG_W0, src_reg,
934 dst_reg, off);
935 jit->seen |= SEEN_MEM;
936 break;
937 /*
938 * BPF_LDX
939 */
940 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */
941 /* llgc %dst,0(off,%src) */
942 EMIT6_DISP_LH(0xe3000000, 0x0090, dst_reg, src_reg, REG_0, off);
943 jit->seen |= SEEN_MEM;
944 break;
945 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */
946 /* llgh %dst,0(off,%src) */
947 EMIT6_DISP_LH(0xe3000000, 0x0091, dst_reg, src_reg, REG_0, off);
948 jit->seen |= SEEN_MEM;
949 break;
950 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */
951 /* llgf %dst,off(%src) */
952 jit->seen |= SEEN_MEM;
953 EMIT6_DISP_LH(0xe3000000, 0x0016, dst_reg, src_reg, REG_0, off);
954 break;
955 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */
956 /* lg %dst,0(off,%src) */
957 jit->seen |= SEEN_MEM;
958 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, src_reg, REG_0, off);
959 break;
960 /*
961 * BPF_JMP / CALL
962 */
963 case BPF_JMP | BPF_CALL:
964 {
965 /*
966 * b0 = (__bpf_call_base + imm)(b1, b2, b3, b4, b5)
967 */
968 const u64 func = (u64)__bpf_call_base + imm;
969
4e10df9a
AS		 970 if (bpf_helper_changes_skb_data((void *)func))
971 /* TODO reload skb->data, hlen */
972 return -1;
973
05462310
MH		 974 REG_SET_SEEN(BPF_REG_5);
975 jit->seen |= SEEN_FUNC;
976 /* lg %w1,<d(imm)>(%l) */
ce2b6ad9
MH		 977 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_W1, REG_0, REG_L,
978 EMIT_CONST_U64(func));
05462310
MH		 979 /* basr %r14,%w1 */
980 EMIT2(0x0d00, REG_14, REG_W1);
981 /* lgr %b0,%r2: load return value into %b0 */
982 EMIT4(0xb9040000, BPF_REG_0, REG_2);
983 break;
984 }
6651ee07
MH		 985 case BPF_JMP | BPF_CALL | BPF_X:
986 /*
987 * Implicit input:
988 * B1: pointer to ctx
989 * B2: pointer to bpf_array
990 * B3: index in bpf_array
991 */
992 jit->seen |= SEEN_TAIL_CALL;
993
994 /*
995 * if (index >= array->map.max_entries)
996 * goto out;
997 */
998
999 /* llgf %w1,map.max_entries(%b2) */
1000 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_2,
1001 offsetof(struct bpf_array, map.max_entries));
1002 /* clgrj %b3,%w1,0xa,label0: if %b3 >= %w1 goto out */
1003 EMIT6_PCREL_LABEL(0xec000000, 0x0065, BPF_REG_3,
1004 REG_W1, 0, 0xa);
1005
1006 /*
1007 * if (tail_call_cnt++ > MAX_TAIL_CALL_CNT)
1008 * goto out;
1009 */
1010
1011 if (jit->seen & SEEN_STACK)
1012 off = STK_OFF_TCCNT + STK_OFF;
1013 else
1014 off = STK_OFF_TCCNT;
1015 /* lhi %w0,1 */
1016 EMIT4_IMM(0xa7080000, REG_W0, 1);
1017 /* laal %w1,%w0,off(%r15) */
1018 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W1, REG_W0, REG_15, off);
1019 /* clij %w1,MAX_TAIL_CALL_CNT,0x2,label0 */
1020 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007f, REG_W1,
1021 MAX_TAIL_CALL_CNT, 0, 0x2);
1022
1023 /*
1024 * prog = array->prog[index];
1025 * if (prog == NULL)
1026 * goto out;
1027 */
1028
1029 /* sllg %r1,%b3,3: %r1 = index * 8 */
1030 EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, BPF_REG_3, REG_0, 3);
1031 /* lg %r1,prog(%b2,%r1) */
1032 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, BPF_REG_2,
1033 REG_1, offsetof(struct bpf_array, prog));
1034 /* clgij %r1,0,0x8,label0 */
1035 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007d, REG_1, 0, 0, 0x8);
1036
1037 /*
1038 * Restore registers before calling function
1039 */
1040 save_restore_regs(jit, REGS_RESTORE);
1041
1042 /*
1043 * goto *(prog->bpf_func + tail_call_start);
1044 */
1045
1046 /* lg %r1,bpf_func(%r1) */
1047 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, REG_1, REG_0,
1048 offsetof(struct bpf_prog, bpf_func));
1049 /* bc 0xf,tail_call_start(%r1) */
1050 _EMIT4(0x47f01000 + jit->tail_call_start);
1051 /* out: */
1052 jit->labels[0] = jit->prg;
1053 break;
05462310
MH		 1054 case BPF_JMP | BPF_EXIT: /* return b0 */
1055 last = (i == fp->len - 1) ? 1 : 0;
1056 if (last && !(jit->seen & SEEN_RET0))
1057 break;
c10302ef
MS		 1058 /* j <exit> */
1059 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg);
1060 break;
05462310
MH		 1061 /*
1062 * Branch relative (number of skipped instructions) to offset on
1063 * condition.
1064 *
1065 * Condition code to mask mapping:
1066 *
1067 * CC | Description | Mask
1068 * ------------------------------
1069 * 0 | Operands equal | 8
1070 * 1 | First operand low | 4
1071 * 2 | First operand high | 2
1072 * 3 | Unused | 1
1073 *
1074 * For s390x relative branches: ip = ip + off_bytes
1075 * For BPF relative branches: insn = insn + off_insns + 1
1076 *
1077 * For example for s390x with offset 0 we jump to the branch
1078 * instruction itself (loop) and for BPF with offset 0 we
1079 * branch to the instruction behind the branch.
1080 */
1081 case BPF_JMP | BPF_JA: /* if (true) */
1082 mask = 0xf000; /* j */
1083 goto branch_oc;
1084 case BPF_JMP | BPF_JSGT | BPF_K: /* ((s64) dst > (s64) imm) */
1085 mask = 0x2000; /* jh */
1086 goto branch_ks;
1087 case BPF_JMP | BPF_JSGE | BPF_K: /* ((s64) dst >= (s64) imm) */
1088 mask = 0xa000; /* jhe */
1089 goto branch_ks;
1090 case BPF_JMP | BPF_JGT | BPF_K: /* (dst_reg > imm) */
1091 mask = 0x2000; /* jh */
1092 goto branch_ku;
1093 case BPF_JMP | BPF_JGE | BPF_K: /* (dst_reg >= imm) */
1094 mask = 0xa000; /* jhe */
1095 goto branch_ku;
1096 case BPF_JMP | BPF_JNE | BPF_K: /* (dst_reg != imm) */
1097 mask = 0x7000; /* jne */
1098 goto branch_ku;
1099 case BPF_JMP | BPF_JEQ | BPF_K: /* (dst_reg == imm) */
1100 mask = 0x8000; /* je */
1101 goto branch_ku;
1102 case BPF_JMP | BPF_JSET | BPF_K: /* (dst_reg & imm) */
1103 mask = 0x7000; /* jnz */
1104 /* lgfi %w1,imm (load sign extend imm) */
1105 EMIT6_IMM(0xc0010000, REG_W1, imm);
1106 /* ngr %w1,%dst */
1107 EMIT4(0xb9800000, REG_W1, dst_reg);
1108 goto branch_oc;
1109
1110 case BPF_JMP | BPF_JSGT | BPF_X: /* ((s64) dst > (s64) src) */
1111 mask = 0x2000; /* jh */
1112 goto branch_xs;
1113 case BPF_JMP | BPF_JSGE | BPF_X: /* ((s64) dst >= (s64) src) */
1114 mask = 0xa000; /* jhe */
1115 goto branch_xs;
1116 case BPF_JMP | BPF_JGT | BPF_X: /* (dst > src) */
1117 mask = 0x2000; /* jh */
1118 goto branch_xu;
1119 case BPF_JMP | BPF_JGE | BPF_X: /* (dst >= src) */
1120 mask = 0xa000; /* jhe */
1121 goto branch_xu;
1122 case BPF_JMP | BPF_JNE | BPF_X: /* (dst != src) */
1123 mask = 0x7000; /* jne */
1124 goto branch_xu;
1125 case BPF_JMP | BPF_JEQ | BPF_X: /* (dst == src) */
1126 mask = 0x8000; /* je */
1127 goto branch_xu;
1128 case BPF_JMP | BPF_JSET | BPF_X: /* (dst & src) */
1129 mask = 0x7000; /* jnz */
1130 /* ngrk %w1,%dst,%src */
1131 EMIT4_RRF(0xb9e40000, REG_W1, dst_reg, src_reg);
1132 goto branch_oc;
1133branch_ks:
1134 /* lgfi %w1,imm (load sign extend imm) */
1135 EMIT6_IMM(0xc0010000, REG_W1, imm);
1136 /* cgrj %dst,%w1,mask,off */
1137 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, REG_W1, i, off, mask);
1138 break;
1139branch_ku:
1140 /* lgfi %w1,imm (load sign extend imm) */
1141 EMIT6_IMM(0xc0010000, REG_W1, imm);
1142 /* clgrj %dst,%w1,mask,off */
1143 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, REG_W1, i, off, mask);
1144 break;
1145branch_xs:
1146 /* cgrj %dst,%src,mask,off */
1147 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, src_reg, i, off, mask);
1148 break;
1149branch_xu:
1150 /* clgrj %dst,%src,mask,off */
1151 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, src_reg, i, off, mask);
1152 break;
1153branch_oc:
1154 /* brc mask,jmp_off (branch instruction needs 4 bytes) */
1155 jmp_off = addrs[i + off + 1] - (addrs[i + 1] - 4);
1156 EMIT4_PCREL(0xa7040000 | mask << 8, jmp_off);
5303a0fe 1157 break;
05462310
MH		 1158 /*
1159 * BPF_LD
1160 */
1161 case BPF_LD | BPF_ABS | BPF_B: /* b0 = *(u8 *) (skb->data+imm) */
1162 case BPF_LD | BPF_IND | BPF_B: /* b0 = *(u8 *) (skb->data+imm+src) */
1163 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1164 func_addr = __pa(sk_load_byte_pos);
1165 else
1166 func_addr = __pa(sk_load_byte);
1167 goto call_fn;
1168 case BPF_LD | BPF_ABS | BPF_H: /* b0 = *(u16 *) (skb->data+imm) */
1169 case BPF_LD | BPF_IND | BPF_H: /* b0 = *(u16 *) (skb->data+imm+src) */
1170 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1171 func_addr = __pa(sk_load_half_pos);
1172 else
1173 func_addr = __pa(sk_load_half);
1174 goto call_fn;
1175 case BPF_LD | BPF_ABS | BPF_W: /* b0 = *(u32 *) (skb->data+imm) */
1176 case BPF_LD | BPF_IND | BPF_W: /* b0 = *(u32 *) (skb->data+imm+src) */
1177 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1178 func_addr = __pa(sk_load_word_pos);
1179 else
1180 func_addr = __pa(sk_load_word);
1181 goto call_fn;
1182call_fn:
1183 jit->seen |= SEEN_SKB | SEEN_RET0 | SEEN_FUNC;
1184 REG_SET_SEEN(REG_14); /* Return address of possible func call */
1185
1186 /*
1187 * Implicit input:
1188 * BPF_REG_6 (R7) : skb pointer
1189 * REG_SKB_DATA (R12): skb data pointer
1190 *
1191 * Calculated input:
1192 * BPF_REG_2 (R3) : offset of byte(s) to fetch in skb
1193 * BPF_REG_5 (R6) : return address
1194 *
1195 * Output:
1196 * BPF_REG_0 (R14): data read from skb
1197 *
1198 * Scratch registers (BPF_REG_1-5)
1199 */
1200
1201 /* Call function: llilf %w1,func_addr */
1202 EMIT6_IMM(0xc00f0000, REG_W1, func_addr);
1203
1204 /* Offset: lgfi %b2,imm */
1205 EMIT6_IMM(0xc0010000, BPF_REG_2, imm);
1206 if (BPF_MODE(insn->code) == BPF_IND)
1207 /* agfr %b2,%src (%src is s32 here) */
1208 EMIT4(0xb9180000, BPF_REG_2, src_reg);
1209
1210 /* basr %b5,%w1 (%b5 is call saved) */
1211 EMIT2(0x0d00, BPF_REG_5, REG_W1);
1212
1213 /*
1214 * Note: For fast access we jump directly after the
1215 * jnz instruction from bpf_jit.S
1216 */
1217 /* jnz <ret0> */
1218 EMIT4_PCREL(0xa7740000, jit->ret0_ip - jit->prg);
c10302ef
MS		 1219 break;
1220 default: /* too complex, give up */
05462310
MH		 1221 pr_err("Unknown opcode %02x\n", insn->code);
1222 return -1;
1223 }
1224 return insn_count;
1225}
1226
1227/*
1228 * Compile eBPF program into s390x code
1229 */
1230static int bpf_jit_prog(struct bpf_jit *jit, struct bpf_prog *fp)
1231{
1232 int i, insn_count;
1233
1234 jit->lit = jit->lit_start;
1235 jit->prg = 0;
1236
cde66c2d 1237 bpf_jit_prologue(jit, fp->type == BPF_PROG_TYPE_UNSPEC);
05462310
MH		 1238 for (i = 0; i < fp->len; i += insn_count) {
1239 insn_count = bpf_jit_insn(jit, fp, i);
1240 if (insn_count < 0)
1241 return -1;
1242 jit->addrs[i + 1] = jit->prg; /* Next instruction address */
c10302ef 1243 }
05462310
MH		 1244 bpf_jit_epilogue(jit);
1245
1246 jit->lit_start = jit->prg;
1247 jit->size = jit->lit;
1248 jit->size_prg = jit->prg;
c10302ef 1249 return 0;
c10302ef
MS		 1250}
1251
05462310
MH		 1252/*
1253 * Classic BPF function stub. BPF programs will be converted into
1254 * eBPF and then bpf_int_jit_compile() will be called.
1255 */
7ae457c1 1256void bpf_jit_compile(struct bpf_prog *fp)
c10302ef 1257{
05462310
MH		 1258}
1259
1260/*
1261 * Compile eBPF program "fp"
1262 */
1263void bpf_int_jit_compile(struct bpf_prog *fp)
1264{
1265 struct bpf_binary_header *header;
1266 struct bpf_jit jit;
1267 int pass;
c10302ef
MS		 1268
1269 if (!bpf_jit_enable)
1270 return;
05462310
MH		 1271 memset(&jit, 0, sizeof(jit));
1272 jit.addrs = kcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
1273 if (jit.addrs == NULL)
c10302ef 1274 return;
05462310
MH		 1275 /*
1276 * Three initial passes:
1277 * - 1/2: Determine clobbered registers
1278 * - 3: Calculate program size and addrs arrray
1279 */
1280 for (pass = 1; pass <= 3; pass++) {
1281 if (bpf_jit_prog(&jit, fp))
1282 goto free_addrs;
c10302ef 1283 }
05462310
MH		 1284 /*
1285 * Final pass: Allocate and generate program
1286 */
1287 if (jit.size >= BPF_SIZE_MAX)
1288 goto free_addrs;
1289 header = bpf_jit_binary_alloc(jit.size, &jit.prg_buf, 2, jit_fill_hole);
1290 if (!header)
1291 goto free_addrs;
1292 if (bpf_jit_prog(&jit, fp))
1293 goto free_addrs;
c10302ef 1294 if (bpf_jit_enable > 1) {
05462310
MH		 1295 bpf_jit_dump(fp->len, jit.size, pass, jit.prg_buf);
1296 if (jit.prg_buf)
1297 print_fn_code(jit.prg_buf, jit.size_prg);
c10302ef 1298 }
05462310 1299 if (jit.prg_buf) {
aa2d2c73 1300 set_memory_ro((unsigned long)header, header->pages);
05462310 1301 fp->bpf_func = (void *) jit.prg_buf;
286aad3c 1302 fp->jited = true;
aa2d2c73 1303 }
05462310
MH		 1304free_addrs:
1305 kfree(jit.addrs);
c10302ef
MS		 1306}
1307
05462310
MH		 1308/*
1309 * Free eBPF program
1310 */
7ae457c1 1311void bpf_jit_free(struct bpf_prog *fp)
c10302ef 1312{
aa2d2c73
HC		 1313 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
1314 struct bpf_binary_header *header = (void *)addr;
1315
f8bbbfc3 1316 if (!fp->jited)
d45ed4a4 1317 goto free_filter;
f8bbbfc3 1318
aa2d2c73 1319 set_memory_rw(addr, header->pages);
738cbe72 1320 bpf_jit_binary_free(header);
f8bbbfc3 1321
d45ed4a4 1322free_filter:
60a3b225 1323 bpf_prog_unlock_free(fp);
c10302ef 1324}
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