[mirror_ubuntu-artful-kernel.git] / arch / s390 / pci / pci_clp.c

/*
 * Copyright IBM Corp. 2012
 *
 * Author(s):
 *   Jan Glauber <jang@linux.vnet.ibm.com>
 */

#define COMPONENT "zPCI"
#define pr_fmt(fmt) COMPONENT ": " fmt

#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/pci_clp.h>

/*
 * Call Logical Processor
 * Retry logic is handled by the caller.
 */
static inline u8 clp_instr(void *req)
{
	u64 ilpm;
	u8 cc;

	asm volatile (
		"	.insn	rrf,0xb9a00000,%[ilpm],%[req],0x0,0x2\n"
		"	ipm	%[cc]\n"
		"	srl	%[cc],28\n"
		: [cc] "=d" (cc), [ilpm] "=d" (ilpm)
		: [req] "a" (req)
		: "cc", "memory");
	return cc;
}

static void *clp_alloc_block(void)
{
	struct page *page = alloc_pages(GFP_KERNEL, get_order(CLP_BLK_SIZE));
	return (page) ? page_address(page) : NULL;
}

static void clp_free_block(void *ptr)
{
	free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
}

static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
				      struct clp_rsp_query_pci_grp *response)
{
	switch (response->version) {
	case 1:
		zdev->max_bus_speed = PCIE_SPEED_5_0GT;
		break;
	default:
		zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
		break;
	}
}

static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
{
	struct clp_req_rsp_query_pci_grp *rrb;
	int rc;

	rrb = clp_alloc_block();
	if (!rrb)
		return -ENOMEM;

	memset(rrb, 0, sizeof(*rrb));
	rrb->request.hdr.len = sizeof(rrb->request);
	rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
	rrb->response.hdr.len = sizeof(rrb->response);
	rrb->request.pfgid = pfgid;

	rc = clp_instr(rrb);
	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
		clp_store_query_pci_fngrp(zdev, &rrb->response);
	else {
		pr_err("Query PCI FNGRP failed with response: %x  cc: %d\n",
			rrb->response.hdr.rsp, rc);
		rc = -EIO;
	}
	clp_free_block(rrb);
	return rc;
}

static int clp_store_query_pci_fn(struct zpci_dev *zdev,
				  struct clp_rsp_query_pci *response)
{
	int i;

	for (i = 0; i < PCI_BAR_COUNT; i++) {
		zdev->bars[i].val = le32_to_cpu(response->bar[i]);
		zdev->bars[i].size = response->bar_size[i];
	}
	zdev->pchid = response->pchid;
	zdev->pfgid = response->pfgid;
	return 0;
}

static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
{
	struct clp_req_rsp_query_pci *rrb;
	int rc;

	rrb = clp_alloc_block();
	if (!rrb)
		return -ENOMEM;

	memset(rrb, 0, sizeof(*rrb));
	rrb->request.hdr.len = sizeof(rrb->request);
	rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
	rrb->response.hdr.len = sizeof(rrb->response);
	rrb->request.fh = fh;

	rc = clp_instr(rrb);
	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
		rc = clp_store_query_pci_fn(zdev, &rrb->response);
		if (rc)
			goto out;
		if (rrb->response.pfgid)
			rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
	} else {
		pr_err("Query PCI failed with response: %x  cc: %d\n",
			 rrb->response.hdr.rsp, rc);
		rc = -EIO;
	}
out:
	clp_free_block(rrb);
	return rc;
}

int clp_add_pci_device(u32 fid, u32 fh, int configured)
{
	struct zpci_dev *zdev;
	int rc;

	zdev = zpci_alloc_device();
	if (IS_ERR(zdev))
		return PTR_ERR(zdev);

	zdev->fh = fh;
	zdev->fid = fid;

	/* Query function properties and update zdev */
	rc = clp_query_pci_fn(zdev, fh);
	if (rc)
		goto error;

	if (configured)
		zdev->state = ZPCI_FN_STATE_CONFIGURED;
	else
		zdev->state = ZPCI_FN_STATE_STANDBY;

	rc = zpci_create_device(zdev);
	if (rc)
		goto error;
	return 0;

error:
	zpci_free_device(zdev);
	return rc;
}

/*
 * Enable/Disable a given PCI function defined by its function handle.
 */
static int clp_set_pci_fn(u32 *fh, u8 nr_dma_as, u8 command)
{
	struct clp_req_rsp_set_pci *rrb;
	int rc, retries = 1000;

	rrb = clp_alloc_block();
	if (!rrb)
		return -ENOMEM;

	do {
		memset(rrb, 0, sizeof(*rrb));
		rrb->request.hdr.len = sizeof(rrb->request);
		rrb->request.hdr.cmd = CLP_SET_PCI_FN;
		rrb->response.hdr.len = sizeof(rrb->response);
		rrb->request.fh = *fh;
		rrb->request.oc = command;
		rrb->request.ndas = nr_dma_as;

		rc = clp_instr(rrb);
		if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
			retries--;
			if (retries < 0)
				break;
			msleep(1);
		}
	} while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);

	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
		*fh = rrb->response.fh;
	else {
		pr_err("Set PCI FN failed with response: %x  cc: %d\n",
			rrb->response.hdr.rsp, rc);
		rc = -EIO;
	}
	clp_free_block(rrb);
	return rc;
}

int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
{
	u32 fh = zdev->fh;
	int rc;

	rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
	if (!rc)
		/* Success -> store enabled handle in zdev */
		zdev->fh = fh;
	return rc;
}

int clp_disable_fh(struct zpci_dev *zdev)
{
	u32 fh = zdev->fh;
	int rc;

	if (!zdev_enabled(zdev))
		return 0;

	dev_info(&zdev->pdev->dev, "disabling fn handle: 0x%x\n", fh);
	rc = clp_set_pci_fn(&fh, 0, CLP_SET_DISABLE_PCI_FN);
	if (!rc)
		/* Success -> store disabled handle in zdev */
		zdev->fh = fh;
	else
		dev_err(&zdev->pdev->dev,
			"Failed to disable fn handle: 0x%x\n", fh);
	return rc;
}

static void clp_check_pcifn_entry(struct clp_fh_list_entry *entry)
{
	int present, rc;

	if (!entry->vendor_id)
		return;

	/* TODO: be a little bit more scalable */
	present = zpci_fid_present(entry->fid);

	if (present)
		pr_debug("%s: device %x already present\n", __func__, entry->fid);

	/* skip already used functions */
	if (present && entry->config_state)
		return;

	/* aev 306: function moved to stand-by state */
	if (present && !entry->config_state) {
		/*
		 * The handle is already disabled, that means no iota/irq freeing via
		 * the firmware interfaces anymore. Need to free resources manually
		 * (DMA memory, debug, sysfs)...
		 */
		zpci_stop_device(get_zdev_by_fid(entry->fid));
		return;
	}

	rc = clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
	if (rc)
		pr_err("Failed to add fid: 0x%x\n", entry->fid);
}

int clp_find_pci_devices(void)
{
	struct clp_req_rsp_list_pci *rrb;
	u64 resume_token = 0;
	int entries, i, rc;

	rrb = clp_alloc_block();
	if (!rrb)
		return -ENOMEM;

	do {
		memset(rrb, 0, sizeof(*rrb));
		rrb->request.hdr.len = sizeof(rrb->request);
		rrb->request.hdr.cmd = CLP_LIST_PCI;
		/* store as many entries as possible */
		rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
		rrb->request.resume_token = resume_token;

		/* Get PCI function handle list */
		rc = clp_instr(rrb);
		if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
			pr_err("List PCI failed with response: 0x%x  cc: %d\n",
				rrb->response.hdr.rsp, rc);
			rc = -EIO;
			goto out;
		}

		WARN_ON_ONCE(rrb->response.entry_size !=
			sizeof(struct clp_fh_list_entry));

		entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
			rrb->response.entry_size;
		pr_info("Detected number of PCI functions: %u\n", entries);

		/* Store the returned resume token as input for the next call */
		resume_token = rrb->response.resume_token;

		for (i = 0; i < entries; i++)
			clp_check_pcifn_entry(&rrb->response.fh_list[i]);
	} while (resume_token);

	pr_debug("Maximum number of supported PCI functions: %u\n",
		rrb->response.max_fn);
out:
	clp_free_block(rrb);
	return rc;
}
Commit	Line	Data
a755a45d JG	1	/*
	2	* Copyright IBM Corp. 2012
	3	*
	4	* Author(s):
	5	* Jan Glauber <jang@linux.vnet.ibm.com>
	6	*/
	7
	8	#define COMPONENT "zPCI"
	9	#define pr_fmt(fmt) COMPONENT ": " fmt
	10
	11	#include <linux/kernel.h>
	12	#include <linux/slab.h>
	13	#include <linux/err.h>
	14	#include <linux/delay.h>
	15	#include <linux/pci.h>
	16	#include <asm/pci_clp.h>
	17
	18	/*
	19	* Call Logical Processor
	20	* Retry logic is handled by the caller.
	21	*/
	22	static inline u8 clp_instr(void *req)
	23	{
	24	u64 ilpm;
	25	u8 cc;
	26
	27	asm volatile (
	28	" .insn rrf,0xb9a00000,%[ilpm],%[req],0x0,0x2\n"
	29	" ipm %[cc]\n"
	30	" srl %[cc],28\n"
	31	: [cc] "=d" (cc), [ilpm] "=d" (ilpm)
	32	: [req] "a" (req)
	33	: "cc", "memory");
	34	return cc;
	35	}
	36
	37	static void *clp_alloc_block(void)
	38	{
	39	struct page *page = alloc_pages(GFP_KERNEL, get_order(CLP_BLK_SIZE));
	40	return (page) ? page_address(page) : NULL;
	41	}
	42
	43	static void clp_free_block(void *ptr)
	44	{
	45	free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
	46	}
	47
	48	static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
	49	struct clp_rsp_query_pci_grp *response)
	50	{
	51	switch (response->version) {
	52	case 1:
	53	zdev->max_bus_speed = PCIE_SPEED_5_0GT;
	54	break;
	55	default:
	56	zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
	57	break;
	58	}
	59	}
	60
	61	static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
	62	{
	63	struct clp_req_rsp_query_pci_grp *rrb;
	64	int rc;
65
66	rrb = clp_alloc_block();
67	if (!rrb)
68	return -ENOMEM;
69
70	memset(rrb, 0, sizeof(*rrb));
71	rrb->request.hdr.len = sizeof(rrb->request);
72	rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
73	rrb->response.hdr.len = sizeof(rrb->response);
74	rrb->request.pfgid = pfgid;
75
76	rc = clp_instr(rrb);
77	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
78	clp_store_query_pci_fngrp(zdev, &rrb->response);
79	else {
80	pr_err("Query PCI FNGRP failed with response: %x cc: %d\n",
81	rrb->response.hdr.rsp, rc);
82	rc = -EIO;
83	}
84	clp_free_block(rrb);
85	return rc;
86	}
87
88	static int clp_store_query_pci_fn(struct zpci_dev *zdev,
89	struct clp_rsp_query_pci *response)
90	{
91	int i;
92
93	for (i = 0; i < PCI_BAR_COUNT; i++) {
94	zdev->bars[i].val = le32_to_cpu(response->bar[i]);
95	zdev->bars[i].size = response->bar_size[i];
96	}
97	zdev->pchid = response->pchid;
98	zdev->pfgid = response->pfgid;
99	return 0;
100	}
101
102	static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
103	{
104	struct clp_req_rsp_query_pci *rrb;
105	int rc;
106
107	rrb = clp_alloc_block();
108	if (!rrb)
109	return -ENOMEM;
110
111	memset(rrb, 0, sizeof(*rrb));
112	rrb->request.hdr.len = sizeof(rrb->request);
113	rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
114	rrb->response.hdr.len = sizeof(rrb->response);
115	rrb->request.fh = fh;
116
117	rc = clp_instr(rrb);
118	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
119	rc = clp_store_query_pci_fn(zdev, &rrb->response);
120	if (rc)
121	goto out;
122	if (rrb->response.pfgid)
123	rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
124	} else {
125	pr_err("Query PCI failed with response: %x cc: %d\n",
126	rrb->response.hdr.rsp, rc);
127	rc = -EIO;
128	}
129	out:
130	clp_free_block(rrb);
131	return rc;
132	}
133
134	int clp_add_pci_device(u32 fid, u32 fh, int configured)
135	{
136	struct zpci_dev *zdev;
137	int rc;
138
139	zdev = zpci_alloc_device();
140	if (IS_ERR(zdev))
141	return PTR_ERR(zdev);
142
143	zdev->fh = fh;
144	zdev->fid = fid;
145
146	/* Query function properties and update zdev */
147	rc = clp_query_pci_fn(zdev, fh);
148	if (rc)
149	goto error;
150
151	if (configured)
152	zdev->state = ZPCI_FN_STATE_CONFIGURED;
153	else
154	zdev->state = ZPCI_FN_STATE_STANDBY;
155
156	rc = zpci_create_device(zdev);
157	if (rc)
158	goto error;
159	return 0;
160
161	error:
162	zpci_free_device(zdev);
163	return rc;
164	}
165
166	/*
167	* Enable/Disable a given PCI function defined by its function handle.
168	*/
169	static int clp_set_pci_fn(u32 *fh, u8 nr_dma_as, u8 command)
170	{
171	struct clp_req_rsp_set_pci *rrb;
172	int rc, retries = 1000;
173
174	rrb = clp_alloc_block();
175	if (!rrb)
176	return -ENOMEM;
177
178	do {
179	memset(rrb, 0, sizeof(*rrb));
180	rrb->request.hdr.len = sizeof(rrb->request);
181	rrb->request.hdr.cmd = CLP_SET_PCI_FN;
182	rrb->response.hdr.len = sizeof(rrb->response);
183	rrb->request.fh = *fh;
184	rrb->request.oc = command;
185	rrb->request.ndas = nr_dma_as;
186
187	rc = clp_instr(rrb);
188	if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
189	retries--;
190	if (retries < 0)
191	break;
192	msleep(1);
193	}
194	} while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
195
196	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
197	*fh = rrb->response.fh;
198	else {
199	pr_err("Set PCI FN failed with response: %x cc: %d\n",
200	rrb->response.hdr.rsp, rc);
201	rc = -EIO;
202	}
203	clp_free_block(rrb);
204	return rc;
205	}
206
207	int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
208	{
209	u32 fh = zdev->fh;
210	int rc;
211
212	rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
213	if (!rc)
214	/* Success -> store enabled handle in zdev */
215	zdev->fh = fh;
216	return rc;
217	}
218
219	int clp_disable_fh(struct zpci_dev *zdev)
220	{
221	u32 fh = zdev->fh;
222	int rc;
223
224	if (!zdev_enabled(zdev))
225	return 0;
226
227	dev_info(&zdev->pdev->dev, "disabling fn handle: 0x%x\n", fh);
228	rc = clp_set_pci_fn(&fh, 0, CLP_SET_DISABLE_PCI_FN);
229	if (!rc)
230	/* Success -> store disabled handle in zdev */
231	zdev->fh = fh;
232	else
233	dev_err(&zdev->pdev->dev,
234	"Failed to disable fn handle: 0x%x\n", fh);
235	return rc;
236	}
237
238	static void clp_check_pcifn_entry(struct clp_fh_list_entry *entry)
239	{
240	int present, rc;
241
242	if (!entry->vendor_id)
243	return;
244
245	/* TODO: be a little bit more scalable */
246	present = zpci_fid_present(entry->fid);
247
248	if (present)
249	pr_debug("%s: device %x already present\n", __func__, entry->fid);
250
251	/* skip already used functions */
252	if (present && entry->config_state)
253	return;
254
255	/* aev 306: function moved to stand-by state */
256	if (present && !entry->config_state) {
257	/*
258	* The handle is already disabled, that means no iota/irq freeing via
259	* the firmware interfaces anymore. Need to free resources manually
260	* (DMA memory, debug, sysfs)...
261	*/
262	zpci_stop_device(get_zdev_by_fid(entry->fid));
263	return;
264	}
265
266	rc = clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
267	if (rc)
268	pr_err("Failed to add fid: 0x%x\n", entry->fid);
269	}
270
271	int clp_find_pci_devices(void)
272	{
273	struct clp_req_rsp_list_pci *rrb;
274	u64 resume_token = 0;
275	int entries, i, rc;
276
277	rrb = clp_alloc_block();
278	if (!rrb)
279	return -ENOMEM;
280
281	do {
282	memset(rrb, 0, sizeof(*rrb));
283	rrb->request.hdr.len = sizeof(rrb->request);
284	rrb->request.hdr.cmd = CLP_LIST_PCI;
285	/* store as many entries as possible */
286	rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
287	rrb->request.resume_token = resume_token;
288
289	/* Get PCI function handle list */
290	rc = clp_instr(rrb);
291	if (rc \|\| rrb->response.hdr.rsp != CLP_RC_OK) {
292	pr_err("List PCI failed with response: 0x%x cc: %d\n",
293	rrb->response.hdr.rsp, rc);
294	rc = -EIO;
295	goto out;
296	}
297
298	WARN_ON_ONCE(rrb->response.entry_size !=
299	sizeof(struct clp_fh_list_entry));
300
301	entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
302	rrb->response.entry_size;
303	pr_info("Detected number of PCI functions: %u\n", entries);
304
305	/* Store the returned resume token as input for the next call */
306	resume_token = rrb->response.resume_token;
307
308	for (i = 0; i < entries; i++)
309	clp_check_pcifn_entry(&rrb->response.fh_list[i]);
310	} while (resume_token);
311
312	pr_debug("Maximum number of supported PCI functions: %u\n",
313	rrb->response.max_fn);
314	out:
315	clp_free_block(rrb);
316	return rc;
317	}