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sh: Fixup entry-common path breakage for SH-3.
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1da177e4
LT
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "Linux/SuperH Kernel Configuration"
7
8config SUPERH
9 bool
10 default y
7a440c95 11 select EMBEDDED
1da177e4
LT
12 help
13 The SuperH is a RISC processor targeted for use in embedded systems
14 and consumer electronics; it was also used in the Sega Dreamcast
15 gaming console. The SuperH port has a home page at
16 <http://www.linux-sh.org/>.
17
1da177e4
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18config RWSEM_GENERIC_SPINLOCK
19 bool
20 default y
21
22config RWSEM_XCHGADD_ALGORITHM
23 bool
24
e2268c71
AM
25config GENERIC_FIND_NEXT_BIT
26 bool
27 default y
28
29config GENERIC_HWEIGHT
30 bool
31 default y
32
1da177e4
LT
33config GENERIC_HARDIRQS
34 bool
35 default y
36
37config GENERIC_IRQ_PROBE
38 bool
39 default y
40
41config GENERIC_CALIBRATE_DELAY
42 bool
43 default y
44
cad82448
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45config GENERIC_IOMAP
46 bool
47
45882145
PM
48config GENERIC_TIME
49 def_bool n
50
a08b6b79
AV
51config ARCH_MAY_HAVE_PC_FDC
52 bool
a08b6b79 53
1da177e4
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54source "init/Kconfig"
55
56menu "System type"
57
bc8fb5d0
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58config SOLUTION_ENGINE
59 bool
60
1da177e4
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61choice
62 prompt "SuperH system type"
63 default SH_UNKNOWN
64
65config SH_SOLUTION_ENGINE
66 bool "SolutionEngine"
bc8fb5d0 67 select SOLUTION_ENGINE
1da177e4
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68 help
69 Select SolutionEngine if configuring for a Hitachi SH7709
70 or SH7750 evaluation board.
71
72config SH_7751_SOLUTION_ENGINE
73 bool "SolutionEngine7751"
bc8fb5d0 74 select SOLUTION_ENGINE
cad82448 75 select CPU_SUBTYPE_SH7751
1da177e4
LT
76 help
77 Select 7751 SolutionEngine if configuring for a Hitachi SH7751
78 evaluation board.
79
80config SH_7300_SOLUTION_ENGINE
81 bool "SolutionEngine7300"
bc8fb5d0 82 select SOLUTION_ENGINE
cad82448 83 select CPU_SUBTYPE_SH7300
1da177e4 84 help
bc8fb5d0
PM
85 Select 7300 SolutionEngine if configuring for a Hitachi
86 SH7300(SH-Mobile V) evaluation board.
87
88config SH_7343_SOLUTION_ENGINE
89 bool "SolutionEngine7343"
90 select SOLUTION_ENGINE
91 select CPU_SUBTYPE_SH7343
92 help
93 Select 7343 SolutionEngine if configuring for a Hitachi
94 SH7343 (SH-Mobile 3AS) evaluation board.
1da177e4
LT
95
96config SH_73180_SOLUTION_ENGINE
97 bool "SolutionEngine73180"
bc8fb5d0
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98 select SOLUTION_ENGINE
99 select CPU_SUBTYPE_SH73180
100 help
101 Select 73180 SolutionEngine if configuring for a Hitachi
102 SH73180(SH-Mobile 3) evaluation board.
1da177e4
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103
104config SH_7751_SYSTEMH
105 bool "SystemH7751R"
cad82448 106 select CPU_SUBTYPE_SH7751R
1da177e4
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107 help
108 Select SystemH if you are configuring for a Renesas SystemH
109 7751R evaluation board.
110
cad82448
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111config SH_HP6XX
112 bool "HP6XX"
1da177e4 113 help
cad82448 114 Select HP6XX if configuring for a HP jornada HP6xx.
1da177e4
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115 More information (hardware only) at
116 <http://www.hp.com/jornada/>.
117
1da177e4
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118config SH_EC3104
119 bool "EC3104"
120 help
121 Select EC3104 if configuring for a system with an Eclipse
122 International EC3104 chip, e.g. the Harris AD2000.
123
124config SH_SATURN
125 bool "Saturn"
cad82448 126 select CPU_SUBTYPE_SH7604
1da177e4
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127 help
128 Select Saturn if configuring for a SEGA Saturn.
129
130config SH_DREAMCAST
131 bool "Dreamcast"
cad82448 132 select CPU_SUBTYPE_SH7091
1da177e4
LT
133 help
134 Select Dreamcast if configuring for a SEGA Dreamcast.
135 More information at
136 <http://www.m17n.org/linux-sh/dreamcast/>. There is a
137 Dreamcast project is at <http://linuxdc.sourceforge.net/>.
138
1da177e4
LT
139config SH_BIGSUR
140 bool "BigSur"
141
1da177e4 142config SH_MPC1211
cad82448
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143 bool "Interface MPC1211"
144 help
145 CTP/PCI-SH02 is a CPU module computer that is produced
146 by Interface Corporation.
147 More information at <http://www.interface.co.jp>
1da177e4
LT
148
149config SH_SH03
cad82448 150 bool "Interface CTP/PCI-SH03"
1da177e4 151 help
cad82448 152 CTP/PCI-SH03 is a CPU module computer that is produced
1da177e4 153 by Interface Corporation.
1da177e4
LT
154 More information at <http://www.interface.co.jp>
155
156config SH_SECUREEDGE5410
157 bool "SecureEdge5410"
cad82448 158 select CPU_SUBTYPE_SH7751R
1da177e4
LT
159 help
160 Select SecureEdge5410 if configuring for a SnapGear SH board.
161 This includes both the OEM SecureEdge products as well as the
162 SME product line.
163
164config SH_HS7751RVOIP
165 bool "HS7751RVOIP"
cad82448 166 select CPU_SUBTYPE_SH7751R
1da177e4
LT
167 help
168 Select HS7751RVOIP if configuring for a Renesas Technology
169 Sales VoIP board.
170
91b91d01
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171config SH_7710VOIPGW
172 bool "SH7710-VOIP-GW"
173 select CPU_SUBTYPE_SH7710
174 help
175 Select this option to build a kernel for the SH7710 based
176 VOIP GW.
177
1da177e4
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178config SH_RTS7751R2D
179 bool "RTS7751R2D"
cad82448 180 select CPU_SUBTYPE_SH7751R
1da177e4
LT
181 help
182 Select RTS7751R2D if configuring for a Renesas Technology
183 Sales SH-Graphics board.
184
cad82448
PM
185config SH_R7780RP
186 bool "R7780RP-1"
187 select CPU_SUBTYPE_SH7780
188 help
189 Select R7780RP-1 if configuring for a Renesas Solutions
190 HIGHLANDER board.
191
1da177e4
LT
192config SH_EDOSK7705
193 bool "EDOSK7705"
cad82448 194 select CPU_SUBTYPE_SH7705
1da177e4
LT
195
196config SH_SH4202_MICRODEV
197 bool "SH4-202 MicroDev"
cad82448 198 select CPU_SUBTYPE_SH4_202
1da177e4
LT
199 help
200 Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
201 with an SH4-202 CPU.
202
cad82448
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203config SH_LANDISK
204 bool "LANDISK"
205 select CPU_SUBTYPE_SH7751R
206 help
207 I-O DATA DEVICE, INC. "LANDISK Series" support.
208
209config SH_TITAN
210 bool "TITAN"
211 select CPU_SUBTYPE_SH7751R
212 help
213 Select Titan if you are configuring for a Nimble Microsystems
214 NetEngine NP51R.
215
51e22e7a
TY
216config SH_SHMIN
217 bool "SHMIN"
218 select CPU_SUBTYPE_SH7706
219 help
3cb2fccc 220 Select SHMIN if configuring for the SHMIN board.
51e22e7a 221
9d4436a6
YS
222config SH_7206_SOLUTION_ENGINE
223 bool "SolutionEngine7206"
224 select CPU_SUBTYPE_SH7206
225 help
226 Select 7206 SolutionEngine if configuring for a Hitachi SH7206
227 evaluation board.
228
229config SH_7619_SOLUTION_ENGINE
230 bool "SolutionEngine7619"
231 select CPU_SUBTYPE_SH7619
232 help
233 Select 7619 SolutionEngine if configuring for a Hitachi SH7619
234 evaluation board.
235
1da177e4
LT
236config SH_UNKNOWN
237 bool "BareCPU"
238 help
239 "Bare CPU" aka "unknown" means an SH-based system which is not one
240 of the specific ones mentioned above, which means you need to enter
241 all sorts of stuff like CONFIG_MEMORY_START because the config
242 system doesn't already know what it is. You get a machine vector
243 without any platform-specific code in it, so things like the RTC may
244 not work.
245
246 This option is for the early stages of porting to a new machine.
247
248endchoice
249
cad82448 250source "arch/sh/mm/Kconfig"
1da177e4 251
1da177e4
LT
252config CF_ENABLER
253 bool "Compact Flash Enabler support"
5a4053b2 254 depends on SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_SH03
1da177e4
LT
255 ---help---
256 Compact Flash is a small, removable mass storage device introduced
257 in 1994 originally as a PCMCIA device. If you say `Y' here, you
258 compile in support for Compact Flash devices directly connected to
259 a SuperH processor. A Compact Flash FAQ is available at
260 <http://www.compactflash.org/faqs/faq.htm>.
261
262 If your board has "Directly Connected" CompactFlash at area 5 or 6,
263 you may want to enable this option. Then, you can use CF as
264 primary IDE drive (only tested for SanDisk).
265
266 If in doubt, select 'N'.
267
268choice
269 prompt "Compact Flash Connection Area"
270 depends on CF_ENABLER
271 default CF_AREA6
272
273config CF_AREA5
274 bool "Area5"
275 help
276 If your board has "Directly Connected" CompactFlash, You should
277 select the area where your CF is connected to.
278
279 - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
280 - "Area6" if it is connected to Area 6 (0x18000000)
281
5a4053b2 282 "Area6" will work for most boards.
1da177e4
LT
283
284config CF_AREA6
285 bool "Area6"
286
287endchoice
288
289config CF_BASE_ADDR
290 hex
291 depends on CF_ENABLER
292 default "0xb8000000" if CF_AREA6
293 default "0xb4000000" if CF_AREA5
294
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295menu "Processor features"
296
297config CPU_LITTLE_ENDIAN
298 bool "Little Endian"
299 help
300 Some SuperH machines can be configured for either little or big
301 endian byte order. These modes require different kernels. Say Y if
302 your machine is little endian, N if it's a big endian machine.
303
1da177e4
LT
304config SH_FPU
305 bool "FPU support"
306 depends on !CPU_SH3
307 default y
308 help
309 Selecting this option will enable support for SH processors that
310 have FPU units (ie, SH77xx).
311
312 This option must be set in order to enable the FPU.
313
4b565680
TY
314config SH_FPU_EMU
315 bool "FPU emulation support"
316 depends on !SH_FPU && EXPERIMENTAL
317 default n
318 help
319 Selecting this option will enable support for software FPU emulation.
320 Most SH-3 users will want to say Y here, whereas most SH-4 users will
321 want to say N.
322
1da177e4
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323config SH_DSP
324 bool "DSP support"
e5723e0e
PM
325 default y if SH4AL_DSP || !CPU_SH4
326 default n
1da177e4
LT
327 help
328 Selecting this option will enable support for SH processors that
e5723e0e 329 have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
1da177e4
LT
330
331 This option must be set in order to enable the DSP.
332
333config SH_ADC
334 bool "ADC support"
335 depends on CPU_SH3
336 default y
337 help
338 Selecting this option will allow the Linux kernel to use SH3 on-chip
339 ADC module.
340
341 If unsure, say N.
342
cad82448
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343config SH_STORE_QUEUES
344 bool "Support for Store Queues"
345 depends on CPU_SH4
346 help
347 Selecting this option will enable an in-kernel API for manipulating
348 the store queues integrated in the SH-4 processors.
349
350config CPU_HAS_INTEVT
1da177e4 351 bool
1da177e4 352
cad82448
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353config CPU_HAS_PINT_IRQ
354 bool
1da177e4 355
ba463937
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356config CPU_HAS_MASKREG_IRQ
357 bool
358
cad82448
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359config CPU_HAS_INTC2_IRQ
360 bool
3f22ab27 361
cad82448
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362config CPU_HAS_SR_RB
363 bool "CPU has SR.RB"
364 depends on CPU_SH3 || CPU_SH4
365 default y
1da177e4 366 help
cad82448
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367 This will enable the use of SR.RB register bank usage. Processors
368 that are lacking this bit must have another method in place for
369 accomplishing what is taken care of by the banked registers.
1da177e4 370
cad82448
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371 See <file:Documentation/sh/register-banks.txt> for further
372 information on SR.RB and register banking in the kernel in general.
1da177e4 373
cad82448 374endmenu
1da177e4 375
cad82448 376menu "Timer support"
45882145 377depends on !GENERIC_TIME
1da177e4 378
cad82448
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379config SH_TMU
380 bool "TMU timer support"
9d4436a6 381 depends on CPU_SH3 || CPU_SH4
1da177e4 382 default y
1da177e4 383 help
cad82448 384 This enables the use of the TMU as the system timer.
1da177e4 385
9d4436a6
YS
386config SH_CMT
387 bool "CMT timer support"
388 depends on CPU_SH2
389 default y
390 help
391 This enables the use of the CMT as the system timer.
392
393config SH_MTU2
394 bool "MTU2 timer support"
395 depends on CPU_SH2A
396 default n
397 help
398 This enables the use of the MTU2 as the system timer.
399
cad82448 400endmenu
1da177e4 401
e8fb67f8 402source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
1da177e4 403
36efc354 404source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
cad82448 405
5283ecb5
PM
406source "arch/sh/boards/renesas/r7780rp/Kconfig"
407
cad82448
PM
408config SH_PCLK_FREQ
409 int "Peripheral clock frequency (in Hz)"
9d4436a6
YS
410 default "27000000" if CPU_SUBTYPE_SH73180 || CPU_SUBTYPE_SH7343
411 default "31250000" if CPU_SUBTYPE_SH7619
412 default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \
413 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
414 CPU_SUBTYPE_SH7206
cad82448
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415 default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780
416 default "60000000" if CPU_SUBTYPE_SH7751
cad82448 417 default "66000000" if CPU_SUBTYPE_SH4_202
1da177e4 418 help
cad82448
PM
419 This option is used to specify the peripheral clock frequency.
420 This is necessary for determining the reference clock value on
421 platforms lacking an RTC.
1da177e4 422
9d4436a6
YS
423config SH_CLK_MD
424 int "CPU Mode Pin Setting"
425 depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
426 help
427 MD2 - MD0 Setting.
428
cad82448
PM
429menu "CPU Frequency scaling"
430
431source "drivers/cpufreq/Kconfig"
1da177e4 432
cad82448
PM
433config SH_CPU_FREQ
434 tristate "SuperH CPU Frequency driver"
435 depends on CPU_FREQ
436 select CPU_FREQ_TABLE
1da177e4 437 help
cad82448
PM
438 This adds the cpufreq driver for SuperH. At present, only
439 the SH-4 is supported.
1da177e4 440
cad82448 441 For details, take a look at <file:Documentation/cpu-freq>.
1da177e4
LT
442
443 If unsure, say N.
444
cad82448
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445endmenu
446
447source "arch/sh/drivers/dma/Kconfig"
448
449source "arch/sh/cchips/Kconfig"
450
451config HEARTBEAT
452 bool "Heartbeat LED"
5a4053b2 453 depends on SH_MPC1211 || SH_SH03 || \
bc8fb5d0 454 SH_BIGSUR || SOLUTION_ENGINE || \
cad82448 455 SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
1da177e4 456 help
cad82448
PM
457 Use the power-on LED on your machine as a load meter. The exact
458 behavior is platform-dependent, but normally the flash frequency is
459 a hyperbolic function of the 5-minute load average.
1da177e4 460
cad82448 461endmenu
1da177e4 462
cad82448
PM
463config ISA_DMA_API
464 bool
05efc67d 465 depends on SH_MPC1211
cad82448 466 default y
1da177e4 467
cad82448
PM
468menu "Kernel features"
469
91b91d01
PM
470source kernel/Kconfig.hz
471
cad82448
PM
472config KEXEC
473 bool "kexec system call (EXPERIMENTAL)"
474 depends on EXPERIMENTAL
1da177e4 475 help
cad82448
PM
476 kexec is a system call that implements the ability to shutdown your
477 current kernel, and to start another kernel. It is like a reboot
1f1332f7 478 but it is independent of the system firmware. And like a reboot
cad82448
PM
479 you can start any kernel with it, not just Linux.
480
1f1332f7 481 The name comes from the similarity to the exec system call.
cad82448
PM
482
483 It is an ongoing process to be certain the hardware in a machine
484 is properly shutdown, so do not be surprised if this code does not
485 initially work for you. It may help to enable device hotplugging
486 support. As of this writing the exact hardware interface is
487 strongly in flux, so no good recommendation can be made.
488
1da177e4
LT
489config SMP
490 bool "Symmetric multi-processing support"
491 ---help---
492 This enables support for systems with more than one CPU. If you have
493 a system with only one CPU, like most personal computers, say N. If
494 you have a system with more than one CPU, say Y.
495
496 If you say N here, the kernel will run on single and multiprocessor
497 machines, but will use only one CPU of a multiprocessor machine. If
498 you say Y here, the kernel will run on many, but not all,
499 singleprocessor machines. On a singleprocessor machine, the kernel
500 will run faster if you say N here.
501
502 People using multiprocessor machines who say Y here should also say
503 Y to "Enhanced Real Time Clock Support", below.
504
505 See also the <file:Documentation/smp.txt>,
506 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
507 at <http://www.tldp.org/docs.html#howto>.
508
509 If you don't know what to do here, say N.
510
511config NR_CPUS
512 int "Maximum number of CPUs (2-32)"
513 range 2 32
514 depends on SMP
515 default "2"
516 help
517 This allows you to specify the maximum number of CPUs which this
518 kernel will support. The maximum supported value is 32 and the
519 minimum value which makes sense is 2.
520
521 This is purely to save memory - each supported CPU adds
522 approximately eight kilobytes to the kernel image.
523
91b91d01
PM
524source "kernel/Kconfig.preempt"
525
cad82448
PM
526config CPU_HAS_SR_RB
527 bool "CPU has SR.RB"
528 depends on CPU_SH3 || CPU_SH4
1da177e4
LT
529 default y
530 help
cad82448
PM
531 This will enable the use of SR.RB register bank usage. Processors
532 that are lacking this bit must have another method in place for
533 accomplishing what is taken care of by the banked registers.
1da177e4 534
cad82448
PM
535 See <file:Documentation/sh/register-banks.txt> for further
536 information on SR.RB and register banking in the kernel in general.
1da177e4 537
c80d79d7
YG
538config NODES_SHIFT
539 int
540 default "1"
541 depends on NEED_MULTIPLE_NODES
542
cad82448 543endmenu
1da177e4 544
cad82448 545menu "Boot options"
1da177e4 546
cad82448
PM
547config ZERO_PAGE_OFFSET
548 hex "Zero page offset"
549 default "0x00004000" if SH_MPC1211 || SH_SH03
550 default "0x00001000"
1da177e4 551 help
cad82448 552 This sets the default offset of zero page.
1da177e4 553
cad82448
PM
554config BOOT_LINK_OFFSET
555 hex "Link address offset for booting"
556 default "0x00800000"
557 help
558 This option allows you to set the link address offset of the zImage.
559 This can be useful if you are on a board which has a small amount of
560 memory.
1da177e4 561
cad82448
PM
562config UBC_WAKEUP
563 bool "Wakeup UBC on startup"
564 help
565 Selecting this option will wakeup the User Break Controller (UBC) on
566 startup. Although the UBC is left in an awake state when the processor
567 comes up, some boot loaders misbehave by putting the UBC to sleep in a
568 power saving state, which causes issues with things like ptrace().
1da177e4 569
cad82448 570 If unsure, say N.
1da177e4 571
cad82448
PM
572config CMDLINE_BOOL
573 bool "Default bootloader kernel arguments"
1da177e4 574
cad82448
PM
575config CMDLINE
576 string "Initial kernel command string"
577 depends on CMDLINE_BOOL
578 default "console=ttySC1,115200"
1da177e4
LT
579
580endmenu
581
cad82448 582menu "Bus options"
1da177e4
LT
583
584# Even on SuperH devices which don't have an ISA bus,
585# this variable helps the PCMCIA modules handle
586# IRQ requesting properly -- Greg Banks.
587#
588# Though we're generally not interested in it when
589# we're not using PCMCIA, so we make it dependent on
590# PCMCIA outright. -- PFM.
591config ISA
592 bool
cad82448 593 default y if PCMCIA
1da177e4
LT
594 help
595 Find out whether you have ISA slots on your motherboard. ISA is the
596 name of a bus system, i.e. the way the CPU talks to the other stuff
597 inside your box. Other bus systems are PCI, EISA, MicroChannel
598 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
599 newer boards don't support it. If you have ISA, say Y, otherwise N.
600
601config EISA
602 bool
603 ---help---
604 The Extended Industry Standard Architecture (EISA) bus was
605 developed as an open alternative to the IBM MicroChannel bus.
606
607 The EISA bus provided some of the features of the IBM MicroChannel
608 bus while maintaining backward compatibility with cards made for
609 the older ISA bus. The EISA bus saw limited use between 1988 and
610 1995 when it was made obsolete by the PCI bus.
611
612 Say Y here if you are building a kernel for an EISA-based machine.
613
614 Otherwise, say N.
615
616config MCA
617 bool
618 help
619 MicroChannel Architecture is found in some IBM PS/2 machines and
620 laptops. It is a bus system similar to PCI or ISA. See
621 <file:Documentation/mca.txt> (and especially the web page given
622 there) before attempting to build an MCA bus kernel.
623
624config SBUS
625 bool
626
cad82448
PM
627config SUPERHYWAY
628 tristate "SuperHyway Bus support"
629 depends on CPU_SUBTYPE_SH4_202
1da177e4
LT
630
631source "arch/sh/drivers/pci/Kconfig"
632
633source "drivers/pci/Kconfig"
634
635source "drivers/pcmcia/Kconfig"
636
637source "drivers/pci/hotplug/Kconfig"
638
639endmenu
640
641menu "Executable file formats"
642
643source "fs/Kconfig.binfmt"
644
645endmenu
646
3aa770e7
AS
647menu "Power management options (EXPERIMENTAL)"
648depends on EXPERIMENTAL
649
650source kernel/power/Kconfig
651
652config APM
653 bool "Advanced Power Management Emulation"
654 depends on PM
655endmenu
656
d5950b43
SR
657source "net/Kconfig"
658
1da177e4
LT
659source "drivers/Kconfig"
660
661source "fs/Kconfig"
662
663source "arch/sh/oprofile/Kconfig"
664
665source "arch/sh/Kconfig.debug"
666
667source "security/Kconfig"
668
669source "crypto/Kconfig"
670
671source "lib/Kconfig"